TW322528B - - Google Patents

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TW322528B
TW322528B TW86103139A TW86103139A TW322528B TW 322528 B TW322528 B TW 322528B TW 86103139 A TW86103139 A TW 86103139A TW 86103139 A TW86103139 A TW 86103139A TW 322528 B TW322528 B TW 322528B
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Taiwan
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signal
local
frequency
oscillator
conversion circuit
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TW86103139A
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Chinese (zh)
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Zenshin Test Co
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/16Multiple-frequency-changing
    • H03D7/161Multiple-frequency-changing all the frequency changers being connected in cascade
    • H03D7/163Multiple-frequency-changing all the frequency changers being connected in cascade the local oscillations of at least two of the frequency changers being derived from a single oscillator

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Superheterodyne Receivers (AREA)

Description

32如卯 W A7 B7 i、發明説明(1 ) 〔發明領域〕 本發明係關於一種頻率轉換電路,其係於使用多级IF 濾波器時,可在不使信號純度劣化下,將高純度之RF信號 轉換為I F信號。 〔發明之背景〕 就習知技術例,參照第4圖說明如下。 第4圖中所示之頻譜分析器,係藉第一本地振盪器31 之本地信號,經由混頻器10把輸入信號轉換爲第一頻率, 接著,經由I F濾波器60進行I F輸出,其次藉第二本地振盪 器34、混頻器11及IF濾波器61來進行第二頻率轉換及IF輸 出,然後藉第三本地振遨器35、混頻器12及IF濾波器62來 進行第三頻率轉換及IF輸出。 進而,藉基準振盪器33及倍頻器49來產生本地信號,. 並藉混頻器13及IF濾波器來進行第四頻率轉換及IF輪出, 接箸用檢波器80來檢波其IF輸出,以顯示器70顯示頻譜。 經濟部中央標準局員工消費合作社印製 I--------《装------訂 一 - (請先•閲讀势面之注意事項再填寫本頁) 又,時基產生器30,係為了將輸入信號之頻譜當做頻 率軸來顯示,而產生鋸齒波使之同步於掃描波振盪器31者 。又,第二本地振盪器34、Μ及第三本地振盪器35,係使 用基準產生器33之頻率穩定度,藉相位比較器51,52及分 頻器44、45、46、47、48來構成相位同步環路PLL1,PLL2。 一般而言,在頻譜分析器、網路分析器或外差式接收 器方面,爲了除掉圖像信號,且,為了改善頻率分辨能力 而使用多级IF濾波器。 當藉混頻器來混合RF信號及本地振盪器之信號時,就 輸出而言,可取得和及差之輸出,而藉IF濾波器來除掉一 方之圖像信號。又,頻率分辨能力,係依IF濾波器之分辨 本纸張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) -4 - 經濟部中央標準局員工消費合作社印製 Α7 Β7 五、發明説明(2) 能力帶寬而定。 一般而言,如作成高IF頻率的話,雖可輕易除去圖像 頻率,但窄帶之IF濾波器卻不易實現。反之,低IF頻率時 ,雖易組成窄帶之IF濾波器,但更不易除去圖像頻率。 因此,習知頻譜分析器之構成,一如第4圖所示,係 為了除去圖像信號,且,為了改善頻率分辨能力,而用四 级之多级外差方式來構成。 又,被轉換頻率之I F信號之信號純度,係依輸入信號 及各本地信號之信號純度而定。因此,為了不使信號纯度 劣化下,轉換成IF信號,而需要信號純度良好之本地振盪 器。 於是,Μ往,為了使之掃描振逯,而使用YIG振盪器 作為第一本地振盪器31,同時,按照振盪頻率而使用電介 質振盪器作為第二本地振盪器34, Μ及使用晶體振盪器作 為第三本地振盪器35及基準振盪器33。 且說,第二本地振盪器34及第三本地振盪器35,雖使 用電壓控制振盪器(VCO)來產生第二本地信號Lf 2及第三本 地信號Lf3,但為了謀求振盪頻率之穩定化,而Μ頻率穩 定之基準振盪器33為基礎,構成相位同步環路(Μ下記為 PLL) 。PLL2,係將一基準振盪器33之信號的相位及一由 分頻器47 , 48來分頻第三本地振盪器35之振盪頻率的相位 ,藉相位比較器52來檢出其相位誤差信號之後,將之反饋 至第三本地振盪器35,使基準振盪器之相位一致,藉此謀 求振盪頻率之穩定化。再者,PLL1,係將一藉PLL2之分頻 器47來分頻之信號相位、及一藉分頻器44〜46來分頻的相 位*藉相位比較器52來檢出其相位誤差信號之後,將之反 本紙張尺度適用中國國家標準(CNS ) Α4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) 裝· -訂 經濟部中央標準局員工消費合作杜印製 S22528 A7 B7 五、發明説明(3) 饋至第二本地振盪34,使之與由分頻器47所分頻之信號的 相位一致,藉此謀求振盪頻率之穩定化。又將基準振盪器 33作成三倍頻以作為第四本地信號Lf 4。 如上所述,第三本地振盪器35由於藉高頻率來振盪, 而使用九次諧波模式等之晶體搌盪器,所Μ成本偏高。又 ,如使用電介質振盪器作為第^本地振盪器35時,將變成 大堃而多造成成本增加之情況,存在箸實用上之不便。 於是,本發明,係鑑於上述問題而創作者,其目的係 在於提供一種,將高純度之RF信號,在不使信號純度劣化 之狀態下,轉換成I F信號之頻率轉換電路。 〔發明之概要〕 為達成上述目的而創作之第一實施例之發明為一種頻 率轉換電路,其特激在於:於多级頻率轉換電路,設置一 用來產生本地信號之本地振盪器36;設置一混合該本地振 盪器36之本地信號及輸入信號以轉換頻率之混頻器16;設 置一接收該混頻器16所轉換之信號,以除去圖像信號之IF 濾波器66;設置一用來分頻前述本地振盪器36之本地信號 的分頻器29; Μ及設置一混合由該分頻器29所分頻之本地 信號及前述IF濾波器66之輸出倍號以轉換頻率之之混頻器 17。 又,為達成上述目的而創作之第二實施例之發明為一 種頻率轉換電路,其特徵在於:一本地振盪器、及一分頻 該本地振盪器之本地信號以用來輪出另一方之本地信號之 電路*係由相位同步環路所構成。 又,為達成上述目的而創作之第三實施例之發明為一 本紙張尺度適用中國國家標準(〇奶)八4規格(210';< 297公釐) I ( 裝 訂^·Λ 1 _ - (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 Α7 Β7 五、發明説明(4) 棰測定器,其係由上述各實施例之頻率轉換電路所構成。 又,為達成上述目的而創作之第四實施例之發明為一 棰接收機,其係由上述第—第二實施例之頻率轉換電路 所構成。 〔圔式之簡單說明〕 第1圖係本發明之方塊圖。 第2圖係本發明頻譜分析器之方塊圖。 第3圖係本發明外差式接收機之方塊圖。 第4圖係習知頻譜分析器之方塊圖。 〔發明之詳細說明〕 首先,藉第2圔來說明本發明之實施例。 其構成為:一如第2圖所示,於使用四级IF逋波器之 外差式頻譜分析器中,將習知構成之第二本地信號Lf 2、 第三本地佶號Lf 3及第四本地信號Lf 4之產生方法,變更而 成者。 即,依照第2圖所示之頻譜分析器,其第一本地振盪 器31雖係使用跟習知相同之YIG振盪器的掃描振盪器,但 藉著本地振’盪器32之第二本地信號Lf 2,卻形成一 Μ基準 振盪器33爲基準源之相位同步環路PLL3。 在此處,PLL3,係將基準振盪器33之信號的相位、及 藉分頻40〜43來分頻本地振盪器32之信號的相位,用相位 比較器50來檢出其相位誤差信號,然後將之反饋至本地振 盪器32使其與基準振盪器33之相位相符,以謀求振盪頻率 之穩定化。又,將藉分頻器40及分頻器41來分頻本地振盪 本紙張尺度適用中國國家標準(CNS ) Α4規格(210X297公釐) ^ 裝 訂 ^'Λ (請先閱讀背面之注意事項再填寫本頁) -7 - 3225 2 s A7 B7 經濟部中央標準局員工消費合作社印製 i'發明説明(5) 器32之信號的信號,當做第三本地頻率Lf 3輸出,同時將 藉分頻器42來分頻的信號當做第四本地頻率Lf 4輸出。 當將信號純度AdBc/Hz之信號輸入於1/N分頻器時,一 般而言,可用下式求出分頻信號之信號純度B。 B 圬 A - 20 log N (dBc/Hz) 由上式可知,分頻器輪出之信號純度BdBc/Hz,較之 輸入信號之信號純度AdB/Hz更得到改善。 因此,儘管分頻本地振盪器32之信號,使其產生第三 本地頻率Lf 3及第四本地頻率,也不會有倍號純度之劣化 Ο 依上述之說明,本地振盪器32雖爲了頻率之穩定化, 而說明一由基準振盪器33來構成PLL電路之實施形態,但 如第1圖所示,只要本地振盪器36之本地頻率Lf2穩定的 話,本地振盪器36也可不構成PLL,而代之藉分頻器29來 分頻本地振盪器36之本地頻率Lf2M作為本地頻率Lf 3來實 施。 因此,本發明並不需要習知之第三本地振盪器之晶體 振遨器及周邊之PLL電路,可在不使信號純度劣化之狀態 下,將高純度之RF倍號轉換成IF信號,且可成為小型化及 廉價之頻率轉換電路。 其次,參照第3圖,就外差式接收機之情形,說明本 發明之其他實施例。 其構成,一如第3圖所示,成爲二段外差式構成。 藉放大器20來放大夾自天線之信號,接箸用混頻器14 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先閱讀t面之注意事項再填寫本頁) 裝· 訂 Α7 Β7 五、發明説明(6 ) 來進行第一頻率轉換,接著藉IF濾波器64來進行IF輸出, 進而用混頻器15來進行第二頻率轉換,然後用檢波器80檢 波由IF濾波器65所輸出之信號,進而用放大器21將其放大 後,藉揚聲器25來輪出音頻。 於是,藉助本地振盪器22之第一本地信號Lfl接箸形 成Μ基準振盪23作為基準源之相位同步環路PLL4,Μ謀穩 定化。 即,用分頻器26來分頻從本地振盪22振盪的第一本地 信號Lfl,Κ作爲第二本地信號Lf2 ;接著,將一由分頻器 27所分頻之信號的相位、及一藉分頻器28來分頻基準拫盪 器23之信號的相位,用相位比較器24來檢出其相位誤差信 號之後,將之反饋至本地振盪器22使其與基準振盪器23之 相位一致,Μ形成PLL4。 因此,本實施例並不需要第二本地振盪器之晶體振盪 器及周邊之PLL電路,可在不使信號純度劣化之狀態下, 將高純度之RF信號轉換成IF信號,且可成為小型化及廉價 之頻率轉換電路。 本發明,係在上述之實施形態下,呈現以下所述之效 果。 於二级Μ上之頻率轉換電路,藉分頻器來分頻一方之 本地振盪器之信號,藉Μ生成另一方之本地振遨器之信號 ,所Μ可削減本地振盪器之晶體振盪器及周邊之PLL電路 ,在不使信號純度劣化之狀態下,將高純度之RF信號轉換 成I F信號,且可獲得小型化及廉價之頻率轉換電路。 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請t閱讀^面之注意事項再填寫本貰) 装· 訂 經濟部中央標準局員工消費合作社印製 S22528 Μ Β7 經濟部中央標準局員工消費合作社印製 五、發明説明(7 ) 元件標號對照 13,11,10,14,16,17,15 ——混頻器 20,21——放大器 22,36,32 ....本地振盪器 23,33 ....基準振盪器 24,50,51,52——相位比較器 26,27,29,40-48 ——分頻器 30——時基產生器 31 ....第一本地振盪器 34——第二本地振盪器 35 ....第三本地振盪器 49 ....倍頻器 60,61,64,65,66 ——IF 濾波器 70——顯示器 80——檢波器 B——信號純度 Lfl——第一本地信號 Lf2 ____第二本地信號或第二本地頻率 Lf3 ____第三本地信號或第三本地頻率 Lf4——第四本地信號或第四本地頻率 (請先閱讀背面之注意事項再填寫本頁) 装· 訂 本纸乐尺度適用中國國家標進(CNS ) Λ·4ΑΙ珞(210X297公釐)32. W A7 B7 i. Description of the invention (1) [Field of the invention] The present invention relates to a frequency conversion circuit, which uses a multi-stage IF filter, which can reduce the purity of the signal without deteriorating the purity of the signal. The RF signal is converted into an IF signal. [Background of the Invention] The following describes the conventional technical example with reference to FIG. 4. The spectrum analyzer shown in FIG. 4 uses the local signal of the first local oscillator 31 to convert the input signal to the first frequency through the mixer 10, and then performs IF output through the IF filter 60, followed by The second local oscillator 34, the mixer 11 and the IF filter 61 perform the second frequency conversion and the IF output, and then use the third local oscillator 35, the mixer 12 and the IF filter 62 to perform the third frequency Conversion and IF output. Furthermore, the reference oscillator 33 and the frequency multiplier 49 are used to generate the local signal. The mixer 13 and the IF filter are used to perform the fourth frequency conversion and the IF round-off. Then, the detector 80 is used to detect the IF output. To display the spectrum on the display 70. Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs I -------- "Dressing ------ Book One- (please first • read the precautions of the situation and then fill out this page) Also, the time base is generated In order to display the frequency spectrum of the input signal as a frequency axis, the device 30 generates a sawtooth wave to synchronize it with the scanning wave oscillator 31. In addition, the second local oscillator 34, M and the third local oscillator 35 use the frequency stability of the reference generator 33, through the phase comparator 51, 52 and the frequency divider 44, 45, 46, 47, 48 to Constitute the phase synchronization loop PLL1, PLL2. In general, for spectrum analyzers, network analyzers, or heterodyne receivers, multi-stage IF filters are used to remove image signals and to improve frequency resolution. When the RF signal and the signal of the local oscillator are mixed by a mixer, the sum and difference outputs can be obtained in terms of output, and one side of the image signal is removed by the IF filter. In addition, the frequency resolution capability is based on the resolution of the IF filter. The paper standard is applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm) -4-Printed by the Ministry of Economy Central Standards Bureau Employee Consumer Cooperative A7 Β7 V. Invention Note (2) Capability bandwidth depends. Generally speaking, if the high IF frequency is made, the image frequency can be easily removed, but the narrow-band IF filter is not easy to realize. Conversely, at low IF frequencies, although it is easy to form a narrow-band IF filter, it is more difficult to remove the image frequency. Therefore, the structure of the conventional spectrum analyzer, as shown in Fig. 4, is to use a four-level multi-level heterodyne method in order to remove the image signal and to improve the frequency resolution. In addition, the signal purity of the I F signal at the converted frequency depends on the signal purity of the input signal and each local signal. Therefore, in order not to degrade the signal purity, a local oscillator with a good signal purity is required to convert to an IF signal. Therefore, in order to scan the vibration, the YIG oscillator is used as the first local oscillator 31, and at the same time, the dielectric oscillator is used as the second local oscillator 34 according to the oscillation frequency, and the crystal oscillator is used as The third local oscillator 35 and the reference oscillator 33. In addition, although the second local oscillator 34 and the third local oscillator 35 use a voltage controlled oscillator (VCO) to generate the second local signal Lf 2 and the third local signal Lf3, in order to stabilize the oscillation frequency, Based on the reference oscillator 33 whose frequency is stable, a phase synchronization loop (hereinafter referred to as PLL) is formed. PLL2 divides the phase of the signal of a reference oscillator 33 and the phase of the oscillation frequency of the third local oscillator 35 by frequency dividers 47, 48. After detecting the phase error signal by the phase comparator 52 And feed it back to the third local oscillator 35 to make the phase of the reference oscillator coincide, thereby seeking to stabilize the oscillation frequency. Furthermore, PLL1 is a signal phase divided by the frequency divider 47 of the PLL2, and a phase divided by the frequency dividers 44 to 46 * after detecting the phase error signal by the phase comparator 52 , The copy of the paper standard applies to the Chinese National Standard (CNS) Α4 specification (210 X 297 mm) (please read the notes on the back before filling this page) System S22528 A7 B7 5. Description of the invention (3) The second local oscillation 34 is fed to make it coincide with the phase of the signal divided by the frequency divider 47, thereby seeking to stabilize the oscillation frequency. The reference oscillator 33 is also multiplied by three to serve as the fourth local signal Lf 4. As described above, since the third local oscillator 35 oscillates at a high frequency, a crystal oscillator such as the ninth harmonic mode is used, so the cost is relatively high. In addition, if a dielectric oscillator is used as the second local oscillator 35, it will become large and increase the cost, which is inconvenient in practice. Therefore, the present invention was created in view of the above problems, and its object is to provide a frequency conversion circuit that converts a high-purity RF signal into an IF signal without deteriorating the signal purity. [Summary of the invention] The invention of the first embodiment created to achieve the above object is a frequency conversion circuit, the special feature is that: in a multi-level frequency conversion circuit, a local oscillator 36 for generating a local signal is provided; A mixer 16 that mixes the local signal of the local oscillator 36 and the input signal to convert the frequency; sets an IF filter 66 that receives the signal converted by the mixer 16 to remove the image signal; sets a A frequency divider 29 that divides the local signal of the local oscillator 36; M and sets a mixing signal that mixes the local signal divided by the frequency divider 29 and the output multiple of the IF filter 66 to convert the frequency器 17. 17. Moreover, the invention of the second embodiment created to achieve the above object is a frequency conversion circuit, which is characterized by: a local oscillator, and a local signal that divides the local oscillator to be used to round off the other party's local The signal circuit * is composed of a phase synchronization loop. In addition, the invention of the third embodiment created to achieve the above purpose is a paper standard applicable to the Chinese National Standard (〇 奶) 84 specifications (210 '; < 297 mm) I (Binding ^ · Λ 1 _- (Please read the precautions on the back before filling in this page) Α7 Β7 printed by the Employee Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the invention (4) The measuring device is composed of the frequency conversion circuits of the above embodiments. Moreover, the invention of the fourth embodiment created to achieve the above object is a receiver, which is composed of the frequency conversion circuit of the above-mentioned second-second embodiment. [Simple description of the formula] Figure 1 is this Block diagram of the invention. Figure 2 is a block diagram of the spectrum analyzer of the present invention. Figure 3 is a block diagram of the heterodyne receiver of the present invention. Figure 4 is a block diagram of a conventional spectrum analyzer. [Details of the invention Explanation] First, the second embodiment of the present invention will be described with reference to the second embodiment. Its structure is as follows: As shown in FIG. 2, in the difference type spectrum analyzer using a four-stage IF wave filter, the conventional structure is constructed Second local signal Lf 2, third local number The method of generating Lf 3 and the fourth local signal Lf 4 is changed. That is, according to the spectrum analyzer shown in FIG. 2, the first local oscillator 31 uses the same YIG oscillator as the conventional one The oscillator is scanned, but the second local signal Lf 2 of the local oscillator 32 forms a phase synchronization loop PLL3 with an M reference oscillator 33 as the reference source. Here, PLL3 is the reference oscillator The phase of the signal 33 and the phase of the signal of the local oscillator 32 are divided by the frequency of 40 ~ 43, the phase error signal is detected by the phase comparator 50, and then it is fed back to the local oscillator 32 to make it The phase of the reference oscillator 33 matches to stabilize the oscillation frequency. In addition, the local oscillator will be divided by the frequency divider 40 and the frequency divider 41. This paper standard is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm ) ^ Binding ^ 'Λ (please read the precautions on the back before filling in this page) -7-3225 2 s A7 B7 The Ministry of Economic Affairs Central Standards Bureau Employee Consumer Cooperative printed the i'invention description (5) The signal of the signal of the device 32 , As the third local frequency Lf 3 output, the same The signal divided by the frequency divider 42 is output as the fourth local frequency Lf 4. When the signal of the signal purity AdBc / Hz is input to the 1 / N frequency divider, in general, the frequency division can be obtained by the following formula The signal purity of the signal B. B 圬 A-20 log N (dBc / Hz) From the above formula, the signal purity of the frequency divider BdBc / Hz is better than that of the input signal AdB / Hz. Therefore Although the signal of the local oscillator 32 is divided down to produce the third local frequency Lf 3 and the fourth local frequency, there will be no degradation of the purity of the multiplier. According to the above description, although the local oscillator 32 is for frequency stability To illustrate an embodiment in which the reference oscillator 33 constitutes a PLL circuit, as shown in FIG. 1, as long as the local frequency Lf2 of the local oscillator 36 is stable, the local oscillator 36 may not constitute a PLL, but instead The local frequency Lf2M of the local oscillator 36 is divided by the frequency divider 29 to be implemented as the local frequency Lf3. Therefore, the present invention does not require the conventional crystal oscillator of the third local oscillator and the surrounding PLL circuit, and can convert high-purity RF multiples to IF signals without degrading the signal purity. Become a miniaturized and inexpensive frequency conversion circuit. Next, referring to Fig. 3, another embodiment of the present invention will be described in the case of a heterodyne receiver. As shown in Fig. 3, the structure is a two-stage heterodyne structure. Use the amplifier 20 to amplify the signal clipped from the antenna, and then use the mixer. 14 This paper standard is applicable to the Chinese National Standard (CNS) A4 specification (210X297mm) (please read the precautions on the t side before filling this page). · Order Α7 Β7 5. Description of the invention (6) Perform the first frequency conversion, then use the IF filter 64 to perform the IF output, and then use the mixer 15 to perform the second frequency conversion, and then use the detector 80 to detect the IF The signal output by the filter 65 is further amplified by the amplifier 21, and the audio is output by the speaker 25. Then, the first local signal Lfl of the local oscillator 22 is connected to form the phase synchronization loop PLL4 with the M reference oscillation 23 as a reference source, and M is stabilized. That is, the first local signal Lfl, K oscillated from the local oscillation 22 is divided by the frequency divider 26 as the second local signal Lf2; then, the phase of a signal divided by the frequency divider 27 and a borrow The frequency divider 28 divides the phase of the signal of the reference oscillator 23, uses the phase comparator 24 to detect its phase error signal, and feeds it back to the local oscillator 22 to make it match the phase of the reference oscillator 23, Μ Formation PLL4. Therefore, this embodiment does not require the crystal oscillator of the second local oscillator and the surrounding PLL circuit, and can convert high-purity RF signals into IF signals without degrading the signal purity, and can be miniaturized. And cheap frequency conversion circuit. The present invention, under the above-mentioned embodiment, exhibits the following effects. The frequency conversion circuit on the second level M uses a frequency divider to divide the signal of one local oscillator and generates a signal of the local oscillator of the other side, so the crystal oscillator and the local oscillator can be reduced. The peripheral PLL circuit converts high-purity RF signals into IF signals without degrading the signal purity, and a small and inexpensive frequency conversion circuit can be obtained. This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297mm) (please read ^ the precautions before filling in this book). Binding · Order S22528 Μ Β7 Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs Printed by the Bureau of Standards and Staff Consumer Cooperative V. Description of the invention (7) Comparison of component labels 13, 11, 10, 14, 16, 17, 15-mixer 20, 21-amplifier 22, 36, 32 ... Local oscillators 23, 33 .... Reference oscillators 24, 50, 51, 52-phase comparators 26, 27, 29, 40-48-frequency divider 30-time base generator 31 ... . First local oscillator 34-second local oscillator 35 .... third local oscillator 49 .... frequency multiplier 60, 61, 64, 65, 66-IF filter 70-display 80—detector B—signal purity Lfl—first local signal Lf2 ____second local signal or second local frequency Lf3 ____third local signal or third local frequency Lf4—fourth local signal or second Four local frequencies (please read the precautions on the back and then fill out this page). The size of the paper music book is applicable to China National Standard (CNS) Λ · 4ΑΙ 珞 (210X297 )

Claims (1)

Α8 Β8 C8 D8 經濟部中央橾準局員工消費合作社印裝 々、申請專利範圍 1. 一種頻率轉換電路,其特擻在於: 於多级頻率轉換電路中, 設置一用來產生本地信號之本地振盪器(36〉; 設置一混合該本地振盪器(36)之本地信號及輸入 信號W轉換頻率之混頻器(16); 設置一接收該混頻器(16)所轉換之信號,Μ除去 圖像信號之IF濾波器(66); 設置一用來分頻前述本地振盪器(36)之本地信號 的分頻器(29) ; Μ及 設置一混合由該分頻器(29)所分頻之本地倍號及 前述IF濾波器(66)之輸出信號以轉換頻率之混頻器 (17)。 2. 依據申請專利範圍第1項所述之頻率轉換電路,其特 擞在於: 一本地振盪器、及一分頻該本地振盪器之本地信 號Μ用來輸出另一方之本地信號的電路,係由相位同 步環路所構成。 3. —種測定器,其係由申請專利範圍第1項或第2項所 逑之頻率轉換電路所構成。 4. 一種接收機,其係由申請專利範圍第1項或第2項所 述之頻率轉換電路所構成。 (請先閲讀背面之注意事項再填寫本頁) 袈· 訂 本紙法尺度適用m家祐皁(CNS ) Α4規格(210X297公釐) -11 -Α8 Β8 C8 D8 Printed by the Consumer Cooperative of the Central Bureau of Economic Affairs of the Ministry of Economic Affairs 々, patent application 1. A frequency conversion circuit, its special features are: In a multi-level frequency conversion circuit, set up a local oscillation for generating local signals (36>; set up a mixer (16) that mixes the local signal of the local oscillator (36) and the input signal W to convert the frequency; set up to receive a signal converted by the mixer (16), M is removed IF filter (66) like the signal; set a frequency divider (29) for dividing the local signal of the local oscillator (36); Μ and set a mixed frequency divided by the frequency divider (29) The local multiplier and the output signal of the aforementioned IF filter (66) are used to convert the frequency of the mixer (17). 2. According to the frequency conversion circuit described in item 1 of the patent application scope, its special features are: a local oscillation And a circuit that divides the local signal M of the local oscillator to output the local signal of the other party is composed of a phase synchronization loop. 3. A measuring device, which is the first item in the scope of patent application Or the frequency conversion circuit described in item 2 4. A receiver, which is composed of the frequency conversion circuit described in item 1 or 2 of the scope of patent application. (Please read the precautions on the back before filling out this page) 袈 · Book size Applicable mjiayou soap (CNS) Α4 specification (210X297mm) -11-
TW86103139A 1996-03-14 1997-03-13 TW322528B (en)

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JP8592396A JPH09252261A (en) 1996-03-14 1996-03-14 Frequency conversion circuit

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Publication number Priority date Publication date Assignee Title
CN1207678C (en) * 2000-10-02 2005-06-22 株式会社爱德万测试 Frequency conversion sweep measuring method
US7242913B2 (en) 2002-03-12 2007-07-10 Infineon Technologies Ag Circuit arrangement for frequency conversion and mobile radio device with the circuit arrangement
DE10210708B4 (en) * 2002-03-12 2015-05-28 Intel Mobile Communications GmbH Mobile device with a circuit arrangement for frequency conversion
JP4522317B2 (en) * 2004-12-22 2010-08-11 富士通株式会社 Communication device

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