經濟部中央揉準局負工消費合作社印製 s〇7〇46 at B7 五、發明説明（f ) 本發明像為一種靜態記嫌鼸叠層接觸匾製法及其構造 ,主要為一種用以裂出靜態記億鼸之複晶矽負載的半導體 製程，本發明為簡化傳统製程後雜度及提供衍生之各項製 程優點者β 按現今供形成靜態記億體（SRAM)複晶矽負載 (POLY-LOAD)之叠層接觸 B (STACKED CONTACT)製法上， 邸需耗費相當後雜的製程始能完成，而有著製程過於煩雜 之缺黏，為此可配合參看第一A〜E^之習知製程所示， 首先為如第一 A疆所示，即於形成有場B (FOX)之矽 基底上方先行形成一薄厚度之閘氯化層（GOX) (GATE OXIDE),然後，則為沈積形成一底部複晶矽（P0) (SPILT POLY Si)，並經第一埋《接觸匾（BC 1> (BURIED CONTACT 1)之光罩/蝕刻步驟，邸令該底部複晶 矽（P0)對匾於場匾（FOX)的左«位置拽刻形成一 舆矽基底相通之B C 1開口匾域（即為：第一埋層接觸S )，其次則為依次進行第一複晶矽（P1)沈稹及第一氯 化層（0X1)之沈積作業，此時該第一複晶矽（P1) 卽由該BC1開口®域與矽層呈接觭（達接）狀態，繼而 ，則以如第一B圔所示，實施第一複晶矽層（P1)之光 罩/蝕刻作業，以形成如薩面之多儲塊狀®域，並進行一 次氣化層沈積及回蝕刻作業，以形成附箸於各塊狀第一複 晶矽（P1)及底部後晶矽（P0)外園之绝鐮側壁層（ SP) (SPACER),其後，則為如第二C·所示，對晶Η 本纸張尺度適用中a國家棣率（CNS ) A4规格（2丨0X297公釐） (请先閱讀背面之注意事項再填寫本I) •装. 線 A7 s〇7〇4e B7 五、發明説明（> ) 表面實施第二氯化層（0X2)沈積作業，以形成《箸表 面曲度變化之第二氣化層（0X2),接著，為實施第二 埋層接觴S (BC2)之光罩/¾刻作業，亦即為蝕刻對 應於第二氣化層（0X2)該樣示” BC2”之區域，形 成令相應之矽基底外《之開口，之後，則為如第二D麵所 示，進行第二複晶矽層（P2)之沈積/光罩定義作業， 以使第二後晶矽層（P2)得由第二埋層接觸E (BC2 )開口而與矽基底接觸，之后，亦沈稹形成一第三*化層 (0X3)於外表面，接著，再以如第一Εϋ所示，對第 三氣化層（0X3)進行疊層接觸B (S· C .) (STACKED CONTACT)之光罩/蝕刻作業，以形成如第一 E 圈右側可與第一後晶矽層（P1)相通之劂口，繼而實施 第三複晶矽層（P3)之沈積/光罩/蝕刻作業，以令画 面右侧之第三複晶矽ff (P3)得透過該疊層接觸届（S .C.)而與第一複晶矽層（P1)接觸，並藉由第一複 晶矽層（P1)以第一埋層接觸區（BC1)與矽基底接 觸，卽供為所諝的複晶矽負載（POLY — LOAD), 而後鑛亦有類似於半導體之其他保護層、金屬化、合金化 及覆蓋護層等製程，以形成槪略完整之製程》 而在上述習知之製程中可發現，該第一及第二埋層接 觸S (BC1) (BC2)即需各別之光覃及蝕刻之相關 製程（亦即需兩次光罩及兩次蝕刻作業）始能完成，即有 製程過於複雜之問題，且其第一埋層接觭S (BC1)亦 本纸張尺度適用中國國家揉準（CNS ) A4规格（210X297公釐） (請先聞讀背面之注意事項再填寫本頁) •裝 線 經濟部中央樣準局貝工消費合作社印製 經濟部中央橾車局負工消费合作社印¾ A7 _________B7五、發明説明（)） 需增加一道底部後晶矽（P0)沈稹步驟，而位在第一複 晶矽層（P1)上方之第一氧化層（0X1)，主要予第 一複晶矽層（P1)頂部墊高，以防止第二埋層接觭區（ BC2)之過蝕刻問題造成第二複晶矽層（P2)與第一 複晶矽層（P1)短路之間題，故必須加入該第一氣化層 (0X1)之沈積步《，且此第一氣化層（0X1)之介 入，亦導致第一後晶矽層（P1)之尺寸不易精確控制， 故上述習知靜態記慊體之相關製程不僅有著過於後雜之缺 點，且有衍生之問題存在，當有予以改巷之必要。 本發明人箱於傳统製程之缺黏乃經悉心地試驗與研究 並一本鍥而不捨之發明精神，终發明出一種靜態記嫌齷叠 層接觸區製法，主要為省略第一及第二埋層接之光》 /蝕刻步驟，而可在進行璺層接光革/蝕刻之際卽一 併形成，達到簡化步*之應點，且因製程之變化，亦省略 底部複晶矽、第一氣化層等製程，並因省略該等構迪，使 得品質更易精確控制與具有提昇良率之優黏》 為使 贵審査委員能進一步瞭解本發明之製法、構造 、待激及其他目的，玆 附以鼸式詳細說明如后： (一）·圖式部份： 第一 A〜E園：僳傳統製程之剖面示意画。 第二A〜E圖：偽本發明之製程剖面示意圓β 本發明主要為提供一種簡化之靜態記億體製程並可省 略若干構造物，以«致提昇製程效率及降低製造成本之優 -5 - (請先W讀背面之注意事項再填寫本頁)Printed s〇7〇46 at B7 by the Central Labor Bureau of the Ministry of Economic Affairs. 5. Description of the invention (f) The present invention is like a method and structure of static suspicion of stacked layered contact plaques, mainly for cracking. A static polysilicon-loaded semiconductor process with a static memory of billions of billions of dollars is provided. The present invention is to simplify the conventional post-process impurities and provide various process advantages derived from the β. According to the current supply to form a static memory (SRAM) polycrystalline silicon load (POLY -LOAD) of the stacked contact B (STACKED CONTACT) manufacturing method, the residence requires a relatively complicated process before it can be completed, and the process is too complicated and lacks stickiness. For this reason, you can refer to the first A ~ E ^ knowledge As shown in the process, the first is as shown in the first A, that is, a thin gate oxide layer (GOX) (GATE OXIDE) is formed on the silicon substrate on which the field B (FOX) is formed, and then it is Shen Ji Form a bottom polycrystalline silicon (P0) (SPILT POLY Si), and after the first buried "contact plaque (BC 1> (BURIED CONTACT 1) photomask / etching step, the bottom polycrystalline silicon (P0) The plaque is engraved on the left «position of the field plaque (FOX) to form a BC 1 open plaque domain communicating with the silicon substrate (That is: the first buried layer contacts S), followed by the deposition of the first polycrystalline silicon (P1) Shen Zhen and the first chloride layer (0X1), in which case the first polycrystalline silicon (P1) ) Since the BC1 opening ® domain is in contact (reaching) with the silicon layer, then, as shown in the first B, the photomask / etching operation of the first polycrystalline silicon layer (P1) is performed to Form a multi-reservoir block-shaped domain such as Sasamian, and perform a vaporization layer deposition and etch-back operation to form an outer garden attached to each block of first polycrystalline silicon (P1) and bottom post-crystalline silicon (P0) SPD (SPACER), and then, as shown in the second C ·, apply the Chinese National Atomic Rate (CNS) A4 specification (2 丨 0X297mm) to the crystal paper standard Please read the precautions on the back before filling this I) • Installation. Line A7 s〇7〇4e B7 5. Description of the invention (>) The second chloride layer (0X2) is deposited on the surface to form the The second vaporization layer (0X2) with varying degrees, then, for the second buried layer joint S (BC2) photomask / engraving operation, that is, etching corresponding to the second vaporization layer (0X2) Show "BC2" Area, forming an opening outside the corresponding silicon substrate, and then, as shown in the second D surface, performing the deposition / mask definition of the second polycrystalline silicon layer (P2) to make the second post-crystalline silicon The layer (P2) must be opened by the second buried layer contact E (BC2) to contact the silicon substrate, after which, Shen Zhen also forms a third layer (0X3) on the outer surface, and then, as shown in the first Εϋ It is shown that the third vaporization layer (0X3) is subjected to a stack contact B (S. C.) (STACKED CONTACT) photomask / etching operation to form a first post-crystal silicon layer that can be on the right side of the first E circle ( P1) The connected mouth, and then the deposition / mask / etching of the third polycrystalline silicon layer (P3) is carried out, so that the third polycrystalline silicon ff (P3) on the right side of the screen must be in contact through the stack ( S.C.) and in contact with the first polycrystalline silicon layer (P1), and through the first polycrystalline silicon layer (P1) with the first buried layer contact area (BC1) and the silicon substrate contact, the confession Polycrystalline silicon load (POLY — LOAD), and then the ore also has other protective layers similar to semiconductors, metallization, alloying and covering protective layer and other processes to form a slightly complete process. It can be found in the process that the first and second buried layer contacts S (BC1) (BC2) require separate photolithography and etching related processes (that is, two photomasks and two etching operations). Completed, that is, the process is too complicated, and the first buried layer joint S (BC1) is also applicable to the Chinese national standard (CNS) A4 specification (210X297 mm) (please read the notes on the back first Please fill in this page again.) • The assembly line of the Ministry of Economic Affairs, Central Sample Bureau, Beigong Consumer Cooperative, printed by the Ministry of Economic Affairs, Central Carriage Bureau, negative labor consumer cooperative. P0) Shen Zhen step, and the first oxide layer (0X1) above the first polycrystalline silicon layer (P1) is mainly raised to the top of the first polycrystalline silicon layer (P1) to prevent the second buried layer The over-etching problem in the area (BC2) causes a short circuit between the second polycrystalline silicon layer (P2) and the first polycrystalline silicon layer (P1), so the deposition step of the first vaporized layer (0X1) must be added. , And the intervention of the first vaporization layer (0X1) also causes the size of the first post-crystal silicon layer (P1) to be difficult to control accurately, so Conventional static processes related to the body of the contented mind not only has disadvantages too after the miscellaneous, and the existence of the derivative problem, when there shall be need to change the lane. The lack of stickiness of the inventor's box in the traditional manufacturing process has been carefully tested and researched and a persevering spirit of invention. Finally, a method of statically remembering the suspected laminated contact area is invented, mainly to omit the first and second buried lamination "Light" / Etching step, which can be formed at the same time when performing layer-to-layer light leather / etching, to achieve the simplification step *, and due to changes in the process, the bottom polycrystalline silicon and the first gasification are also omitted Processes, and because of the omission of these structures, the quality is easier to accurately control and the superior stickiness has improved yield. "To enable your reviewers to further understand the manufacturing method, structure, standby and other purposes of the present invention, we attach The detailed description of the mandarin style is as follows: (1) · Schematic part: The first A ~ E garden: a schematic sketch of the traditional manufacturing process. Figures 2A ~ E: Pseudo-inventive process profile schematic circle β The present invention is mainly to provide a simplified static billion-counting system process and can omit several structures, so as to improve process efficiency and reduce manufacturing costs -(Please read the notes on the back before filling this page)
I 裝. 線 本紙張尺度適用中國國家揉準（CNS ) A4規格（2丨0 X 297公漦） ^〇7〇4β α7 _Β7__________ 五、發明説明（# ) 點，製法方面為如第二Α〜Ε匾所示，苜先如第二Α圔所 示，亦為先行於形成有埸匾（FOX)之矽基底上形成薄 厚度之閘氣化層（FOX),並沈稹形成適當厚度之第一 複晶矽層（P1)，其次，則為如第二B圈所示，卽對第 一複晶矽層（P1)進行光罩/蝕刻作窠而形成各別之塊 狀型式之第一禊晶矽層（P1),而后，則為進行一氣化 1之沈積/回蝕刻作業，以形成附着於各値第一複晶矽層 (P1)垂直壁面之绝緣側壁層（SP)，之後，為以第 二C晒所示，全面性沈積形成第一《化1(0X1)(亦 可為其他類似之絶鐮材料構成），其後，為如第二D圖所 示，為進行第二複晶矽層（P2)之沈積/光單定義之步 辍，而在第一《化層（0X1)上方形成分離之第二複晶 矽層（P2),繼而覆蓋第二氣化層（0X2)，最後， 則為實施II層接觴區（S . C . ) (STACKED CONTACT)之 光罩/蝕刻作業，而此叠層接觸區光罩為合併有第一、第 二埋層接觸區（BC1) (BC2)之圆形，且為令叠層 經濟部中央揉準局負工消费合作社印製 (請先閱讀背面之注意事項再填寫本頁) 接觭區（S. C.)與第一埋層接觸匾（BC1)合併為 同一蝕刻開口，亦卽於蝕刻完成後，除了形成可使黼面右 側之第一複晶矽層（P1)局部外露之β層接觸匾（S. C.)之匾域外，亦一併形成該第一及第二埋層接觸區（ BC1) (BC2),後缠僅需遒行第三複晶矽層（Ρ3 )之沈積/光罩定義之步«後，即形成鴒別與矽基底之埋 層接觸區（BC1) (BC2)接觸之第三後晶矽層（Ρ -6- 本紙法尺度適用中國國家棵準（CNS ) Α4規格（2丨0><297公釐） 經濟部中央揉準局負工消t合作.社印裂 A7 __B7 五、發明説明（y)I pack. The size of the line paper is applicable to the Chinese National Standard (CNS) A4 (2 丨 0 X 297 Gongluan) ^ 〇7〇4β α7 _Β7 __________ Fifth, the invention description (#) point, the manufacturing method is as the second A ~ As shown in the Εplaque, alfalfa is first shown as the second Α 圔, and it is also the first to form a thin gate gasification layer (FOX) on the silicon substrate on which the plaque (FOX) is formed, and form the appropriate thickness. A polycrystalline silicon layer (P1), followed by, as shown in the second B circle, the first polycrystalline silicon layer (P1) is masked / etched to form the first of different bulk patterns A crystalline silicon layer (P1), and then, a vaporization 1 deposition / etchback operation is performed to form an insulating sidewall layer (SP) attached to the vertical wall surface of each first polycrystalline silicon layer (P1), and then , As shown in the second C, the first comprehensive formation of the first "Chem 1 (0X1) (can also be composed of other similar materials of sickle), afterwards, as shown in the second D, for the first The second polycrystalline silicon layer (P2) is deposited / defined by a single step, and a separate second polycrystalline silicon layer (P2) is formed above the first chemical layer (0X1) to cover the second gasification (0X2), finally, it is to implement the photomask / etching operation of the layer II joint area (S.C.) (STACKED CONTACT), and the photomask of the stacked contact area is combined with the first and second buried layer contacts The area (BC1) (BC2) is circular and printed by the Consumer Cooperative of the Central Bureau of Accreditation of the Ministry of Economics (please read the precautions on the back before filling out this page). Connect the area (SC) with the first The buried layer contact plaque (BC1) is merged into the same etching opening, and after the etching is completed, in addition to forming the plaque domain of the β-layer contact plaque (SC) that can partially expose the first polycrystalline silicon layer (P1) on the right side of the striated plane , And the first and second buried layer contact areas (BC1) (BC2) are formed together, and the post-wrapping only needs to be performed after the step of deposition / mask definition of the third polycrystalline silicon layer (Ρ3) « The third post-crystalline silicon layer in contact with the buried contact area (BC1) (BC2) of the silicon substrate (PP-6- This paper method standard is applicable to China National Standard (CNS) Α4 specification (2 丨 0 > < 297 Mm) The Ministry of Economic Affairs Central Bureau of Accreditation and Co-operation. Co-printed A7 __B7 V. Description of Invention (y)
3),如此邸完成本發明之主要製法流程，且如第二E8B 之構造更可澝楚發現，本發明為透過叠層接觸區光軍之姓 刻步驟下，更一併令圓面左倒之第二複晶矽層（P 2)的 端部外«及令圃面右餹之第一複晶矽層（P1)局部外露 之情況下，使沈稹及定義形成之左、右兩組各別之第三複 晶矽層（P2)更分別與第二及第一嫌晶矽（P2) ( P 1)接觸而再直接與第二/第一埋層接觸區（BC2)( BC1)，此舉，即與前述第一圖之習知構迪相較，兩者 之迴路連接效果完全相同，亦卽為令圈面左侧之第二複晶 矽層（P2)與第二埋層接觸區（BC2)達接，而匾面 右侧為以第三複晶矽β (P3)、第一揉晶矽層（P1) 及第一埋層接ttS (BC1)連通之效果。 由前逑本發明之製程觀之，即有如下各項優點： ⑴免除第一及第二埋層接觸區之光軍/蝕刻之步班，即大幅 降低製程複雜度，逢到簡化製程之優貼。 ⑵無蒲傳統之底部複晶矽（SPILT POLY)構造及其沈積作業， 並無須在第一複晶矽層上方附著用以防止接觸區過蝕刻之 氣化層構造，亦相形缩短製程複雜度》 ⑶由於第一複晶矽層上方無額外氣化層之故，令後晶矽之尺 寸易於精確控制 ⑷埋層接觸區（BC1),在埋層蝕刻過程中因有第一複晶 矽己先行蝕刻完成，将不會有深溝渠（DEEP TRENCH)的現 象産生（如第一B〜E匾），而埋層接觸區（BC2)具 本纸伕尺度逍用中國困家揉率（CNS ) A4規格（210X297公釐） (請先閎讀背面之注意事項再填寫本頁) .裝. 線 A7 B7五、發明説明（i )有自動對準（SELF ALIGNED)效果，在進行埋蝕刻過程中蓮 用第二複晶矽之止播，將使蝕刻製程的宽裕度變大。 ϋ II - * - - - —II ! - - - —- I In —-―I n (請先W讀背面之注意事項再填寫本頁) 竹 線 經濟部中央樣準局負工消资合作社印裝 本紙張尺度逋用中a國家揉準（CNS ) A4*l格（210 X 297公釐）3), the main manufacturing process of the present invention is completed in this way, and as the structure of the second E8B is more obvious, the present invention is through the step of engraving the surname of the Guangjun through the laminated contact area, and the round surface is also inverted to the left When the end of the second polycrystalline silicon layer (P 2) is exposed and the first polycrystalline silicon layer (P1) on the right side of the garden is partially exposed, Shen Zhen and the left and right groups formed by the definition The respective third polycrystalline silicon layer (P2) is in contact with the second and first crystalline silicon (P2) (P1) respectively and then directly in contact with the second / first buried layer contact area (BC2) (BC1) This move is the same as the conventional structure of the first figure above, and the circuit connection effect of the two is exactly the same. It is also the second polycrystalline silicon layer (P2) and the second buried layer on the left side of the ring surface. The contact area (BC2) is connected, and the right side of the plaque surface is connected with the third polycrystalline silicon β (P3), the first rubbing silicon layer (P1) and the first buried layer ttS (BC1). From the perspective of the process of the present invention, it has the following advantages: (1) Elimination of the optical army / etching steps of the first and second buried layer contact areas, which greatly reduces the complexity of the process, and the advantages of simplifying the process paste. ⑵ The traditional bottom polycrystalline silicon (SPILT POLY) structure and its deposition operation without Wupu, without the need to attach a gasification layer structure above the first polycrystalline silicon layer to prevent over-etching of the contact area, and also reduce the complexity of the process. (3) Because there is no additional vaporization layer above the first polycrystalline silicon layer, the size of the post-crystalline silicon is easy to accurately control. (4) Buried layer contact area (BC1). The first polycrystalline silicon has been advanced in the buried layer etching process. After the etching is completed, there will be no deep trench (DEEP TRENCH) phenomenon (such as the first B ~ E plaque), and the buried layer contact area (BC2) has the original paper mill scale and the Chinese sleep rate (CNS) A4 Specifications (210X297mm) (please read the precautions on the back before filling in this page). Install. Line A7 B7 5. Description of the invention (i) Automatic alignment (SELF ALIGNED) effect, lotus during the process of buried etching Using the second polycrystalline silicon to stop the broadcast will increase the margin of the etching process. ϋ II-*---— II!---—- I In —-― I n (please read the precautions on the back and then fill out this page) Printed by the Cooperative Society of the Ministry of Economic Affairs The size of the paper used in this paper is in the national a (CNS) A4 * l grid (210 X 297 mm)