TW297944B - - Google Patents
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- TW297944B TW297944B TW085105772A TW85105772A TW297944B TW 297944 B TW297944 B TW 297944B TW 085105772 A TW085105772 A TW 085105772A TW 85105772 A TW85105772 A TW 85105772A TW 297944 B TW297944 B TW 297944B
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- oxide layer
- silicon substrate
- heat treatment
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- 238000000034 method Methods 0.000 claims description 50
- 239000000758 substrate Substances 0.000 claims description 40
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 34
- 229910052710 silicon Inorganic materials 0.000 claims description 34
- 239000010703 silicon Substances 0.000 claims description 34
- 239000007789 gas Substances 0.000 claims description 17
- 238000010438 heat treatment Methods 0.000 claims description 15
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 13
- 150000004767 nitrides Chemical class 0.000 claims description 13
- 238000007254 oxidation reaction Methods 0.000 claims description 12
- 230000003647 oxidation Effects 0.000 claims description 11
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 239000001301 oxygen Substances 0.000 claims description 5
- 229910052760 oxygen Inorganic materials 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 claims description 4
- 238000009792 diffusion process Methods 0.000 claims description 3
- 238000009434 installation Methods 0.000 claims 2
- 241000270295 Serpentes Species 0.000 claims 1
- 238000009933 burial Methods 0.000 claims 1
- 239000007800 oxidant agent Substances 0.000 claims 1
- 230000001590 oxidative effect Effects 0.000 claims 1
- 238000000059 patterning Methods 0.000 claims 1
- 210000003625 skull Anatomy 0.000 claims 1
- 230000001681 protective effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000009413 insulation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 125000004433 nitrogen atom Chemical group N* 0.000 description 2
- 238000007792 addition Methods 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Description
經濟部中央標準局M3:工消費合作杜印製 Α7 Β7 五、發明説明(1 ) 發明之背景 1. 發明之領域 本發明係關於製造場氧化層之方法以使一裝置與其它裝 置呈電氣連接之絕緣,且更特別係關於使用nh3氣體熱處 理以增加活性區域之製程。 2. 先前技藝之敘述 一般而言,電氣絕緣裝置之場氧化層係藉LOCOS (局部 性矽氧化反應)方法所製成,其係使用諸如氮化物層之氧 化遮蔽層以氧化矽基材之局部區。然而,因爲LOCOS方法 形成會減少裝置之活性區域之鳥喙狀弩狀,諸如OSELO ( 補償型LOCOS)及MOSELO (改良型OSELO)方法之改良型 LOCOS方法目前已實用化。 OSELO方法於矽基材氧化之前於其中形成一溝槽。即在 矽基材氧化以形成場氧化層之前(其中護墊氧化層及氧化 遮蔽層(氮化物)被先行製成圖型,使矽基材之裝置隔絕區 域被曝光),一氮化物間隔層被形成於氧化遮蔽層之側壁 上且一溝槽藉蝕刻矽基材至厚度約300至700Α而被製得。 此氮化間隔層防止了介於護墊氧化層與矽基材間之界面產 生矽基材之氧化》 然而,氮化物間隔層之寬度愈寬闊,被氧化之區域則愈 狹窄。此即是使用如上敘述之氮化物間隔層破壞了絕緣效 應。另一方面,0SEL0方法之問題點在於極狹窄寬度之氮 化物間隔層會増加產生鳥喙狀弩曲。 本紙張尺度適用中國國家標準(CNS ) A4规格(210X297公釐) ^--裝------------^ I 線 (锖先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 A7 ------------ B7_五、發明説明(2 ) 發明之概要 本發明(目的係提供可減少鳥喙狀弩曲與增加場氧化層 絕緣效應之方法。 按照本發明之樣態,此處提供於半導體裝置中製造場氧 化層i方法,包含如下步驟:提供—矽基材;在該矽基材 上形成一氧化層;及在含氮氣體之大氣環境下,於該矽基 材上實施熱處理製程時,將氮氣注入該氧化層以避免氧沿 著該矽基材與該氧化層間界面之擴散。 _照本發明之另一樣態,此處提供於半導體裝置中製造 場氧化層之方法,包含如下步驟:提供一矽基材;在該矽 基材上形成一氧化層;及在含氮氣體之大氣環境下於該矽 基材上實施熱處理製程時,將氮氣注入該氧化層以避免氧 沿著該碎基材與該氧化層間界面之擴散,形成一氮化物層 在該氧化層上;將該氮化物層與該氧化層製成圖型,使該 碎基材之場區域曝光;在該氮化物層與該氧化層之側壁上 形成氮化物間隔層,及藉蝕刻該矽基材形成一溝槽;且對 該已曝光之矽基材實施熱氧化處理製程。 圖示之簡短敘述 本發明之其他目的與樣態自以下具體實例之敘述及參考 隨附之圖示將變得更易明白,其中: 第1A圖至1E圖係舉例説明根據本發明製造場氧化層方法 之剖面囷。 較佳具體實例之詳細敘述 在本文件内,本發明以下將參考第1A圖至1E圖詳細地描 -5- 本紙張尺度適用中國國家標準(CNS ) Α4規格(210X297公釐) (請先閲讀背面之注意事項再填寫本頁) -裝. 、*τ 線 297944 經濟部中央標準局負工消費合作社印製 五、發明説明(3 ) 述。 首先如第1A囷所示,一矽基材1之上部份被氧化,然後 護塾氧化層2被形成合>5夕基材1之上,其厚度約5〇至5〇〇 A。 具有護蟄氧化層2之碎基材1用含氮氣趙(例如,包含njj3, N〇2氣體)與一 N2氣體熱處理經3〇至120分鐘^ n2氣體被使 用以使裝置安定》此時,NH3或N02氣體於全部氣體中之 濃度係超過50%_且裝置在濃度8〇〇至ii〇〇ec下與壓力1〇至 1〇〇托(Ton·)下被熱處理。結果,小量之氮原子存在於接近 矽基材1與護墊氧化層2間界面之處」數字3代表含有氮原 子之氧化層》 接著如第1B圖所示,一氮化物層4被形成於護墊氧化層2 之上,其厚度約1000至2000A,以避免矽基材i在熱處理製 程時被氧化。部份之氮化物層4與護勢氧化層2(包含第3 層)被移去使用定義場區域之光罩予以移除,因此曝露出 部份矽基材1。 如第1C圖所不,爲形成一氮化物間隔層5於氮化物層.4與 濩墊氧化層21側壁上,在所獲得之氮化物層結構被沉積 疋厚度約100至500A且利用異向性蝕刻製程予以蝕刻β另 外,在蝕刻氮化物層之時,過蝕刻製程被控制以蝕刻矽基 材1以使形成一溝槽達深度約2〇〇至700Α。 如第1D圖所示’曝露出之矽基材在高溫度下藉熱氧化製 程被氧化且所形成之場氧化層6之厚度約25〇〇至35〇〇a。因 爲於護整氧化層中之氣原子防止了氧沿著介於碎基材與護 墊氧化層間之界面擴散,鳥喙狀彎曲被保持在最小量。 (婧先閱讀背面之注意事項再填寫本頁) •裝. 訂 線 本紙張尺度適用中國國家標準(CNS) A7 B7 五、發明説明(4 ) 最後,如第1E圖所示,在移除氮化物層4之後,氮化物 間隔層5與護墊氧化層2.經過濕式蝕刻製程,折損 (sacrificial)氧化製程於矽基材】之表面上實施。此折損氧 化製程,移除掉矽基材1之損壞部份,藉形成一熱氧化層 在具有損壞部份且藉移除熱氧化層之碎基材1之表面上而 被完成。 如以上所敘述乏顯而易見,本發明對於藉防止鳥嗓狀彎 曲在介於矽基材與護墊氧化層間之界面產生以增加活性區 域爲有效。另外,本發明可形成一因爲可使用一薄氮化物 層而具有一優異絕緣效果之厚場氧化層β因此,本發明可 被應用於不同LOCOS方法中。 雖然本發明之較佳具體實例已被揭示以説明用途,彼等 熟練此方面技藝者將認知各種修正,.添加與替代均係有可 能,且不致遠離本發明在所附之申請專利範圍中所揭示之 樣態與精神。 裝— 訂 線 (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消费合作社印裝 本紙琅尺度通用宁國國冢標準(CNS ) A4規格(210X297公釐Central Standards Bureau M3 of the Ministry of Economic Affairs: Industrial-Consumer Cooperation Du Printed Α7 Β7 V. Description of the Invention (1) Background of the Invention 1. Field of the Invention The present invention relates to a method of manufacturing a field oxide layer to make a device electrically connected to other devices Insulation, and more particularly related to the process of using nh3 gas heat treatment to increase the active area. 2. Description of the prior art Generally speaking, the field oxide layer of the electrical insulation device is made by the LOCOS (localized silicon oxidation reaction) method, which uses an oxidation shielding layer such as a nitride layer to oxidize a part of the silicon substrate Area. However, because the LOCOS method forms a beak-shaped crossbow that reduces the active area of the device, improved LOCOS methods such as OSELO (compensated LOCOS) and MOSELO (modified OSELO) methods are currently in practical use. The OSELO method forms a trench in the silicon substrate before oxidation. That is, before the silicon substrate is oxidized to form a field oxide layer (where the pad oxide layer and the oxidation shielding layer (nitride) are patterned first, so that the device isolation area of the silicon substrate is exposed), a nitride spacer layer A trench is formed on the sidewall of the oxidation masking layer and a trench is fabricated by etching the silicon substrate to a thickness of about 300 to 700A. This nitride spacer prevents the oxidation of the silicon substrate from the interface between the pad oxide layer and the silicon substrate. However, the wider the width of the nitride spacer, the narrower the oxidized area. This is to use the nitride spacer described above to destroy the insulation effect. On the other hand, the problem with the OSEL0 method is that the extremely narrow width of the nitride spacer layer will increase the beak-shaped crossbow. The size of this paper is applicable to the Chinese National Standard (CNS) A4 specification (210X297mm) ^-install ------------ ^ I line (Read the precautions on the back before filling this page) Economy Printed by the Ministry of Central Standards Bureau Employee Consumer Cooperative A7 ------------ B7_ V. Description of the invention (2) Summary of the invention The present invention (the purpose is to provide a bird ’s beak-shaped crossbow and increase the field Method for insulating effect of oxide layer. According to an aspect of the present invention, a method for manufacturing a field oxide layer i in a semiconductor device is provided herein, which includes the following steps: providing a silicon substrate; forming an oxide layer on the silicon substrate; and In a nitrogen-containing atmosphere, when performing a heat treatment process on the silicon substrate, nitrogen is injected into the oxide layer to avoid the diffusion of oxygen along the interface between the silicon substrate and the oxide layer. _ According to another aspect of the invention The method for manufacturing a field oxide layer in a semiconductor device includes the following steps: providing a silicon substrate; forming an oxide layer on the silicon substrate; and forming the silicon substrate in an atmosphere containing nitrogen gas When the heat treatment process is performed on the material, nitrogen is injected into the oxide layer In order to avoid the diffusion of oxygen along the interface between the broken substrate and the oxide layer, a nitride layer is formed on the oxide layer; the nitride layer and the oxide layer are patterned to make the field region of the broken substrate Exposure; forming a nitride spacer on the sidewalls of the nitride layer and the oxide layer, and forming a trench by etching the silicon substrate; and performing a thermal oxidation process on the exposed silicon substrate. Brief description of other objects and aspects of the present invention will become easier to understand from the description of the following specific examples and reference to the accompanying drawings, in which: FIGS. The detailed description of the preferred specific examples is described in this document. The present invention will be described in detail below with reference to Figures 1A to 1E. This paper scale is applicable to the Chinese National Standard (CNS) Α4 specification (210X297 mm) (please Read the precautions on the back and then fill out this page)-installed., * Τ line 297944 Printed by the Ministry of Economic Affairs Central Standards Bureau Negative Consumers Cooperative Fifth, the description of invention (3). First, as shown in 1A, a silicon-based Timber 1 upper part Oxidation, and then the protective oxide layer 2 is formed on the base material 1 and has a thickness of about 50 to 500 A. The crushed substrate 1 with the protective oxide layer 2 is made of nitrogen-containing gas (for example, Including njj3, N〇2 gas) and a N2 gas heat treatment for 30 to 120 minutes ^ n2 gas is used to stabilize the device. At this time, the concentration of NH3 or N02 gas in all gases exceeds 50% _ and the device is It is heat-treated at a concentration of 800 to 1100 ec and a pressure of 10 to 100 torr. As a result, a small amount of nitrogen atoms exist near the interface between the silicon substrate 1 and the pad oxide layer 2 "Number 3 represents an oxide layer containing nitrogen atoms." Next, as shown in FIG. 1B, a nitride layer 4 is formed on the pad oxide layer 2 with a thickness of about 1000 to 2000 A to prevent the silicon substrate i from It is oxidized during the heat treatment process. Part of the nitride layer 4 and the protective oxide layer 2 (including the third layer) are removed and removed using a photomask defining the field area, thus exposing part of the silicon substrate 1. As shown in FIG. 1C, in order to form a nitride spacer layer 5 on the side walls of the nitride layer 4 and the pad oxide layer 21, the obtained nitride layer structure is deposited with a thickness of about 100 to 500 A and using anisotropy The etching process is to etch β. In addition, when etching the nitride layer, the over-etching process is controlled to etch the silicon substrate 1 to form a trench to a depth of about 200 to 700 Å. As shown in FIG. 1D, the exposed silicon substrate is oxidized at a high temperature by a thermal oxidation process and the field oxide layer 6 is formed to have a thickness of about 2500 to 3500a. Because the gas atoms in the protective oxide layer prevent oxygen from diffusing along the interface between the broken substrate and the pad oxide layer, the bird's beak-like curvature is kept to a minimum. (Jing first read the precautions on the back and then fill out this page) • Packing. The paper size of the binding book is applicable to the Chinese National Standard (CNS) A7 B7 5. Invention description (4) Finally, as shown in Figure 1E, remove the nitrogen After the chemical compound layer 4, the nitride spacer layer 5 and the pad oxide layer 2. After a wet etching process, a sacrificial oxidation process is implemented on the surface of the silicon substrate. This damage oxidation process removes the damaged portion of the silicon substrate 1 by forming a thermal oxide layer on the surface of the broken substrate 1 with the damaged portion and by removing the thermal oxide layer. As described above, it is obvious that the present invention is effective for increasing the active area by preventing bird-like bending from occurring at the interface between the silicon substrate and the pad oxide layer. In addition, the present invention can form a thick field oxide layer β having an excellent insulating effect because a thin nitride layer can be used. Therefore, the present invention can be applied to different LOCOS methods. Although the preferred specific examples of the present invention have been disclosed to illustrate the use, those skilled in the art will recognize various modifications, additions and substitutions are possible, and they should not be far from the invention within the scope of the attached patent application Reveal the appearance and spirit. Binding — Threading (Please read the precautions on the back before filling in this page) Printed by the Employees ’Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs This paper is the standard Ningguo National Mound Standard (CNS) A4 specification (210X297mm
Claims (1)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950017885A KR100190363B1 (en) | 1995-06-28 | 1995-06-28 | Forming element isolation region in semiconductor device |
Publications (1)
Publication Number | Publication Date |
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TW297944B true TW297944B (en) | 1997-02-11 |
Family
ID=19418567
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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TW085105772A TW297944B (en) | 1995-06-28 | 1996-05-16 |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPH0917780A (en) |
KR (1) | KR100190363B1 (en) |
CN (1) | CN1075666C (en) |
DE (1) | DE19625404B4 (en) |
GB (1) | GB2302758A (en) |
TW (1) | TW297944B (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19731203A1 (en) * | 1997-07-21 | 1999-02-11 | Siemens Ag | CMOS circuit and method for its manufacture |
KR100439107B1 (en) * | 1997-12-29 | 2004-07-16 | 주식회사 하이닉스반도체 | Method for forming isolation layer of semiconductor device to prevent leakage current |
CN104299984A (en) * | 2013-07-19 | 2015-01-21 | 北大方正集团有限公司 | Semiconductor device and manufacture method thereof |
KR20160000007U (en) | 2014-06-24 | 2016-01-04 | 안숙희 | Bottom block of hydraulic vice |
CN105390409B (en) * | 2014-09-04 | 2018-06-26 | 北大方正集团有限公司 | The test method and device of beak length |
KR20190131343A (en) | 2018-05-16 | 2019-11-26 | 현대중공업 주식회사 | Ship |
CN113838797B (en) * | 2021-11-26 | 2022-03-04 | 广州粤芯半导体技术有限公司 | Preparation method of local oxide layer and preparation method of semiconductor device |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0075875A3 (en) * | 1981-09-28 | 1986-07-02 | General Electric Company | Method of making integrated circuits comprising dielectric isolation regions |
JPS61174737A (en) * | 1985-01-30 | 1986-08-06 | Oki Electric Ind Co Ltd | Manufacture of semiconductor element |
US5256895A (en) * | 1987-02-24 | 1993-10-26 | Sgs-Thomson Microelectronics, Inc. | Pad oxide protect sealed interface isolation |
US4764248A (en) * | 1987-04-13 | 1988-08-16 | Cypress Semiconductor Corporation | Rapid thermal nitridized oxide locos process |
GB2238658B (en) * | 1989-11-23 | 1993-02-17 | Stc Plc | Improvements in integrated circuits |
US5298451A (en) * | 1991-04-30 | 1994-03-29 | Texas Instruments Incorporated | Recessed and sidewall-sealed poly-buffered LOCOS isolation methods |
KR960005553B1 (en) * | 1993-03-31 | 1996-04-26 | 현대전자산업주식회사 | Manufacturing method of field oxide |
US5382533A (en) * | 1993-06-18 | 1995-01-17 | Micron Semiconductor, Inc. | Method of manufacturing small geometry MOS field-effect transistors having improved barrier layer to hot electron injection |
JPH0730113A (en) * | 1993-07-09 | 1995-01-31 | Sony Corp | Manufacture of mos transistor |
KR970003893B1 (en) * | 1993-10-25 | 1997-03-22 | 삼성전자 주식회사 | Method of isolation of the elements on the semiconductor device |
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1995
- 1995-06-28 KR KR1019950017885A patent/KR100190363B1/en not_active IP Right Cessation
-
1996
- 1996-05-16 TW TW085105772A patent/TW297944B/zh active
- 1996-06-10 JP JP8147483A patent/JPH0917780A/en active Pending
- 1996-06-12 GB GB9612263A patent/GB2302758A/en not_active Withdrawn
- 1996-06-25 DE DE19625404A patent/DE19625404B4/en not_active Expired - Fee Related
- 1996-06-27 CN CN96110232A patent/CN1075666C/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
GB9612263D0 (en) | 1996-08-14 |
KR970003811A (en) | 1997-01-29 |
CN1145532A (en) | 1997-03-19 |
GB2302758A (en) | 1997-01-29 |
KR100190363B1 (en) | 1999-06-01 |
DE19625404A1 (en) | 1997-01-02 |
JPH0917780A (en) | 1997-01-17 |
DE19625404B4 (en) | 2005-12-29 |
CN1075666C (en) | 2001-11-28 |
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