經濟部中央標準馬員工消费合作社印製 319898 A7 ____B7_ 五、發明説明（/) 發明背景 (1) 發明領域 、 本發明係有關半導體元件製程中之元件間隔離膜的形$ 方法，特別是指半導體元件中之場氧化物膜的形成方法。 (2) 先前技術 積體電路的製造一般係以將半導體基板或晶片的表面區 域分成兩區域的製程爲開始；此兩區域係分別爲形成主動元 件與內建在基板上之內部連接線的區域、以及隔離主動元# 區域之電性的絕緣區域；其中之場氧化物絕緣材料依慣例多 爲二氧化矽。雖然各種不同的場氧化物形成技術仍不斷的被 開發與公開出來，但一般被稱爲「LOCOS」的局部矽氧化技術 仍爲目前之半導體工業所廣沉使用。在LOCOS的實際應用 中，矽基板上的主動區域係以矽氮化物罩住，而場氧化物區 域則經熱氧化製程而形成場絕緣區域。雖然其基本原理是如 此簡單而有效率，但LOCOS製程與其衍生的技術(如FUROX 與SWAMI技術等)仍存在著有足以影響半導體晶片產品之最 終良率的缺點。 先前技術中所最常遭遇到的缺點是一般稱之爲鳥嘴效應 (bird’s beak)的場氧化物擴展至作爲面罩的氮化物層下方而 消耗部分之可用的主動區域的問題。其他之常遭遇到的缺點 係在場氧化物的形成過程，包括主動區域邊緣之應力產生的 錯位(dislocation)、以及完成後的場氧化物內或附近的不平 坦表面等。主動區域邊緣的不平坦凹處（recess)或槽口 (notch)常使後續形成之閘極氧化膜特性退化。這些不平坦的 (請先聞讀背面之注意事項再填寫本頁〕 -裝------訂------線. 本紙張尺度適用中國國家揉準（CNS ) A4規格（210X297公釐） 經濟部中央標準局員工消費合作社印裝 A 7 _B7_____ 五、發明説明（J ) 凹處將陷住導電層的殘餘物而產生短路的路徑。這些問題的 解決方法曾有許多的提議，但通常接有製逢程序 對尺寸的要求過於嚴苛的缺點，而影響產品的製造成本或使 半導體晶片的良率降低》 由越來越多的針對該相關問題的技術開發之趨勢’例如 相關之專利文件或技術文獻的申請與發表’可以明顯看出有 關上述之問的解決方法的重要性。在可搜集到的專利文獻 中，較爲接近與明顯較爲相關的技術開發有美國專利第 5,472,906 號（Shimizu 等）、美國專利第 5,399,520 號 (Jang)、美國專利第4,986,879號(Lee)、與美國專利第 5,248,350 號(Lee)等。 雖然有許多的技術可以成功的處理與解決鳥嘴效應’且 通常可在製程完成時提供較爲平坦的最終表面’但那些方法 總會在主動區域周邊產生應力生成的錯位，且形成有凹槽或 細溝的表面，其尺寸多大至足以影響後續製造的閘極氧化 膜，使其特性退化。當凹槽或細溝成爲最終結構之SEM橫截 面圖中所最常被發現的問題時，應力產生的錯位甚至經常無 法被確認。 發明的簡要說明 本發明之主要目的是提供一種形成場氧化物區域的製程，可 以碰少的應力與較少的基板缺陷。 本發明之次一目的是提供一種形成場氧化物的製程，可以減 少產生鳥嘴效應的因素，以得到較大的主動區域面積。 本發明之再一目的是使用以第二層氮化物層在場氧化物區域 邊角形成的氮化物空間子足來形成場氧化物區域。 ^紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ---------ί 袭-- (請先閲讀背面之注意事項再填寫本頁) ，1Τ 3I&898 經濟部中央標準局負工消费合作社印装 A7 B7 五、發明説明（>) 本發明提供了一種在半導體基板之主動區域間形成場氧化物 區域的方法。本發明在氧化的氮化物面罩區塊上形成氮化物足以 限制氮化物面罩下方的氧原子擴散，而抑制場氧化物之鳥嘴的形 成。 本發明由在基板表面上形成第一層氧化物層開始，然後在第 —層氧化物層上沉積第一層氮化物層，並將該第一層氮化物層圓 案化以在主動區域上形成面罩區塊。接著在面罩區塊與基板表面 上沉積第二層氮化物層，並將該第二層氮化物層以非等向性鈾刻 製程蝕刻，以在面罩區塊之側壁形成氮化物空間子、以及在第一 層氧化物層表面形成氮化物空間子足。第一具體實施例中的此一 階段’基板係以面罩區塊、氮化物空間子、以及氮化物空間子足 作爲氧化面罩進行氧化以形成場氧化物區域。 在第二具體實施例中，當第一層砂氮化物層被圖案化以形成 面罩區塊之後，暴露出的第一層氧化物層被以乾蝕刻或濕蝕刻製 程去除。然後在基板表面再重新成長一層第二層氧化物層，並在 第二層氧化物層與基板表面上沉積第二層氮化物層；該第二層氮 化物層被以非等向性鈾刻製程蝕刻，以在面罩區塊之側壁形成氮 化物空間子、以及在第一層氧化物層表面形成氮化物空間子足。 在第三具體實施例中，在空間子與空間子足形成以後、場氧 化物形成之前，使用面罩區塊'氮化物空間子、以及氮化物空間 子足作爲蝕刻面罩蝕刻基板以在基板上形成溝槽；再以面罩區 塊、氮化物空間子、以及氮化物空間子足作爲氧化面罩氧化基板 以在溝槽內形成場氧化物區域。最後再將面罩區塊、氮化物空間 子、以及氮化物空間子足去除。此第三具體實施例可以結合第 一、或第二具體實施例共同實施。 (請先閲讀背面之注意事項再填寫本頁) 言Printed 319898 A7 ____B7_ by the Central Standard Staff Employee's Consumer Cooperative of the Ministry of Economic Affairs 5. Description of the invention (/) Background of the invention (1) Field of the invention, The present invention relates to the method of forming an isolation film between components in the manufacturing process of semiconductor devices, especially semiconductors The formation method of the field oxide film in the device. (2) The manufacturing of the prior art integrated circuits generally starts with the process of dividing the surface area of the semiconductor substrate or wafer into two areas; these two areas are the areas where the active components and the internal connection lines built on the substrate are formed, respectively , And the electrically insulating area that isolates the active element # area; the field oxide insulating material is mostly silicon dioxide by convention. Although various field oxide formation technologies are still being developed and publicized, the local silicon oxidation technology generally known as "LOCOS" is still widely used in the current semiconductor industry. In the practical application of LOCOS, the active region on the silicon substrate is covered with silicon nitride, and the field oxide region is formed by a thermal oxidation process to form a field insulating region. Although the basic principle is so simple and efficient, the LOCOS process and its derived technologies (such as FUROX and SWAMI technologies, etc.) still have shortcomings that can affect the final yield of semiconductor chip products. The most commonly encountered disadvantage in the prior art is the problem of field oxides, commonly referred to as the bird's beak, extending below the nitride layer as a mask, consuming a portion of the available active area. Other commonly encountered shortcomings are in the field oxide formation process, including dislocations caused by stress at the edge of the active area, and uneven surfaces in or near the completed field oxide. Uneven recesses or notches at the edges of the active area often degrade the characteristics of the gate oxide film formed later. These are uneven (please read the precautions on the back and then fill out this page) -installed ------ ordered ---- line. This paper size is suitable for China National Standard (CNS) A4 specification (210X297 Mm) Printed by the Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs A 7 _B7_____ V. Description of the invention (J) The recess will trap the residue of the conductive layer and cause a short circuit path. There have been many proposals for solutions to these problems. However, it is usually accompanied by the shortcomings that the size requirements of the manufacturing process are too stringent, which affects the manufacturing cost of the product or reduces the yield of the semiconductor chip. " The application and publication of patent documents or technical documents can clearly see the importance of the solutions to the above problems. Among the patent documents that can be collected, the technology developments that are more closely related to the more obvious 5,472,906 (Shimizu et al.), US Patent No. 5,399,520 (Jang), US Patent No. 4,986,879 (Lee), and US Patent No. 5,248,350 (Lee), etc. Although there are many technologies available Successfully deal with and solve the bird's beak effect 'and usually provide a flatter final surface when the process is completed', but those methods will always produce a dislocation of stress generation around the active area and form a surface with grooves or grooves, The size is large enough to affect the gate oxide film that is subsequently fabricated, degrading its characteristics. When the groove or fine groove becomes the most commonly found problem in the SEM cross-sectional view of the final structure, the dislocation caused by the stress is often even impossible Confirmed. Brief description of the invention The main purpose of the present invention is to provide a process for forming field oxide regions, which can meet less stress and fewer substrate defects. The second object of the present invention is to provide a process for forming field oxide , Can reduce the factors that produce the bird's beak effect, so as to obtain a larger area of the active area. Another object of the present invention is to use a nitride layer formed by the second nitride layer at the corner of the field oxide region to form Field oxide area. ^ Paper scale is applicable to China National Standard (CNS) A4 specification (210X297mm) --------- ί assault-- (please read first Please pay attention to this page and fill out this page), 1T 3I & 898 Ministry of Economic Affairs Central Standards Bureau Negative Consumers Cooperative Printed A7 B7 V. Description of the Invention (>) The present invention provides a field oxidation between active areas of semiconductor substrates The method of the present invention is to form a nitride on the oxidized nitride mask block to limit the diffusion of oxygen atoms under the nitride mask, and to suppress the formation of the beak of the field oxide. Start with an oxide layer, then deposit a first nitride layer on the first oxide layer, and round off the first nitride layer to form a mask block on the active area. Next, a second nitride layer is deposited on the mask block and the substrate surface, and the second nitride layer is etched by an anisotropic uranium etching process to form a nitride space on the sidewall of the mask block, and A nitride space foot is formed on the surface of the first oxide layer. In this stage of the first embodiment, the substrate is oxidized with the mask block, the nitride space, and the nitride space as the oxidation mask to form a field oxide region. In the second embodiment, after the first sand nitride layer is patterned to form a mask block, the exposed first oxide layer is removed by a dry etching or wet etching process. Then grow a second oxide layer on the surface of the substrate, and deposit a second nitride layer on the second oxide layer and the substrate surface; the second nitride layer is etched with anisotropic uranium In the process of etching, a nitride space is formed on the side wall of the mask block, and a nitride space is formed on the surface of the first oxide layer. In the third embodiment, after the formation of the space sub and the space sub foot and before the formation of the field oxide, the mask block 'nitride space sub and the nitride space sub foot are used as an etching mask to etch the substrate to form on the substrate Trench; the mask block, the nitride space, and the nitride space are used as an oxidation mask to oxidize the substrate to form a field oxide region in the trench. Finally, the mask block, the nitride space, and the nitride space are removed. This third specific embodiment can be implemented in combination with the first or second specific embodiment. (Please read the precautions on the back before filling out this page)
本紙張尺度遥用中國國家標準（CNS ) A4規格（210X297公釐） 經濟部中央櫺準局貝工消費合作杜印製 A7 ______B7 五、發明説明} 本發明提供了一種較不複雜、且容易量產製造的製程，可形 成具較低應力與較少基板缺陷的場氧化物區域，使LOCOS技術的 應用範圍可擴展至0.25 um的元件製程。 圖示的簡要說明 以下所附之圖示將可配合說明部分，使對本發明之相關半導 體元件特性、優點、及製程等有進一步的了解。圖示中對相關或 相似之組件、區域、與部分等皆賦以參考號，以利參照。 第一、第二(A)、與第二(B)圖所示係爲本發明之第一具體實 施例的橫截面圖；其中有氮化物空間子與氮化物空間子足的形 成。 第三(A)、第三(B)、與第三(C)圖所示係爲本發明之第二具體 實施例的橫截面圖；其中之第二絕緣層係在氮化物空間子以及氮 化物空間子足形成以前成長在基板上。 第四至第六圖所示係爲本發明之第三具體實施例的橫截面 圖；其中之場氧化物區域係以面罩區塊、氮化物空間子、以及氮 化物空間子足作爲氧化面罩，而形成在基板的溝槽中。 第七圓所示係爲本發明之氮化物空間子、與氮化物空間子足的橫 截面圖。 最佳實施例的具體說明： 本發明係提供一種在半導體基板之主動區域間形成場氧化區 域的方法。本發明的重要特徵係爲在氮化物空間子20上具有以 獨特之非等向性蝕刻製程所形成之氮化物空間子足(nitride spacer feet) 24 »該空間子足可保護砂晶片使免於場氧化層的 側邊氧化入侵(例如鳥嘴效應(bird’s beak problem)消除），這 將可降低存在於矽晶中的應力（stress)。此外，本發明之製程亦 (請先閲讀背面之注意事項再填寫本頁) 裝. 訂 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 經濟部中央標準局員工消費合作社印製 A7 ___B7_ 五、發明説明（/V 短於傳統之製程。 本發明中所使用的基板係以具(100)結晶方向的P-型單晶矽 材料爲佳。該基板上具有將會形成半導體元件(如電晶體)的主動 區域（active regions)與將形成場氧化區域（field oxide regions)的隔離區域。 參照第一圖所示，在基板表面10上形成第一層絕緣層12。 該第一層絕緣層12係爲以濕氧、一大氣壓的氣體壓力、以及約 800至1000 °C的製程溫度氧化基板表面10所形成的第一層氧 化層爲佳。該第一層氧化層12的厚度則以約100至500埃左 右爲佳。 然後，在第一層絕緣(如氧化物)層12上沉積第一層氮化物 層14。該第一層氮化物層可以是由氮化矽或是氮化矽/複晶矽所 形成。由氮化矽所組成的第一層氮化物層的形成係以使用LPCVD 製程爲佳。該LPCVD製程則是以在較低氣體壓力及約7〇〇°C的 製程溫度下，讓dichlorosilane與氨(ammonia)進行反應爲 佳。第一層氮化物層的厚度以約1000至3000埃左右爲佳。 仍參照第一圖所示，將第一層氮化物層圓案化以在主動區域 上形成一具有側壁(sidewall)的面罩區塊(mask block) 14。該 面罩區塊的長度與寬度皆以約爲0.35至1.0 um左右爲佳，且 最好是大於0.35 um。該面罩區塊的厚度則以約1〇〇〇至3000 埃左右爲佳。 參照第三(A)、第三(B)、及第三(C)圖所示，本發明的第二具體 實施例可由此階段的製程步驟後開始執行。在面罩區塊形成後將 第一絕緣層12去除，而在基板上成長第二層絕緣(如氧化物)層 13，如第三(A)圖所示。第二具體實施例將在介紹完第一具體實例 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ~ (請先聞讀背面之注意事項再填寫本頁) 裝_ 訂 A7 B7 經濟部中夬樣準局貝工消費合作·社印策 五、發明説明（/) 之後再詳加說明。 參照第一圖所示，在面罩區塊14與基板表面1〇上沉積第 二層氮化物層16。該第二層氮化物層可以是由單獨的氮化矽或是 組合的氮化矽/複晶矽所形成。由氮化矽所組成之第二層氮化物層 的形成係以使用LPCVD製程與大約600至S00°C的製程溫度 爲佳；其反應物則以使用NH3(ammonia)與SiH4(silane)爲佳； 該第二層氮化物層的厚度以約50至1000埃左右爲佳。 如第二(A)圖所示，蝕刻第二層氮化物層16以在面罩區塊 14的側壁形成氮化物空間子20，並在第一層氧化物層12表面 上形成氮化物空間子足24。如第七圓所示之氮化物空間子20的 寬度(或厚度）44以約0.005至0.1 um左右爲佳，最好是約爲 0.04 um。氮化物空間子20的高度46則以約1000至3000 埃左右爲佳。 氮化物空間子足24的寬度(足部長度）40與高度42皆以 約爲0.005至0.1 um左右爲佳，最好是約爲〇.〇3 um。氮化 物空間子足的尺寸大小對本發明所欲達到的功能係相當重要。空 間子足的寬度大小將影響主動區域的有效面積，而以本發明所特 製之空間子蝕刻製程控制之。空間子足之寬度與高度間的比例(或 角度)則將影響場氧化物與主動區域之邊角區域的應力釋放數量。 因此，應力的釋放係由空間子足的尺寸(例如寬度與高度)大小所 控制，而空間子足的尺寸則可由本發明所特製之空間子蝕刻製程 所控制。 本發明辨特製之非等向性蝕刻製程對空間子20與空間子足 24的形成係相當重要。該蝕刻製程係被修改以在側壁空間子20 ---------f 裝-- (請先聞讀背面之注意事項再填寫本頁) - 本紙張尺度適用中國國家梯準（CNS >A4规格（210X297公釐）This paper scale uses the Chinese National Standard (CNS) A4 specification (210X297mm). The Central Ministry of Economic Affairs, Ministry of Economic Affairs, Beigong Consumer Cooperation Co., Ltd. prints A7 ______B7. V. Description of the invention} The present invention provides a less complicated and easy to measure The manufacturing process can form field oxide regions with lower stress and fewer substrate defects, so that the application range of LOCOS technology can be extended to 0.25 um device processes. Brief description of the drawings The accompanying drawings below can be used in conjunction with the description to further understand the characteristics, advantages, and processes of the semiconductor elements of the present invention. In the illustration, related or similar components, areas, and parts are all given reference numbers for easy reference. The first, second (A), and second (B) diagrams are cross-sectional views of the first specific embodiment of the present invention; there are the formation of nitride spacers and nitride spacers. The third (A), third (B), and third (C) diagrams are cross-sectional views of the second embodiment of the present invention; the second insulating layer is located in the nitride space and nitrogen The chemical substance space sub-foot grows on the substrate before forming. The fourth to sixth figures are cross-sectional views of a third specific embodiment of the present invention; the field oxide region uses a mask block, a nitride spacer, and a nitride spacer as oxide masks, It is formed in the trench of the substrate. The seventh circle shows a cross-sectional view of the nitride spacer and the nitride spacer of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT: The present invention provides a method of forming a field oxidation region between active regions of a semiconductor substrate. An important feature of the present invention is that it has nitride spacer feet 24 formed on the nitride spacer 20 by a unique anisotropic etching process. »The spacer spacer feet can protect the sand wafer from The oxidative intrusion of the side of the field oxide layer (such as the elimination of the bird's beak problem) will reduce the stress existing in the silicon crystal. In addition, the manufacturing process of the present invention (please read the precautions on the back before filling in this page). The size of the paper is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm). Printed by the Employee Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. A7 ___B7_ 5. Description of the invention (/ V is shorter than the traditional process. The substrate used in the present invention is preferably a P-type monocrystalline silicon material with a (100) crystal orientation. The substrate has semiconductor devices on it. An active region (such as a transistor) and an isolation region that will form field oxide regions. Referring to the first figure, a first insulating layer 12 is formed on the substrate surface 10. The first The insulating layer 12 is preferably a first oxide layer formed by oxidizing the substrate surface 10 with wet oxygen, a gas pressure of atmospheric pressure, and a process temperature of about 800 to 1000 ° C. The thickness of the first oxide layer 12 It is preferably about 100 to 500 angstroms. Then, a first nitride layer 14 is deposited on the first insulating (eg oxide) layer 12. The first nitride layer can be made of silicon nitride or Silicon Nitride / Polycrystalline Silicon Institute The first nitride layer composed of silicon nitride is preferably formed by using the LPCVD process. The LPCVD process uses dichlorosilane at a lower gas pressure and a process temperature of about 700 ° C. It is better to react with ammonia. The thickness of the first nitride layer is about 1000 to 3000 angstroms. Still referring to the first figure, the first nitride layer is rounded off in the active area A mask block 14 with a side wall is formed thereon. The length and width of the mask block are preferably about 0.35 to 1.0 um, and preferably greater than 0.35 um. The mask block The thickness is preferably about 1000 to 3000 angstroms. Referring to the third (A), third (B), and third (C) diagrams, the second specific embodiment of the present invention can be at this stage After the process steps of the process, the first insulating layer 12 is removed after the mask block is formed, and a second insulating (eg oxide) layer 13 is grown on the substrate, as shown in the third (A) diagram. Specific examples will be introduced after the first specific example. This paper scale is applicable to the Chinese National Standard (CNS) A4 specifications (210X297mm) ~ (please read the precautions on the back and then fill in this page) _ _ Order A7 B7 The Ministry of Economic Affairs, Bureau of Standards, Bureau of Industry and Fisheries Cooperation, Social Printing Policy 5, the description of the invention (/) will be detailed later With reference to the first figure, a second nitride layer 16 is deposited on the mask block 14 and the substrate surface 10. The second nitride layer can be made of silicon nitride alone or combined nitrogen It is formed by chemical silicon / polycrystalline silicon. The second nitride layer composed of silicon nitride is preferably formed by using LPCVD process and a process temperature of about 600 to S00 ° C; its reactant is using NH3 ( ammonia) and SiH4 (silane) are preferred; the thickness of the second nitride layer is preferably about 50 to 1000 angstroms. As shown in the second (A) diagram, the second nitride layer 16 is etched to form a nitride space 20 on the side wall of the mask block 14 and a nitride space subfoot is formed on the surface of the first oxide layer 12 twenty four. The width (or thickness) 44 of the nitride space 20 as shown in the seventh circle is preferably about 0.005 to 0.1 um, preferably about 0.04 um. The height 46 of the nitride space 20 is preferably about 1000 to 3000 angstroms. The width (foot length) 40 and height 42 of the nitride space sub-foot 24 are preferably about 0.005 to 0.1 um, and most preferably about 0.03 um. The size of the nitride space sub-foot is quite important for the functional system to be achieved by the present invention. The width of the space sub-foot will affect the effective area of the active area, which is controlled by the space sub-etching process made by the present invention. The ratio (or angle) between the width and height of the space sub-foot will affect the amount of stress relief in the corner area between the field oxide and the active area. Therefore, the release of stress is controlled by the size (eg width and height) of the space sub-foot, and the size of the space sub-foot can be controlled by the space sub-etching process specially made by the present invention. The special anisotropic etching process of the present invention is very important for the formation of the space sub 20 and space sub foot 24. The etching process is modified to be installed in the side wall space 20 --------- f-(please read the precautions on the back and then fill out this page)-This paper standard is applicable to China National Standards (CNS > A4 size (210X297mm)
經濟部中央樣準局工消费合作社印製 五、發明説明（7) 的側壁上形成空間子足。在傳統的蝕刻製程中，蝕刻製程的執行 多以最低的微負荷效應(microloading effect)爲重要考量之一， 而本發明中之蝕刻製程參數係被調整以取得適當之微負荷效應， 以形成空間子足24 〇此處之形成氮化物空間子20與氣化物空間 子足24的晶片蝕刻製程係以採用活性離子蝕刻(WE)之全面性 (blanket)蝕刻爲佳。RIE製程中的聚合體保護（polymer passivation)與微負荷效應在控制之下使空間子足24形成；其 中，氣髖屋力與總氣髏流童是影響微負荷效應的主要參數，而 CF4/CHF3的比値、電極溫度、與後端氣(He)氣流置則將影響聚合 本發明所特製之非等向性蝕刻製程(包括主蝕刻(main etch) 步驟與額外蝕刻(over etch)步驟)係爲一醑鍵的步驟》其較佳的 製程溫度範圍約在（TC到-10eC左右，而以（TC左右爲最佳； 其較佳的氣體壓力範圍約在別0到500微托耳(mtorr)左右，而 以360微耳左右爲最佳；其較佳的功率範圔約在300到500瓦 特Oatt)左右，而以450瓦特左右爲最佳；其較佳的間隙距離 (gap space)約在0.9到1.2 左右，而以1.05 左右爲 最佳。其中之氬(Ar)氣的流速約在500到1000 seem的範圔之 間，而以約800 seem左右爲最佳；CF4的流速約在20到50 seem的範圍之間，而以約30 seem左右爲最佳；CHF3的流速約 在20到50 seem的範圍之間，而以約25 seem左右爲最佳； CF4/CHF3的比例約在1:〇·6到1:2.5左右，而以約1:0.8》到 1:1.17左右;^最佳。該蝕刻製程最好係以平面式單晶片RIE執 行之。電娥的模式(例如蝕刻製程)可以是RIE、ECR、或高密度電 麟電麵》 (請先閱讀背面之注意事項再填寫本頁) •裝. 訂 本紙張尺度遑用中國國家揉準（CNS ) A4规格（210X297公釐） 經濟部中央橾準局貞工消費合作社印装 A7 _B7_ 五、發明説明（/) 空間子曁空間子足的蝕刻製程可分爲主蝕刻與額外蝕刻兩個 步驟。主蝕刻製程中的晶片最好是被蝕刻至終點檢測器所檢測到 的蝕刻終點，或以計時模式來作爲其結束的控制。晶片上的第二 層氮化物層16在主蝕刻製程中將被蝕刻至暴露出面罩區塊爲 止，然後再進入額外飩刻的步驟。該額外鈾刻步驟約爲主蝕刻製 程步驟長度的30%至80%左右’而以約爲50%至70¾左右的 主蝕刻製程步驟時間爲佳，以60%之主蝕刻製程步驟時間爲最 佳。此額外蝕刻步驟有時又被稱爲50%至70%的額外蝕刻；其 百分比是控制空間子足24之寬度40與高度42的最重要參數 之一。 本發明自此之後的後續步驟可以分成兩種，分別在第一及第 三具體實施例描述之。在第一具體實施例中(如第一、第二(A)、 及第二(B)圖所示），基板表面被氧化以形成場氧化區域26 〇在第 三具體實施例中，基板中形成了溝槽（trench)，並在溝槽中形成 場氧化物，因此場氧化物將與基板表面等高(如第四、第五、與第 六圖所示）。第三具體實施例將詳述於後。 在第二(B)圖所示的第一具體實施例中，基板表面1〇係使用 面罩區塊14、氮化物空間子20、與氮化物空間子足24等作爲 氧化面罩以進行氧化製程而形成場氧化區域26。該場氧化區域 26可以是用濕氧、一大氣壓的氣體壓力、及約800到110(TC 的製程溫度氧化基板表面10而形成。 該場氧也區域的形成最好是使用氣體壓力約爲0.1到1.0 托耳、製程溫度約爲800至1100°C的熱氧化製程。該場氧化區 域26的厚度以約3000到7000埃左右爲佳，以4500埃爲最 佳0 (請先閲讀背面之注意事項再填寫本頁) 裝· 訂- 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 經濟部中央樣準局員工消費合作社印製 A7 ______— B7__ 五、 發明説明（广） 如第六圖所示，最好將光罩區塊14、側壁空間子20、與氮 化物空間子定24去除；其去除的方式以如熱磷酸飩刻的溼蝕刻 方式，選擇性的將矽氧化物上的氮化物去除爲佳。第一具體寳施 例的製程步驟至此完成。第二與第三具體實施例將描述如下。 如第三(A)、第三(B)、第三(〇、與第六圖所示之第二具體實 施例係爲在將第一層矽氮化物層圖案化以形成面罩區塊14之 後，以乾或濕蝕刻製程去除暴露出的第一層氧化物層12 〇在基板 表面10上重新成長一層第二層氧化物層13。如第三(A)圖所 示，第二層氧化物層13的厚度以45至500埃左右的範圍爲 佳。如第三(B)圖所示，在面罩區塊14與第二層氧化物層13 上形成第二層氮化物層16。然後，如第三(C)圖所示，以第一具 體實施例所示之製程，在第二層氧化物層13上形成空間子20、 空間子足24、與場氧化物26。 如第六圖所示之本發明的第三具體實施例係爲在溝槽中形成 場氧化物區域。第三具體實施例將接續如上所述之以第一至第二 (B)圖描述說明的第一具體實施例、或以第三(A)至第三(C)圖描 述說明的第二具體實施例的製程。第三具體實施例的製程係如第 一至第二圖、以及第四至第六圖所示。因此，在第四、第五、第 六、 第七圖中，氧化物層12A可以係由第一層氧化物層12(第 一具體實施例)或是第一層氧化物層12與第二層氧化物層13 二者所組成。 • \ 本發明之第三具體實施例將由如上所述之氧化物層12A(12 或12/13)、’面罩區塊14、氮化物空間子20、與氮化物空間子 足24 (參照第四圖所示)形成以後開始。 (請先閲讀背面之注意事項再填寫本頁) 装. 訂 本紙張尺度適用中國國家標準（CNS ) A4規格（21 〇 X 2打公釐） A7 B7 S898 五、發明説明（/〇 ) 如第四圖所示，以面罩區塊14、氮化物空間子20、氮化物 空間子足24爲蝕刻面罩鈾刻基板表面1〇，使在基板表面10 上形成溝槽28 〇在基板表面1〇上所形成的溝槽係使用非等向性 的溼蝕刻(如相對於氧化物與氮化物下，只選擇性的蝕刻矽；例如 HF、HN〇3、去離子水)或乾蝕刻（如使用含氟氣體的電漿蝕刻製 程，而以使用如NF3、SF6、與CF4等氣體之電獎触刻製程來蝕 刻基板爲較佳的選擇。溝槽28的深度以100至2000埃左右 的範圍爲佳，而以1000埃左右爲最佳。 如第五圖所示，以面罩區塊14、氮化物空間子20、與氮化 物空間子足24爲氧化面罩氧化基板表面10以形成場氧化區域 30 〇該基板的氧化以使用上述之熱氧化製程爲佳。 如第六圖所示，面罩區塊14、氮化物空間子20、氮化物空 間子足24將被去除(以使用蝕刻的方式爲佳)而留下氧化物層 12或12A與場氧化區域30。該氮化物面罩區塊、氮化物空間 子、與氮化物空間子足的去除以使用圆酸(h3po4)蝕刻為佳。 本發明在場氧化物區域的邊緣周圍所形成的氮化物足，可釋 放場氧化物邊角的應力，降低矽原子的錯位(dislocation);亦 可抑制場氧化物邊角之氧原子的擴散與氧化矽基板’而使基板上 之邊角與氧化物墊12下方之氧化物應力的量降低；因此基板上 所產生的應力缺陷將會減少。本發明中之氮化物足可改善場氧化 物區域的形成，使不消耗基板上之主動區域的面積。而且，氮化 物足的形成僥使用易於量產與控制的RIE製程的微負荷與聚合體 保護效應。該製程經由矽原子錯位的降低而使良率改善，並可增 加元件密度。本發明中的氮化物足24將可降低場氧化製程時的 鳥嘴入侵效應。 本紙張尺度適用中國國家橾準（CNS ) A4规格（210 X 297公釐) .—-II 4Λ i Id---*--裝-- (請先閲讀背面之注意事項再填寫本頁) -訂 經濟部中央樣準局員工消费合作社印袈 A7 B7 五、發明説明（// ) 當本發明以上述之較佳具體實施例作特點展示與描述之後， 熟悉該項技藝‘必可以了解並在本發明之精神與範圍內略作調整 而應用之；換言之，任何形式或細節上的修改並不能脫離本發明 之精神與範圍。 (請先閲讀背面之注意事項再填寫本頁) -裝- 訂 經濟部中央標準局貝工消費合作社印製 本紙張尺度適用中國國家標準（CNS ) A4規格（2H)X29"7公釐）Printed by the Industrial and Consumer Cooperative of the Central Bureau of Standards and Economics of the Ministry of Economic Affairs. V. Invention Description (7) A space foot is formed on the side wall. In the traditional etching process, the execution of the etching process mostly takes the lowest microloading effect as one of the important considerations, and the etching process parameters in the present invention are adjusted to obtain an appropriate microloading effect to form a space Subfoot 24. The wafer etching process for forming the nitride space sub20 and the vaporized space subfoot 24 here is preferably a blanket etching using reactive ion etching (WE). The polymer passivation and micro-load effect in the RIE process under control make the space sub-foot 24 form; among them, the air hip force and the total air-crane flow are the main parameters that affect the micro-load effect, and CF4 / The ratio of CHF3, electrode temperature, and back-end gas (He) gas flow will affect the anisotropic etching process (including the main etch step and the over etch step) specially prepared by the polymerization method of the present invention. It is a step of 醑 bond. Its preferred process temperature range is about (TC to -10eC, and the best is about (TC; its preferred gas pressure range is about 0 to 500 microtorr ( mtorr), and the best is 360 micro ears; the best power range is about 300 to 500 watts Oatt), and the best is 450 watts; the best gap distance (gap space) It is about 0.9 to 1.2, and the best is about 1.05. The flow rate of argon (Ar) gas is about 500 to 1000 seem, and the best is about 800 seem; the flow rate of CF4 is about In the range of 20 to 50 seem, and about 30 seem is the best; the flow rate of CHF3 is about 2 Between 0 and 50 seem, and about 25 seem is the best; the ratio of CF4 / CHF3 is about 1: 0.6 to 1: 2.5, and about 1: 0.8 "to 1: 1.17; ^ Best. The etching process is best performed by planar single-chip RIE. The electrical mode (such as the etching process) can be RIE, ECR, or high-density electrical surface "(please read the notes on the back first (Fill in this page again) • Packed. The standard paper size is printed in Chinese National Standard (CNS) A4 (210X297mm). Printed and printed on the A7 _B7_ V. Invention description (/) Space The etching process of the sub-chamber sub-foot can be divided into two steps: main etching and additional etching. The wafer in the main etching process is preferably etched to the etching end point detected by the end point detector, or it is ended in the timing mode The control of the second nitride layer 16 on the wafer will be etched until the mask block is exposed during the main etching process, and then enter the additional etching step. The additional uranium etching step is about the length of the main etching process step About 30% to 80% 'and about 50% to 70¾ left The main etching process step time is preferably 60% of the main etching process step time is the best. This additional etching step is sometimes referred to as 50% to 70% additional etching; the percentage is 24% of the control space One of the most important parameters of the width 40 and the height 42. The subsequent steps of the invention since then can be divided into two types, which are described in the first and third specific embodiments respectively. In the first specific embodiment (such as the first, The second (A) and the second (B) are shown), the surface of the substrate is oxidized to form a field oxide region 26. In the third embodiment, a trench is formed in the substrate, and the trench is formed in the trench The field oxide is formed in the middle, so the field oxide will be the same height as the substrate surface (as shown in the fourth, fifth, and sixth figures). The third specific embodiment will be described in detail later. In the first embodiment shown in the second (B) diagram, the substrate surface 10 uses the mask block 14, the nitride spacer 20, and the nitride spacer 24 as the oxidation mask to perform the oxidation process. The field oxide region 26 is formed. The field oxidation region 26 may be formed by oxidizing the substrate surface 10 with wet oxygen, a gas pressure of one atmospheric pressure, and a process temperature of about 800 to 110 (TC. The formation of the field oxygen region is preferably using a gas pressure of about 0.1 The thermal oxidation process to 1.0 Torr and the process temperature is about 800 to 1100 ° C. The thickness of the field oxidation region 26 is preferably about 3000 to 7000 angstroms, and 4500 angstroms is the best 0 (please read the note on the back first Please fill out this page again) Binding · Order-This paper size is applicable to the Chinese National Standard (CNS) A4 (210X297mm) Printed by the Ministry of Economic Affairs, Central Bureau of Samples and Staff Cooperative A7 ______— B7__ V. Description of the invention (wide) As shown in the sixth figure, it is best to remove the mask block 14, the sidewall spacer 20, and the nitride spacer 24; the method of removal is to selectively oxidize the silicon by wet etching such as hot phosphoric acid etching It is better to remove the nitride on the object. The process steps of the first specific example are completed. The second and third specific examples will be described as follows. Such as third (A), third (B), third (〇 , And the second specific embodiment shown in the sixth figure After patterning the first silicon nitride layer to form the mask block 14, the exposed first oxide layer 12 is removed by a dry or wet etching process. A second layer of oxide is grown on the substrate surface 10 Object layer 13. As shown in the third (A) diagram, the thickness of the second oxide layer 13 is preferably in the range of about 45 to 500 angstroms. As shown in the third (B) diagram, in the mask block 14 and A second nitride layer 16 is formed on the second oxide layer 13. Then, as shown in the third (C) diagram, the second oxide layer 13 is formed on the second oxide layer 13 by the process shown in the first embodiment. Spacer 20, space subfoot 24, and field oxide 26. As shown in the sixth figure, the third embodiment of the present invention is to form a field oxide region in the trench. The third embodiment will be continued as above The process of the first specific embodiment described in the first to second (B) diagrams or the second specific embodiment described in the third (A) to third (C) diagrams is described. The manufacturing process of the embodiment is shown in the first to second figures and the fourth to sixth figures. Therefore, in the fourth, fifth, sixth and seventh In the figure, the oxide layer 12A can be composed of the first oxide layer 12 (the first specific embodiment) or both the first oxide layer 12 and the second oxide layer 13. • \ The invention The third specific embodiment will be composed of the oxide layer 12A (12 or 12/13), the mask block 14, the nitride spacer 20, and the nitride spacer 24 (refer to the fourth figure) as described above Start after formation. (Please read the precautions on the back before filling in this page) Binding. The size of the bound paper applies to the Chinese National Standard (CNS) A4 specifications (21 〇X 2 dozen mm) A7 B7 S898 V. Description of invention (/ 〇) As shown in the fourth figure, the mask surface 14 is etched with the mask block 14, the nitride space sub 20, and the nitride space sub foot 24 as the etching mask, so that the groove 28 is formed on the substrate surface 10. The substrate 28 is formed. The grooves formed on the surface 10 are anisotropic wet etching (such as selective etching of silicon relative to oxides and nitrides; for example, HF, HN〇3, deionized water) or dry etching (For example, plasma etching process using fluorine-containing gas, and electricity such as NF3, SF6, and CF4 It is a better choice to etch the substrate by awarding the etching process. The depth of the groove 28 is preferably in the range of about 100 to 2000 angstroms, and most preferably about 1000 angstroms. As shown in the fifth figure, the mask block 14, the nitride space 20, and the nitride space sub-foot 24 are used to oxidize the mask to oxidize the substrate surface 10 to form a field oxidation region 30. The substrate is oxidized to use the thermal oxidation described above The process is better. As shown in the sixth figure, the mask block 14, the nitride space sub 20, and the nitride space sub foot 24 will be removed (preferably using etching), leaving the oxide layer 12 or 12A and the field oxidation area 30 . The removal of the nitride mask block, the nitride space, and the nitride space sub-foot is preferably performed by using circular acid (h3po4) etching. The nitride foot formed around the edge of the field oxide region of the present invention can release the stress of the field oxide corners and reduce the dislocation of silicon atoms; it can also suppress the diffusion and oxygen atoms of the field oxide corners The silicon oxide substrate 'reduces the amount of oxide stress on the corners of the substrate and the oxide pad 12; therefore, stress defects generated on the substrate will be reduced. The nitride in the present invention is sufficient to improve the formation of field oxide regions so that the area of the active region on the substrate is not consumed. In addition, the formation of nitride feet uses the microload and polymer protection effects of the RIE process that is easy to mass-produce and control. This process improves the yield by reducing the dislocation of silicon atoms and can increase the device density. The nitride foot 24 of the present invention will reduce the bird's beak invasion effect during the field oxidation process. The paper size is applicable to China National Standard (CNS) A4 (210 X 297mm). —-II 4Λ i Id --- *-installed-- (please read the precautions on the back and fill in this page)- Ordered by the Central Sample Bureau of the Ministry of Economic Affairs Employee Cooperative A7 B7 V. Description of the invention (//) After the present invention has been shown and described with the above-mentioned preferred specific embodiments as features, familiar with this skill must be understood and in The spirit and scope of the present invention are slightly adjusted and applied; in other words, any modification in form or detail cannot deviate from the spirit and scope of the present invention. (Please read the precautions on the back before filling in this page)-Binding-Order Printed by the Beigong Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs