JPH07254594A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH07254594A
JPH07254594A JP4295694A JP4295694A JPH07254594A JP H07254594 A JPH07254594 A JP H07254594A JP 4295694 A JP4295694 A JP 4295694A JP 4295694 A JP4295694 A JP 4295694A JP H07254594 A JPH07254594 A JP H07254594A
Authority
JP
Japan
Prior art keywords
film
oxide film
substrate
silicon
polysilicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP4295694A
Other languages
Japanese (ja)
Inventor
Jun Sakuma
遵 佐久間
Fumihiko Inoue
文彦 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4295694A priority Critical patent/JPH07254594A/en
Publication of JPH07254594A publication Critical patent/JPH07254594A/en
Withdrawn legal-status Critical Current

Links

Landscapes

  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

PURPOSE:To shorten the length of a bird's beak which is extending under an oxidation-resistant film when forming an element-isolation oxide film by selective oxidation. CONSTITUTION:1) An oxide film 2 and a nitride film 3 are deposited in this order on an Si substrate 1 and these films are patterned. Then, the substrate is dipped in a chemical liquid to be wet-treated and thereby a natural oxide film 4 is formed on an exposed part of the substrate. After that, a polysilicon film 5 is formed and then is anisotropically etched to form a polysilicon side wall 5A on a side face of the nitrode film. Then, the substrate is thermal- oxidized. 2) A thin silicon nitrode film is formed instead of the chemical oxide film 4. 3) An oxide film 2 and a nitrode film 3 are deposited in this order on a substrate 1 and these films are patterned. Then, a silicon side wall 5A is formed on a side face of the nitrode film by selective epitaxial growth and after that, the substrate is thermal-oxidized.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置の製造方法に
係り, 特に選択酸化(LOCOS) 法による素子分離酸化膜の
形成方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming an element isolation oxide film by a selective oxidation (LOCOS) method.

【0002】近年, シリコン(Si)半導体装置の高集積化
にともない, 回路パターンの微細化が進み, 素子領域の
確保, 素子分離酸化シリコン膜 (SiO2膜, 以下, 単に酸
化膜と呼ぶ) の薄膜化が要求されている。特に, 素子分
離を選択酸化法で行う場合,素子領域の確保のため,素
子領域に形成された耐酸化膜の下側に鳥の嘴状に延びる
酸化膜 (バーズビーク) を短くする必要がある。
In recent years, with the high integration of silicon (Si) semiconductor devices, miniaturization of circuit patterns has progressed, element regions have been secured, and element isolation silicon oxide films (SiO 2 films, hereinafter simply referred to as oxide films) have been formed. Thinning is required. In particular, when element isolation is performed by the selective oxidation method, it is necessary to shorten the oxide film (bird's beak) extending like a bird's beak below the oxidation resistant film formed in the element region in order to secure the element region.

【0003】[0003]

【従来の技術】図2(A) 〜(C) は従来例の断面図であ
る。 従来例1:図2(A) において,従来の選択酸化法による
通常の素子分離酸化膜の形成では, 半導体基板 1上に薄
くバッファ酸化膜 2を被着した後その上に耐酸化膜 3と
して窒化シリコン膜(Si3N4膜, 以下, 単に酸化膜と呼
ぶ) 膜を形成し, 熱酸化により素子分離酸化膜 7の形成
を行っている。
2. Description of the Related Art FIGS. 2A to 2C are sectional views of a conventional example. Conventional Example 1: In FIG. 2 (A), in forming a conventional element isolation oxide film by the conventional selective oxidation method, a thin buffer oxide film 2 is deposited on a semiconductor substrate 1 and then an oxidation resistant film 3 is formed thereon. A silicon nitride film (Si 3 N 4 film, hereinafter simply referred to as an oxide film) is formed, and an element isolation oxide film 7 is formed by thermal oxidation.

【0004】従来例2:図2(B) において,上記の通常
の方法では上記熱酸化の際にバーズビーク 9が長く延び
るため,窒化膜 3をパターニング後に, 基板上にポリシ
リコン膜を堆積し,異方性エッチングにより窒化膜の側
面にポリシリコン膜からなる側壁5Aを形成し, これによ
り窒化膜下への酸化の進行を阻止するようにして素子分
離酸化を行う方法がある。
Conventional Example 2: In FIG. 2B, since the bird's beak 9 extends long during the thermal oxidation in the above-mentioned ordinary method, after the nitride film 3 is patterned, a polysilicon film is deposited on the substrate. There is a method in which the side wall 5A made of a polysilicon film is formed on the side surface of the nitride film by anisotropic etching, and thereby the element isolation oxidation is performed so as to prevent the progress of the oxidation under the nitride film.

【0005】ここで,ポリシリコン膜からなる側壁5Aを
形成のための異方性エッチングする際に,基板 1がエッ
チングされないように, エッチングストッパとして熱酸
化膜4' が基板上に形成されている。
Here, a thermal oxide film 4'is formed on the substrate as an etching stopper so that the substrate 1 is not etched during anisotropic etching for forming the sidewall 5A made of a polysilicon film. .

【0006】従来例3:図2(C) において,エッチング
ストッパとして熱酸化膜を形成しないでポリシリコン側
壁5Aを形成する方法であって, 窒化膜 3が薄いと側壁形
成が困難であるため,窒化膜 3上に気相成長(CVD) によ
る酸化膜 9を形成してその分厚さを増してから, ポリシ
リコン膜を成膜し,異方性エッチングする場合もある。
Conventional Example 3: In FIG. 2 (C), a method of forming a polysilicon side wall 5A without forming a thermal oxide film as an etching stopper. When the nitride film 3 is thin, it is difficult to form the side wall. In some cases, an oxide film 9 is formed on the nitride film 3 by vapor phase epitaxy (CVD) to increase its thickness, and then a polysilicon film is formed and anisotropically etched.

【0007】[0007]

【発明が解決しようとする課題】従来例1の前記通常の
方法によると, バッフア酸化膜に沿って酸化種が浸入す
るため,バーズビーク長の低減は難しい。
According to the conventional method of Conventional Example 1, it is difficult to reduce the bird's beak length because the oxidizing species infiltrate along the buffer oxide film.

【0008】また,従来例2の窒化膜側面にポリシリコ
ンの側壁を形成する方法では, ポリシリコンの側壁形成
のための異方性エッチングする際のエッチングストッパ
として使用する熱酸化膜の存在によりバーズビーク長の
低減は不十分である。
Further, in the method of forming the sidewall of the polysilicon on the side surface of the nitride film of the conventional example 2, the bird's beak is caused by the presence of the thermal oxide film used as the etching stopper during the anisotropic etching for forming the sidewall of the polysilicon. The reduction in length is insufficient.

【0009】また,従来例3は窒化膜側面にポリシリコ
ンの側壁を形成し,その下にエッチングストッパの熱酸
化膜を形成しない場合で, 窒化膜上に気相成長酸化膜を
形成すると窒化膜除去前に, この気相成長酸化膜を除去
する必要があり,このために素子分離酸化膜の厚さが減
り, あるいは素子分離端近傍の露出したシリコン基板の
表面に段差または傾斜が生じる等の欠点がある。
Further, in Conventional Example 3, a sidewall of polysilicon is formed on the side surface of the nitride film, and a thermal oxide film of an etching stopper is not formed under the sidewall of the polysilicon. When the vapor growth oxide film is formed on the nitride film, the nitride film is formed. Before the removal, it is necessary to remove this vapor-grown oxide film, which reduces the thickness of the device isolation oxide film, or causes a step or slope on the surface of the exposed silicon substrate near the device isolation edge. There are drawbacks.

【0010】本発明は, 耐酸化膜側面にポリシリコン側
壁を形成して選択酸化法により素子分離酸化膜を形成す
る際に, 耐酸化膜下に延びるバーズビーク長を低減し,
かつバーズビークを抑えるために耐酸化膜側面につける
シリコン側壁の形成を容易にすることを目的とする。
The present invention reduces the bird's beak length extending below the oxidation resistant film when a polysilicon side wall is formed on the side surface of the oxidation resistant film and an element isolation oxide film is formed by the selective oxidation method.
In addition, it is intended to facilitate formation of a silicon side wall attached to the side surface of the oxidation resistant film in order to suppress bird's beak.

【0011】[0011]

【課題を解決するための手段】上記課題の解決は, 1)シリコン基板 1上に酸化シリコン膜 2及び窒化シリ
コン膜 3をこの順に積層し,該酸化シリコン膜 2及び該
窒化シリコン膜 3をパターニングする工程と,次いで,
該半導体基板 1を化学薬液に浸漬してウエット処理を行
い, 前記パターニングにより露出した該半導体基板 1上
に該ウエット処理により生成した自然酸化膜 4を形成す
る工程と,次いで, 該半導体基板 1上にポリシリコン膜
5を成膜し,該ポリシリコン膜 5を異方性エッチングし
て該窒化シリコン膜の側面にポリシリコンからなる側壁
5Aを形成する工程と,次いで, 該半導体基板 1を熱酸化
する工程とを有する半導体装置の製造方法,あるいは 2)前記ケミカル酸化膜 4の代わりに窒化シリコン膜を
形成し,該窒化シリコン膜の膜厚は, 前記の該半導体基
板 1を熱酸化する工程において酸化される膜厚以下であ
り,かつ前記異方性エッチングで消滅する膜厚より大き
い前記1記載の半導体装置の製造方法,あるいは 3)シリコン基板 1上に酸化シリコン膜 2及び窒化シリ
コン膜 3をこの順に積層し,該酸化シリコン膜 2及び窒
化シリコン膜 3をパターニングする工程と,次いで, 選
択エピタキシャル成長により該窒化シリコン膜 3の側面
にシリコンからなる側壁5Aを成長する工程と,次いで,
該半導体基板 1を熱酸化する工程とを有する半導体装置
の製造方法により達成される。
[Means for Solving the Problems] To solve the above problems, 1) stack a silicon oxide film 2 and a silicon nitride film 3 on a silicon substrate 1 in this order, and pattern the silicon oxide film 2 and the silicon nitride film 3. And then,
A step of immersing the semiconductor substrate 1 in a chemical solution to perform a wet treatment to form a native oxide film 4 formed by the wet treatment on the semiconductor substrate 1 exposed by the patterning; and then, on the semiconductor substrate 1. On the polysilicon film
5 is formed, and the polysilicon film 5 is anisotropically etched to form a sidewall made of polysilicon on the side surface of the silicon nitride film.
5A, a method of manufacturing a semiconductor device including a step of thermally oxidizing the semiconductor substrate 1, or 2) forming a silicon nitride film in place of the chemical oxide film 4, 3. The method for manufacturing a semiconductor device according to 1 above, wherein the film thickness is less than or equal to the film thickness that is oxidized in the step of thermally oxidizing the semiconductor substrate 1 and is larger than the film thickness that disappears by the anisotropic etching. ) A step of laminating a silicon oxide film 2 and a silicon nitride film 3 in this order on a silicon substrate 1 and patterning the silicon oxide film 2 and the silicon nitride film 3, and then performing selective epitaxial growth on the side surface of the silicon nitride film 3. The step of growing the side wall 5A made of silicon, and then,
It is achieved by a method for manufacturing a semiconductor device including a step of thermally oxidizing the semiconductor substrate 1.

【0012】[0012]

【作用】本発明の特徴は要約すると次のように構成され
る。 (1) 窒化膜をパターニング後にウエット処理により基板
上に酸化膜を形成し,ポリシリコンを気相成長して異方
性エッチングにより窒化膜側面にポリシリコン側壁を形
成し, この後, 熱酸化により素子分離酸化膜の形成を行
う。この際, ポリシリコン側壁形成の異方性エッチング
のエッチングストッパはシリコン基板のウエット前処理
により生じたケミカル酸化膜を用いる。 (2) ポリシリコン側壁形成の異方性エッチングのエッチ
ングストッパとして薄い窒化膜を用いる。この窒化膜の
厚さは,素子分離酸化の際に酸化されるように十分薄い
膜であり,耐酸化マスクとして用いられる窒化膜のパタ
ーニング後に成膜する。 (3)あるいは,窒化膜をパターニング後に,選択エピタ
キシャル成長により窒化膜側面にのみシリコン側壁を成
長した後に素子分離酸化膜を形成する。
The features of the present invention are summarized as follows. (1) After patterning the nitride film, an oxide film is formed on the substrate by a wet process, and polysilicon is vapor-deposited and anisotropic etching is used to form a polysilicon side wall on the side surface of the nitride film. An element isolation oxide film is formed. At this time, a chemical oxide film formed by wet pretreatment of the silicon substrate is used as an etching stopper for anisotropic etching for forming the polysilicon side wall. (2) A thin nitride film is used as an etching stopper for anisotropic etching for forming polysilicon sidewalls. The thickness of this nitride film is sufficiently thin so that it is oxidized during element isolation oxidation, and is formed after patterning of the nitride film used as an oxidation resistant mask. (3) Alternatively, after patterning the nitride film, the element isolation oxide film is formed after growing the silicon sidewall only on the side surface of the nitride film by selective epitaxial growth.

【0013】以上の構成により, (1) ポリシリコン側壁の下のケミカル酸化膜は十分薄い
自然酸化膜であるので,素子分離酸化の際に酸化種の横
方向拡散が防止でき,バーズビーク長の低減が可能とな
る。 (2) 従来例3に対して,本発明は窒化膜上に気相成長酸
化膜を形成しないため,素子分離酸化膜の膜厚が減った
り,素子分離酸化膜端のシリコン基板の表面に段差は生
じない。 (3)ポリシリコン側壁のエッチングストッパに窒化膜を
用いる場合は,ポリシリコン下に酸化膜がないため,酸
化種の横方向拡散が十分に抑えることができる。 (4)選択エピタキシャル成長により形成したシリコン側
壁の場合は, 異方性エッチングを行う必要がないため,
エッチングストッパを設ける必要はない。また,シリコ
ン側壁が基板に直接被着しているためバーズビークの発
生を抑えることができる。
With the above structure, (1) since the chemical oxide film under the polysilicon sidewall is a sufficiently thin natural oxide film, lateral diffusion of oxidizing species can be prevented during element isolation oxidation, and the bird's beak length can be reduced. Is possible. (2) In contrast to Conventional Example 3, since the present invention does not form a vapor growth oxide film on the nitride film, the film thickness of the element isolation oxide film is reduced, or a step is formed on the surface of the silicon substrate at the edge of the element isolation oxide film. Does not occur. (3) When a nitride film is used as an etching stopper on the side wall of polysilicon, there is no oxide film under the polysilicon, so lateral diffusion of oxidizing species can be sufficiently suppressed. (4) In the case of silicon sidewalls formed by selective epitaxial growth, it is not necessary to perform anisotropic etching.
It is not necessary to provide an etching stopper. Moreover, since the silicon sidewall is directly adhered to the substrate, the occurrence of bird's beak can be suppressed.

【0014】[0014]

【実施例】図1(A) 〜(D) は本発明の実施例1の断面図
である。図1(A) において,シリコン基板 1上に厚さ50
〜200 Åの熱酸化膜 2を形成し,その上に気相成長法に
より厚さ1000〜2000Åの窒化膜 3を成長する。次いで,
通常のリソグラフィ工程により, 窒化膜 4及び熱酸化膜
2をパターニングして,素子分離領域上を残す。
1A to 1D are sectional views of a first embodiment of the present invention. In Fig. 1 (A), the thickness of 50
A thermal oxide film 2 with a thickness of ~ 200Å is formed, and a nitride film 3 with a thickness of 1000 ~ 2000Å is grown on it by vapor phase epitaxy. Then,
Nitride film 4 and thermal oxide film
Pattern 2 to leave the element isolation region.

【0015】図1(B) において,基板上にエッチングス
トッパ膜 4として, 基板表面のウエット処理を行い厚さ
5〜10Å程度のケミカル酸化膜を形成する。あるいは,
気相成長法により厚さ10〜50Åの窒化膜を形成する。
In FIG. 1 (B), the thickness of the substrate is wet-processed as an etching stopper film 4 on the substrate.
Form a chemical oxide film of about 5-10Å. Alternatively,
A nitride film with a thickness of 10 to 50 Å is formed by vapor phase epitaxy.

【0016】ここで,ウエット処理の条件は次のとおり
である。例えば,過酸化水素水と塩酸の水溶液に浸漬す
る。このように薬液処理した後にシリコン表面に生ずる
自然酸化膜は,大気中に放置して生じた自然酸化膜と区
別してケミカル酸化膜と呼ばれている。この膜は本発明
者の実験結果より,エッチングストッパに供し得ること
がわかった。
Here, the conditions of the wet treatment are as follows. For example, it is dipped in an aqueous solution of hydrogen peroxide and hydrochloric acid. The natural oxide film formed on the silicon surface after the chemical treatment is called a chemical oxide film in distinction from the natural oxide film formed by leaving it in the atmosphere. From the experimental results of the present inventor, it was found that this film can be used as an etching stopper.

【0017】図1(C) において,気相成長法により基板
上に厚さ 200〜500 Åのポリシリコン膜 5を成長する。
図1(D) において,基板表面のポリシリコン膜 5に異方
性エッチングを行いポリシリコン側壁5Aを形成する。
In FIG. 1C, a polysilicon film 5 having a thickness of 200 to 500 Å is grown on the substrate by the vapor phase growth method.
In FIG. 1 (D), the polysilicon film 5 on the substrate surface is anisotropically etched to form polysilicon sidewalls 5A.

【0018】ポリシリコン膜 5の異方性エッチングは反
応性イオンエッチング(RIE) による。その条件の一例を
次に示す。 反応ガス: Cl2 100〜200 SCCM RF 電力: 150〜200 W ガス圧力: 0.05〜0.1 Torr 基板温度: 20℃ この後,従来の方法により素子分離酸化膜の形成を行
う。この際ポリシリコン側壁5Aは酸化される。次いで,
窒化膜 3を熱燐酸等により除去する。
The anisotropic etching of the polysilicon film 5 is performed by reactive ion etching (RIE). An example of the condition is shown below. Reaction gas: Cl 2 100 to 200 SCCM RF Power: 150 to 200 W Gas pressure: 0.05 to 0.1 Torr Substrate temperature: 20 ° C After that, an element isolation oxide film is formed by the conventional method. At this time, the polysilicon side wall 5A is oxidized. Then,
The nitride film 3 is removed by hot phosphoric acid or the like.

【0019】実施例2:図1(A) の後に,選択エピタキ
シャル法により, ポリシリコンを 500Å程度成長するこ
とによりポリシリコン側壁5Aが形成される。次いで,素
子分離酸化を行う。
Example 2 After FIG. 1 (A), a polysilicon side wall 5A is formed by growing polysilicon to about 500 Å by a selective epitaxial method. Next, element isolation oxidation is performed.

【0020】次に,ポリシリコンの選択エピタキシャル
成長条件の一例を示す。 反応ガス: Si2H6 50 SCCM H2 30 SLM HCl 100 SCCM ガス圧力: 50 Torr 基板温度: 900℃ この条件でエピタキシャル成長すると, 厚さ 700Å程度
まで窒化膜の側面のみ選択的に成長する。
Next, an example of conditions for selective epitaxial growth of polysilicon will be shown. Reaction gas: Si 2 H 6 50 SCCM H 2 30 SLM HCl 100 SCCM Gas pressure: 50 Torr Substrate temperature: 900 ℃ When epitaxially grown under these conditions, only the sides of the nitride film grow to a thickness of 700 Å.

【0021】この実施例では, ポリシリコン側壁の下に
は酸化膜等がないのでバーズビークは抑えられる。この
場合は,側壁形成に異方性エッチングの必要がないので
エッチングストッパは要らない。
In this embodiment, since there is no oxide film or the like under the polysilicon side wall, bird's beak is suppressed. In this case, the etching stopper is not required because the anisotropic etching is not required for forming the side wall.

【0022】[0022]

【発明の効果】本発明によれば, 耐酸化膜側面にポリシ
リコン側壁を形成して選択酸化法により素子分離酸化膜
を形成する際に, 耐酸化膜下に延びるバーズビーク長を
低減でき, 半導体装置の微細化に寄与することができ
る。
According to the present invention, the bird's beak length extending below the oxidation resistant film can be reduced when the polysilicon side wall is formed on the side surface of the oxidation resistant film and the element isolation oxide film is formed by the selective oxidation method. This can contribute to miniaturization of the device.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の実施例1の断面図FIG. 1 is a sectional view of a first embodiment of the present invention.

【図2】 従来例の断面図FIG. 2 is a sectional view of a conventional example.

【符号の説明】[Explanation of symbols]

1 シリコン基板 2 バッファ酸化膜で熱酸化膜 3 耐酸化膜で窒化膜 4 エッチングストッパでケミカル酸化膜または薄い窒
化膜 5 ポリシリコン膜 5A シリコン側壁 7 素子分離酸化膜 8 バーズビーク 9 気相成長酸化膜
1 Silicon substrate 2 Thermal oxide film as buffer oxide film 3 Oxide resistant film as nitride film 4 Chemical oxide film or thin nitride film as etching stopper 5 Polysilicon film 5A Silicon sidewall 7 Element isolation oxide film 8 Bird's beak 9 Vapor grown oxide film

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 21/76 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Office reference number FI technical display location H01L 21/76

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 シリコン基板(1) 上に酸化シリコン膜
(2) 及び窒化シリコン膜(3)をこの順に積層し,該酸化
シリコン膜(2) 及び該窒化シリコン膜(3)をパターニン
グする工程と,次いで, 該半導体基板(1) を化学薬液に
浸漬してウエット処理を行い, 前記パターニングにより
露出した該半導体基板(1) 上に該ウエット処理により生
成した自然酸化膜(4)を形成する工程と,次いで, 該半
導体基板(1) 上にポリシリコン膜(5) を成膜し,該ポリ
シリコン膜(5) を異方性エッチングして該窒化シリコン
膜の側面にポリシリコンからなる側壁 (5A)を形成する
工程と,次いで, 該半導体基板(1) を熱酸化する工程と
を有することを特徴とする半導体装置の製造方法。
1. A silicon oxide film on a silicon substrate (1)
(2) and the silicon nitride film (3) are laminated in this order, and the silicon oxide film (2) and the silicon nitride film (3) are patterned, and then the semiconductor substrate (1) is immersed in a chemical solution. Wet process is performed to form a native oxide film (4) formed by the wet process on the semiconductor substrate (1) exposed by the patterning, and then polysilicon is formed on the semiconductor substrate (1). A step of forming a film (5) and anisotropically etching the polysilicon film (5) to form a side wall (5A) made of polysilicon on the side surface of the silicon nitride film; 1) The method of manufacturing a semiconductor device, comprising the step of thermally oxidizing
【請求項2】 前記ケミカル酸化膜(4)の代わりに窒化
シリコン膜を形成し,該窒化シリコン膜の膜厚は, 前記
の該半導体基板(1) を熱酸化する工程において酸化され
る膜厚以下であり,かつ前記異方性エッチングで消滅す
る膜厚より大きいことを特徴とする請求項1記載の半導
体装置の製造方法。
2. A silicon nitride film is formed instead of the chemical oxide film (4), and the film thickness of the silicon nitride film is a film thickness that is oxidized in the step of thermally oxidizing the semiconductor substrate (1). The method of manufacturing a semiconductor device according to claim 1, wherein the thickness is equal to or less than the thickness and is larger than the film thickness that disappears by the anisotropic etching.
【請求項3】 シリコン基板(1) 上に酸化シリコン膜
(2) 及び窒化シリコン膜(3)をこの順に積層し,該酸化
シリコン膜(2) 及び窒化シリコン膜(3)をパターニング
する工程と,次いで, 選択エピタキシャル成長により該
窒化シリコン膜(3)の側面にシリコンからなる側壁(5A)
を成長する工程と,次いで, 該半導体基板(1) を熱酸化
する工程とを有することを特徴とする半導体装置の製造
方法。
3. A silicon oxide film on a silicon substrate (1)
(2) and the silicon nitride film (3) are laminated in this order, and the silicon oxide film (2) and the silicon nitride film (3) are patterned, and then the side surface of the silicon nitride film (3) is formed by selective epitaxial growth. Side wall made of silicon (5A)
1. A method of manufacturing a semiconductor device, comprising: a step of growing a semiconductor substrate; and a step of thermally oxidizing the semiconductor substrate (1).
JP4295694A 1994-03-15 1994-03-15 Manufacture of semiconductor device Withdrawn JPH07254594A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4295694A JPH07254594A (en) 1994-03-15 1994-03-15 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4295694A JPH07254594A (en) 1994-03-15 1994-03-15 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH07254594A true JPH07254594A (en) 1995-10-03

Family

ID=12650486

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4295694A Withdrawn JPH07254594A (en) 1994-03-15 1994-03-15 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH07254594A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19980060540A (en) * 1996-12-31 1998-10-07 김영환 Device Separation Method Using Chemical Oxide
KR20020068844A (en) * 2001-02-23 2002-08-28 박병국 Method for forming ultra-fine patterns using sidewalls and selective oxidation
KR100396137B1 (en) * 2001-06-13 2003-08-27 재단법인서울대학교산학협력재단 Method for fabricating ultra-fine multiple patterns

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19980060540A (en) * 1996-12-31 1998-10-07 김영환 Device Separation Method Using Chemical Oxide
KR20020068844A (en) * 2001-02-23 2002-08-28 박병국 Method for forming ultra-fine patterns using sidewalls and selective oxidation
KR100396137B1 (en) * 2001-06-13 2003-08-27 재단법인서울대학교산학협력재단 Method for fabricating ultra-fine multiple patterns

Similar Documents

Publication Publication Date Title
JP2683318B2 (en) Method for forming field oxide film of semiconductor device
JPS6340337A (en) Method of isolating integrated circuit
US5236862A (en) Method of forming oxide isolation
JPH0216574B2 (en)
US5371035A (en) Method for forming electrical isolation in an integrated circuit device
EP0518418A1 (en) Method of manufacturing a semiconductor device whereby field oxide regions are formed in a surface of a silicon body through oxidation
JP3950189B2 (en) Element isolation method
JPH03145730A (en) Manufacture of ic semiconductor device
KR100197651B1 (en) Method of forming an element isolation film of semiconductor device
JPH07254594A (en) Manufacture of semiconductor device
KR0161112B1 (en) Method of isolation on a semiconductor device
JP2686735B2 (en) Element isolation method for semiconductor device
JPH09326391A (en) Manufacture of element isolation oxide film
JPH0917780A (en) Formation of element separation film of semiconductor device
US6245644B1 (en) Methods of forming field oxide and active area regions on a semiconductive substrate
JPS63217640A (en) Formation of element isolation in semiconductor device
US20040007755A1 (en) Field oxide profile of an isolation region associated with a contact structure of a semiconductor device
TW388103B (en) Method of forming field oxide layer with double sidewall layer
JPH0831469B2 (en) Manufacturing method of bipolar semiconductor device
KR940009578B1 (en) Semiconductor device and manufacturing method thereof
JPS5931215B2 (en) How to form an insulating layer
US6780774B2 (en) Method of semiconductor device isolation
TW319898B (en) Forming method of nitride sidewall with spacer feet in LOCOS process
KR960010461B1 (en) Manufacturing method of field oxide in semiconductor device
JPH06283522A (en) Interelement isolation in semiconductor device

Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20010605