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A process of fabricating split-gate flash memory cell, which isapplicable to semiconductor substrate to produce split-gate flash memory cell, comprises the steps of: (1) forming tunnel oxide on the above semiconductor; (2) forming floating gate on predetermined position on the above tunnel oxide; (3) forming sidewall spacer on one lateral side of the above floating gate so as to confine channel length of the above split-gate flash memory cell with the above floating gate; (4) with the above floating gate and sidewall spacer as mask doping impurity to the above semiconductor substrate to form drain and source region of the above split-gate flash memory cell; (5) removing the above sidewall spacer; (6) forming gate interlevel dielectric on the above floating gate and semiconductor substrate; and (7) forming control gate which locates on gate interlevel dielectric between the above drain and source region.
TW83104869A1994-05-281994-05-28Process of fabricating split-gate flash memory cell
TW288206B
(en)