TW253031B - - Google Patents

Info

Publication number
TW253031B
TW253031B TW083109588A TW83109588A TW253031B TW 253031 B TW253031 B TW 253031B TW 083109588 A TW083109588 A TW 083109588A TW 83109588 A TW83109588 A TW 83109588A TW 253031 B TW253031 B TW 253031B
Authority
TW
Taiwan
Application number
TW083109588A
Original Assignee
At & T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by At & T Corp filed Critical At & T Corp
Application granted granted Critical
Publication of TW253031B publication Critical patent/TW253031B/zh

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318558Addressing or selecting of subparts of the device under test
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318505Test of Modular systems, e.g. Wafers, MCM's
    • G01R31/318513Test of Multi-Chip-Moduls
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318536Scan chain arrangements, e.g. connections, test bus, analog signals

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
TW083109588A 1993-12-27 1994-10-15 TW253031B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US17277893A 1993-12-27 1993-12-27

Publications (1)

Publication Number Publication Date
TW253031B true TW253031B (zh) 1995-08-01

Family

ID=22629198

Family Applications (1)

Application Number Title Priority Date Filing Date
TW083109588A TW253031B (zh) 1993-12-27 1994-10-15

Country Status (5)

Country Link
US (1) US5673276A (zh)
EP (1) EP0662616A3 (zh)
JP (1) JP3096597B2 (zh)
KR (1) KR100208306B1 (zh)
TW (1) TW253031B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8076863B2 (en) 2008-04-11 2011-12-13 Chunghwa Picture Tubes, Ltd. Back light module

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US5719879A (en) * 1995-12-21 1998-02-17 International Business Machines Corporation Scan-bypass architecture without additional external latches
US6324614B1 (en) * 1997-08-26 2001-11-27 Lee D. Whetsel Tap with scannable control circuit for selecting first test data register in tap or second test data register in tap linking module for scanning data
US6018815A (en) * 1996-10-18 2000-01-25 Samsung Electronics Co., Ltd. Adaptable scan chains for debugging and manufacturing test purposes
JP3287539B2 (ja) * 1996-11-13 2002-06-04 富士通株式会社 テスト機構を有する処理システム
US5900753A (en) * 1997-03-28 1999-05-04 Logicvision, Inc. Asynchronous interface
US5943490A (en) * 1997-05-30 1999-08-24 Quickturn Design Systems, Inc. Distributed logic analyzer for use in a hardware logic emulation system
US5960191A (en) * 1997-05-30 1999-09-28 Quickturn Design Systems, Inc. Emulation system with time-multiplexed interconnect
US6658615B2 (en) * 1998-06-30 2003-12-02 Texas Instruments Incorporated IC with IP core and user-added scan register
JPH1183956A (ja) * 1997-06-30 1999-03-26 Texas Instr Inc <Ti> 集積回路
KR19990047438A (ko) * 1997-12-04 1999-07-05 윤종용 핀 공유를 이용한 바이패스 회로를 구비하는 반도체 장치
US6408413B1 (en) * 1998-02-18 2002-06-18 Texas Instruments Incorporated Hierarchical access of test access ports in embedded core integrated circuits
US6163864A (en) * 1998-06-10 2000-12-19 Compaq Computer Corporation Method for cost-effective production testing of input voltage levels of the forwarded clock interface of high performance integrated circuits
US7013415B1 (en) 1999-05-26 2006-03-14 Renesas Technology Corp. IC with internal interface switch for testability
JP2003014819A (ja) * 2001-07-03 2003-01-15 Matsushita Electric Ind Co Ltd 半導体配線基板,半導体デバイス,半導体デバイスのテスト方法及びその実装方法
KR100896538B1 (ko) * 2001-09-20 2009-05-07 엔엑스피 비 브이 전자 장치
US6825683B1 (en) * 2002-04-18 2004-11-30 Cypress Semiconductor Corporation System and method for testing multiple integrated circuits that are in the same package
US7246282B2 (en) 2003-06-25 2007-07-17 Hewlett-Packard Development Company, L.P. Bypassing a device in a scan chain
US7509533B1 (en) * 2003-06-30 2009-03-24 Sun Microsystems, Inc. Methods and apparatus for testing functionality of processing devices by isolation and testing
KR101118447B1 (ko) * 2004-01-13 2012-03-06 엔엑스피 비 브이 멀티 칩 시스템 및 이 시스템을 테스트하는 방법
US20090307545A1 (en) * 2004-12-20 2009-12-10 Koninklijke Philips Electronics N.V. Testable multiprocessor system and a method for testing a processor system
US7519883B1 (en) * 2005-04-05 2009-04-14 Advanced Micro Devices, Inc. Method of configuring a system and system therefor
US7657807B1 (en) * 2005-06-27 2010-02-02 Sun Microsystems, Inc. Integrated circuit with embedded test functionality
TW200708750A (en) 2005-07-22 2007-03-01 Koninkl Philips Electronics Nv Testable integrated circuit, system in package and test instruction set
DE102005041614B4 (de) * 2005-09-01 2014-11-06 Infineon Technologies Ag Halbleiter-Bauelement-Testsystem mit Test-Schnittstellen-Einrichtung
US7906982B1 (en) 2006-02-28 2011-03-15 Cypress Semiconductor Corporation Interface apparatus and methods of testing integrated circuits using the same
JP4809439B2 (ja) * 2006-09-29 2011-11-09 富士通株式会社 集積回路
US7661048B2 (en) * 2007-06-29 2010-02-09 Alcatel-Lucent Usa Inc. Apparatus and method for embedded boundary scan testing
US7904770B2 (en) * 2008-09-09 2011-03-08 Qualcomm Incorporated Testing circuit split between tiers of through silicon stacking chips
US10776233B2 (en) 2011-10-28 2020-09-15 Teradyne, Inc. Programmable test instrument
US9759772B2 (en) 2011-10-28 2017-09-12 Teradyne, Inc. Programmable test instrument
US9026872B2 (en) * 2012-08-16 2015-05-05 Xilinx, Inc. Flexible sized die for use in multi-die integrated circuit
US9547034B2 (en) 2013-07-03 2017-01-17 Xilinx, Inc. Monolithic integrated circuit die having modular die regions stitched together
US10311001B2 (en) * 2017-10-09 2019-06-04 Getac Technology Corporation Electronic device and communication method thereof
US11293979B2 (en) * 2019-10-22 2022-04-05 Peter Shun Shen Wang Method of and an arrangement for analyzing manufacturing defects of multi-chip modules made without known good die
US11249134B1 (en) * 2020-10-06 2022-02-15 Qualcomm Incorporated Power-collapsible boundary scan
CN114113990B (zh) * 2021-08-31 2023-08-04 西南电子技术研究所(中国电子科技集团公司第十研究所) 嵌入式边界扫描控制器

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US4855669A (en) * 1987-10-07 1989-08-08 Xilinx, Inc. System for scan testing of logic circuit networks
US5084874A (en) * 1988-09-07 1992-01-28 Texas Instruments Incorporated Enhanced test circuit
US4996691A (en) * 1988-09-21 1991-02-26 Northern Telecom Limited Integrated circuit testing method and apparatus and integrated circuit devices for use therewith
JP2626920B2 (ja) * 1990-01-23 1997-07-02 三菱電機株式会社 スキャンテスト回路およびそれを用いた半導体集積回路装置
JP2627464B2 (ja) * 1990-03-29 1997-07-09 三菱電機株式会社 集積回路装置
US5355369A (en) * 1991-04-26 1994-10-11 At&T Bell Laboratories High-speed integrated circuit testing with JTAG
US5412260A (en) * 1991-05-03 1995-05-02 Lattice Semiconductor Corporation Multiplexed control pins for in-system programming and boundary scan state machines in a high density programmable logic device
US5448576A (en) * 1992-10-29 1995-09-05 Bull Hn Information Systems Inc. Boundary scan architecture extension
US5404358A (en) * 1993-02-04 1995-04-04 Bull Hn Information Systems Inc. Boundary scan architecture analog extension

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8076863B2 (en) 2008-04-11 2011-12-13 Chunghwa Picture Tubes, Ltd. Back light module

Also Published As

Publication number Publication date
KR950021604A (ko) 1995-07-26
EP0662616A3 (en) 1999-03-03
JPH07287053A (ja) 1995-10-31
JP3096597B2 (ja) 2000-10-10
KR100208306B1 (ko) 1999-07-15
EP0662616A2 (en) 1995-07-12
US5673276A (en) 1997-09-30

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees