TW202545041A - 電子裝置 - Google Patents

電子裝置

Info

Publication number
TW202545041A
TW202545041A TW113145289A TW113145289A TW202545041A TW 202545041 A TW202545041 A TW 202545041A TW 113145289 A TW113145289 A TW 113145289A TW 113145289 A TW113145289 A TW 113145289A TW 202545041 A TW202545041 A TW 202545041A
Authority
TW
Taiwan
Prior art keywords
bridging
layer
wiring
electronic component
electronic device
Prior art date
Application number
TW113145289A
Other languages
English (en)
Chinese (zh)
Inventor
野中敏央
Original Assignee
日商Ｒａｐｉｄｕｓ股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商Ｒａｐｉｄｕｓ股份有限公司 filed Critical 日商Ｒａｐｉｄｕｓ股份有限公司
Publication of TW202545041A publication Critical patent/TW202545041A/zh

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
  • Wire Bonding (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
TW113145289A 2023-11-30 2024-11-25 電子裝置 TW202545041A (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2023203322A JP2025088548A (ja) 2023-11-30 2023-11-30 電子装置
JP2023-203322 2023-11-30
PCT/JP2024/039125 WO2025115520A1 (ja) 2023-11-30 2024-11-01 電子装置
WOPCT/JP2024/039125 2024-11-01

Publications (1)

Publication Number Publication Date
TW202545041A true TW202545041A (zh) 2025-11-16

Family

ID=95897661

Family Applications (1)

Application Number Title Priority Date Filing Date
TW113145289A TW202545041A (zh) 2023-11-30 2024-11-25 電子裝置

Country Status (3)

Country Link
JP (1) JP2025088548A (https=)
TW (1) TW202545041A (https=)
WO (1) WO2025115520A1 (https=)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6038517B2 (ja) * 2012-07-13 2016-12-07 新光電気工業株式会社 配線基板及びその製造方法
US9368450B1 (en) * 2015-08-21 2016-06-14 Qualcomm Incorporated Integrated device package comprising bridge in litho-etchable layer
US10535608B1 (en) * 2018-07-24 2020-01-14 International Business Machines Corporation Multi-chip package structure having chip interconnection bridge which provides power connections between chip and package substrate
TWI768294B (zh) * 2019-12-31 2022-06-21 力成科技股份有限公司 封裝結構及其製造方法
US12027448B2 (en) * 2020-03-24 2024-07-02 Intel Corporation Open cavity bridge power delivery architectures and processes
US20230207475A1 (en) * 2021-12-23 2023-06-29 Intel Corporation Hybrid bonded stacked memory with tsv as chiplet for package structure

Also Published As

Publication number Publication date
WO2025115520A1 (ja) 2025-06-05
JP2025088548A (ja) 2025-06-11

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