TW202412431A - Power management system and unit - Google Patents

Abstract

A power management system has a power management unit and a resistance-capacitance sequential circuit. The power management unit is a micro-processing unit including a non-sequential logic circuit, wherein the non-sequential logic circuit is used to receive a power on/off signal, and generate and output a power control signal according to the power on/off signal. The resistance-capacitance sequential circuit is electrically connected to the non-sequential logic circuit, and is used to generate a plurality of on/off signals to a plurality of voltage adjustment units according a specific timing based on the power control signal, so as to turn on/off the plurality of voltage adjustment units according to the specific timing. The plurality of voltage adjustment units are used to respectively generate a plurality of power supply voltages to the power management unit according to the input voltage, and the non-sequential logic circuit receives a always-on power supply voltage.

Description

Power management systems and units

The present invention relates to a power management technology, and in particular to a power management system and unit that can be realized by directly using a microprocessor unit in combination with a plurality of voltage adjustment units and a resistor-capacitor timing circuit without using an external power management chip or an external microcontroller.

Traditional microprocessing unit (MPU) systems can use matching external power management chips to achieve power management, but this will limit the cost and availability of the microprocessing unit system to the price and availability of the external power management chip. In addition, traditional microprocessing unit systems can also use external microcontrollers and multiple voltage regulation units to achieve power management, but this approach requires a program to control the voltage regulation unit, which increases the system complexity and cost of the microprocessing unit system. On the other hand, whether using an external microcontroller or an external power management chip, there will be the problem of additional power consumption.

The present invention provides a power management system, which includes a power management unit and a resistor-capacitor timing circuit. The power management unit is a microprocessor unit including a non-timing logic circuit, wherein the non-timing logic circuit is used to receive a power on/off signal and generate and output a power control signal according to the power on/off signal. The RC timing circuit is electrically connected to the non-timing logic circuit and is used to generate multiple on/off signals to multiple voltage adjustment units according to a specific timing according to a power control signal, so as to turn on/off the multiple voltage adjustment units according to the specific timing, wherein the multiple voltage adjustment units are used to generate multiple power voltages to the power management unit according to the input voltage, and the non-timing logic circuit receives the always-on power voltage.

The present invention provides a power management unit, which is a microprocessing unit for receiving a plurality of power voltages output by a plurality of voltage regulating units in a power management system, and includes a central processing unit, a non-timing logic circuit, a controller, and a state register. The non-timing logic circuit receives a normally-on power voltage. The controller is electrically connected to the central processing unit and the non-timing logic circuit, and is used to receive the normally-on power voltage. The state register is electrically connected to the controller and the timing logic circuit, and is used to receive the normally-on power voltage, as well as to receive and store the state information of the power management system. The controller is controlled by the central processing unit, and is used to obtain the state information stored in the state register. The controller generates a state signal to the non-timing logic circuit according to the state information. The non-timing logic circuit generates and outputs a power control signal and state information according to the state signal and the power on/off signal, wherein the power control signal is used to enable the resistor-capacitor timing circuit to generate multiple on/off signals to multiple voltage adjustment units according to a specific timing, so as to turn on/off the multiple voltage adjustment units according to the specific timing.

In summary, the power management system and unit of the present invention can be realized by directly using a microprocessor unit with multiple voltage adjustment units and a resistor-capacitor timing circuit without using an external power management chip or an external microcontroller. In general, the power management system and unit of the present invention has the advantages of lower cost, lower system complexity, higher reliability and lower power consumption.

In order to further understand the technology, means and effects of the present invention, the following detailed description and drawings may be referred to, so that the purpose, features and concepts of the present invention can be thoroughly and specifically understood. However, the following detailed description and drawings are only used for reference and explanation of the implementation of the present invention, and are not used to limit the present invention.

Reference will now be made in detail to exemplary embodiments of the present invention, which are illustrated in the accompanying drawings. Where possible, the same reference numerals are used in the drawings and the specification to refer to the same or similar components. In addition, the exemplary embodiments are only one of the implementation methods of the design concept of the present invention, and the following examples are not intended to limit the present invention.

In view of the technical problems of high system complexity, high cost and extra power consumption in the prior art, the present invention aims to provide a power management system and unit that can be realized by directly using a microprocessor unit with multiple voltage adjustment units and a resistor-capacitor timing circuit without using an external power management chip or an external microcontroller. Furthermore, the microprocessor unit is used as a power management unit and is designed with a non-timing logic circuit, and this non-timing logic circuit is used to generate a power control signal according to a power on/off signal. The RC timing circuit is used to receive a power control signal and generate a plurality of on/off signals to a plurality of voltage regulating units, so that the plurality of voltage regulating units provide or stop providing a plurality of power voltages to the power management unit according to a specific timing.

In short, the power management system of the present invention abandons the use of external power management chips and external microcontrollers, and directly designs a low-power non-timing logic circuit in the uninterruptible power area of the microprocessing unit for use as a power management unit. The non-timing logic circuit controls the resistor-capacitor timing circuit outside the microprocessing unit to generate multiple on/off signals so that multiple voltage adjustment units provide or stop providing multiple power voltages to the power management unit according to a specific timing, so as to meet the needs of multiple power domains and power on/off according to a specific timing. In addition, the non-timing logic circuit does not need a crystal oscillator for timing control operation, and only performs simple logic judgment and control output, is not easily affected by timing drift or short surge (glitch), and has the advantages of low power consumption and high reliability. Furthermore, at least a part of the power management system is a part of the entire microprocessor unit system, and at least a part of the power management system and other circuit components can be integrated into a single chip of the microprocessor unit system.

First, please refer to FIG. 1, which is a block diagram of a power management system of an embodiment of the present invention. The power management system 1 includes an RC timing circuit 100, a plurality of voltage adjustment units (implemented by DC-DC converters 102, 104, 106 and low-voltage dropout regulators 108, 110, 112), a battery 118, a power management unit 120, diodes 114, 116, and a power on/off unit PUSH_B. The power management unit 120 can be implemented by a microprocessor unit, that is, the power management system 1 itself can be a part of a microprocessor unit system, so there is no need to use an external microcontroller or an external power management chip.

The power management unit 120 is designed with a non-timing logic circuit 122 in the uninterruptible power area. The non-timing logic circuit 122 is electrically connected to the power on/off unit PUSH_B to receive the power on/off signal TR generated by the power on/off unit PUSH_B. In the embodiment of the present invention, the power on/off signal TR refers to a signal used to turn on or off the power management system 1. For example, in the power-on state, when the power on/off signal TR changes from high to low (e.g., to the ground voltage GND), the power on/off signal TR is used to shut down the power management system 1; in the power-off state, when the power on/off signal TR changes from high to low, the power on/off signal TR is used to turn on the power management system 1. When the power on/off signal TR is a pulse signal generated by a level change, the power management unit 120 records the status information of the power management system 1 to indicate whether the power management system 1 is in the power-off state or the power-on state. It should be noted that the power on/off signal TR may also be designed to be used to turn on the power management system 1 when it is at a high level, and to turn off the power management system 1 when it is at a low level, and at this time, no additional status information is needed to be recorded.

The non-timing logic circuit 122 is electrically connected to the RC timing circuit 100, and generates a power control signal CTPW to the RC timing circuit 100 when receiving the power on/off signal TR. In one embodiment, when the power on/off signal TR is a pulse signal generated by a level change, the non-timing logic circuit 122 generates the power control signal CTPW according to the state information and the power on/off signal TR. In addition, the non-timing logic circuit 122 is configured in a non-power-off region, so it receives an always-on power voltage.

The RC timing circuit 100 is electrically connected to the DC-DC converters 102, 104, 106 and the low-voltage dropout regulators 108, 110, 112. When receiving the power control signal CTPW, the DC-DC converters 102, 104, 106 and the low-voltage dropout regulators 108, 110, 112 are turned on/off according to a specific timing. For example, in the power-on state, the DC-DC converters 102, 104, 106 and the low-voltage dropout regulators 108, 110, 112 are sequentially turned off to achieve the requirement of powering off according to a specific timing; and in the power-on state, the DC-DC converters 102, 104, 106 and the low-voltage dropout regulators 108, 110, 112 are sequentially turned on to achieve the requirement of powering on according to a specific timing. In addition, the above-mentioned specific timing is determined according to the resistance values of multiple resistors and the capacitance values of multiple capacitors in the RC timing circuit 100.

The DC-DC converters 102, 104, 106 and the low-voltage dropout regulators 108, 110, 112 receive an input voltage VIN and respectively provide power voltages VDD1, VDD2, VDD3, AVDD1, AVDD2, and AVDD3 to the power management unit 120 when turned on, and respectively stop supplying the power voltages VDD1, VDD2, VDD3, AVDD1, AVDD2, and AVDD3 to the power management unit 120 when turned off. The specific timing for turning on and off the DC-DC converters 102, 104, 106 and the low-voltage dropout regulators 108, 110, 112 may be the DC-DC converters 102, 104, 106 and the low-voltage dropout regulators 108, 110, 112 in sequence, but the present invention is not limited thereto.

Since a normally-on power voltage (here, the power voltage AVDD3) needs to be provided to the power management unit 120, a battery 118 is usually configured to provide the normally-on power voltage to the power management unit 120 in the shutdown state, and in the startup state, the low-voltage dropout regulator 112 provides the normally-on power voltage to the power management unit 120. Therefore, diodes 114 and 116 need to be configured to isolate the battery 118 from the low-voltage dropout regulator 112. In this embodiment, the input end of the diode 114 is electrically connected to the output end of the low voltage dropout regulator 112, the input end of the diode 114 is electrically connected to the battery 118, and the output ends of the diodes 114 and 116 are electrically connected to each other and to the power management unit 120.

Incidentally, when the power on/off signal TR is a pulse signal generated by level change, the power on/off unit PUSH_B can be a single-click push switch. However, the power on/off unit PUSH_B is not limited to this. In other possible embodiments, it can be a rotary switch, a non-single-click push switch, or a combination of a remote control receiving module and a remote control. In short, the implementation method of the power on/off unit PUSH_B is not used to limit the present invention. Furthermore, at least a part of the components of the power management system 1 can be part of the microprocessor system and integrated into the single chip of the microprocessor system. In addition, FIG. 1 takes all the voltage regulating units as an example that can be controlled by the on/off signal, but in other embodiments, only a part of the voltage regulating units can be controlled by the on/off signal, and the other voltage regulating units are not controlled by the on/off signal, and are directly turned on when powered on. For example, only the DC-DC converters 102, 104, and 106 are controlled to be turned on/off, but the low-voltage dropout regulators 108, 110, and 112 are not controlled to be turned on/off.

Next, please refer to FIG. 1 and FIG. 2. FIG. 2 is a block diagram of a power management unit of an embodiment of the present invention implemented as a microprocessing unit. The power management unit 120 is implemented as a microprocessing unit, and therefore includes a central processing unit 130, a non-timing logic circuit 122 located in an uninterruptible power area 128, a controller 124, and a state register 126. The controller 124 is electrically connected to the central processing unit 130 and the non-timing logic circuit 122, and is used to receive a normally-on power voltage (here, the power voltage AVVD3 is used as an example). The state register 126 is electrically connected to the controller 124 and the non-timing logic circuit 122, and is used to receive a normally-on power voltage, as well as to receive and store the state information of the power management system 1. The controller 124 is controlled by the central processing unit 130 and is used to obtain the state information temporarily stored in the state register 128. The controller 124 generates a state signal to the non-timing logic circuit 122 according to the state information, and the non-timing logic circuit 122 generates and outputs the power control signal CTPW and the state information according to the state signal and the power on/off signal TR. The state information output by the non-timing logic circuit 122 is further used to update the state information temporarily stored in the state register 126, and the updating and reading of the state information in the state register 126 is controlled by the controller 124.

Next, please refer to FIG. 1 and FIG. 3 , FIG. 3 is a circuit diagram of a resistor-capacitor timing circuit of an embodiment of the present invention. The resistor-capacitor timing circuit 100 corresponds to the embodiment of FIG. 1 , and includes a total of 6 resistor-capacitor charging-discharging units 1002 to 1012. Each of the resistor-capacitor charging-discharging units 1002 to 1012 includes a resistor R1, a capacitor C1, and a buffer output stage implemented by two inverters, one of which is composed of transistors P1 and N1, and the other is composed of transistors P2 and N2. Incidentally, the buffer output stage may be a non-essential component, so it may be removed. In addition, the product of the resistance R1 and the capacitance C1 of each of the RC charging and discharging units 1002-1012 is different from each other. For example, the resistance value of the resistance R1 of each of the RC charging and discharging units 1002-1012 is different from each other, and the capacitance value of the capacitance C1 of each of the RC charging and discharging units 1002-1012 is different from each other.

In each of the RC charging and discharging units 1002-1012, one end of the resistor R1 receives the power control signal CTPW, the other end of the resistor R1 is electrically connected to the buffer output stage and one end of the capacitor C1, and the other end of the capacitor C1 is electrically connected to a low voltage, for example, a ground voltage GND.

The resistance R1 of each of the RC charging and discharging units 1002-1012 can be the same or different, or the capacitance C1 of each of the RC charging and discharging units 1002-1012 can be the same or different. In terms of design, it is sufficient as long as the product of the resistance R1 and the capacitance C1 of each of the RC charging and discharging units 1002-1012 is different. Since the product of the resistance R1 and the capacitance C1 of each of the RC charging and discharging units 1002-1012 is different, the time taken for the output voltage of the RC charging and discharging units 1002-1012 to change from high to low and from low to high is different, so that the DC-DC converters 102, 104, 106 and the low-voltage dropout regulators 108, 110, 112 can be turned on/off according to a specific timing.

In summary, the present invention designs a non-sequential logic circuit directly in the uninterruptible power area of the microprocessor system to achieve a simple system power management function. The system power management function is directly added to the uninterruptible power area of the system. In addition to saving external power supply costs, the use of non-sequential power control signals to determine power control can reduce logic errors caused by timing drift or short surges in the timing logic and maximize system reliability.

It should be understood that the examples and embodiments described herein are for illustrative purposes only and that various modifications or changes thereto will be suggested to those skilled in the art and are to be included within the spirit and scope of the present application and the scope of the appended claims.

1: Power management system 100: RC timing circuit 1002~1012: RC charging and discharging unit 102, 104, 106: DC to DC converter 108, 110, 112: Low voltage dropout regulator 118: Battery 114, 116: Diode 120: Power management unit 122: Non-timing logic circuit 124: Controller 126: Status register 128: Uninterruptible power area 130: Central processing unit PUSH_B: Power on/off unit GND: Ground voltage TR: Power on/off signal VIN: Input voltage CTPW: Power control signal VDD1~VDD3, AVDD1~AVDD3: power supply voltage R1: resistor C1: capacitor P1, N1, P2, N2: transistor

The accompanying drawings are provided to enable a person with ordinary knowledge in the art to which the present invention belongs to further understand the present invention, and are incorporated into and constitute a part of the specification of the present invention. The accompanying drawings show exemplary embodiments of the present invention, and are used together with the specification of the present invention to explain the principles of the present invention.

FIG1 is a block diagram of a power management system according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a power management unit according to an embodiment of the present invention implemented as a microprocessor unit.

FIG3 is a circuit diagram of a resistor-capacitor timing circuit according to an embodiment of the present invention.

1: Power management system

100: Resistor and capacitor timing circuit

102, 104, 106: DC to DC converter

108, 110, 112: Low voltage drop regulator

118:Battery

114, 116: Diode

120: Power management unit

122: Non-sequential logic circuit

PUSH_B: Power on/off unit

GND: Ground voltage

TR: Power on/off signal

VIN: Input voltage

CTPW: power control signal

VDD1~VDD3, AVDD1~AVDD3: power supply voltage

Claims (10)

A power management system, comprising: A power management unit, which is a microprocessor unit including a non-timing logic circuit, wherein the non-timing logic circuit is used to receive a power on/off signal and generate and output a power control signal according to the power on/off signal; and A resistor-capacitor timing circuit is electrically connected to the non-timing logic circuit and is used to generate multiple on/off signals to a plurality of voltage adjustment units according to a specific timing according to the power control signal, so as to turn on/off the voltage adjustment units according to the specific timing, wherein the voltage adjustment units are used to generate multiple power voltages to the power management unit according to an input voltage, and the non-timing logic circuit receives an always-on power voltage. A power management system as described in claim 1, wherein the voltage regulation units include at least one DC-to-DC converter and/or at least one low voltage dropout regulator. The power management system as described in claim 1, wherein the power management system further comprises: The voltage adjustment units, wherein a specific voltage adjustment unit of the voltage adjustment units is used to provide the normally-on power voltage when it is turned on; A battery, electrically connected to the power management unit, and when the specific voltage adjustment unit is turned off, it is used to provide a battery voltage as the normally-on power voltage; A first diode, having a first input terminal and a first output terminal, wherein the first input terminal is electrically connected to the battery, and the first output terminal is electrically connected to the power management unit; and A second diode having a second input terminal and a second output terminal, wherein the second input terminal is electrically connected to the specific voltage adjustment unit, and the second output terminal is electrically connected to the power management unit and the first output terminal. A power management system as described in claim 1, wherein the RC timing circuit comprises: a plurality of resistors, wherein a first end of each of the resistors receives the power control signal; and a plurality of capacitors, wherein a first end of each of the capacitors is electrically connected to a second end of the corresponding resistor and the corresponding voltage adjustment unit, and a second end of each of the capacitors is electrically connected to a low voltage. The power management system as described in claim 1, wherein the power management unit further comprises: a central processing unit; a controller electrically connected to the central processing unit and the non-timing logic circuit, and used to receive the normally-on power voltage; and a state register electrically connected to the controller and the non-timing logic circuit, used to receive the normally-on power voltage, and receive and store a state information of the power management system; The controller is controlled by the central processing unit and is used to obtain the state information temporarily stored in the state register. The controller generates a state signal to the non-timing logic circuit according to the state information, and the non-timing logic circuit generates and outputs the power control signal and the state information according to the state signal and the power on/off signal. A power management system as described in claim 1, wherein when the power management system is in a shutdown state, when the non-timing logic circuit receives the power on/off signal, the power control signal causes the resistor-capacitor timing circuit to generate the on/off signals according to the specific timing to turn on the voltage adjustment units according to the specific timing. A power management system as described in claim 1, wherein when the power management system is in a power-on state, when the non-timing logic circuit receives the power on/off signal, the power control signal causes the resistor-capacitor timing circuit to generate the on/off signals according to the specific timing to allow the voltage adjustment units to be turned off according to the specific timing. A power management unit is a microprocessing unit for receiving a plurality of power voltages output by a plurality of voltage regulating units in a power management system, comprising: a central processing unit; a non-timing logic circuit for receiving a normally-on power voltage; a controller electrically connecting the central processing unit and the non-timing logic circuit and for receiving the normally-on power voltage; and a state register electrically connecting the controller and the non-timing logic circuit and for receiving the normally-on power voltage, as well as receiving and storing a state information of the power management system; The controller is controlled by the central processing unit and is used to obtain the state information temporarily stored in the state register. The controller generates a state signal to the non-timing logic circuit according to the state information, and the non-timing logic circuit generates and outputs the power control signal and the state information according to the state signal and the power on/off signal, wherein the power control signal is used to enable a resistor-capacitor timing circuit to generate multiple on/off signals to the voltage adjustment units according to a specific timing, so as to turn on/off the voltage adjustment units according to the specific timing. A power management unit as described in claim 8, wherein when the power management system is in a shutdown state, when the non-timing logic circuit receives the power on/off signal, the power control signal causes the resistor-capacitor timing circuit to generate the on/off signals according to the specific timing to turn on the voltage adjustment units according to the specific timing. A power management unit as described in claim 8, wherein when the power management system is in a power-on state, when the non-timing logic circuit receives the power on/off signal, the power control signal causes the resistor-capacitor timing circuit to generate the on/off signals according to the specific timing to allow the voltage adjustment units to be turned off according to the specific timing.

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