TW202406425A - Manufacturing method of circuit board - Google Patents
Manufacturing method of circuit board Download PDFInfo
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- TW202406425A TW202406425A TW111128076A TW111128076A TW202406425A TW 202406425 A TW202406425 A TW 202406425A TW 111128076 A TW111128076 A TW 111128076A TW 111128076 A TW111128076 A TW 111128076A TW 202406425 A TW202406425 A TW 202406425A
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Abstract
Description
本發明涉及一種電路板的製造方法,特別是涉及一種具有壓印灌孔的電路板的製造方法及電路板結構。The present invention relates to a method of manufacturing a circuit board, and in particular to a method of manufacturing a circuit board with embossed holes and a circuit board structure.
現有技術電路板的製造方法在增層作業上,會在介電層薄膜上通過雷射鑽孔的方式依序形成多個雷射鑽孔。然而,現有的雷射鑽孔製程,一個鑽頭在一次鑽孔作業中只能加工形成一個雷射鑽孔,若鑽孔的數量越多,所需要的加工時間就越長。另,雷射鑽孔也存在孔徑限制。In the prior art circuit board manufacturing method, a plurality of laser holes are sequentially formed on the dielectric layer film through laser drilling during the layer build-up operation. However, in the existing laser drilling process, a drill bit can only form one laser hole in one drilling operation. The more holes are drilled, the longer the processing time is required. In addition, laser drilling also has aperture limitations.
本發明所要解決的技術問題在於,針對現有技術的不足提供一種電路板的製造方法及電路板結構。The technical problem to be solved by the present invention is to provide a circuit board manufacturing method and circuit board structure in view of the shortcomings of the existing technology.
為了解決上述的技術問題,本發明所採用的其中一技術方案是,提供一種電路板的製造方法,其包括:提供一絕緣基板及形成於所述絕緣基板上的一金屬線路;形成一介電層薄膜於所述金屬線路上,且使所述介電層薄膜陷入所述金屬線路之間的間隙,以接觸所述絕緣基板;將具有多個凸柱結構的一壓印模具覆蓋於所述介電層薄膜上,並進行一壓印作業,以使得所述壓印模具的多個所述凸柱結構壓入所述介電層薄膜中並且在位置上對應於所述金屬線路的上方;以及將所述壓印模具自所述介電層薄膜上移除,以使得所述介電層薄膜具有形狀分別與所述壓印模具的多個所述凸柱結構相對應的多個壓印灌孔。In order to solve the above technical problems, one of the technical solutions adopted by the present invention is to provide a manufacturing method of a circuit board, which includes: providing an insulating substrate and a metal circuit formed on the insulating substrate; forming a dielectric Layer a thin film on the metal lines, and make the dielectric layer film fall into the gap between the metal lines to contact the insulating substrate; cover an imprint mold with a plurality of protruding pillar structures on the on the dielectric layer film, and perform an imprinting operation so that the plurality of protruding pillar structures of the imprinting mold are pressed into the dielectric layer film and are positioned corresponding to the top of the metal circuit; and removing the imprinting mold from the dielectric layer film, so that the dielectric layer film has a plurality of imprints with shapes respectively corresponding to the plurality of protruding pillar structures of the imprinting mold. Fill the hole.
為了解決上述的技術問題,本發明所採用的另外一技術方案是,提供一種電路板結構,其包括:一絕緣基板;一金屬線路,其形成於所述絕緣基板上;一介電層薄膜,其形成於所述金屬線路上、且陷入所述金屬線路之間的間隙,以接觸所述絕緣基板;其中,所述介電層薄膜具有形狀分別與一壓印模具的多個凸柱結構對應的多個壓印灌孔,其內側分別充填有多個導電金屬;其中,所述介電層薄膜為一ABF增層薄膜或類ABF增層薄膜。In order to solve the above technical problems, another technical solution adopted by the present invention is to provide a circuit board structure, which includes: an insulating substrate; a metal circuit formed on the insulating substrate; and a dielectric layer film, It is formed on the metal lines and sinks into the gaps between the metal lines to contact the insulating substrate; wherein the dielectric layer film has a shape corresponding to a plurality of protruding pillar structures of an imprinting mold. A plurality of imprinted filling holes are filled with a plurality of conductive metals on the inside respectively; wherein, the dielectric layer film is an ABF build-up film or an ABF-like build-up film.
本發明的有益效果在於,本發明所提供的電路板的製造方法,其能通過“將具有多個凸柱結構的一壓印模具覆蓋於所述介電層薄膜上,並進行一壓印作業,以使得所述壓印模具的多個所述凸柱結構壓入所述介電層薄膜中並且在位置上對應於所述金屬線路的上方”以及“將所述壓印模具自所述介電層薄膜上移除,以使得所述介電層薄膜具有形狀分別與所述壓印模具的多個所述凸柱結構相對應的多個壓印灌孔”的技術方案,從而在單一次的壓印作業中同時產生多個壓印灌孔,藉以滿足具有大量灌孔需求的產品,並且能大幅縮短作業時間。The beneficial effect of the present invention is that the circuit board manufacturing method provided by the present invention can be achieved by "covering an embossing mold with a plurality of protruding pillar structures on the dielectric layer film and performing an embossing operation. , so that the plurality of protruding pillar structures of the imprinting mold are pressed into the dielectric layer film and are positioned corresponding to the top of the metal lines" and "moving the imprinting mold from the intermediary The technical solution is to remove the electrical layer film so that the dielectric layer film has a plurality of embossed filling holes whose shapes respectively correspond to the plurality of convex pillar structures of the embossed mold, so that in a single pass Multiple embossing holes are produced at the same time in the embossing operation to meet the needs of products with a large number of holes and can greatly shorten the operation time.
再者,相較於傳統的雷射鑽孔製程,本發明電路板的製造方法能同時產生多個孔徑更小的孔洞(如:5微米至100微米的孔洞),從而突破了傳統雷射鑽孔的製程極限。Furthermore, compared with the traditional laser drilling process, the circuit board manufacturing method of the present invention can simultaneously produce multiple holes with smaller diameters (such as holes of 5 microns to 100 microns), thereby breaking through the traditional laser drilling process. Hole process limits.
為使能更進一步瞭解本發明的特徵及技術內容,請參閱以下有關本發明的詳細說明與圖式,然而所提供的圖式僅用於提供參考與說明,並非用來對本發明加以限制。In order to further understand the features and technical content of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are only for reference and illustration and are not used to limit the present invention.
以下是通過特定的具體實施例來說明本發明所公開的實施方式,本領域技術人員可由本說明書所公開的內容瞭解本發明的優點與效果。本發明可通過其他不同的具體實施例加以施行或應用,本說明書中的各項細節也可基於不同觀點與應用,在不悖離本發明的構思下進行各種修改與變更。另外,本發明的附圖僅為簡單示意說明,並非依實際尺寸的描繪,事先聲明。以下的實施方式將進一步詳細說明本發明的相關技術內容,但所公開的內容並非用以限制本發明的保護範圍。The following is a specific example to illustrate the disclosed embodiments of the present invention. Those skilled in the art can understand the advantages and effects of the present invention from the content disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of the present invention. In addition, the drawings of the present invention are only simple schematic illustrations and are not depictions based on actual dimensions, as is stated in advance. The following embodiments will further describe the relevant technical content of the present invention in detail, but the disclosed content is not intended to limit the scope of the present invention.
應當可以理解的是,雖然本文中可能會使用到“第一”、“第二”、“第三”等術語來描述各種元件或者信號,但這些元件或者信號不應受這些術語的限制。這些術語主要是用以區分一元件與另一元件,或者一信號與另一信號。另外,本文中所使用的術語“或”,應視實際情況可能包括相關聯的列出項目中的任一個或者多個的組合。It should be understood that although terms such as “first”, “second” and “third” may be used herein to describe various elements or signals, these elements or signals should not be limited by these terms. These terms are primarily used to distinguish one component from another component or one signal from another signal. In addition, the term "or" used in this article shall include any one or combination of multiple associated listed items, depending on the actual situation.
[電路板的製造方法][Circuit board manufacturing method]
請參閱圖1A至圖1J所示,本發明實施例提供一種電路板的製造方法,並且所述電路板的製造方法包含步驟S101至步驟S110。必說明的是,本實施例所載之各步驟的順序與實際的操作方式可視需求而調整,並不限於本實施例所載。Referring to FIGS. 1A to 1J , an embodiment of the present invention provides a circuit board manufacturing method, and the circuit board manufacturing method includes steps S101 to S110 . It must be noted that the sequence of each step and the actual operation method described in this embodiment can be adjusted according to needs and are not limited to those described in this embodiment.
如圖1A所示,所述步驟S101包含:提供一核心材料。所述核心材料包含一絕緣基板1(或稱芯板,core)及形成於所述絕緣基板1上的一金屬披覆層2。其中,所述絕緣基板1的材料可以例如是玻纖基板、玻璃基板、紙質基板、複合基板、BT基板、或FR-4基板等具有電性絕緣性質的基板,並且所述金屬披覆層2可以例如是金屬銅箔或銅晶種層等具有導電性質的材料,但本發明不受限於此。As shown in Figure 1A, the step S101 includes: providing a core material. The core material includes an insulating substrate 1 (or core) and a metal coating layer 2 formed on the insulating substrate 1 . Wherein, the material of the insulating substrate 1 can be, for example, a fiberglass substrate, a glass substrate, a paper substrate, a composite substrate, a BT substrate, or a FR-4 substrate or other substrates with electrical insulation properties, and the metal coating layer 2 It may be, for example, a conductive material such as metal copper foil or copper seed layer, but the invention is not limited thereto.
如圖1B所示,所述步驟S102包含:於所述金屬披覆層2上形成經圖案化的一光阻遮罩3。更具體地說,所述光阻遮罩3是形成於金屬披覆層2的遠離絕緣基板1的一側表面上。所述光阻遮罩3的形成方式可以例如是依序通過覆蓋光阻劑(如:壓制乾膜光阻劑、或塗佈濕膜光阻劑)、且對光阻劑進行曝光及顯影等製程所形成。再者,所述光阻遮罩3的內側包圍形成有多個間隙31,並且所述金屬披覆層2的未被光阻遮罩3遮蔽的部分曝露於多個間隙31,以提供導電金屬充填於其中。As shown in FIG. 1B , the step S102 includes forming a patterned photoresist mask 3 on the metal coating layer 2 . More specifically, the photoresist mask 3 is formed on a side surface of the metal coating layer 2 away from the insulating substrate 1 . The photoresist mask 3 can be formed, for example, by sequentially covering the photoresist (such as pressing dry film photoresist or coating wet film photoresist), and exposing and developing the photoresist. formed by the manufacturing process. Furthermore, a plurality of gaps 31 are formed on the inner side of the photoresist mask 3 , and the portion of the metal coating layer 2 that is not shielded by the photoresist mask 3 is exposed to the plurality of gaps 31 to provide conductive metal. Fill in it.
如圖1C所示,所述步驟S103包含:利用電鍍的方式於所述多個間隙31中形成多個導電金屬4。更具體地說,所述多個導電金屬4是自金屬披覆層2朝著相反於絕緣基板1的方向延伸地形成、且填充於所述多個間隙31中。As shown in FIG. 1C , step S103 includes forming a plurality of conductive metals 4 in the gaps 31 by electroplating. More specifically, the plurality of conductive metals 4 are formed extending from the metal coating layer 2 in a direction opposite to the insulating substrate 1 and filled in the plurality of gaps 31 .
如圖1D所示,所述步驟S104包含:移除所述光阻遮罩3,並使得所述多個導電金屬4形成為一金屬線路5。更具體地說,為了讓所述多個導電金屬4形成為金屬線路5,在本實施例中,在移除所述光阻遮罩3之後,所述步驟S104進一步包含:對所述金屬披覆層2進行蝕刻(如:化學蝕刻),以將所述金屬披覆層2的未被多個導電金屬4所覆蓋的部分移除,從而使所述多個導電金屬4形成為所述金屬線路5。也就是說,所述金屬披覆層2被移除的部分即是金屬披覆層2的原本被光阻遮罩3覆蓋的部分。As shown in FIG. 1D , the step S104 includes: removing the photoresist mask 3 and forming the plurality of conductive metals 4 into a metal circuit 5 . More specifically, in order to form the plurality of conductive metals 4 into metal lines 5, in this embodiment, after removing the photoresist mask 3, step S104 further includes: The coating layer 2 is etched (such as chemical etching) to remove the portion of the metal coating layer 2 that is not covered by the plurality of conductive metals 4, so that the plurality of conductive metals 4 are formed into the metal Line 5. That is to say, the removed part of the metal coating layer 2 is the part of the metal coating layer 2 that was originally covered by the photoresist mask 3 .
簡單地說,所述步驟S104包含:提供一電路板半成品,其包含一絕緣基板1及形成於所述絕緣基板1上的一金屬線路5。其中,所述金屬線路5具有導電性,並且所述金屬線路5可以例如是包含圖案化導電線路及金屬墊。Simply put, step S104 includes: providing a circuit board semi-finished product, which includes an insulating substrate 1 and a metal circuit 5 formed on the insulating substrate 1 . Wherein, the metal circuit 5 has conductivity, and the metal circuit 5 may include, for example, patterned conductive circuits and metal pads.
值得一提的是,如上述步驟S101至步驟S104,所述金屬線路5的形成方式是利用半加成法或改良式半加成法的方式所形成,但是本發明不受限於此。所述金屬線路5的形成方式也可以例如是通過減成法或全加成法的方式形成於絕緣基板1上。It is worth mentioning that, as in the above steps S101 to S104, the metal circuit 5 is formed by a semi-additive method or a modified semi-additive method, but the present invention is not limited thereto. The metal circuit 5 may also be formed on the insulating substrate 1 by, for example, a subtractive method or a fully additive method.
如圖1E所示,所述步驟S105包含:於所述電路板半成品上形成一介電層薄膜6,並且使所述介電層薄膜6覆蓋於金屬線路5上,並且陷入所述金屬線路5之間的間隙,以接觸於所述絕緣基板1的與金屬線路5連接的表面。As shown in FIG. 1E , the step S105 includes: forming a dielectric layer film 6 on the circuit board semi-finished product, and making the dielectric layer film 6 cover the metal circuit 5 and sink into the metal circuit 5 The gap between them is so as to contact the surface of the insulating substrate 1 connected to the metal circuit 5 .
在本實施例中,所述介電層薄膜6為一ABF介電層薄膜,也即,味之素增層膜(Ajinomoto Build-up Film,ABF)。更具體地說,所述介電層薄膜6為熱固型樹脂材料。所述介電層薄膜6可以例如是通過真空熱壓的方式被軟化、從而陷入所述金屬線路5之間的間隙。經軟化的所述介電層薄膜6可以例如是在通過後續步驟的加工後(如圖1F實施完壓印作業後)、先放入烤箱以一軟烤溫度(<150度C,如90~150度C)進行軟烤,並且在移除軟膜結構M1後(如圖1G)再以一硬烤溫度進行硬烤(>150度C,如150~200度C),以完成材料的固化。In this embodiment, the dielectric layer film 6 is an ABF dielectric layer film, that is, Ajinomoto Build-up Film (ABF). More specifically, the dielectric layer film 6 is a thermosetting resin material. The dielectric layer film 6 can be softened, for example, by vacuum hot pressing, so as to fall into the gap between the metal lines 5 . The softened dielectric layer film 6 can, for example, be placed in an oven at a soft baking temperature (<150 degrees C, such as 90~ 150 degrees C) for soft baking, and after removing the soft film structure M1 (as shown in Figure 1G), perform a hard bake at a hard baking temperature (>150 degrees C, such as 150~200 degrees C) to complete the solidification of the material.
更具體地說,如圖1F並請一併參閱圖2A至2D所示。所述步驟S106包含:將一壓印模具M覆蓋於所述介電層薄膜6上,並且進行一壓印作業。其中,所述壓印模具M包含多個凸柱結構M12,並且所述壓印模具M的多個凸柱結構M12能在所述壓印作業中、自所述介電層薄膜6的一頂面(介電層薄膜6的遠離於絕緣基板1的一側表面)壓入所述介電層薄膜6中、並且在位置上對應於所述金屬線路5,如:多個凸柱結構M12是位於金屬線路5的金屬墊的上方。More specifically, as shown in Figure 1F and please refer also to Figures 2A to 2D. The step S106 includes: covering an imprinting mold M on the dielectric layer film 6 and performing an imprinting operation. Wherein, the embossing mold M includes a plurality of convex pillar structures M12, and the plurality of convex pillar structures M12 of the embossing mold M can be removed from a top of the dielectric layer film 6 during the embossing operation. The surface (the side surface of the dielectric layer film 6 away from the insulating substrate 1) is pressed into the dielectric layer film 6 and corresponds to the position of the metal circuit 5. For example, the plurality of protruding pillar structures M12 are Located above the metal pad of metal line 5.
更具體而言,所述壓印模具M包含:一軟膜結構M1以及設置於所述軟膜結構M1一側表面上的一硬質基板M2。其中,所述軟膜結構M1具有呈板狀或片狀的一軟膜基材M11及自所述軟膜基材M11的一側表面凸出形成的所述多個凸柱結構M12,並且所述硬質基板M2是設置於軟膜基材M11遠離於多個凸柱結構M12的一側表面上,以對所述軟膜結構M1產生支撐的作用。More specifically, the imprinting mold M includes: a soft film structure M1 and a hard substrate M2 disposed on one side surface of the soft film structure M1. Wherein, the soft film structure M1 has a soft film base material M11 in a plate or sheet shape and the plurality of protruding pillar structures M12 formed from one side surface of the soft film base material M11, and the hard substrate M2 is disposed on a side surface of the soft film base material M11 away from the plurality of protruding column structures M12 to support the soft film structure M1.
在本實施例中,所述軟膜結構M1的材質可以例如是熱固型高分子聚合物或UV固型高分子聚合物。再者,所述硬質基板M2可以例如是玻璃基板,但本發明不受限於此。另外,所述壓印模具M的多個凸柱結構M12可以例如是各自呈圓柱的形狀,並且具有介於5微米至100微米之間的一直徑D及介於5微米至100微米之間的一高度H(如圖1F),但本發明不受限於此。In this embodiment, the material of the soft film structure M1 may be, for example, a thermosetting polymer or a UV-curing polymer. Furthermore, the hard substrate M2 may be, for example, a glass substrate, but the present invention is not limited thereto. In addition, the plurality of protruding pillar structures M12 of the imprinting mold M can be, for example, each in the shape of a cylinder, and have a diameter D between 5 microns and 100 microns and a diameter D between 5 microns and 100 microns. A height H (as shown in Figure 1F), but the present invention is not limited thereto.
在所述壓印作業中,所述多個凸柱結構M12是朝著介電層薄膜6的方向設置,並且所述硬質基板M2能被施予一作用力,以使得所述多個凸柱結構M12能壓入所述介電層薄膜6中、且在位置上對應於所述金屬線路5的上方。在某些情況中,壓印無法使所述壓印模具M的多個凸柱結構M12直接接觸金屬線路5,所述凸柱結構M12與金屬線路5之間會存在一些殘餘物質(如:ABF介電層薄膜6內的SiO 2微粒),但本發明不受限於此。 During the imprinting operation, the plurality of protruding pillar structures M12 are disposed toward the direction of the dielectric layer film 6 , and a force can be applied to the hard substrate M2 so that the plurality of protruding pillars M12 The structure M12 can be pressed into the dielectric layer film 6 and is positioned above the metal circuit 5 . In some cases, imprinting cannot make the plurality of protruding pillar structures M12 of the imprinting mold M directly contact the metal circuit 5, and there will be some residual material (such as: ABF) between the protruding pillar structures M12 and the metal circuit 5. SiO 2 particles in the dielectric layer film 6), but the present invention is not limited thereto.
再者,在所述壓印作業中,所述介電層薄膜6可以例如是在真空熱壓的過程中被加熱至一軟化溫度,並且所述介電層薄膜6的軟化溫度低於其玻璃轉移溫度。並且,所述介電層薄膜6(如:ABF樹脂材料)的硬度(如:材料硬度)在加熱至所述軟化溫度後、能小於所述壓印模具M的多個凸柱結構M12的硬度,從而所述壓印模具M的多個凸柱結構M12能壓入介電層薄膜6中。Furthermore, in the imprinting operation, the dielectric layer film 6 can be heated to a softening temperature, for example, during a vacuum hot pressing process, and the softening temperature of the dielectric layer film 6 is lower than that of glass. Transfer temperature. Moreover, the hardness (such as material hardness) of the dielectric layer film 6 (such as ABF resin material) can be less than the hardness of the plurality of protruding pillar structures M12 of the imprinting mold M after being heated to the softening temperature. , so that the plurality of protruding pillar structures M12 of the imprinting mold M can be pressed into the dielectric layer film 6 .
在本實施例中,所述介電層薄膜6的軟化溫度介於70°C至130°C,且所述介電層薄膜的玻璃轉移溫度介於150°C至200°C,但本發明不受限於此。In this embodiment, the softening temperature of the dielectric layer film 6 is between 70°C and 130°C, and the glass transition temperature of the dielectric layer film is between 150°C and 200°C. However, the present invention Not limited to this.
進一步地說,請參閱圖2A至圖2D,所述壓印模具M可以例如是通過一壓印模具的製造方法所形成,包含步驟S201至步驟S204。需說明的是,本實施例的壓印模具M是通過上述方式所形成,但本發明不受限於此。Further, please refer to FIGS. 2A to 2D . The imprint mold M may be formed, for example, by an imprint mold manufacturing method, including steps S201 to S204 . It should be noted that the imprinting mold M in this embodiment is formed in the above manner, but the invention is not limited thereto.
如圖2A所示,所述步驟S201包含:提供一母模模具N,且所述母模模具N包含呈板狀或片狀的一硬模基材N1及自所述硬模基材N1一側表面凸出形成的多個凸出結構N2。在本實施例中,所述母模模具N可以例如是鎳模具、矽模具、或光阻模具,但本發明不受限於此。As shown in Figure 2A, the step S201 includes: providing a master mold N, and the master mold N includes a hard mold base material N1 in a plate or sheet shape and a hard mold base material N1 formed from the hard mold base material N1. A plurality of protruding structures N2 are formed on the side surface. In this embodiment, the master mold N may be, for example, a nickel mold, a silicon mold, or a photoresist mold, but the invention is not limited thereto.
如圖2B所示,所述步驟S202包含:於所述母模模具N具有多個凸出結構N2的一側塗佈上(如:旋轉塗佈)一軟膜材料,以於所述母模模具N上形成一軟膜結構M1(如:將軟膜材料內部溶劑烤乾)。其中所述軟膜結構M1具有一軟膜基材M11以及多個凸柱結構M12,並且所述軟膜結構M1的多個凸柱結構M12在幾何形狀上與母模模具N的多個凸出結構N2互補。也就是說,所述軟膜結構M1的多個凸柱結構M12是通過將所述軟膜材料陷入母模模具N的多個凸出結構N2之間的間隙而形成。As shown in Figure 2B, the step S202 includes: coating (such as spin coating) a soft film material on the side of the master mold N having the plurality of protruding structures N2, so as to A soft film structure M1 is formed on N (for example: drying the solvent inside the soft film material). The soft film structure M1 has a soft film base material M11 and a plurality of protruding column structures M12, and the plurality of protruding column structures M12 of the soft film structure M1 are geometrically complementary to the plurality of protruding structures N2 of the master mold N. . That is to say, the plurality of protruding pillar structures M12 of the soft film structure M1 are formed by sinking the soft film material into the gaps between the plurality of protruding structures N2 of the master mold N.
如圖2C所示,所述步驟S203包含:將一硬質基板M2(如玻璃基板)貼合於所述軟膜基材M11遠離於多個凸柱結構M12的一側表面上,以對所述軟膜結構M1產生支撐的作用。所述軟膜結構M1及硬質基板M2共同構成一壓印模具M。若所述軟膜結構M1的材質為熱固型高分子聚合物,所述步驟S203另包含對軟膜結構M1進行熱烘烤固化。或者,若所述軟膜結構M1的材質為UV固型高分子聚合物,所述步驟S203另包含對軟膜結構M1進行UV固化。As shown in FIG. 2C , the step S203 includes: attaching a hard substrate M2 (such as a glass substrate) to a side surface of the soft film base material M11 away from the plurality of protruding pillar structures M12 to fix the soft film. Structure M1 acts as a support. The soft film structure M1 and the hard substrate M2 together form an imprinting mold M. If the material of the soft film structure M1 is a thermosetting polymer, step S203 further includes thermally baking and solidifying the soft film structure M1. Alternatively, if the material of the soft film structure M1 is a UV-curable polymer, step S203 further includes UV curing the soft film structure M1.
如圖2D所示,所述步驟S204包含:將所述壓印模具M自其軟膜結構M1的多個凸柱結構M12與所述母模模具N的多個凸出結構N2連接的部分分離,以完成所述壓印模具M的製備。As shown in Figure 2D, the step S204 includes: separating the imprinting mold M from the portion where the plurality of protruding pillar structures M12 of the soft film structure M1 are connected to the plurality of protruding structures N2 of the master mold N, To complete the preparation of the imprinting mold M.
值得一提的是,本實施例的電路板的製造方法是利用所述軟膜結構M1的多個凸柱結構M12對介電層薄膜6進行壓印作業。藉此,在大量生產製造電路板的過程中,不同批次或料號的電路板可以利用同一個母模模具N(母模本身為凹版可以翻印出凸版的軟膜)所產生的具有軟膜結構M1的多個壓印模具M來進行壓印作業。也就是說,每一次的壓印作業都可採用新的壓印模具M來進行壓印作業,從而提升了產品製造的穩定性。It is worth mentioning that the manufacturing method of the circuit board of this embodiment is to use the plurality of bump structures M12 of the soft film structure M1 to imprint the dielectric layer film 6 . In this way, in the process of mass production of circuit boards, circuit boards of different batches or material numbers can use the same master mold N (the master mold itself is a gravure plate that can reproduce the embossed soft film) to produce a soft film structure M1 A plurality of embossing molds M are used to perform embossing operations. In other words, a new imprinting mold M can be used for each imprinting operation, thereby improving the stability of product manufacturing.
儘管如此,本發明電路板的製造方法並不受限於上述實施例。在本發明的另一實施例中,如圖3所示,所述電路板的製造方法也可以例如是直接將所述母模模具N(凸版)當作成壓印模具M來對所述介電層薄膜6進行壓印作業。Nevertheless, the manufacturing method of the circuit board of the present invention is not limited to the above embodiment. In another embodiment of the present invention, as shown in FIG. 3 , the manufacturing method of the circuit board may also directly use the master mold N (relief plate) as an imprinting mold M to stamp the dielectric. A layer of film 6 is used for imprinting.
另外值得一提的是,請繼續參閱圖1F,所述壓印模具M的多個凸柱結構M12能壓入所述介電層薄膜6中、並在位置上對應於所述金屬線路5,如位於於所述金屬線路5中的金屬墊(pad)的上方。再者,本實施例電路板製造方法的壓印作業可以例如是採用奈米壓印(Nanoimprint Lithography,NIL)技術。It is also worth mentioning that, please continue to refer to Figure 1F. The plurality of protruding pillar structures M12 of the imprinting mold M can be pressed into the dielectric layer film 6 and correspond to the position of the metal circuit 5. For example, it is located above the metal pad in the metal circuit 5 . Furthermore, the imprinting operation of the circuit board manufacturing method of this embodiment may, for example, adopt Nanoimprint Lithography (NIL) technology.
進一步地說,如圖1G所示,在所述步驟S106(壓印作業)後,所述步驟S107包含:將所述壓印模具M自介電層薄膜6上移除,從而使得所述介電層薄膜6形成有形狀分別與壓印模具M的多個凸柱結構M12相對應的多個壓印灌孔7。其中,每個所述壓印灌孔7是自介電層薄膜6的頂面(介電層薄膜6的遠離於絕緣基板1的一側表面)朝絕緣基板1的方向凹陷所形成,並且每個所述壓印灌孔7將至少部分的所述金屬線路5(如:金屬墊)暴露於外界環境。Further, as shown in FIG. 1G , after step S106 (imprinting operation), step S107 includes: removing the imprinting mold M from the dielectric layer film 6 so that the dielectric layer The electrical layer film 6 is formed with a plurality of embossing holes 7 whose shapes respectively correspond to the plurality of protruding pillar structures M12 of the embossing mold M. Wherein, each of the imprinted filling holes 7 is formed by being recessed from the top surface of the dielectric layer film 6 (the side surface of the dielectric layer film 6 away from the insulating substrate 1) toward the direction of the insulating substrate 1, and each Each of the embossed holes 7 exposes at least part of the metal circuit 5 (such as a metal pad) to the external environment.
值得一提的是,本發明實施例電路板的製造方法利用壓印模具M進行壓印作業,從而在所述介電層薄膜6上形成多個壓印灌孔7。藉此,本發明實施例電路板的製造方法能取代傳統的雷射鑽孔製程。It is worth mentioning that the manufacturing method of the circuit board according to the embodiment of the present invention uses an embossing mold M to perform embossing operations, thereby forming a plurality of embossed filling holes 7 on the dielectric layer film 6 . Thereby, the manufacturing method of the circuit board according to the embodiment of the present invention can replace the traditional laser drilling process.
再者,相較於傳統的雷射鑽孔製程,一個鑽頭在一次鑽孔作業中只能加工形成一個雷射鑽孔,本發明實施例的電路板的製造方法能通過壓印模具M的多個凸柱結構M12在單一次的壓印作業中、同時產生多個壓印灌孔7,藉以滿足具有大量灌孔需求的產品,並且能大幅縮短作業時間。Furthermore, compared with the traditional laser drilling process, a drill bit can only form one laser hole in one drilling operation. The circuit board manufacturing method according to the embodiment of the present invention can print multiple parts of the mold M. The protruding pillar structure M12 can simultaneously produce multiple imprinted filling holes 7 in a single imprinting operation, so as to meet the needs of products with a large number of filling holes and greatly shorten the operation time.
另外,相較於傳統的雷射鑽孔製程,本發明實施例的電路板的製造方法能同時產生多個孔徑更小的孔洞(如:5微米至100微米的孔洞),從而突破了傳統雷射鑽孔的製程極限。In addition, compared with the traditional laser drilling process, the circuit board manufacturing method of the embodiment of the present invention can simultaneously produce multiple holes with smaller diameters (such as holes of 5 microns to 100 microns), thereby breaking through the traditional laser drilling process. The process limits of shot drilling.
進一步地說,在使所述介電層薄膜6形成有多個壓印灌孔7後,所述步驟S107進一步包含對所述介電層薄膜6進行一固化作業(如:將電路板半成品放入烤箱烘烤),以使所述介電層薄膜6由軟化的狀態變成固化的狀態。值得一提的是,經軟化的所述介電層薄膜6可以例如是在通過圖1F的壓印作業後、先放入烤箱以一軟烤溫度(<150度C,如90~150度C)進行軟烤,且在移除軟膜結構M1(如圖1G)後、再以一硬烤溫度進行硬烤(>150度C,如150~200度C),以完成材料的固化。Furthermore, after the dielectric layer film 6 is formed with a plurality of imprinted holes 7, the step S107 further includes performing a curing operation on the dielectric layer film 6 (such as placing the circuit board semi-finished product). Put it into an oven and bake it), so that the dielectric layer film 6 changes from a softened state to a solidified state. It is worth mentioning that the softened dielectric layer film 6 can, for example, be put into an oven at a soft baking temperature (<150 degrees C, such as 90 to 150 degrees C) after the imprinting operation in FIG. 1F ), perform soft baking, and after removing the soft film structure M1 (as shown in Figure 1G), perform hard baking at a hard baking temperature (>150 degrees C, such as 150~200 degrees C) to complete the solidification of the material.
另外,為了使所述多個壓印灌孔7的形成位置更加精準,在所述壓印模具M的多個凸柱結構M12壓入所述介電層薄膜6之前,本發明實施例的電路板的製造方法進一步包含一對位作業(圖未繪示)。所述對位作業包含:將所述壓印模具M的多個凸柱結構M12在位置上對準至少部分的所述金屬線路5(如:金屬墊),從而有利於後續的壓印作業,但本發明不受限於此。In addition, in order to make the formation positions of the plurality of embossing holes 7 more accurate, before the plurality of protruding pillar structures M12 of the embossing mold M are pressed into the dielectric layer film 6, the circuit of the embodiment of the present invention The manufacturing method of the board further includes a positioning operation (not shown). The alignment operation includes: aligning the plurality of protruding pillar structures M12 of the imprinting mold M with at least part of the metal circuit 5 (such as a metal pad), thereby facilitating the subsequent imprinting operation, However, the present invention is not limited to this.
如圖1H所示,所述步驟S108包含:於所述介電層薄膜6上形成一金屬沉積層8。所述金屬沉積層8覆蓋於介電層薄膜6的頂面(介電層薄膜6的遠離於絕緣基板1的一側表面)、且延伸地覆蓋於多個壓印灌孔7的孔壁及至少部分的所述金屬線路5(如:金屬墊)上。As shown in FIG. 1H , the step S108 includes forming a metal deposition layer 8 on the dielectric layer film 6 . The metal deposition layer 8 covers the top surface of the dielectric layer film 6 (the side surface of the dielectric layer film 6 away from the insulating substrate 1), and extends to cover the hole walls of the plurality of imprinted filling holes 7 and on at least part of the metal lines 5 (such as metal pads).
再者,所述金屬沉積層8的形成方式可以例如是通過化學鍍銅、濺鍍等方式所形成,並且所述金屬沉積層8的材質可以例如是銅金屬,但本發明不受限於此。Furthermore, the metal deposition layer 8 may be formed by, for example, electroless copper plating, sputtering, etc., and the material of the metal deposition layer 8 may be, for example, copper metal, but the invention is not limited thereto. .
如圖1I所示,所述步驟S109包含:於所述金屬沉積層8上形成經圖案化的另一光阻遮罩9。更具體地說,所述另一光阻遮罩9是形成於金屬沉積層8的遠離絕緣基板1的一側表面上。類似於步驟S102,所述另一光阻遮罩9的形成方式可以例如是依序通過覆蓋光阻劑(如:壓制乾膜光阻劑、或塗佈濕膜光阻劑)、且對光阻劑進行曝光及顯影等製程所形成。再者,所述另一光阻遮罩9的內側包圍形成有多個另一間隙91,所述多個另一間隙91中的至少部分間隙91在位置上分別對應所述多個壓印灌孔7。所述金屬沉積層8的未被所述另一光阻遮罩9遮蔽的部分曝露於多個另一間隙91,以提供導電金屬充填於其中。As shown in FIG. 1I , the step S109 includes forming another patterned photoresist mask 9 on the metal deposition layer 8 . More specifically, the other photoresist mask 9 is formed on a side surface of the metal deposition layer 8 away from the insulating substrate 1 . Similar to step S102 , the other photoresist mask 9 may be formed, for example, by sequentially covering the photoresist (such as pressing dry film photoresist, or coating wet film photoresist), and The resist is formed by processes such as exposure and development. Furthermore, a plurality of other gaps 91 are formed on the inner side of the other photoresist mask 9, and at least part of the gaps 91 among the plurality of other gaps 91 correspond to the positions of the plurality of imprint pots respectively. Hole 7. The portions of the metal deposition layer 8 that are not shielded by the other photoresist mask 9 are exposed to a plurality of other gaps 91 to provide conductive metal filling therein.
如圖1J所示,所述步驟S110包含:利用電鍍方式於所述另一光阻遮罩9內側的多個另一間隙91中、分別形成多個另一導電金屬10。更具體地說,所述多個另一導電金屬10是先充填於多個壓印灌孔7、並進一步自金屬沉積層8朝著相反於絕緣基板1的方向延伸地形成、且填充於所述另一光阻遮罩9內側的多個另一間隙91中,以利於後續形成增層的導電線路。As shown in FIG. 1J , step S110 includes forming a plurality of other conductive metals 10 in a plurality of other gaps 91 inside the other photoresist mask 9 by electroplating. More specifically, the plurality of other conductive metals 10 are first filled in the plurality of imprinted holes 7, and are further formed extending from the metal deposition layer 8 in a direction opposite to the insulating substrate 1, and filled in all the other conductive metals 10. A plurality of other gaps 91 inside the other photoresist mask 9 are placed in a plurality of other gaps 91 to facilitate the subsequent formation of build-up conductive circuits.
在所述步驟S110後,本發明實施例電路板的製造方法可以類似於步驟S104進一步移除所述另一光阻遮罩9,並使得所述另一導電金屬10形成為另一增層的金屬線路,並且可以依據設計需求重複上述步驟S105至S110的流程,以完成印刷電路板的增層作業。After step S110, the manufacturing method of the circuit board according to the embodiment of the present invention can further remove the other photoresist mask 9 similar to step S104, and allow the other conductive metal 10 to be formed as another build-up layer. Metal circuits, and the above-mentioned steps S105 to S110 can be repeated according to design requirements to complete the layer-adding operation of the printed circuit board.
[電路板結構][Circuit board structure]
以上是關於本發明實施例電路板的製造方法。本發明實施例另提供一種電路板結構,其包含一絕緣基板1、一金屬線路5、及一介電層薄膜6。The above is about the manufacturing method of the circuit board according to the embodiment of the present invention. An embodiment of the present invention further provides a circuit board structure, which includes an insulating substrate 1, a metal circuit 5, and a dielectric layer film 6.
所述金屬線路5形成於所述絕緣基板1上。The metal circuit 5 is formed on the insulating substrate 1 .
所述介電層薄膜6形成於金屬線路5上、且陷入所述金屬線路5之間的間隙,以接觸所述絕緣基板1。The dielectric layer film 6 is formed on the metal lines 5 and is embedded in the gaps between the metal lines 5 to contact the insulating substrate 1 .
所述介電層薄膜6具有形狀分別與一壓印模具M的多個凸柱結構M12對應的多個壓印灌孔7,其內側分別充填有多個導電金屬10。The dielectric layer film 6 has a plurality of embossed filling holes 7 whose shapes respectively correspond to the plurality of convex pillar structures M12 of an embossing mold M, and the insides thereof are respectively filled with a plurality of conductive metals 10 .
所述介電層薄膜6為一ABF增層薄膜,例如味之素增層膜(Ajinomoto Build-up Film)或其它間公司(如:台灣晶化科技)生產的其它具有類似性質的類ABF增層薄膜,並且所述介電層薄膜6通過真空熱壓的方式被軟化、而陷入所述金屬線路5之間的間隙。The dielectric layer film 6 is an ABF build-up film, such as Ajinomoto Build-up Film or other ABF-like build-up films with similar properties produced by other companies (such as Taiwan Crystal Technology). The dielectric layer film 6 is softened by vacuum hot pressing and falls into the gap between the metal lines 5 .
更具體地說,所述介電層薄膜6(ABF或類ABF的增層薄膜)的材料厚度約介於5微米至100微米之間,並依靠一PET膜載體做支撐。該薄膜以真空熱壓方式被軟化、而陷入金屬線路5之間的間隙,接著移除所述PET膜載體,最後再以高溫(150~200°C)烘烤所述介電層薄膜6,使其聚合固化。More specifically, the material thickness of the dielectric layer film 6 (ABF or ABF-like build-up film) is approximately between 5 microns and 100 microns, and is supported by a PET film carrier. The film is softened by vacuum hot pressing and falls into the gap between the metal lines 5. Then the PET film carrier is removed, and finally the dielectric layer film 6 is baked at high temperature (150~200°C). Let it polymerize and solidify.
在材料組成方面,所述介電層薄膜6的組成主要包含:環氧樹脂、二氧化矽、及催化劑等添加劑。In terms of material composition, the composition of the dielectric layer film 6 mainly includes additives such as epoxy resin, silicon dioxide, and catalysts.
在材料特性方面,所述介電層薄膜6(在經過烘烤後)的一玻璃轉移溫度(Tg)約介於150°C至200°C、二氧化矽重量百分比約介於15wt%至70wt%、一第一熱膨脹係數(25~150°C)約介於10 ppm/°C至40 ppm/°C、一第二熱膨脹係數(150~240°C)約介於65 ppm/°C至135 ppm/°C、一介電常數Dk(@5.8GHz)約介於3至3.5、一拉伸強度約介於80 MPa至120 MPa、及一楊氏係數約介於3 GPa至10 GPa。上述材料特性對應於ABF或類ABF的增層薄膜的材料特性。也就是說,具有上述材料特性的薄膜即符合本發明所指的介電層薄膜的保護精神,而屬於本發明的保護範圍。其中,所述玻璃轉移溫度(Tg)可以例如是依據ASTM D7426-08、ASTM-E1356利用掃描量熱法進行測試。所述熱膨脹係數可以例如是依據ASTM D3386、ASTM E831利用熱機械分析儀進行測試。所述介電常數可以例如是依據ASTM D150介電常數測試方法進行測試。所述拉伸強度可以例如是依據ASTM D638拉伸試驗標準進行測試。所述楊氏係數可以例如是依據ASTM E111楊氏模量試驗標準進行測試。In terms of material properties, the dielectric layer film 6 (after baking) has a glass transition temperature (Tg) of approximately 150°C to 200°C, and a silicon dioxide weight percentage of approximately 15wt% to 70wt %, a first thermal expansion coefficient (25~150°C) is about 10 ppm/°C to 40 ppm/°C, a second thermal expansion coefficient (150~240°C) is about 65 ppm/°C to 135 ppm/°C, a dielectric constant Dk (@5.8GHz) of approximately 3 to 3.5, a tensile strength of approximately 80 MPa to 120 MPa, and a Young's coefficient of approximately 3 GPa to 10 GPa. The above material properties correspond to those of ABF or ABF-like build-up films. That is to say, a film with the above material characteristics complies with the protective spirit of the dielectric layer film referred to in the present invention and belongs to the protection scope of the present invention. Wherein, the glass transition temperature (Tg) can be tested by scanning calorimetry according to ASTM D7426-08 and ASTM-E1356, for example. The thermal expansion coefficient can be tested using a thermomechanical analyzer according to ASTM D3386 and ASTM E831, for example. The dielectric constant can be tested, for example, according to the ASTM D150 dielectric constant test method. The tensile strength can be tested, for example, according to ASTM D638 tensile test standard. The Young's modulus can be tested, for example, according to the ASTM E111 Young's modulus test standard.
[實施例的有益效果][Beneficial effects of the embodiment]
本發明的有益效果在於,本發明實施例所提供的電路板的製造方法,其能通過“將具有多個凸柱結構的一壓印模具覆蓋於所述介電層薄膜上,並進行一壓印作業,以使得所述壓印模具的多個所述凸柱結構壓入所述介電層薄膜中並且在位置上對應於所述金屬線路的上方”以及“將所述壓印模具自所述介電層薄膜上移除,以使得所述介電層薄膜具有形狀分別與所述壓印模具的多個所述凸柱結構相對應的多個壓印灌孔”的技術方案,從而在單一次的壓印作業中同時產生多個壓印灌孔,藉以滿足具有大量灌孔需求的產品,並且能大幅縮短作業時間。The beneficial effect of the present invention is that the circuit board manufacturing method provided by the embodiment of the present invention can be achieved by "covering an embossing mold with a plurality of protruding pillar structures on the dielectric layer film, and performing an embossing process. printing operation, so that the plurality of protruding pillar structures of the embossing mold are pressed into the dielectric layer film and positionally correspond to the top of the metal lines" and "remove the embossing mold from the The technical solution is to remove the dielectric layer film so that the dielectric layer film has a plurality of embossed filling holes whose shapes respectively correspond to the plurality of protruding pillar structures of the embossed mold, so that in Multiple embossing holes are produced simultaneously in a single embossing operation to meet the needs of products with a large number of holes and can greatly shorten the operation time.
再者,相較於傳統的雷射鑽孔製程,本發明電路板的製造方法能同時產生多個孔徑更小的孔洞(如:5微米至100微米的孔洞),從而突破了傳統雷射鑽孔的製程極限。Furthermore, compared with the traditional laser drilling process, the circuit board manufacturing method of the present invention can simultaneously produce multiple holes with smaller diameters (such as holes of 5 microns to 100 microns), thereby breaking through the traditional laser drilling process. Hole process limits.
以上所公開的內容僅為本發明的優選可行實施例,並非因此侷限本發明的申請專利範圍,所以凡是運用本發明說明書及圖式內容所做的等效技術變化,均包含於本發明的申請專利範圍內。The contents disclosed above are only preferred and feasible embodiments of the present invention, and do not limit the scope of the patent application of the present invention. Therefore, all equivalent technical changes made by using the description and drawings of the present invention are included in the application of the present invention. within the scope of the patent.
1:絕緣基板 2:金屬披覆層 3:光阻遮罩 31:間隙 4:導電金屬 5:金屬線路 6:介電層薄膜 7:壓印灌孔 8:金屬沉積層 9:光阻遮罩 91:間隙 10:導電金屬 M:壓印模具 M1:軟膜結構 M11:軟膜基材 M12:凸柱結構 M2:硬質基板 N:母模模具 N1:硬模基材 N2:凸出結構 D:直徑 H:高度 1: Insulating substrate 2: Metal coating layer 3: Photoresist mask 31: Gap 4: Conductive metal 5: Metal lines 6: Dielectric layer film 7: Imprint and fill holes 8: Metal deposition layer 9: Photoresist mask 91: Gap 10: Conductive metal M: Imprinting mold M1: Soft film structure M11: Soft film base material M12:Protruding column structure M2: Hard substrate N:Mother mold N1: Hard mold base material N2:Protruding structure D: diameter H: height
圖1A為本發明實施例電路板的製造方法步驟S101的示意圖。1A is a schematic diagram of step S101 of the manufacturing method of a circuit board according to an embodiment of the present invention.
圖1B為本發明實施例電路板的製造方法步驟S102的示意圖。FIG. 1B is a schematic diagram of step S102 of the circuit board manufacturing method according to the embodiment of the present invention.
圖1C為本發明實施例電路板的製造方法步驟S103的示意圖。FIG. 1C is a schematic diagram of step S103 of the circuit board manufacturing method according to the embodiment of the present invention.
圖1D為本發明實施例電路板的製造方法步驟S104的示意圖。FIG. 1D is a schematic diagram of step S104 of the circuit board manufacturing method according to the embodiment of the present invention.
圖1E為本發明實施例電路板的製造方法步驟S105的示意圖。FIG. 1E is a schematic diagram of step S105 of the circuit board manufacturing method according to the embodiment of the present invention.
圖1F為本發明實施例電路板的製造方法步驟S106的示意圖。FIG. 1F is a schematic diagram of step S106 of the circuit board manufacturing method according to the embodiment of the present invention.
圖1G為本發明實施例電路板的製造方法步驟S107的示意圖。1G is a schematic diagram of step S107 of the circuit board manufacturing method according to the embodiment of the present invention.
圖1H為本發明實施例電路板的製造方法步驟S108的示意圖。FIG. 1H is a schematic diagram of step S108 of the circuit board manufacturing method according to the embodiment of the present invention.
圖1I為本發明實施例電路板的製造方法步驟S109的示意圖。FIG. 1I is a schematic diagram of step S109 of the circuit board manufacturing method according to the embodiment of the present invention.
圖1J為本發明實施例電路板的製造方法步驟S110的示意圖。FIG. 1J is a schematic diagram of step S110 of the circuit board manufacturing method according to the embodiment of the present invention.
圖2A為本發明實施例壓印模具的製造方法步驟S201的示意圖。FIG. 2A is a schematic diagram of step S201 of the manufacturing method of the imprint mold according to the embodiment of the present invention.
圖2B為本發明實施例壓印模具的製造方法步驟S202的示意圖。FIG. 2B is a schematic diagram of step S202 of the manufacturing method of the imprint mold according to the embodiment of the present invention.
圖2C為本發明實施例壓印模具的製造方法步驟S203的示意圖。FIG. 2C is a schematic diagram of step S203 of the manufacturing method of the imprint mold according to the embodiment of the present invention.
圖2D為本發明實施例壓印模具的製造方法步驟S204的示意圖。FIG. 2D is a schematic diagram of step S204 of the manufacturing method of the imprint mold according to the embodiment of the present invention.
圖3為本發明實施例電路板的製造方法步驟S106的另一變化態樣示意圖。FIG. 3 is a schematic diagram of another variation of step S106 of the circuit board manufacturing method according to the embodiment of the present invention.
1:絕緣基板 1: Insulating substrate
5:金屬線路 5: Metal lines
6:介電層薄膜 6: Dielectric layer film
M:壓印模具 M: Imprinting mold
M1:軟膜結構 M1: Soft film structure
M11:軟膜基材 M11: Soft film base material
M12:凸柱結構 M12:Protruding column structure
M2:硬質基板 M2: Hard substrate
D:直徑 D: diameter
H:高度 H: height
Claims (10)
Publications (1)
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