TW202343573A - Manufacturing method for a power transistor with heat dissipation function - Google Patents
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Abstract
Description
本發明是有關於一種功率電晶體的製作方法,特別是指一種具有可提升散熱性的功率電晶體的製作方法。The present invention relates to a method of manufacturing a power transistor, and in particular, to a method of manufacturing a power transistor that can improve heat dissipation.
隨著技術發展,市場對於功率電晶體的需求越來越高,用以配置在高功率的電子產品。其中,以氮化鎵系為主要構成材料的高電子遷移率晶體電晶體(High electron mobility transistor,HEMT),憑藉低導通電阻與高崩潰電壓等材料性質而成而備受矚目。With the development of technology, the market demand for power transistors is getting higher and higher, which is used to configure high-power electronic products. Among them, high electron mobility transistors (HEMTs), which use gallium nitride as the main material, have attracted much attention due to their material properties such as low on-resistance and high breakdown voltage.
功率電晶體在運作時會伴隨大量的熱產生,為了延長元件使用壽命,業界通常會在該功率電晶體的磊晶基板底面再設置一散熱基板或是散熱片,以協助將電晶體產生的熱自底面排出。然而,由於一般磊晶成長用之基板的散熱性不佳而會阻擋熱自底面排出,因此,隨著功率電晶體往高功率的方向發展時,透過設置散熱基板或散熱片的方式已不足以有效地散熱,容易使該功率電晶體因散熱不佳而導致效能降低甚至元件壽命縮短。Power transistors generate a large amount of heat during operation. In order to extend the service life of the components, the industry usually installs a heat dissipation substrate or heat sink on the bottom of the epitaxial substrate of the power transistor to help dissipate the heat generated by the transistor. Drained from the bottom. However, since the heat dissipation of the substrate used for general epitaxial growth is poor and will block the heat discharge from the bottom surface, as power transistors develop towards high power, it is no longer sufficient to provide a heat dissipation substrate or heat sink. Effective heat dissipation can easily lead to reduced performance or even shortened component life of the power transistor due to poor heat dissipation.
因此,本發明的目的,即在提供一具有散熱性的功率電晶體。Therefore, an object of the present invention is to provide a power transistor with heat dissipation properties.
於是,本發明具有散熱性的功率電晶體,包含一半導體磊晶結構、一電極單元、一延伸電極單元、一保護單元,及一散熱單元。Therefore, the power transistor with heat dissipation of the present invention includes a semiconductor epitaxial structure, an electrode unit, an extended electrode unit, a protection unit, and a heat dissipation unit.
該半導體磊晶結構具有彼此反向的一頂面、一底面、彼此間隔並鄰近該頂面形成的一源極區、一汲極區、一閘極區,及多個自該底面朝向該頂面延伸的穿槽。The semiconductor epitaxial structure has a top surface, a bottom surface that are opposite to each other, a source region, a drain region, a gate region that are spaced apart from each other and formed adjacent to the top surface, and a plurality of gate regions from the bottom surface toward the top surface. Grooves extending from the surface.
該電極單元具有形成於該頂面且分別對應該源極區、該汲極區,及該閘極區的一源極電極、一汲極電極,及一閘極電極,其中,該等穿槽分別對應該源極電極、該汲極電極,及該閘極電極,而令該源極電極、該汲極電極,及該閘極電極可自相應的穿槽對外裸露。The electrode unit has a source electrode, a drain electrode, and a gate electrode formed on the top surface and respectively corresponding to the source region, the drain region, and the gate region, wherein the through grooves Corresponding to the source electrode, the drain electrode, and the gate electrode respectively, the source electrode, the drain electrode, and the gate electrode can be exposed to the outside from the corresponding through grooves.
該延伸電極單元具有多個填置於該等穿槽的延伸電極,該等延伸電極分別與相應的該源極電極、該汲極電極,及該閘極電極連接,並延伸至該底面用以對外電連接。The extended electrode unit has a plurality of extended electrodes filled in the through grooves. The extended electrodes are respectively connected to the corresponding source electrode, the drain electrode, and the gate electrode, and extend to the bottom surface for External electrical connection.
該保護單元由絕緣材料構成,覆蓋該電極單元及自該電極單元之間對外裸露的該半導體磊晶結構的頂面。The protection unit is made of insulating material and covers the electrode unit and the top surface of the semiconductor epitaxial structure exposed from between the electrode units.
該散熱單元由散熱材料構成,覆蓋於該保護單元表面。The heat dissipation unit is made of heat dissipation material and covers the surface of the protection unit.
此外,本發明的另一目的,即在提供一種具有散熱性的功率電晶體的製作方法。In addition, another object of the present invention is to provide a method for manufacturing a power transistor with heat dissipation properties.
於是,本發明具有散熱性的功率電晶體的製作方法,包含一提供步驟、一磊晶基板移除步驟、一穿槽形成步驟、一延伸電極形成步驟。Therefore, the manufacturing method of the heat-dissipating power transistor of the present invention includes a providing step, an epitaxial substrate removal step, a through-groove forming step, and an extended electrode forming step.
該提供步驟提供一功率電晶體半成品,該功率電晶體半成品包含一磊晶基板、一形成於該磊晶基板表面的磊晶結構、形成於該磊晶結構遠離該磊晶基板一面的一源極區、一汲極區,及一閘極區、一形成於該磊晶結構表面,並與該源極區、該汲極區,及該閘極區連接的電極單元、一覆蓋於該電極單元及自該電極單元對外裸露的該磊晶結構表面,並由絕緣材料構成的保護單元,及一覆蓋該保護單元,由散熱材料構成的散熱單元。The providing step provides a power transistor semi-finished product. The power transistor semi-finished product includes an epitaxial substrate, an epitaxial structure formed on the surface of the epitaxial substrate, and a source formed on a side of the epitaxial structure away from the epitaxial substrate. region, a drain region, and a gate region, an electrode unit formed on the surface of the epitaxial structure and connected to the source region, the drain region, and the gate region, and an electrode unit covering the And the surface of the epitaxial structure exposed from the electrode unit is a protection unit made of insulating material, and a heat dissipation unit covering the protection unit and made of heat dissipation material.
該磊晶基板移除步驟是將該磊晶基板自該磊晶結構移除,令該磊晶結構反向該電極單元的一底面露出。The step of removing the epitaxial substrate is to remove the epitaxial substrate from the epitaxial structure, so that a bottom surface of the epitaxial structure is exposed opposite the electrode unit.
該穿槽形成步驟是自該磊晶結構的底面且對應該電極單元的位置,將該磊晶結構的部分移除至令該電極單元對外裸露,以形成多個穿槽,而取得一半導體磊晶結構。The step of forming through grooves is to remove a portion of the epitaxial structure from the bottom surface of the epitaxial structure and corresponding to the position of the electrode unit to expose the electrode unit to form a plurality of through grooves, thereby obtaining a semiconductor epitaxial structure. crystal structure.
該延伸電極形成步驟是於該等穿槽填置導電材料,而形成多個與該電極單元連接並延伸至該半導體磊晶結構的底面的延伸電極,且由該等延伸電極組成可供該電極單元對外電連接的一延伸電極單元。The step of forming the extended electrode is to fill the through grooves with conductive material to form a plurality of extended electrodes connected to the electrode unit and extending to the bottom surface of the semiconductor epitaxial structure, and the extended electrodes are composed of the electrodes. An extended electrode unit through which the unit is electrically connected to the outside.
本發明的功效在於:藉由移除設置於該半導體磊晶結構底面的磊晶基板,使元件運作時產生的熱可自該底面直接逸散,並利用該散熱單元的設置,以及形成在該等穿槽中的該等延伸電極,還能進一步提升該功率電晶體的散熱能力。The effect of the present invention is to: by removing the epitaxial substrate provided on the bottom surface of the semiconductor epitaxial structure, the heat generated during the operation of the component can be directly dissipated from the bottom surface, and the arrangement of the heat dissipation unit and the heat dissipation unit formed on the The extended electrodes in the through grooves can further improve the heat dissipation capability of the power transistor.
有關本發明之相關技術內容、特點與功效,在以下配合參考圖式之實施例的詳細說明中,將可清楚的呈現。此外,要說明的是,本發明圖式僅為表示元件間的結構及/或位置相對關係,與各元件的實際尺寸並不相關。The relevant technical contents, features and effects of the present invention will be clearly presented in the following detailed description of the embodiments with reference to the drawings. In addition, it should be noted that the drawings of the present invention only represent the relative structure and/or positional relationship between components, and are not related to the actual size of each component.
參閱圖1與圖2,本發明具有散熱性的功率電晶體200,包含一半導體磊晶結構2、一電極單元3、一延伸電極單元4、一保護單元5,及一散熱單元6。在本實施例中,是以該功率電晶體200為氮化鎵系高電子遷移率電晶體為例,由於氮化鎵本身具有高崩潰電壓與較寬的能隙,有利於在高工作溫度的情況下,降低接面漏電流(Junction leakage current)的產生,而適用於高功率元件。Referring to FIGS. 1 and 2 , the power transistor 200 with heat dissipation properties of the present invention includes a semiconductor
該半導體磊晶結構2具有彼此反向的一頂面21、一底面22、彼此間隔並鄰近該頂面21形成的一源極區23、一汲極區24、一閘極區25,及多個自該底面22朝向該頂面21延伸的穿槽26。The semiconductor
在本實施例中,是以該半導體磊晶結構2具有自該底面22朝該頂面21依序堆疊的一由氮化鎵(GaN)構成的磊晶緩衝層(buffer layer)、一由氮化鎵(GaN)構成的磊晶通道層(channel layer)、一由氮化鎵鋁(AlGaN)構成的磊晶阻隔層(barrier layer) ,及一由氮化鎵(GaN)構成的金屬接觸層(cap layer)為例,該源極區23與該汲極區24彼此間隔地位於該閘極區25的兩側。要說明的是,該半導體磊晶結構2的磊晶積層結構或材料為本技術領域者所知悉,並可依需求設計而有不同的態樣,因此,不以前述或本案圖式為限制。該等穿槽26自該底面22朝該頂面21方向延伸至該頂面21。In this embodiment, the semiconductor
該電極單元3具有形成於該半導體磊晶結構2的頂面21並與該磊晶通道層連接且分別對應該源極區23與該汲極區24的一源極電極31、一汲極電極32,及一位於該磊晶覆蓋層上,並對應該閘極區25的閘極電極33。該源極電極31、汲極電極32及該閘極電極33的構成材料選自金屬或合金金屬,且該等電極彼此可為相同或不同材料。該等穿槽26的位置分別對應於該源極電極31、該汲極電極32,及該閘極電極33,而令該源極電極31、該汲極電極32,及該閘極電極33可自相應的穿槽26對外裸露。其中,該源極電極31及該汲極電極32各自具有一與該半導體磊晶結構2成歐姆接觸的接觸墊311、321,及一與該接觸墊311、321連接並向外延伸的導電層312、322。該閘極電極33位於該閘極區25上,並具有一向該閘極區25外延伸的延伸段331。該延伸段331與該閘極區25之間還設置有一介電絕緣層(見圖2),用以避免該閘極電極33與該半導體磊晶結構2直接接觸。The
該等穿槽26自該底面22朝該頂面21方向延伸至該頂面21並各自對應該源極電極31及該汲極電極32的導電層312、322及該閘極電極33的延伸段331,而令該導電層312、322及該延伸段331自該等穿槽26對外裸露。The through
該延伸電極單元4具有多個填置於該等穿槽26的延伸電極41,該等延伸電極41分別與相應的該源極電極31、該汲極電極32的導電層312、322,及該閘極電極33的延伸段331連接,並延伸至該底面22而可用以對外電連接。The extended electrode unit 4 has a plurality of extended electrodes 41 filled in the through
由於本案該功率電晶體200用以對外接合的該等延伸電極41為延伸至同一表面(底面22)上,而有利於該功率電晶體200於後續配置於其它電子構件中。在本實施例中,該延伸電極單元4分別選自金屬或合金金屬,且可與該電極單元3的構成材料相同或不同。Since the extended electrodes 41 used for external connection of the power transistor 200 in this case extend to the same surface (bottom surface 22 ), it is advantageous for the power transistor 200 to be subsequently disposed in other electronic components. In this embodiment, the extended electrode units 4 are selected from metals or alloy metals, and may be made of the same or different materials as the
該保護單元5由絕緣材料構成,並覆蓋於該電極單元2及自該電極單元2之間對外裸露的該半導體磊晶結構2的頂面21。在本實施例中,該絕緣材料選自氧化物、氮化物或氮氧化物。The protection unit 5 is made of an insulating material and covers the
該散熱單元6由散熱材料構成,覆蓋於該保護單元5的表面,並具有至少一散熱層61,且可選自金屬、合金金屬,或含有導熱添加劑的高分子混合物。其中,該導熱添加劑為碳材、氮化物,或氧化物,且該碳材選自石墨、奈米碳管,該導熱添加劑的氮化物選自氮化硼或氮化矽,該氧化物則選自氧化鋁。在本實施例中,是以該散熱單元6具有單一散熱層6,且選自金屬銅為例,但實際實施時,並不以此材料及層數為限。The heat dissipation unit 6 is made of heat dissipation material, covers the surface of the protection unit 5, and has at least one heat dissipation layer 61, which can be selected from metals, alloy metals, or polymer mixtures containing thermal conductive additives. Wherein, the thermal conductive additive is a carbon material, nitride, or oxide, and the carbon material is selected from graphite and carbon nanotubes, the nitride of the thermal conductive additive is selected from boron nitride or silicon nitride, and the oxide is selected from Alumina. In this embodiment, the heat dissipation unit 6 has a single heat dissipation layer 6 and is selected from metal copper as an example. However, in actual implementation, the material and the number of layers are not limited to this.
相較於習知的功率電晶體還具有一設置於半導體磊晶結構底面的磊晶基板,本實施例的功率電晶體200由於已將磊晶基板移除,而使該半導體磊晶結構2的底面22直接對外露出,因此,元件作動時產生的熱可直接自該底面22逸散,進而可避免習知的功率電晶體因存在磊晶基板,且因磊晶基板的散熱性低而有運作時散熱性不佳的問題。此外,由散熱材料構成的該散熱單元6,以及填置於該等穿槽26中且由金屬材料構成的該等延伸電極41,藉由本身良好的散熱性質亦能將該功率電晶體200在運作時產生的熱向外導出,而可進一步提升該功率電晶體200的散熱能力。Compared with the conventional power transistor that also has an epitaxial substrate disposed on the bottom surface of the semiconductor epitaxial structure, the power transistor 200 of this embodiment has the epitaxial substrate removed, so that the semiconductor
參閱圖3,茲將前述該功率電晶體200的該實施例的製作方法說明如下。Referring to FIG. 3 , the manufacturing method of the power transistor 200 in this embodiment is described as follows.
該製作方法包含一提供步驟81、一磊晶基板移除步驟82、一穿槽形成步驟83、一延伸電極形成步驟84。The manufacturing method includes a providing
配合參閱圖4,該提供步驟81提供一功率電晶體半成品300,該功率電晶體半成品300包含一磊晶基板7、一形成於該磊晶基板7表面的磊晶結構20、形成於該磊晶結構20且彼此間隔的該源極區23、該汲極區24,介於該源極區23與該汲極區24之間的該閘極區25、分別與該源極區23、該汲極區24及該閘極區25連接的該電極單元3、覆蓋於該電極單元3及自該電極單元3對外裸露的該磊晶結構20表面,並由絕緣材料構成的該保護單元5,以及覆蓋該保護單元5,由散熱材料構成的該散熱單元6。4, the providing
詳細地說,在本實施例中,該磊晶基板7選自一矽基板。該磊晶結構20是以磊晶成長的方式形成於該磊晶基板7上,且於本實施例中,該磊晶結構20包括自該磊晶基板7上依序磊晶形成,由氮化鎵構成的該磊晶緩衝層、由氮化鎵構成的該磊晶通道層、由氮化鎵鋁構成的該磊晶阻隔層,及由氮化鎵構成的該磊晶覆蓋層。接著,自該該磊晶覆蓋層頂面之彼此間隔的兩個預定位置向下蝕刻至令該磊晶通道層的部分露出,再利用金屬材料以沉積方式於該磊晶通道層露出的表面上形成與該磊晶通道層成歐姆接觸的該接觸墊311、321。然後,於該磊晶覆蓋層表面形成介電絕緣層。之後,利用沉積方式形成與該接觸墊311、321連接並對外延伸的該導電層312、322,而製得該源極電極31及該汲極電極32,利用沉積方式於相應的該介電絕緣層上形成該延伸段331,而製得該閘極電極33。In detail, in this embodiment, the epitaxial substrate 7 is selected from a silicon substrate. The epitaxial structure 20 is formed on the epitaxial substrate 7 by epitaxial growth, and in this embodiment, the epitaxial structure 20 includes sequential epitaxial formation from the epitaxial substrate 7 and is formed by nitriding. The epitaxial buffer layer is composed of gallium, the epitaxial channel layer is composed of gallium nitride, the epitaxial barrier layer is composed of aluminum gallium nitride, and the epitaxial coating layer is composed of gallium nitride. Then, etching downwards from two predetermined positions spaced apart from each other on the top surface of the epitaxial layer to expose part of the epitaxial channel layer, and then using a metal material to deposit on the exposed surface of the epitaxial channel layer The contact pads 311 and 321 are formed into ohmic contact with the epitaxial channel layer. Then, a dielectric insulation layer is formed on the surface of the epitaxial coating layer. Afterwards, a deposition method is used to form the
該保護單元5是以氧化物、氮化物或氮氧化物,並利用沉積或塗佈方式形成而覆蓋於該電極單元3及自該電極單元3之間對外裸露的該磊晶結構20的頂面21。該散熱單元6是以沉積或塗佈方式形成,且可選自金屬、合金金屬,或含有導熱添加劑的高分子混合物。具體的說,當該散熱單元6選自含有導熱添加劑的高分子混合物,是利用塗佈方式形成於該保護單元5上,當該散熱單元6選自金屬或合金金屬時,可先於該保護單元5的表面形成一層極薄的晶種層(圖未示),再於該晶種層上以沉積方式形成該散熱層61。前述該功率電晶體半成品300的相關結構細節及製程方法已為相關領域者所知悉,故在此不多加贅述。The protection unit 5 is made of oxide, nitride or oxynitride and is formed by deposition or coating to cover the
配合參閱圖5,該磊晶基板移除步驟82是利用蝕刻或研磨方式將該磊晶基板7自該磊晶結構20移除,令該磊晶結構20反相該電極單元3的底面22露出。Referring to FIG. 5 , the epitaxial
該穿槽形成步驟83是自該磊晶結構20的底面22且對應該電極單元3的該導電層312、322及該延伸段331的位置,利用蝕刻方式將該磊晶結構20的部分移除至令該電極單元3對外裸露,以形成該等穿槽26,而得到如圖2所示的該半導體磊晶結構2。The through
該延伸電極形成步驟84是以導電材料填置於該等穿槽26,而形成與該電極單元3連接並延伸至該半導體磊晶結構2的底面22的該等延伸電極41。在本實施例中,該等延伸電極單元4是利用沉積方式形成,其構成材料選自金屬或合金金屬,且可與該電極單元3的材料相同或不同。The extended
綜上所述,本案功率電晶體200藉由移除設置於該半導體磊晶結構2之底面22的磊晶基板7,使熱可直接經由該底面22逸散,並藉由該散熱單元6,以及形成於該等穿槽26中的該等延伸電極41進一步提升該功率電晶體200的散熱能力,故確實可達成本發明的目的。To sum up, the power transistor 200 in this case removes the epitaxial substrate 7 disposed on the bottom surface 22 of the
惟以上所述者,僅為本發明的實施例而已,當不能以此限定本發明實施的範圍,凡是依本發明申請專利範圍及專利說明書內容所作的簡單的等效變化與修飾,皆仍屬本發明專利涵蓋的範圍內。However, the above are only examples of the present invention. They cannot be used to limit the scope of the present invention. All simple equivalent changes and modifications made based on the patent scope of the present invention and the contents of the patent specification are still within the scope of the present invention. within the scope covered by the patent of this invention.
200:功率電晶體 300:功率電晶體半成品 20:磊晶結構 2:半導體磊晶結構 21:頂面 22:底面 23:源極區 24:汲極區 25:閘極區 26:穿槽 3:電極單元 31:源極電極 311:接觸墊 312:導電層 32:汲極電極 321:接觸墊 322:導電層 33:閘極電極 331:延伸段 4:延伸電極單元 41:延伸電極 5:保護單元 6:散熱單元 61:散熱層 7:磊晶基板 81:提供步驟 82:磊晶基板移除步驟 83:穿槽形成步驟 84:延伸電極形成步驟200: Power transistor 300: Power transistor semi-finished product 20: Epitaxial structure 2: Semiconductor epitaxial structure 21: Top surface 22: Bottom surface 23: Source area 24: Drain area 25: Gate area 26: Through groove 3: Electrode unit 31: source electrode 311: contact pad 312: conductive layer 32: drain electrode 321: contact pad 322: conductive layer 33: gate electrode 331: extension section 4: extension electrode unit 41: extension electrode 5: protection unit 6: Heat dissipation unit 61: Heat dissipation layer 7: Epitaxial substrate 81: Provision step 82: Epitaxial substrate removal step 83: Through groove formation step 84: Extended electrode formation step
本發明的其他的特徵及功效,將於參照圖式的實施方式中清楚地呈現,其中: 圖1是一俯視示意圖,說明本發明具有散熱性的功率電晶體的一電極單元及多個穿槽的相對位置; 圖2是一剖視示意圖,沿圖1的II-II割面線說明該功率電晶體的剖視結構; 圖3是一流程圖,說明該功率電晶體的製作方法; 圖4是一流程示意圖,輔助圖3說明該功率電晶體的製作方法的一提供步驟;及 圖5是一流程示意圖,延續圖4說明該功率電晶體的製作方法。Other features and effects of the present invention will be clearly presented in the embodiments with reference to the drawings, in which: Figure 1 is a top schematic diagram illustrating an electrode unit and a plurality of through grooves of a power transistor with heat dissipation of the present invention. The relative position of the power transistor; Figure 2 is a schematic cross-sectional view, illustrating the cross-sectional structure of the power transistor along the II-II plane line of Figure 1; Figure 3 is a flow chart illustrating the manufacturing method of the power transistor; Figure 4 5 is a schematic flow chart that assists FIG. 3 in explaining a step of the manufacturing method of the power transistor; and FIG. 5 is a schematic flow chart that continues with FIG. 4 to explain the manufacturing method of the power transistor.
81:提供步驟 81: Provide steps
82:磊晶基板移除步驟 82: Epitaxial substrate removal steps
83:穿槽形成步驟 83: Groove formation steps
84:延伸電極形成步驟 84: Extended electrode formation step
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