TW202322668A - Circuit board structure - Google Patents

Abstract

A circuit board structure includes a first dielectric layer, a first and a second inner circuit layers, a conductive connection layer, a second dielectric layer, two third dielectric layers, a third and a fourth inner circuit layers, two conductive through holes, a first and a second annular retaining walls, two fourth dielectric layers, a first and a second external circuit layers, a third and a fourth annular retaining walls. The conductive through holes penetrate the third and the second dielectric layers and are electrically connected to the third and the fourth inner circuit layers. The first and the second annular retaining walls surround the conductive through holes and electrically connect to the third and the first inner circuit layers and the fourth and the second inner circuit layers. The third and the fourth annular retaining walls are respectively disposed in the fourth dielectric layers and electrically connected to the first external circuit layer and the third inner circuit layer and the second external circuit layer and the fourth inner circuit layer.

Description

circuit board structure

The present invention relates to a substrate structure, and in particular to a circuit board structure.

In the existing circuit board, the design of the coaxial via (coaxial via) requires one or more insulating layers between the inner conductor layer and the outer conductor layer for insulation, and the way to form the insulating layer is through lamination. way to achieve. Therefore, there will be impedance mismatch at both ends of the coaxial via and electromagnetic interference (EMI) shielding gaps will appear, thereby affecting the integrity of high-frequency signals.

The invention provides a circuit board structure, which can effectively prevent energy loss and reduce noise interference, and can have better signal integrity.

The circuit board structure of the present invention comprises a first dielectric layer, a first internal circuit layer, a second internal circuit layer, a conductive connection layer, a second dielectric layer, two third dielectric layers, a A third internal circuit layer, a fourth internal circuit layer, two conductive vias, a first annular retaining wall, a second annular retaining wall, two fourth dielectric layers, a first external circuit layer, a second Two external circuit layers, a third annular retaining wall and a fourth annular retaining wall. The first dielectric layer has a first surface and a second surface opposite to each other and an opening penetrating through the first dielectric layer and connecting the first surface and the second surface. The first internal circuit layer is configured on the first surface of the first dielectric layer. The second internal circuit layer is disposed on the second surface of the first dielectric layer. The conductive connecting layer covers the inner wall of the opening of the first dielectric layer and connects the first internal circuit layer and the second internal circuit layer. The second dielectric layer fills the opening of the first dielectric layer. The third dielectric layer covers the first internal circuit layer, the second internal circuit layer and the second dielectric layer respectively. The third internal circuit layer and the fourth internal circuit layer are respectively covered on the third dielectric layer. The conductive via penetrates through the third dielectric layer and the second dielectric layer, and electrically connects the third internal circuit layer and the fourth internal circuit layer. The first ring-shaped retaining wall and the second ring-shaped retaining wall are respectively disposed in the third dielectric layer, surround the conductive via hole and electrically connect the third inner circuit layer and the first inner circuit layer, and the fourth inner circuit layer and the second inner circuit layer. Two internal circuit layers. The fourth dielectric layer respectively covers the third internal circuit layer and the fourth internal circuit layer. The first outer circuit layer and the second outer circuit layer respectively cover the fourth dielectric layer. The third annular retaining wall and the fourth annular retaining wall are respectively disposed in the fourth dielectric layer and are electrically connected to the first outer circuit layer and the third inner circuit layer, and the second outer circuit layer and the fourth inner circuit layer.

The circuit board structure of the present invention includes two circuit board units and a connection structure layer. Each circuit board unit includes a first dielectric layer, a first internal circuit layer, a second internal circuit layer, a conductive connection layer, a second dielectric layer, two third dielectric layers, a third internal Circuit layer, a fourth internal circuit layer, two conductive vias, a first annular retaining wall, a second annular retaining wall, two fourth dielectric layers, a first external circuit layer, a second external circuit layer, a third annular retaining wall and a fourth annular retaining wall. The first dielectric layer has a first surface and a second surface opposite to each other and an opening penetrating through the first dielectric layer and connecting the first surface and the second surface. The first internal circuit layer is configured on the first surface of the first dielectric layer. The second internal circuit layer is disposed on the second surface of the first dielectric layer. The conductive connecting layer covers the inner wall of the opening of the first dielectric layer and connects the first internal circuit layer and the second internal circuit layer. The second dielectric layer fills the opening of the first dielectric layer. The third dielectric layer covers the first internal circuit layer, the second internal circuit layer and the second dielectric layer respectively. The third internal circuit layer and the fourth internal circuit layer are respectively covered on the third dielectric layer. The conductive via penetrates through the third dielectric layer and the second dielectric layer, and electrically connects the third internal circuit layer and the fourth internal circuit layer. The first ring-shaped retaining wall and the second ring-shaped retaining wall are respectively arranged in the third dielectric layer, surround the conductive via hole and electrically connect the third inner circuit layer and the first inner circuit layer, and the fourth inner circuit layer and the second inner circuit layer. Two internal circuit layers. The fourth dielectric layer respectively covers the third internal circuit layer and the fourth internal circuit layer. The first outer circuit layer and the second outer circuit layer respectively cover the fourth dielectric layer. The third annular retaining wall and the fourth annular retaining wall are respectively disposed in the fourth dielectric layer and are electrically connected to the first outer circuit layer and the third inner circuit layer, and the second outer circuit layer and the fourth inner circuit layer. A part of at least one of the third annular retaining wall and the fourth annular retaining wall is disposed corresponding to the conductive through hole. The connection structure layer includes a connection layer and a plurality of conductive junctions. The connection layer is located between the circuit board units and covers the first outer circuit layer of each circuit board unit, and the conductive junction is connected to the first outer circuit layer of each circuit board unit, so that the circuit board units are butted together.

Based on the above, in the design of the circuit board structure of the present invention, the first annular retaining wall and a second annular retaining wall surround the conductive via and electrically connect the third inner circuit layer with the first inner circuit layer and the fourth inner circuit layer. The inner circuit layer and the second inner circuit layer, and the third annular retaining wall and the fourth annular retaining wall are electrically connected to the first outer circuit layer and the third inner circuit layer and the second outer circuit layer and the fourth inner circuit layer . Such a design makes the ring-shaped retaining wall present a closed boundary closed structure, which can reduce electromagnetic interference (EMI) and completely cover the signal of the conductive via, compared with the surrounding conductive via in the prior art For arranging a single row of blind holes with gaps, the circuit board structure of the present invention can also effectively prevent energy loss and reduce noise interference, thus having better signal integrity.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail together with the accompanying drawings.

FIG. 1A is a schematic top view of a circuit board structure according to an embodiment of the present invention. FIG. 1B is a schematic cross-sectional view along line I-I of FIG. 1A . FIG. 1C is a schematic cross-sectional view along line II-II of FIG. 1A . It should be noted that FIG. 1B is a schematic cross-sectional view of the circuit board structure at the first position P1 , and FIG. 1C is a schematic cross-sectional view of the circuit board structure at the second position P2 .

Please refer to FIG. 1A, FIG. 1B and FIG. 1C. In this embodiment, the circuit board structure 100a includes a first dielectric layer 110, a second dielectric layer 113, two third dielectric layers 115, and two fourth dielectric layers. Layer 117, a first internal circuit layer 120, a second internal circuit layer 125, a conductive connection layer 127, a third internal circuit layer 130, a fourth internal circuit layer 140, two conductive vias 150, a first The annular retaining wall 160 , a second annular retaining wall 165 , a first outer circuit layer 170 , a second outer circuit layer 180 , a third annular retaining wall 190 and a fourth annular retaining wall 195 .

In detail, in this embodiment, the first dielectric layer 110 has a first surface S1 and a second surface S2 opposite to each other and penetrates through the first dielectric layer 110 and connects the first surface S1 and the second surface S2 An opening of H. The first inner circuit layer 120 is disposed on the first surface S1 of the first dielectric layer 110 . The second inner wiring layer 125 is disposed on the second surface S2 of the first dielectric layer 110 . The conductive connection layer 127 covers the inner wall of the opening H of the first dielectric layer 110 and connects the first internal circuit layer 120 and the second internal circuit layer 125 . The second dielectric layer 113 fills up the opening H of the first dielectric layer 110 , and is aligned with the first inner wiring layer 120 and the second inner wiring layer 125 . Here, the first dielectric layer 110 can use general dielectric materials, wherein the dielectric constant of the first dielectric layer 110 can be lower than 5.0, and the dielectric loss (Df) of the first dielectric layer 110 can be lower than 0.02 , thereby providing proper impedance matching. The dielectric constant of the second dielectric layer 113 can be lower than 5.0, and the dielectric loss (Df) of the second dielectric layer 113 is greater than 0 and less than 0.025, so as to provide proper insulation and impedance matching, and can also reduce Dielectric loss.

Moreover, the third dielectric layer 115 in this embodiment covers the opposite sides of the first inner circuit layer 120 , the second inner circuit layer 125 and the second dielectric layer 113 respectively. The third inner circuit layer 130 and the fourth inner circuit layer 140 respectively cover the third dielectric layer 115 . The conductive via 150 penetrates the third dielectric layer 115 and the second dielectric layer 113 , and electrically connects the third inner circuit layer 130 and the fourth inner circuit layer 140 . More specifically, in this embodiment, each conductive via 150 includes a through hole 152 , a conductive material layer 154 and a hole-filling material 156 . The through hole 152 penetrates through the third dielectric layer 115 and the second dielectric layer 113 , and the conductive material layer 154 covers the inner wall of the through hole 152 and electrically connects the third inner circuit layer 130 and the fourth inner circuit layer 140 . The hole filling material 156 fills the through hole 152 , and the third inner circuit layer 130 and the fourth inner circuit layer 140 respectively cover an upper surface 157 and a lower surface 159 of the hole filling material 156 opposite to each other.

Furthermore, the first annular retaining wall 160 and the second annular retaining wall 165 of this embodiment are respectively disposed in the third dielectric layer 115, surround the conductive via 150 and electrically connect the third inner circuit layer 130 and the second inner circuit layer 130. An internal circuit layer 120 , a fourth internal circuit layer 140 and a second internal circuit layer 125 . The fourth dielectric layer 117 covers the third inner circuit layer 130 and the fourth inner circuit layer 140 respectively. The first outer circuit layer 170 and the second outer circuit layer 180 respectively cover the fourth dielectric layer 117 . The third annular retaining wall 190 and the fourth annular retaining wall 195 are respectively disposed in the fourth dielectric layer 117 and electrically connected to the first outer circuit layer 170 and the third inner circuit layer 130 and the second outer circuit layer 180 and the third inner circuit layer 130. The fourth internal circuit layer 140 . Here, the third dielectric layer 115 and the fourth dielectric layer 117 can be, for example, photoimageable dielectric (photoimageable dielectric, PID) material, prepreg (pre-preg) or Ajinomoto Build film (Ajinomoto Build) respectively. -up Film, ABF). The dielectric constant of the third dielectric layer 115 and the fourth dielectric layer 117 may be lower than 4.2, and the dielectric loss (Df) of the third dielectric layer 115 and the fourth dielectric layer 117 is greater than 0 and less than 0.01.

In particular, in this embodiment, the third inner circuit layer 130, the conductive via 150 and the fourth inner circuit layer 140 define the second signal path L11, while the first outer circuit layer 170, the third annular retaining wall 190 , the third internal circuit layer 130, the first annular retaining wall 160, the first internal circuit layer 120, the conductive connection layer 127, the second internal circuit layer 125, the second annular retaining wall 165, the fourth internal circuit layer 140, The fourth annular retaining wall 195 and the second outer circuit layer 180 define a ground path L12, and the ground path L12 surrounds the signal path L11.

More specifically, please refer to FIG. 1B , the first external circuit layer 170 includes a ground circuit 174 (ie, a first ground circuit). The second external circuit layer 180 includes a ground circuit 184 (ie, a second ground circuit). The third inner circuit layer 130 includes a signal circuit 132 (ie, the first signal circuit) and a ground circuit 134 (ie, the third ground circuit). The fourth internal circuit layer 140 includes a signal circuit 142 (ie, the second signal circuit) and a ground circuit 144 (ie, the fourth ground circuit). The signal line 132, the conductive via 150 and the signal line 142 define the signal path L11, and the ground line 174, the third annular retaining wall 190, the ground line 134, the first annular retaining wall 160, the first inner circuit layer 120, The conductive connection layer 127 , the second inner circuit layer 125 , the second annular retaining wall 165 , the grounding circuit 144 , the fourth annular retaining wall 195 and the second grounding circuit 184 define a grounding path L12 . Since the signal path L11 is surrounded by the ground path L12 and is closed, a good high-frequency and high-speed loop can be formed.

In addition, please refer to FIG. 1C, the grounding path L14 is defined by the grounding line 174, the third annular retaining wall 190, the grounding line 134, the first annular retaining wall 160 and the first inner circuit layer 120, and the grounding path L14 surrounds the signal line 132, which is enclosed and surrounded, so it can form a good high-frequency and high-speed loop. Moreover, the second internal circuit layer 125, the second ring-shaped retaining wall 165, the grounding circuit 144, the fourth annular retaining wall 195, and the grounding circuit 184 define a grounding path L13, and the grounding path L13 surrounds the signal line 142 in a closed form. Surrounded by nature, it can form a good high-frequency and high-speed loop.

In short, in this embodiment, the signal path L11 defined by the signal line 132, the conductive via 150 and the signal line 142 is formed by the ground line 174, the third ring-shaped retaining wall 190, the ground line 134, the first ring-shaped retaining wall 160, the first internal circuit layer 120, the conductive connection layer 127, the second internal circuit layer 125, the second annular retaining wall 165, the grounding circuit 144, the fourth annular retaining wall 195 and the second grounding circuit 184 define the grounding The path L12 surrounds it. That is to say, a well-closed grounding path L12 is provided around the signal path L11 capable of transmitting high-frequency and high-speed signals such as 5G, thereby forming a good high-frequency and high-speed loop, so that the circuit board structure 100 of this embodiment can have a relatively Good signal integrity. Here, the high frequency refers to a frequency greater than 1 GHz; and the high speed refers to a data transmission speed greater than 100 Mbps.

Furthermore, since the first annular retaining wall 160, the second annular retaining wall 165, the third annular retaining wall 190 and the fourth annular retaining wall 195 are closed boundary structures, they can completely cover the The signal of the conductive via 150 . Compared with the single row of blind holes with gaps around the conductive vias in the prior art, the circuit board structure 100a of this embodiment can effectively prevent energy loss and reduce noise interference, and can have better signal integrity sex. In addition, the conductive via 150 , the conductive connection layer 127 and the second dielectric layer 113 define a coaxial via, wherein the second dielectric layer 113 is located between the conductive via 150 and the conductive connection layer 127 . Compared with the build-up method of pressing the insulating layer in the prior art to block the inner conductor layer and the outer conductor layer of the coaxial perforation, the manufacturing method of the circuit board structure 100a of this embodiment can avoid impedance mismatch and affect Integrity of high-frequency signals.

2A and 2B are schematic cross-sectional views of a circuit board structure at a first position and a second position according to another embodiment of the present invention. Please refer to FIG. 2A first. In order to improve the application of the circuit board structure 100b, the third ring-shaped retaining wall 192 of this embodiment can be disposed corresponding to the conductive through hole 150 . Here, the first external circuit layer 170 includes a signal circuit 172 and a ground circuit 174 . The signal line 172 , the third annular retaining wall 192 , the signal line 132 , the conductive via 150 and the signal line 142 define a signal path L21 . Grounding circuit 174, third annular retaining wall 190, grounding circuit 134, first annular retaining wall 160, first internal circuit layer 120, conductive connection layer 127, second internal circuit layer 125, second annular retaining wall 165 , the grounding line 144 , the fourth annular retaining wall 195 and the grounding line 184 define a grounding path L22 . Since the signal path L21 is surrounded by the ground path L22 and is closed, a good high-frequency and high-speed loop can be formed.

2B, the ground circuit 174, the third annular retaining wall 190, the ground circuit 134, the first annular retaining wall 160 and the first internal circuit layer 120 of the circuit board structure 100b define a ground path L24, and the ground path L24 surrounds the signal line 132 in a closed manner, so it can form a good high-frequency and high-speed loop. In addition, the second inner circuit layer 125, the second ring-shaped retaining wall 165, the grounding circuit 144, the fourth annular retaining wall 195 and the grounding circuit 184 define a ground path L23, and the ground path L23 surrounds the signal The line 142 is enclosed and surrounded, so it can form a good high-frequency and high-speed loop.

FIG. 3 is a schematic partial cross-sectional view of an electronic device including the circuit board structure of FIG. 2A . In this embodiment, the electronic device 10a includes the circuit board structure 100b shown in FIG. 2A and the electronic component 20 , wherein the electronic component 20 is electrically connected to the circuit board structure 100b, and the electronic component 20 includes a plurality of pads 22 . In addition, the electronic device 10a of this embodiment further includes a plurality of connectors 30 disposed between the first outer circuit layer 170 of the circuit board structure 100b and the pads 22 of the electronic component 20, wherein the electronic component 20 communicates with the electronic component 20 through the connectors 30. The circuit board structure 100b is electrically connected. Here, the connecting element 30 is, for example, a solder ball, but not limited thereto. In terms of application, an antenna structure can be arranged on the other side of the circuit board structure 100b relative to the electronic component 20, which can solve the problem of signal interference on the same plane, reduce signal energy loss and noise interference, and further improve the reliability of signal transmission. Spend.

FIG. 4 is a schematic partial cross-sectional view of a circuit board structure according to an embodiment of the present invention. Please refer to FIG. 2A and FIG. 4 at the same time. In this embodiment, the circuit board structure 200a includes two circuit board units and a connection structure layer 210, wherein each circuit board unit is the circuit board structure 100b in FIG. 2A. The first external circuit layer 170 of the circuit board structure 100b includes a signal circuit 172 (ie, a first signal circuit) and a ground circuit 174 (ie, a first ground circuit). The second outer circuit layer 180 includes a ground circuit 184 (ie, a second ground circuit). The third internal circuit layer 130 includes a signal circuit 132 (ie, a third signal circuit) and a ground circuit 134 (ie, a third ground circuit). The fourth internal circuit layer 140 includes signal lines 142 (ie, fourth signal lines) and ground lines 144 (ie, fourth ground lines). The connection structure layer 210 includes a connection layer 212 and a plurality of conductive junctions (including a plurality of first conductive junctions 214 and a plurality of second conductive junctions 216 ). The connection layer 212 is located between the two circuit board structures 100b and covers the first outer circuit layer 170 of each circuit board structure 100b. The first conductive bonding portion 214 and the second conductive bonding portion 216 are connected to the first outer circuit layer 170 of each circuit board structure 100b, so that the circuit board structures 100b are butted together. Here, the first conductive bonding portion 214 is disposed corresponding to the conductive via 150 of the circuit board structure 100 b and connected to the signal line 172 . The second conductive bonding portion 216 surrounds the first conductive bonding portion 214 and is connected to the ground line 174 .

In this embodiment, when the upper circuit board structure 100b is located at the first position P1 and the lower circuit board structure 100b is located at the first position P1, and the circuit board structure 100b and the circuit board structure 100b are docked together, the upper circuit board structure The signal line 142 of 100b, the conductive via 150, the signal line 132, the third annular retaining wall 192 corresponding to the conductive via 150, the signal line 172, the first conductive junction 214, and the signal line 172 of the circuit board structure 100b below , the third annular retaining wall 192 corresponding to the conductive via 150 , the signal line 132 , the conductive via 150 and the signal line 142 to define a second signal path L31 . The grounding circuit 184, the fourth annular retaining wall 195, the grounding circuit 144, the second annular retaining wall 165, the second internal circuit layer 125, the conductive connection layer 127, the first internal circuit layer 120, The first annular retaining wall 160, the grounding circuit 134, the third annular retaining wall 190, the grounding circuit 174, the second conductive joint 216, the grounding circuit 174 of the circuit board structure 100b below, the third annular retaining wall 190, Grounding circuit 134, first annular retaining wall 160, first internal circuit layer 120, conductive connection layer 127, second internal circuit layer 125, second annular retaining wall 165, grounding circuit 144, fourth annular retaining wall 195 And the ground line 184 defines a ground path L32, and the ground path L32 surrounds the signal path L31. Since the signal path L31 is surrounded by the ground path L32 and is closed, a good high-frequency and high-speed loop can be formed.

FIG. 5 is a schematic partial cross-sectional view of a circuit board structure according to an embodiment of the present invention. Please refer to FIG. 5 , in this embodiment, the circuit board structure 200b includes two circuit board units and a connection structure layer 210 , wherein the circuit board units are the circuit board structure 100b and the circuit board structure 100c in FIG. 2B . Here, circuit board structure 100c is similar to circuit board structure 100b in FIG. The four-ring retaining wall 197 and the third ring-shaped retaining wall 192 are disposed corresponding to the conductive through hole 150 .

When the upper circuit board structure 100c is at the first position P1 and the lower circuit board structure 100b is at the second position P2, and the circuit board structure 100c and the circuit board structure 100b are butted together, the signal line 182 of the upper circuit board structure 100c 1. Corresponding to the conductive through hole 150, a fourth ring-shaped retaining wall 197, a signal line 142, a conductive through hole 150, and a signal line 132 are provided. A third annular retaining wall 192, a signal line 172, and a first conductive joint The portion 214 , the signal line 172 of the lower circuit board structure 100 b , the third annular retaining wall 192 corresponding to the conductive via 150 , and the signal line 132 define a second signal path L41 . The grounding circuit 184, the fourth annular retaining wall 195, the grounding circuit 144, the second annular retaining wall 165, the second internal circuit layer 125, the conductive connection layer 127, the first internal circuit layer 120, The first annular retaining wall 160, the grounding circuit 134, the third annular retaining wall 190, the grounding circuit 174, the second conductive joint 216, the grounding circuit 174 of the circuit board structure 100b below, the third annular retaining wall 190, The ground circuit 134 , the first annular retaining wall 160 and the first inner circuit layer 120 define a ground path L42 (ie, the first ground path), and the first ground path L42 surrounds the signal path L41 . Since the signal path L41 is surrounded by the ground path L42 and is closed, a good high-frequency and high-speed loop can be formed.

In addition, the second inner circuit layer 125, the second annular retaining wall 165, the grounding circuit 144, the fourth annular retaining wall 195, and the grounding circuit 184 of the circuit board structure 100b below define a grounding path L43 (ie, the second grounding path L43). path), and the ground path L43 surrounds the signal line 142 of the circuit board structure 100b in a closed manner, so a good high-frequency and high-speed loop can be formed.

FIG. 6 is a schematic partial cross-sectional view of a circuit board structure according to an embodiment of the present invention. Please refer to FIG. 6 , in this embodiment, the circuit board structure 200c includes two circuit board units and a connection structure layer 210 , wherein each circuit board unit is the circuit board structure 100a in FIG. 1C .

When the upper circuit board structure 100a is at the second position P2 and the lower circuit board structure 100a is at the second position P2, and the circuit board structure 100a and the circuit board structure 100a are butted together, the second interior of the upper circuit board structure 100a The circuit layer 125, the second annular retaining wall 165, the grounding circuit 144, the fourth annular retaining wall 195, and the grounding circuit 184 define a grounding path L51, and the grounding path L51 surrounds the signal circuit 142 in a closed manner, so it can form Good high-frequency high-speed loop.

Moreover, the first inner circuit layer 120, the first annular retaining wall 160, the grounding circuit 134, the third annular retaining wall 190, the grounding circuit 174, the second conductive joint 216, and the circuit 174 of the upper circuit board structure 100a , the third annular retaining wall 190, the grounding line 134, the first annular retaining wall 160, and the first grounding internal circuit layer 120 define a grounding path L52, and the grounding path L52 surrounds the signal line 132 in a closed manner, so it can Form a good high-frequency high-speed loop. In addition, the second inner circuit layer 125, the second annular retaining wall 165, the grounding circuit 144, the fourth annular retaining wall 195, and the grounding circuit 184 of the circuit board structure 100a below define a grounding path L51, and the grounding path L51 surrounds The signal line 142 is surrounded in a closed manner, so it can form a good high-frequency and high-speed loop.

It should be noted that, the connection methods mentioned in the above-mentioned embodiments are all to connect the first outer circuit layers of the two circuit board structures together. However, in other unillustrated docking embodiments, it is also possible to connect the first external circuit layer of one circuit board structure to the second external circuit layer of another circuit board structure; or, connect the first external circuit layer of the second circuit board structure The two external circuit layers are connected together, and the above all belong to the protection scope of the present invention.

FIG. 7 is a schematic partial cross-sectional view of an electronic device including the circuit board structure of FIG. 5 . Please refer to FIG. 7. In this embodiment, the electronic device 10b includes the above-mentioned circuit board structure 200b and electronic components 20 such as FIG. Pad 22. In addition, the electronic device 10b of this embodiment further includes a plurality of connectors 30 disposed between the second outer circuit layer 180' of the circuit board structure 200b and the pads 22 of the electronic components 20, wherein the electronic components 20 pass through the connectors 30 It is electrically connected with the circuit board structure 200b. Here, the connecting element 30 is, for example, a solder ball, but not limited thereto. In terms of application, an antenna structure can be provided on the other side of the circuit board structure 200b relative to the electronic component 20, which can solve the problem of signal interference on the same plane, reduce signal energy loss and noise interference, and further improve the reliability of signal transmission. Spend.

To sum up, in the design of the circuit board structure of the present invention, the first annular retaining wall and a second annular retaining wall surround the conductive via and electrically connect the third internal circuit layer and the first internal circuit layer and The fourth inner circuit layer and the second inner circuit layer, and the third annular retaining wall and the fourth annular retaining wall are electrically connected to the first outer circuit layer and the third inner circuit layer and the second outer circuit layer and the fourth inner circuit layer line layer. Such a design makes the ring-shaped retaining wall present a closed boundary closed structure, which can reduce electromagnetic interference (EMI) and completely cover the signal of the conductive via, compared with the surrounding conductive via in the prior art For arranging a single row of blind holes with gaps, the circuit board structure of the present invention can also effectively prevent energy loss and reduce noise interference, thus having better signal integrity.

Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field may make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention should be defined by the scope of the appended patent application.

10a, 10b: electronic device 20: Electronic components 22: Pad 30: connector 100a, 100b, 100c, 200a, 200b, 200c: circuit board structure 110: the first dielectric layer 113: second dielectric layer 115: the third dielectric layer 117: The fourth dielectric layer 120: The first internal circuit layer 125: The second internal line layer 127: Conductive connection layer 130: The third internal line layer 132: Signal line 134: Grounding line 140: The fourth internal line layer 142: Signal line 144: Grounding line 150: Conductive vias 152: through hole 154: conductive material layer 156: hole filling material 157: upper surface 159: lower surface 160: The first ring retaining wall 165: Second ring retaining wall 170: the first external line layer 172: Signal line 174: Grounding line 180, 180': the second external line layer 182: Signal line 184: Grounding line 190, 192: The third ring retaining wall 195, 197: The fourth ring retaining wall 210: connect the structure layer 212: Connection layer 214: first conductive junction 216: second conductive junction H: open L11, L21, L31, L41: signal path L12, L13, L14, L22, L23, L24, L32, L42, L51, L52: Ground path P1: first position P2: second position S1: first surface S2: second surface

FIG. 1A is a schematic top view of a circuit board structure according to an embodiment of the present invention. FIG. 1B is a schematic cross-sectional view along line I-I of FIG. 1A . FIG. 1C is a schematic cross-sectional view along line II-II of FIG. 1A . 2A and 2B are schematic cross-sectional views of a circuit board structure at a first position and a second position according to another embodiment of the present invention. FIG. 3 is a schematic partial cross-sectional view of an electronic device including the circuit board structure of FIG. 2A . FIG. 4 is a schematic partial cross-sectional view of a circuit board structure according to an embodiment of the present invention. FIG. 5 is a schematic partial cross-sectional view of a circuit board structure according to an embodiment of the present invention. FIG. 6 is a schematic partial cross-sectional view of a circuit board structure according to an embodiment of the present invention. FIG. 7 is a schematic partial cross-sectional view of an electronic device including the circuit board structure of FIG. 5 .

100a: Circuit board structure

110: the first dielectric layer

113: second dielectric layer

115: the third dielectric layer

117: The fourth dielectric layer

120: The first internal circuit layer

125: The second internal line layer

127: Conductive connection layer

130: The third internal line layer

132: Signal line

134: Grounding line

140: The fourth internal line layer

142: Signal line

144: Grounding line

150: Conductive vias

152: through hole

154: conductive material layer

156: hole filling material

157: upper surface

159: lower surface

160: The first ring retaining wall

165: Second ring retaining wall

170: the first external line layer

174: Grounding line

180: second external line layer

184: Grounding line

190: The third ring retaining wall

195: The fourth ring retaining wall

H: open

L11: signal path

L12: Ground path

P1: first position

S1: first surface

S2: second surface

Claims (10)

A circuit board structure comprising: a first dielectric layer having a first surface and a second surface opposite to each other and an opening penetrating through the first dielectric layer and connecting the first surface and the second surface; a first internal wiring layer disposed on the first surface of the first dielectric layer; a second internal wiring layer disposed on the second surface of the first dielectric layer; a conductive connection layer covering the inner wall of the opening of the first dielectric layer and connecting the first internal circuit layer and the second internal circuit layer; a second dielectric layer filling the opening of the first dielectric layer; two third dielectric layers, respectively covering the first internal circuit layer, the second internal circuit layer and the second dielectric layer; a third internal circuit layer and a fourth internal circuit layer respectively covering the third dielectric layers; two conductive vias, penetrating through the third dielectric layers and the second dielectric layer, and electrically connecting the third internal circuit layer and the fourth internal circuit layer; A first annular retaining wall and a second annular retaining wall are respectively arranged in the third dielectric layers, surround the conductive vias and electrically connect the third internal circuit layer and the first internal circuit layer and the fourth internal circuit layer and the second internal circuit layer; 2. A fourth dielectric layer, respectively covering the third internal circuit layer and the fourth internal circuit layer; a first outer wiring layer and a second outer wiring layer respectively covering the fourth dielectric layers; and A third annular retaining wall and a fourth annular retaining wall are respectively disposed in the fourth dielectric layers and electrically connected to the first external circuit layer, the third internal circuit layer and the second external circuit layer with the fourth inner line layer. The circuit board structure as claimed in item 1, wherein the third internal circuit layer, the conductive vias and the fourth internal circuit layer define two signal paths, and the first external circuit layer, the third ring Type retaining wall, the third internal circuit layer, the first annular retaining wall, the first internal circuit layer, the conductive connection layer, the second internal circuit layer, the second annular retaining wall, the fourth internal A ground path is defined by the line layer, the fourth ring-shaped retaining wall and the second outer line layer, and the ground path surrounds the signal paths. The circuit board structure as claimed in item 2, wherein the first external circuit layer includes a first ground circuit, the second external circuit layer includes a second ground circuit, and the third internal circuit layer includes a first signal circuit and a third ground line, and the fourth inner line layer includes a second signal line and a fourth ground line, the first signal line, the conductive vias and the second signal line define the signal paths , and the first grounding circuit, the third annular retaining wall, the third grounding circuit, the first annular retaining wall, the first internal circuit layer, the conductive connection layer, the second internal circuit layer, the The second annular retaining wall, the fourth ground circuit, the fourth annular retaining wall and the second ground circuit define the ground path. The circuit board structure as claimed in claim 1, wherein each of the conductive vias includes a through hole, a conductive material layer and a hole filling material, and the through hole penetrates through the third dielectric layers and the second dielectric layer, The conductive material layer covers the inner wall of the through hole and electrically connects the third inner circuit layer and the fourth inner circuit layer, the hole filling material fills the through hole, and the third inner circuit layer and the fourth inner circuit layer The four internal circuit layers respectively cover an upper surface and a lower surface of the hole-filling material opposite to each other. The circuit board structure according to claim 1, wherein a part of at least one of the third annular retaining wall and the fourth annular retaining wall is disposed corresponding to the conductive vias. A circuit board structure comprising: Two circuit board units, each of which includes: a first dielectric layer having a first surface and a second surface opposite to each other and an opening penetrating through the first dielectric layer and connecting the first surface and the second surface; a first internal wiring layer disposed on the first surface of the first dielectric layer; a second internal wiring layer disposed on the second surface of the first dielectric layer; a conductive connection layer covering the inner wall of the opening of the first dielectric layer and connecting the first internal circuit layer and the second internal circuit layer; a second dielectric layer filling the opening of the first dielectric layer; two third dielectric layers, respectively covering the first internal circuit layer, the second internal circuit layer and the second dielectric layer; a third internal circuit layer and a fourth internal circuit layer respectively covering the third dielectric layers; two conductive vias, penetrating through the third dielectric layers and the second dielectric layer, and electrically connecting the third internal circuit layer and the fourth internal circuit layer; A first annular retaining wall and a second annular retaining wall are respectively arranged in the third dielectric layers, surround the conductive vias and electrically connect the third internal circuit layer and the first internal circuit layer and the fourth internal circuit layer and the second internal circuit layer; 2. A fourth dielectric layer, respectively covering the third internal circuit layer and the fourth internal circuit layer; a first outer wiring layer and a second outer wiring layer respectively covering the fourth dielectric layers; and A third annular retaining wall and a fourth annular retaining wall are respectively disposed in the fourth dielectric layers and electrically connected to the first external circuit layer, the third internal circuit layer and the second external circuit layer and the fourth internal circuit layer, wherein a part of at least one of the third annular barrier wall and the fourth annular barrier wall is provided corresponding to the conductive vias; and A connection structure layer, including a connection layer and a plurality of conductive joints, the connection layer is located between the circuit board units and covers the first outer circuit layer of each circuit board unit, and the conductive joints are connected to The first outer circuit layer of each of the circuit board units, so that the circuit board units are butted together. The circuit board structure as described in claim 6, wherein the first external circuit layer of each circuit board unit includes a first signal circuit and a first ground circuit, and the second external circuit layer includes a second signal circuit and A second ground circuit, the third internal circuit layer includes a third signal circuit and a third ground circuit, the fourth internal circuit layer includes a fourth signal circuit and a fourth ground circuit, the conductive joints include A plurality of first conductive joints and a plurality of second conductive joints, the first conductive joints are arranged corresponding to the conductive through holes of each circuit board unit and connected to the first signal line, and the second conductive The bonding portion surrounds the first conductive bonding portions and connects to the first grounding line. The circuit board structure as described in claim 7, wherein when the circuit board units are butted together, the fourth signal line, the conductive vias, the third signal line, and the pair of circuit board units in one of the circuit board units The third annular retaining wall corresponding to the conductive vias, the first signal line, the first conductive joints, the first signal line of another of the circuit board units, the conductive vias The third annular retaining wall, the third signal line, the conductive vias and the fourth signal line define two signal paths, and the second ground line of one of the circuit board units, the The fourth annular retaining wall, the fourth grounding line, the second annular retaining wall, the second inner circuit layer, the conductive connection layer, the first inner circuit layer, the first annular retaining wall, the second Three grounding lines, the third ring-shaped retaining wall, the first grounding line, the second conductive joints, the first grounding line of another of the circuit board units, the third annular retaining wall, The third grounding circuit, the first annular retaining wall, the first internal circuit layer, the conductive connection layer, the second internal circuit layer, the second annular retaining wall, the fourth grounding circuit, the fourth A ground path is defined by the ring-shaped retaining wall and the second ground line, and the ground path surrounds the signal paths. The circuit board structure according to claim 7, wherein part of the third annular retaining wall and part of the fourth annular retaining wall are provided corresponding to the conductive through holes, and when the circuit board units are connected together, the The second signal line of one of the circuit board units, the fourth ring-shaped retaining wall, the fourth signal line, the conductive through holes, the third signal line, and the conductive vias are arranged corresponding to the conductive vias. The third ring-shaped retaining wall, the first signal line, the first conductive junctions, the first signal line of another one of the circuit board units are arranged in the through hole, and the first signal line is arranged corresponding to the conductive through holes. The three-ring retaining wall and the third signal line define two signal paths, and the second grounding line, the fourth ring-shaped retaining wall, the fourth grounding line, and the second grounding line of one of the circuit board units Ring-shaped retaining wall, the second internal circuit layer, the conductive connection layer, the first internal circuit layer, the first annular retaining wall, the third grounding circuit, the third annular retaining wall, the first grounding circuit, the second conductive joints, the first ground circuit of another of the circuit board units, the third annular retaining wall, the third ground circuit, the first annular retaining wall and the second An internal circuit layer defines a first ground path, and the first ground path surrounds the signal paths, and the second internal circuit layer, the second annular retaining wall, A second ground path is defined by the fourth ground line, the fourth annular retaining wall and the second ground line, and the second ground path surrounds the fourth signal line of another one of the circuit board units. The circuit board structure as described in claim 7, wherein when the circuit board units are butted together, the second grounding line, the fourth annular retaining wall, the fourth grounding line, and the first grounding line of each circuit board unit The second ring-shaped retaining wall and the second internal circuit layer define a first grounding path, and the first grounding path surrounds the fourth signal circuit, and the first internal circuit layer, the first internal circuit layer of each circuit board unit The ring-shaped retaining wall, the third grounding circuit, the third annular retaining wall and the first grounding circuit define a second grounding path, and the second grounding path surrounds the third signal circuit.

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