TWI808859B - Circuit board structure - Google Patents

Abstract

A circuit board structure includes a substrate, a first build-up structure layer, a first external circuit layer, a second external circuit layer, at least one first conductive through hole and a plurality of second conductive through holes. A first build-up structure layer is disposed on the first circuit layer of the substrate. The first external circuit layer is disposed on the first build-up structure. The second external circuit layer is disposed on the second circuit layer and part of the third dielectric layer of the substrate. The first conductive through hole is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path. The second conductive through holes surround the first conductive through hole, and the first external circuit layer, the second conductive through holes, the first circuit layer, the external conductive layer, and the second external circuit layer define a first ground path, and the first ground path surrounds the signal path.

Description

circuit board structure

The present invention relates to a substrate structure, and in particular to a circuit board structure.

In the existing circuit board, the design of coaxial via (coaxial via) requires one or more insulating layers between the inner conductor layer and the outer conductor layer for insulation, and the way to form the insulating layer is to achieve it by lamination. Therefore, there will be impedance mismatch at both ends of the coaxial via and electromagnetic interference (EMI) shielding gaps will appear, thereby affecting the integrity of high-frequency signals. In addition, in the coaxial through-hole design, the two ends of the signal path and the two ends of the ground path are respectively located on different planes, and noise interference cannot be reduced.

The invention provides a circuit board structure, which can effectively reduce noise interference and have better signal integrity.

The circuit board structure of the present invention comprises a substrate, a first build-up structure layer, a first outer circuit layer, a second outer circuit layer, at least one first conductive holes and a plurality of second conductive vias. The base has at least one first opening and includes a core layer, a first inner circuit layer, a second inner circuit layer, an inner conductive layer, a first dielectric layer, a second dielectric layer, a third dielectric layer, a first circuit layer, a second circuit layer and an outer conductive layer. The first inner circuit layer and the second inner circuit layer are disposed on opposite sides of the core layer. The core layer has a plurality of second openings, and the inner conductive layer covers inner walls of the second openings and connects the first inner circuit layer and the second inner circuit layer. The first dielectric layer covers the first inner circuit layer and is located between the first inner circuit layer and the first circuit layer. The second dielectric layer covers the second inner circuit layer and is located between the second inner circuit layer and the second circuit layer. The first opening is located between the second openings and runs through the first wiring layer, the first dielectric layer, the first inner wiring layer, the core layer, the second inner wiring layer and the second dielectric layer. The outer conductive layer covers the inner wall of the first opening and connects the first wiring layer, the first inner wiring layer, the second inner wiring layer and the second wiring layer. The third dielectric layer fills the first opening. The first build-up structure layer is configured on the first circuit layer. The first external circuit layer is configured on the first build-up structure layer. The second outer circuit layer is configured on the second circuit layer and part of the third dielectric layer. The first conductive via penetrates through the first build-up structure layer and the third dielectric layer, and electrically connects the first external circuit layer and the second external circuit layer to define a signal path. The second conductive via surrounds the first conductive via and runs through the first build-up structure layer, the first circuit layer, the first dielectric layer, the first inner circuit layer, the core layer, the second inner circuit layer, the second dielectric layer and the second circuit layer, and electrically connects the first outer circuit layer, the first circuit layer, the first inner circuit layer, the second inner circuit layer and the second circuit layer. The first outer circuit layer, the second conductive via, the first circuit layer, the outer conductive layer and the second outer circuit layer define a first ground path path, and the first ground path surrounds the signal path.

In an embodiment of the present invention, the above-mentioned first build-up structure layer includes a fourth dielectric layer, a third circuit layer, a fifth dielectric layer and a fourth circuit layer. The fourth dielectric layer is disposed on the first circuit layer and the third dielectric layer. The third circuit layer is disposed on the fourth dielectric layer, and the fifth dielectric layer is disposed on the third circuit layer and the fourth dielectric layer. The fourth circuit layer is configured on the fifth dielectric layer, and the first outer circuit layer is configured on the fourth circuit layer.

In an embodiment of the present invention, the above-mentioned circuit board structure further includes a second build-up structure layer disposed on the second circuit layer and part of the third dielectric layer, and the second outer circuit layer is located on the second build-up structure layer.

In an embodiment of the present invention, the above-mentioned first build-up structure layer further includes at least one first conductive blind hole penetrating through the fifth dielectric layer and the fourth circuit layer and electrically connecting the first outer circuit layer, the fourth circuit layer and the third circuit layer. The second build-up structure layer further includes at least one second conductive blind hole penetrating through the second build-up structure layer and electrically connecting the second outer circuit layer and the second circuit layer.

In an embodiment of the present invention, the above-mentioned first build-up structure layer further includes at least one first conductive blind hole penetrating through the fifth dielectric layer and the fourth dielectric layer and electrically connecting the first outer circuit layer and the first circuit layer. The second build-up structure layer further includes at least one second conductive blind hole penetrating through the second build-up structure layer and electrically connecting the second outer circuit layer and the second circuit layer.

In an embodiment of the present invention, the above-mentioned substrate further has at least one third opening penetrating through the first wiring layer, the first dielectric layer, the first inner wiring layer, the core layer, The second inner wiring layer, the second dielectric layer and the second wiring layer are connected to the fourth dielectric layer and the second outer wiring layer.

In an embodiment of the present invention, the above-mentioned first build-up structure layer further includes at least one first conductive blind hole penetrating through the fifth dielectric layer and the fourth circuit layer and electrically connecting the first outer circuit layer, the fourth circuit layer and the third circuit layer.

In an embodiment of the present invention, the above-mentioned circuit board structure further includes at least one pad disposed in the fourth dielectric layer of the first build-up structure layer and connected to the first conductive via.

In an embodiment of the present invention, a gap is formed among the outer conductive layer, the second dielectric layer and the second wiring layer, and the third dielectric layer further fills up the gap.

In an embodiment of the present invention, the above-mentioned circuit board structure further includes a hole-filling material, at least filling up the second conductive via.

In an embodiment of the present invention, the above-mentioned hole-filling material further fills up the first conductive via hole.

In an embodiment of the present invention, the above-mentioned circuit board structure further includes a first cover layer and a second cover layer. The first cover layer covers the first outer circuit layer. The second cover layer covers the second outer circuit layer, wherein the first cover layer and the second cover layer respectively cover two ends of the hole-filling material.

In an embodiment of the present invention, the above-mentioned circuit board structure further includes a first cover layer and a second cover layer. The first cover layer covers the first outer circuit layer. The second cover layer covers the second outer circuit layer, wherein the first cover layer and the second cover layer respectively cover two ends of the hole-filling material filling the first conductive via, and expose the two ends of the hole-filling material located at the first conductive via. Two conductive vias are filled at both ends of the hole material.

In an embodiment of the present invention, the above-mentioned first conductive vias include two first conductive vias.

In an embodiment of the present invention, the above-mentioned circuit board structure further includes a hole-filling material, at least filling up the second conductive via.

In an embodiment of the present invention, the above-mentioned circuit board structure further includes a first cover layer and a second cover layer. The first cover layer covers the first outer circuit layer. The second cover layer covers the second outer circuit layer, wherein the first cover layer and the second cover layer respectively cover at least two ends of the hole-filling material filling the first conductive via.

In an embodiment of the present invention, the above-mentioned circuit board structure further includes a third conductive via hole, which runs through the first build-up structure layer, the first circuit layer, the first dielectric layer, the first inner circuit layer, the core layer, the second inner circuit layer, the second dielectric layer, and the second circuit layer, and electrically connects the first outer circuit layer, the first circuit layer, the first inner circuit layer, the second inner circuit layer, and the second circuit layer. The third conductive vias are located between the first conductive vias, and the first outer circuit layer, the third conductive vias, the first circuit layer, the outer conductive layer and the second outer circuit layer define a second ground path, and the signal path is located between the first ground path and the second ground path.

In an embodiment of the present invention, the above-mentioned circuit board structure further includes a hole-filling material, at least filling up the second conductive via and the third conductive via.

In an embodiment of the present invention, the above-mentioned circuit board structure further includes a first cover layer and a second cover layer. The first cover layer covers the first outer circuit layer. The second cover layer covers the second outer circuit layer, wherein the first cover layer and the second cover layer At least two ends of the hole-filling material filling the first conductive via are respectively covered.

In an embodiment of the present invention, the above-mentioned first external circuit layer includes a first signal circuit and a first ground circuit. The second outer circuit layer includes a second signal circuit and a second ground circuit. The first signal line, the first conductive via and the second signal line define a signal path. The first ground circuit, each second conductive via, the first circuit layer, the outer conductive layer and the second ground circuit define a first ground path.

In an embodiment of the present invention, the above-mentioned circuit board structure further includes: a hole-filling material, at least filling up the second conductive via hole. The first build-up structure layer includes a fourth dielectric layer, a third circuit layer, a fifth dielectric layer and a fourth circuit layer. The fourth dielectric layer is disposed on the first circuit layer and the third dielectric layer. The third circuit layer is disposed on the fourth dielectric layer, and the fifth dielectric layer is disposed on the third circuit layer and the fourth dielectric layer. The fourth circuit layer is configured on the fifth dielectric layer, and the first outer circuit layer is configured on the fourth circuit layer. A first side and a second side of the hole-filling material opposite to each other have a height difference from a first surface of the fifth dielectric layer and a second surface of the second dielectric layer, and the height difference ranges from greater than minus 30 microns to less than 30 microns.

In an embodiment of the present invention, the above-mentioned third dielectric layer is recessed between the surface of the first circuit layer and the surface of the second circuit layer, and there is a height difference between the surface of the third dielectric layer and the surface of the second circuit layer, and the range of the height difference is greater than minus 30 microns to equal to 0 microns.

Based on the above, in the design of the circuit board structure of the present invention, the first conductive via is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path, and the first external circuit layer, the second conductive via hole, the first circuit layer, and the outer layer conduct The electrical layer and the second external circuit layer define a ground path, and the ground path surrounds the signal path. In this way, a good high-frequency and high-speed signal loop can be formed, and the subsequent application of integrated circuits and antennas can also solve the problem of signal interference on the same plane, reduce signal energy loss and noise interference, and improve signal transmission reliability.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail together with the accompanying drawings.

100a,100b,100c,100d,100e,100f,100g,100h,100i,100j,100k,100m,100q,100r,100s,100t,100u,100v,100w,100x,100y,100z,200a,200b,2 00c, 200d, 200e, 200f, 200g, 200h, 200i, 200j, 200k: circuit board structure

110a, 210a, 210a', 210b: substrate

111, 211: core layer

112a, 212a: the first inner circuit layer

112b, 212b: the second inner circuit layer

113a: inner conductive layer

113b, 213b: outer conductive layer

114, 214: the first dielectric layer

115, 215: second dielectric layer

215a: second surface

116, 216: the third dielectric layer

117, 217: first line layer

118, 218: second line layer

120a, 120i, 120n, 120p, 220a, 220d, 220e: first build-up structure layer

122, 222: the fourth dielectric layer

124, 224: the third line layer

125, 127, 225, 227: the first conductive blind hole

126, 226: fifth dielectric layer

226a: first surface

128, 228: the fourth line layer

130a, 130q, 130v: first external circuit layer

132a, 132q, 132v: the first signal line

134a, 134q, 134v: first grounding line

140a, 140c, 140q, 140v: second external circuit layer

142a, 142q, 142v: the second signal line

144a, 144c, 144q, 144v: second ground line

150a, 150b: first conductive via

160: second conductive via

165, 167: Hole filling material

168: first side

169: second side

170, 172: the first cover layer

175, 177: Second cover layer

180j, 180k, 180m, 180n, 280c, 280d, 280e: the second build-up layer

182, 282: sixth dielectric layer

184, 284: fifth line layer

185, 285: Second conductive blind hole

186: The seventh dielectric layer

188: The sixth line layer

190: The third conductive via

216a, 216b, 217a, 218a: surfaces

219: The third opening

C: Gap

D1, D2: height difference

H1: first opening

H2: second opening

L11, L21, L31, L41: signal path

L12, L13, L14, L15, L22, L32, L33, L42: Ground path

T1, T2, T3: through hole

M: conductive material

P: Pad

FIG. 1A is a schematic cross-sectional view of a circuit board structure according to an embodiment of the present invention.

FIG. 1B is a partial bottom view of the circuit board structure in FIG. 1A .

FIG. 2A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 2B is a partial bottom view of the circuit board structure in FIG. 2A .

FIG. 3A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 3B is a partial bottom view of the circuit board structure in FIG. 3A .

FIG. 4A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 4B is a partial bottom view of the circuit board structure in FIG. 4A .

5A is a cross-section of a circuit board structure according to another embodiment of the present invention schematic diagram.

FIG. 5B is a partial bottom view of the circuit board structure in FIG. 5A .

FIG. 6A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 6B is a partial bottom view of the circuit board structure in FIG. 6A .

FIG. 7A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 7B is a partial bottom view of the circuit board structure in FIG. 7A .

FIG. 8A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 8B is a partial bottom view of the circuit board structure in FIG. 8A .

FIG. 9 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 10 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 11 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 12 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 13 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

Figure 14 is a cross-section of a circuit board structure according to another embodiment of the present invention schematic diagram.

FIG. 15A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 15B is a partial bottom view of the circuit board structure in FIG. 15A .

FIG. 16 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 17 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 18 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 19 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 20 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 21 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 22 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 23 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 24 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 25A is a schematic top view of a circuit board structure according to another embodiment of the present invention.

Fig. 25B is a schematic cross-sectional view along line A-A of Fig. 25A.

Fig. 25C is a schematic cross-sectional view along line B-B of Fig. 25A.

FIG. 26 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 27A is a schematic top view of a circuit board structure according to another embodiment of the present invention.

Fig. 27B is a schematic cross-sectional view along line C-C of Fig. 27A.

FIG. 27C is a schematic cross-sectional view along line D-D of FIG. 27A.

FIG. 28A is a schematic top view of a circuit board structure according to another embodiment of the present invention.

Fig. 28B is a schematic cross-sectional view along line E-E of Fig. 28A.

FIG. 29 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 30 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 31 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 32 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

Figure 33 is a cross-section of a circuit board structure according to another embodiment of the present invention schematic diagram.

FIG. 34 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 35 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 36 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

FIG. 1A is a schematic cross-sectional view of a circuit board structure according to an embodiment of the present invention. FIG. 1B is a partial bottom view of the circuit board structure in FIG. 1A . Please refer to FIG. 1A and FIG. 1B at the same time. In this embodiment, the circuit board structure 100a includes a substrate 110a, a first build-up structure layer 120a, a first outer circuit layer 130a, a second outer circuit layer 140a, at least one first conductive via 150a and a plurality of second conductive vias 160. The substrate 110a has at least one first opening H1 and includes a core layer 111, a first inner circuit layer 112a, a second inner circuit layer 112b, an inner conductive layer 113a, an outer conductive layer 113b, a first dielectric layer 114, a second dielectric layer 115, a third dielectric layer 116, a first circuit layer 117 and a second circuit layer 118. The first inner circuit layer 112 a and the second inner circuit layer 112 b are disposed on opposite sides of the core layer 111 . The core layer 111 has a plurality of second openings H2, and the inner conductive layer 113a covers inner walls of the second openings H2, and structurally and electrically connects the first inner circuit layer 112a and the second inner circuit layer 112b. The first dielectric layer 114 covers the first inner layer circuit The layer 112 a is located between the first inner circuit layer 112 a and the first circuit layer 117 . The second dielectric layer 115 covers the second inner wiring layer 112 b and is located between the second inner wiring layer 112 b and the second wiring layer 118 . The first dielectric layer 114 and the second dielectric layer 115 fill the second opening H2 and are connected to each other. The first opening H1 is located between the second openings H2 and penetrates through the first wiring layer 117 , the first dielectric layer 114 , the first inner wiring layer 112 a , the core layer 111 , the second inner wiring layer 112 b and the second dielectric layer 115 . The outer conductive layer 113b covers the inner wall of the first opening H1 and is structurally and electrically connected to the first circuit layer 117 , the first inner circuit layer 112a , the second inner circuit layer 112b and the second circuit layer 118 . The third dielectric layer 116 fills the first opening H1 and is aligned with the first circuit layer 117 and the second circuit layer 118 , that is, the height difference is 0, and there is no height difference. In one embodiment, the first dielectric layer 114, the second dielectric layer 115, and the third dielectric layer 116 are preferably made of high-frequency and high-speed materials, and the dielectric constant of the third dielectric layer 116 should consider impedance matching, wherein the dielectric loss of the third dielectric layer 116 is greater than 0 and less than 0.1, and the lower the dielectric loss, the higher the signal quality transmitted.

Please refer to FIG. 1A again, the first build-up structure layer 120 a of this embodiment is disposed on the first circuit layer 117 . Here, the first build-up structure layer 120 a includes a fourth dielectric layer 122 , a third circuit layer 124 , a fifth dielectric layer 126 and a fourth circuit layer 128 . The fourth dielectric layer 122 is disposed on the first circuit layer 117 and the third dielectric layer 116 . The third circuit layer 124 is disposed on the fourth dielectric layer 122 , and the fifth dielectric layer 126 is disposed on the third circuit layer 124 and the fourth dielectric layer 122 . The fourth wiring layer 128 is disposed on the fifth dielectric layer 126 , and the first outer wiring layer 130 a is disposed on the fourth wiring layer 128 of the first build-up structure layer 120 a. Second external line layer 140a configuration on the second circuit layer 118 and part of the third dielectric layer 116 . The first conductive via 150 a penetrates the first build-up structure layer 120 a and the third dielectric layer 116 , and electrically connects the first outer circuit layer 130 a and the second outer circuit layer 140 a to define a signal path L11 . The first conductive via 150a includes a through hole T1 and a conductive material M, wherein the through hole T1 penetrates the first build-up structure layer 120a and the third dielectric layer 116, and the conductive material M covers the inner wall of the through hole T1 and electrically connects the first outer circuit layer 130a and the second outer circuit layer 140a. The second conductive via 160 surrounds the first conductive via 150a and penetrates the first build-up layer 120a, the first circuit layer 117, the first dielectric layer 114, the first inner circuit layer 112a, the core layer 111, the second inner circuit layer 112b, the second dielectric layer 115, and the second circuit layer 118, and is electrically connected to the first outer circuit layer 130a, the first circuit layer 117, the first inner circuit layer 112a, and the second inner circuit layer 112. b and the second circuit layer 118 . The second conductive via 160 includes a through hole T2 and a conductive material M, wherein the through hole T2 runs through the first build-up layer 120a, the first circuit layer 117, the first dielectric layer 114, the first inner circuit layer 112a, the core layer 111, the second inner circuit layer 112b, the second dielectric layer 115 and the second circuit layer 118, and the conductive material M covers the inner wall of the through hole T2 and the first outer circuit layer 130a, the fourth circuit layer 128, the third circuit layer layer 124 , the first circuit layer 117 , the first inner circuit layer 112 a , the second inner circuit layer 112 b and the second circuit layer 118 . The first outer circuit layer 130a, the second conductive via 160, the first circuit layer 117, the outer conductive layer 113b and the second outer circuit layer 140a define a ground path L12 (namely the first ground path), and the ground path L12 surrounds the signal path L11. It should be noted that, according to the magnetic force generated by Ampere's right-hand rule, the ground path L12 preferably passes through the outer layer The conductive layer 113b is as shown in FIG. 1A.

Further, in this embodiment, the first external circuit layer 130a includes a first signal circuit 132a and a first ground circuit 134a. The second outer circuit layer 140a includes a second signal circuit 142a and a second ground circuit 144a. The first signal line 132a, the first conductive via 150a and the second signal line 142a define a signal path L11. The first ground line 134 a , each second conductive via 160 , the first line layer 117 , the outer conductive layer 113 b and the second ground line 144 a define a ground path L12 . Here, the circuit board structure 100a is a ground/signal/ground (GSG) design. Since the signal path L11 is surrounded by the ground path L12 and is closed, a good high-frequency and high-speed loop can be formed.

In short, in this embodiment, the signal path L11 defined by the first signal line 132a, the first conductive via 150a, and the second signal line 142a is surrounded by the ground path L12 defined by the first ground line 134a, each second conductive via 160, the first line layer 117, the outer conductive layer 113b, and the second ground line 144a. That is, the signal path L11 capable of transmitting high-frequency and high-speed signals such as 5G is provided with a well-closed ground path L12, thereby forming a good high-frequency and high-speed loop, so that the circuit board structure 100a of this embodiment can have better signal integrity. Here, the high frequency refers to a frequency greater than 1 GHz; and the high speed refers to a data transmission speed greater than 100 Mbps. Furthermore, it is generally known that high-frequency circuits focus on the speed and quality of transmission signals, and the main factors affecting these two are the electrical characteristics of the transmission material, namely the material permittivity (Dk) and dielectric loss (Df). By reducing the dielectric constant and dielectric loss of the substrate, it can effectively shorten the signal delay (Signal Propagation Delay Time), and can increase the signal transmission rate and reduce the signal transmission loss (Signal Transmission Loss). Furthermore, the first conductive via 150a, the outer conductive layer 113b of the substrate 110a, and the third dielectric layer 116 define a high-frequency and high-speed special conduction through via (speecial through via). On any cross section of the special conduction via, high-frequency high-speed signals pass through the first conductive via 150a and the corresponding outer conductive layer 113b to generate a return signal, forming a high-frequency and high-speed equivalent circuit on the cross-section. Compared with the build-up method of pressing the insulating layer in the prior art to block the inner conductor layer and the outer conductor layer of the coaxial perforation, the manufacturing method of the circuit board structure 100a of this embodiment can avoid the problem of impedance mismatch that affects the integrity of high-frequency signals. In addition, since this embodiment does not use the method of laminating the insulating layer to increase the number of layers of the circuit board, the stacked hole design of the via hole is not used to conduct the adjacent structural layers. Therefore, in addition to overcoming the energy loss of the via hole, the problem of poor thermal stress reliability of the stacked via hole can also be avoided.

It must be noted here that the following embodiments use the component numbers and part of the content of the previous embodiments, wherein the same numbers are used to denote the same or similar components, and descriptions of the same technical content are omitted. For the description of omitted parts, reference may be made to the foregoing embodiments, and the following embodiments will not be repeated.

FIG. 2A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. FIG. 2B is a partial bottom view of the circuit board structure in FIG. 2A . Please refer to FIG. 1A, FIG. 1B, FIG. 2A and FIG. 2B at the same time. The circuit board structure 100b of this embodiment is similar to the above-mentioned circuit board structure 100a. It is placed in the middle, but more biased to one side (such as the right side), which means that it is misplaced.

FIG. 3A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. FIG. 3B is a partial bottom view of the circuit board structure in FIG. 3A . Please refer to FIG. 1A, FIG. 1B, FIG. 3A and FIG. 3B. The circuit board structure 100c of this embodiment is similar to the above-mentioned circuit board structure 100a. The difference between the two is that in this embodiment, the second outer circuit layer 140c connected to the outer conductive layer 113b extends to cover the third dielectric layer 116, and does not align with the outer conductive layer 113b, but overhangs to the third dielectric layer 116. Therefore, compared with the second grounding line 144a in FIG. 1A , the contact area of the second grounding line 144c in this embodiment is larger, which can improve the bonding force between subsequent and electronic components.

FIG. 4A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. FIG. 4B is a partial bottom view of the circuit board structure in FIG. 4A . Please refer to FIG. 1A, FIG. 1B, FIG. 4A and FIG. 4B at the same time. The circuit board structure 100d of this embodiment is similar to the above-mentioned circuit board structure 100a. The difference between the two is that in this embodiment, the circuit board structure 100d further includes a hole-filling material 165, wherein the hole-filling material 165 fills the second conductive via 160, and the opposite sides of the hole-filling material 165 can be respectively aligned with the first external circuit layer 130a and the second external circuit layer 140a. Here, the filling material 165 is not filled in the first conductive via 150a. Here, the material of the hole-filling material 165 is, for example, resin, which can be regarded as a plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.

FIG. 5A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. FIG. 5B is a partial bottom view of the circuit board structure in FIG. 5A . please Referring to Fig. 1A, Fig. 1B, Fig. 5A and Fig. 5B simultaneously, the circuit board structure 100e of this embodiment is similar to the above-mentioned circuit board structure 100a, the difference between the two is: in this embodiment, the circuit board structure 100e also includes a hole-filling material 165, wherein the hole-filling material 165 fills the first conductive via 150a and the second conductive via 160, and the opposite sides of the hole-filling material 165 can be respectively aligned with the first external circuit layer 130a and the second external circuit layer 14 0a. Here, the material of the hole-filling material 165 is, for example, resin, which can be regarded as a plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.

FIG. 6A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. FIG. 6B is a partial bottom view of the circuit board structure in FIG. 6A . Please refer to FIG. 5A, FIG. 5B, FIG. 6A and FIG. 6B at the same time. The circuit board structure 100f of this embodiment is similar to the above-mentioned circuit board structure 100e. The first cover layer 170 covers the first outer circuit layer 130a. The second cover layer 175 covers the second outer circuit layer 140a, wherein the first cover layer 170 and the second cover layer 175 respectively cover opposite ends of the hole-filling material 165 . Here, the material of the first cover layer 170 and the second cover layer 175 can be, for example, copper, but not limited thereto.

FIG. 7A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. FIG. 7B is a partial bottom view of the circuit board structure in FIG. 7A . Please refer to FIG. 5A, FIG. 5B, FIG. 7A and FIG. 7B at the same time. The circuit board structure 100g of this embodiment is similar to the above-mentioned circuit board structure 100e. The first cover layer 172 covers the first outer wiring layer 130a, while the second cover The cover layer 177 covers the second outer circuit layer 140a, wherein the first cover layer 172 and the second cover layer 177 respectively cover opposite ends of the hole-filling material 165 filling the first conductive via 150a, and expose opposite ends of the hole-filling material 165 located in the second conductive via 160. Here, the material of the first cover layer 172 and the second cover layer 177 can be, for example, copper, but not limited thereto.

FIG. 8A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. FIG. 8B is a partial bottom view of the circuit board structure in FIG. 8A . Please refer to FIG. 1A, FIG. 1B, FIG. 8A and FIG. 8B at the same time. The circuit board structure 100h of this embodiment is similar to the above-mentioned circuit board structure 100a. The difference between the two is that in this embodiment, a gap C is formed between the outer conductive layer 113b, the second dielectric layer 115 and the second circuit layer 118, and the third dielectric layer 116 fills up the gap C. In this embodiment, a part of the outer conductive layer 113b is excavated and removed at the edge of the ground layer hole, and filled with the third dielectric layer 116, so that the subsequent processed conductive layer circuit can be fanned out through the gap C, which means that the second signal circuit 142a is extended, and the contact area of the circuit board structure 100h for subsequent bonding with electronic components can be increased, and the second ground circuit 144a will not be connected and shorted.

FIG. 9 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 1A and FIG. 9 at the same time. The circuit board structure 100i of this embodiment is similar to the above circuit board structure 100a. The difference between the two is that in this embodiment, the first build-up structure layer 120i includes a fourth dielectric layer 122 and a third circuit layer 124 disposed on the fourth dielectric layer 122, and the first external circuit layer 130a is directly disposed on the third circuit layer 124.

FIG. 10 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 9 and FIG. 10 at the same time. The circuit board structure 100j of this embodiment is similar to the above-mentioned circuit board structure 100i. The difference between the two is that in this embodiment, the circuit board structure 100j further includes a second build-up layer 180j disposed on the second circuit layer 118 and part of the third dielectric layer 116, wherein the second build-up structure layer 180j includes a sixth dielectric layer 182 and a fifth circuit layer 184 disposed on the sixth dielectric layer 182. And the second outer circuit layer 140 a is located on the fifth circuit layer 184 .

FIG. 11 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 1A and FIG. 11 at the same time. The circuit board structure 100k of this embodiment is similar to the above-mentioned circuit board structure 100a. The difference between the two is that in this embodiment, the circuit board structure 100k further includes a second build-up layer 180k, which is disposed on the second circuit layer 118 and part of the third dielectric layer 116, wherein the second build-up structure layer 180k includes a sixth dielectric layer 182 and a fifth circuit layer 184 disposed on the sixth dielectric layer 182. , and the second outer circuit layer 140 a is located on the fifth circuit layer 184 .

FIG. 12 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 11 and FIG. 12 at the same time. The circuit board structure 100m of this embodiment is similar to the above-mentioned circuit board structure 100k. The difference between the two is that in this embodiment, the second build-up structure layer 180m includes a sixth dielectric layer 182, a fifth circuit layer 184, a seventh dielectric layer 186 and a sixth circuit layer 188. The sixth dielectric layer 182 is disposed on the second circuit layer 118 and the third dielectric layer 116 . The fifth circuit layer 184 is disposed on the sixth dielectric layer 182 , and the seventh dielectric layer 186 is disposed on the fifth circuit layer 184 and the sixth dielectric layer 182 . The sixth circuit layer 188 is disposed on the seventh dielectric layer 186 , and the second outer circuit layer 140 a is configured on the sixth circuit layer 188 .

FIG. 13 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. In order to achieve the purpose of impedance matching, the layout of the grounding line can be not only the design of through holes, but also the design of blind holes. Please refer to FIG. 11 and FIG. 13 at the same time. The circuit board structure 100n of this embodiment is similar to the above-mentioned circuit board structure 100k. The difference between the two is that in this embodiment, the first build-up structure layer 120n further includes at least one first conductive blind hole 125, wherein the first conductive blind hole 125 penetrates the fourth circuit layer 128 and the fifth dielectric layer 126 and electrically connects the first outer circuit layer 130a, the fourth circuit layer 128 and the third circuit layer 124. The second build-up structure layer 180n further includes at least one second conductive blind hole 185 , wherein the second conductive blind hole 185 penetrates the fifth circuit layer 184 and the sixth dielectric layer 182 and electrically connects the second outer circuit layer 140a, the fifth circuit layer 184 and the second circuit layer 118 .

FIG. 14 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 13 and FIG. 14 at the same time. The circuit board structure 100p of this embodiment is similar to the circuit board structure 100n described above. The difference between the two is that in this embodiment, the first conductive blind hole 127 of the first build-up structure layer 120p penetrates through the fourth circuit layer 128, the fifth dielectric layer 126 and the fourth dielectric layer 122 and is electrically connected to the first external circuit layer 130a, the fourth circuit layer 128 and the first circuit layer 117 of the substrate 110a.

FIG. 15A is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. FIG. 15B is a partial bottom view of the circuit board structure in FIG. 15A . Please refer to FIG. 1A, FIG. 1B, FIG. 15A and FIG. 15B at the same time. The circuit board structure 100q of this embodiment is similar to the above-mentioned circuit board structure 100a. The difference between the two lies in: In this embodiment, the circuit board structure 100q includes two first conductive vias 150a. The first signal line 132q, the two first conductive vias 150a and the second signal line 142q define two signal paths L21. The first ground line 134q, each second conductive via 160, the first line layer 117, the outer conductive layer 113b and the second ground line 144q define a ground path L22. Here, the circuit board structure 100q is a ground/signal/signal/ground (GSSG) design. Since the two signal paths L21 are surrounded by the ground path L22 and are closed, a good high-frequency and high-speed loop can be formed.

FIG. 16 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 15A and FIG. 16 at the same time. The circuit board structure 100r of this embodiment is similar to the above-mentioned circuit board structure 100q. The difference between the two is that in this embodiment, the circuit board structure 100r further includes a hole-filling material 165, wherein the hole-filling material 165 fills the second conductive via 160, and the opposite sides of the hole-filling material 165 can be respectively aligned with the first external circuit layer 130q and the second external circuit layer 140q. Here, the filling material 165 is not filled in the two first conductive vias 150a. Here, the material of the hole-filling material 165 is, for example, resin, which can be regarded as a plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.

FIG. 17 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 15A and FIG. 17 at the same time. The circuit board structure 100s of this embodiment is similar to the above-mentioned circuit board structure 100q. The difference between the two is that in this embodiment, the circuit board structure 100s further includes a hole-filling material 165, wherein the hole-filling material 165 fills the two first conductive vias 150a and the second conductive vias 160, and the opposite sides of the hole-filling material 165 can be respectively aligned with the first external circuit layer 130q and the second external circuit layer. 140q. Here, the material of the hole-filling material 165 is, for example, resin, which can be regarded as a plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.

FIG. 18 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 17 and FIG. 18 at the same time. The circuit board structure 100t of this embodiment is similar to the above-mentioned circuit board structure 100s. The difference between the two is that in this embodiment, the circuit board structure 100t further includes a first cover layer 170 and a second cover layer 175 . The first cover layer 170 covers the first outer circuit layer 130q. The second cover layer 175 covers the second outer circuit layer 140q, wherein the first cover layer 170 and the second cover layer 175 respectively cover opposite ends of the hole-filling material 165 . Here, the material of the first cover layer 170 and the second cover layer 175 can be, for example, copper, but not limited thereto.

FIG. 19 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 17 and FIG. 19 at the same time. The circuit board structure 100u of this embodiment is similar to the above-mentioned circuit board structure 100s. The difference between the two is that in this embodiment, the circuit board structure 100u further includes a first cover layer 172 and a second cover layer 177. The first cover layer 172 covers the first outer circuit layer 130q, and the second cover layer 177 covers the second outer circuit layer 140q, wherein the first cover layer 172 and the second cover layer 177 respectively cover opposite ends of the hole-filling material 165 filling the two first conductive vias 150a, and expose opposite ends of the hole-filling material 165 located in the second conductive via 160. Here, the material of the first cover layer 172 and the second cover layer 177 can be, for example, copper, but not limited thereto. .

FIG. 20 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to Figure 15A and Figure 20 at the same time, the circuit board structure of this embodiment 100v is similar to the above circuit board structure 100q, the difference between the two is that in this embodiment, the circuit board structure 100v also includes a third conductive via 190, which runs through the first build-up structure layer 120a, the first circuit layer 117, the first dielectric layer 114, the first inner circuit layer 112a, the core layer 111, the second inner circuit layer 112b, the second dielectric layer 115 and the second circuit layer 118, and is structurally and electrically connected to the first external circuit Layer 130v, fourth wiring layer 128, third wiring layer 124, first wiring layer 117, first inner wiring layer 112a, second inner wiring layer 112b, second wiring layer 118 and second outer wiring layer 140v. Here, the third conductive via 190 is located between the first conductive vias 150a, and the first signal line 132v, the third conductive via 190, the first circuit layer 117, the outer conductive layer 113b and the second ground line 144v define a ground path L33 (ie, the second ground path), and the signal path L31 is located between the ground path L32 and the ground path L33. The signal path L31 defined by the first signal line 132v, the first conductive via 150a, and the second signal line 142v is defined by the first ground line 134v, the second conductive via 160, the first circuit layer 117, the outer conductive layer 113b, and the second ground path L32 defined by the second ground line 144q; The grounding path L33 defined by the grounding line 144q is surrounded and closed, so a good high-frequency and high-speed loop can be formed. Here, the circuit board structure 100v is a ground/signal/ground/signal/ground (GSGSG) design.

FIG. 21 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 20 and FIG. 21 at the same time. The circuit board structure 100w of this embodiment is similar to the above-mentioned circuit board structure 100v. The difference between the two lies in: in this embodiment In one example, the circuit board structure 100w further includes a hole-filling material 165, wherein the hole-filling material 165 fills the second conductive via 160 and the third conductive via 190, and opposite sides of the hole-filling material 165 can be respectively aligned with the first outer circuit layer 130v and the second outer circuit layer 140v. Here, the filling material 165 is not filled in the first conductive via 150a. Here, the material of the hole-filling material 165 is, for example, resin, which can be regarded as a plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.

FIG. 22 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 20 and FIG. 22 at the same time. The circuit board structure 100x of this embodiment is similar to the above-mentioned circuit board structure 100v. The difference between the two is that in this embodiment, the circuit board structure 100x further includes a hole filling material 165, wherein the hole filling material 165 fills the first conductive via 150a, the second conductive via 160 and the third conductive via 190, and the opposite sides of the hole filling material 165 can be respectively aligned with the first external circuit layer 130v and the second external circuit layer 1. 40v. Here, the material of the hole-filling material 165 is, for example, resin, which can be regarded as a plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05.

FIG. 23 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 22 and FIG. 23 at the same time. The circuit board structure 100y of this embodiment is similar to the above-mentioned circuit board structure 100x. The first cover layer 170 covers the first outer circuit layer 130v. The second cover layer 175 covers the second outer circuit layer 140v, wherein the first cover layer 170 and the second cover layer 175 respectively cover opposite ends of the hole-filling material 165 . Here, the material of the first cover layer 170 The material of the material and the second cover layer 175 can be, for example, copper, but not limited thereto.

FIG. 24 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 22 and FIG. 24 at the same time. The circuit board structure 100z of this embodiment is similar to the above-mentioned circuit board structure 100x. The difference between the two is that in this embodiment, the circuit board structure 100z further includes a first cover layer 172 and a second cover layer 177. The first cover layer 172 covers the first outer circuit layer 130v, and the second cover layer 177 covers the second outer circuit layer 140v, wherein the first cover layer 172 and the second cover layer 177 respectively cover opposite ends of the hole-filling material 165 filling the first conductive via 150a, and expose opposite ends of the hole-filling material 165 located in the second conductive via 160. Here, the material of the first cover layer 172 and the second cover layer 177 can be, for example, copper, but not limited thereto.

FIG. 25A is a schematic top view of a circuit board structure according to another embodiment of the present invention. Fig. 25B is a schematic cross-sectional view along line A-A of Fig. 25A. Fig. 25C is a schematic cross-sectional view along line B-B of Fig. 25A. Please refer to FIG. 6A, FIG. 25A and FIG. 25B at the same time. The circuit board structure 200a of this embodiment is similar to the above-mentioned circuit board structure 100f. The wiring layer 218 is connected to the fourth dielectric layer 222 and the second outer wiring layer 140a. Furthermore, please refer to FIG. 25C, the first build-up structure layer 220a of this embodiment further includes at least one first conductive blind hole 225, wherein the first conductive blind hole 225 penetrates through the fourth circuit layer 228 and the fifth dielectric layer 226 and is electrically connected to the first external circuit The layer 130a, the fourth circuit layer 228 and the third circuit layer 224 can achieve the purpose of impedance matching. In addition, the first ground line 134a, the first conductive blind hole 225 and the third line layer 224 define a ground path L13, and the ground path L13 surrounds the first signal line 132a in a closed manner, thus forming a good high-frequency and high-speed loop. Here, one side of the circuit board structure 200a is a fan-out design.

FIG. 26 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 25C and FIG. 26 at the same time. The circuit board structure 200b of this embodiment is similar to the above-mentioned circuit board structure 200a. The difference between the two is that in this embodiment, the base 210b further has a plurality of third openings 219, wherein the second grounding line 144a, the outer conductive layer 213b and the second inner circuit layer 212b define a grounding path L14, and the grounding path L14 surrounds the second signal line 142a in a closed manner, so it can form a good high-frequency high-speed circuit. Here, opposite sides of the circuit board structure 200b are fan-out designs.

FIG. 27A is a schematic top view of a circuit board structure according to another embodiment of the present invention. Fig. 27B is a schematic cross-sectional view along line C-C of Fig. 27A. FIG. 27C is a schematic cross-sectional view along line D-D of FIG. 27A. Please refer to FIG. 11, FIG. 27A and FIG. 27B at the same time. The circuit board structure 200c of this embodiment is similar to the above-mentioned circuit board structure 100f. The difference between the two is that in this embodiment, the circuit board structure 200c further includes a hole-filling material 165, a first cover layer 170 and a second cover layer 175. The hole filling material 165 fills up the first conductive via 150 a and the second conductive via 160 , and opposite sides of the hole filling material 165 can be aligned with the first outer circuit layer 130 a and the second outer circuit layer 140 a respectively. Here, the material of the hole filling material 165 is, for example, resin, which can be regarded as a plug A porogen, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05. The first cover layer 170 covers the first outer circuit layer 130a. The second cover layer 175 covers the second outer circuit layer 140a, wherein the first cover layer 170 and the second cover layer 175 respectively cover opposite ends of the hole-filling material 165 . Here, the material of the first cover layer 170 and the second cover layer 175 can be, for example, copper, but not limited thereto. Furthermore, please refer to FIG. 27C, the first grounding line 134a, the first conductive blind hole 225 and the third line layer 224 define a grounding path L13, and the grounding path L13 surrounds the first signal line 132a in a closed manner, so a good high-frequency and high-speed loop can be formed. In addition, the second build-up structure layer 280c further includes at least one second conductive blind hole 285 , wherein the second conductive blind hole 285 penetrates through the fifth circuit layer 284 and the sixth dielectric layer 282 and electrically connects the second outer circuit layer 140a, the fifth circuit layer 284 and the second circuit layer 118 . The second ground line 144a, the second conductive blind hole 285 and the second line layer 118 define a ground path L15, and the ground path L15 surrounds the second signal line 142a in a closed manner, thus forming a good high-frequency and high-speed loop.

FIG. 28A is a schematic top view of a circuit board structure according to another embodiment of the present invention. Fig. 28B is a schematic cross-sectional view along line E-E of Fig. 28A. In order to achieve the purpose of impedance matching, the layout of the grounding line can be not only the design of through holes, but also the design of blind holes. Please refer to FIG. 27B, FIG. 28A and FIG. 28B at the same time. The circuit board structure 200d of this embodiment is similar to the above-mentioned circuit board structure 200c. The difference between the two is that in this embodiment, the first build-up layer 220d further includes at least one first conductive blind hole 225, wherein the first conductive blind hole 225 penetrates the fourth circuit layer 228 and the fifth dielectric layer 226 and is electrically connected to the first external circuit layer 130a and the fourth circuit layer 228. and the third circuit layer 224 . The second build-up structure layer 280d further includes at least one second conductive blind hole 285 , wherein the second conductive blind hole 285 penetrates the fifth circuit layer 284 and the sixth dielectric layer 282 and electrically connects the second outer circuit layer 140a, the fifth circuit layer 284 and the second circuit layer 118 .

FIG. 29 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 28B and FIG. 29 at the same time. The circuit board structure 200e of this embodiment is similar to the above-mentioned circuit board structure 200d. The difference between the two is that in this embodiment, the first conductive blind hole 227 of the first build-up structure layer 220c penetrates the fourth circuit layer 228, the fifth dielectric layer 226 and the fourth dielectric layer 222 and is electrically connected to the first external circuit layer 130a, the fourth circuit layer 228 and the first circuit layer 117. The first signal line 132a, the first conductive via 150a and the second signal line 142a define a signal path L41. The first ground line 134 a , the first conductive blind hole 227 , the first line layer 117 , the outer conductive layer 113 b , the second line layer 118 , the second conductive blind hole 285 and the second ground line 144 a define a ground path L42 . Since the signal path L41 is surrounded by the ground path L42 and is closed, a good high-frequency and high-speed loop can be formed.

FIG. 30 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 6A and FIG. 30 at the same time. The circuit board structure 200f of this embodiment is similar to the above-mentioned circuit board structure 100f. The difference between the two is that: in this embodiment, the circuit board structure 200f further includes at least one pad P, which is disposed in the fourth dielectric layer 122 and connected to the first conductive via 150a to achieve impedance matching. Here, the pad P can be regarded as a kind of internal signal circuit pattern.

Figure 31 is a cross-section of a circuit board structure according to another embodiment of the present invention Surface diagram. Please refer to FIG. 8A and FIG. 31 at the same time. The circuit board structure 200g of this embodiment is similar to the above-mentioned circuit board structure 100h. The difference between the two is that in this embodiment, the circuit board structure 200g further includes a hole-filling material 165, a first cover layer 170 and a second cover layer 175. The hole filling material 165 fills up the first conductive via 150 a and the second conductive via 160 , and opposite sides of the hole filling material 165 can be aligned with the first outer circuit layer 130 a and the second outer circuit layer 140 a respectively. Here, the material of the hole-filling material 165 is, for example, resin, which can be regarded as a plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05. The first cover layer 170 covers the first outer circuit layer 130a. The second cover layer 175 covers the second outer circuit layer 140a, wherein the first cover layer 170 and the second cover layer 175 respectively cover opposite ends of the hole-filling material 165 . Here, the material of the first cover layer 170 and the second cover layer 175 can be, for example, copper, but not limited thereto. In addition, the circuit board structure 200g of this embodiment further includes at least one pad P disposed in the fourth dielectric layer 122 and connected to the first conductive via 150a to achieve impedance matching. Here, the pad P can be regarded as a kind of internal signal circuit pattern.

FIG. 32 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 11 and FIG. 32 at the same time. The circuit board structure 200h of this embodiment is similar to the above-mentioned circuit board structure 100k. The difference between the two is that in this embodiment, the circuit board structure 200h further includes a hole-filling material 165, a first cover layer 170 and a second cover layer 175. The hole filling material 165 fills up the first conductive via 150 a and the second conductive via 160 , and opposite sides of the hole filling material 165 can be aligned with the first outer circuit layer 130 a and the second outer circuit layer 140 a respectively. Here, the material of the hole-filling material 165 is, for example, resin, which can be regarded as a plugging agent, or the dielectric constant is higher than 3.6 and the dielectric constant is higher than 3.6. Dielectric materials with losses below 0.05. The first cover layer 170 covers the first outer circuit layer 130a. The second cover layer 175 covers the second outer circuit layer 140a, wherein the first cover layer 170 and the second cover layer 175 respectively cover opposite ends of the hole-filling material 165 . Here, the material of the first cover layer 170 and the second cover layer 175 can be, for example, copper, but not limited thereto. In addition, the circuit board structure 200h of this embodiment further includes at least one pad P disposed in the fourth dielectric layer 122 and connected to the first conductive via 150a to achieve impedance matching. Here, the pad P can be regarded as a kind of internal signal circuit pattern.

FIG. 33 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 13 and FIG. 33 at the same time. The circuit board structure 200i of this embodiment is similar to the above-mentioned circuit board structure 100n. The difference between the two is that in this embodiment, the circuit board structure 200i further includes a hole-filling material 165, a first cover layer 170 and a second cover layer 175. The hole filling material 165 fills up the first conductive via 150 a and the second conductive via 160 , and opposite sides of the hole filling material 165 can be aligned with the first outer circuit layer 130 a and the second outer circuit layer 140 a respectively. Here, the material of the hole-filling material 165 is, for example, resin, which can be regarded as a plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05. The first cover layer 170 covers the first outer circuit layer 130a. The second cover layer 175 covers the second outer circuit layer 140a, wherein the first cover layer 170 and the second cover layer 175 respectively cover opposite ends of the hole-filling material 165 . Here, the material of the first cover layer 170 and the second cover layer 175 can be, for example, copper, but not limited thereto. In addition, the circuit board structure 200i of this embodiment further includes at least one pad P disposed in the fourth dielectric layer 122 and connected to the first conductive via 150a to achieve impedance matching. Here, the pad P can be regarded as a kind of internal signal circuit pattern.

FIG. 34 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 14 and FIG. 34 at the same time. The circuit board structure 200j of this embodiment is similar to the above-mentioned circuit board structure 100p. The difference between the two is that in this embodiment, the circuit board structure 200j further includes a hole-filling material 165, a first cover layer 170, and a second cover layer 175. The hole filling material 165 fills up the first conductive via 150 a and the second conductive via 160 , and opposite sides of the hole filling material 165 can be aligned with the first outer circuit layer 130 a and the second outer circuit layer 140 a respectively. Here, the material of the hole-filling material 165 is, for example, resin, which can be regarded as a plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05. The first cover layer 170 covers the first outer circuit layer 130a. The second cover layer 175 covers the second outer circuit layer 140a, wherein the first cover layer 170 and the second cover layer 175 respectively cover opposite ends of the hole-filling material 165 . Here, the material of the first cover layer 170 and the second cover layer 175 can be, for example, copper, but not limited thereto. In addition, the circuit board structure 200j of this embodiment further includes at least one pad P disposed in the fourth dielectric layer 122 and connected to the first conductive via 150a to achieve impedance matching. Here, the pad P can be regarded as a kind of internal signal circuit pattern.

FIG. 35 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 12 and FIG. 35 at the same time. The circuit board structure 200k of this embodiment is similar to the above-mentioned circuit board structure 100m. The difference between the two is that in this embodiment, the circuit board structure 200k further includes a hole-filling material 165, a first cover layer 170 and a second cover layer 175. The hole filling material 165 fills up the first conductive via 150 a and the second conductive via 160 , and opposite sides of the hole filling material 165 can be aligned with the first outer circuit layer 130 a and the second outer circuit layer 140 a respectively. Here, the material of the hole filling material 165 The material is, for example, a resin, which can be regarded as a plugging agent, or a dielectric material with a dielectric constant higher than 3.6 and a dielectric loss lower than 0.05. The first cover layer 170 covers the first outer circuit layer 130a. The second cover layer 175 covers the second outer circuit layer 140a, wherein the first cover layer 170 and the second cover layer 175 respectively cover opposite ends of the hole-filling material 165 . Here, the material of the first cover layer 170 and the second cover layer 175 can be, for example, copper, but not limited thereto. In addition, the circuit board structure 200k of this embodiment further includes at least one pad P disposed in the fourth dielectric layer 122 and connected to the first conductive via 150a to achieve impedance matching. Here, the pad P can be regarded as a kind of internal signal circuit pattern.

It should be noted that, in order to achieve the purpose of impedance matching, it can be achieved by designing the surface signal line pattern (as shown in Figure 1A, Figure 15A, and Figure 20), the internal signal line pattern (as shown in Figure 30 to Figure 35, pad P), the displacement of coaxial vias (as shown in the misplaced setting in Figure 2A), or the layout of grounding vias and/or blind holes (as shown in Figure 1A, Figure 13 or Figure 14).

FIG. 36 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 25B and FIG. 36 at the same time. The circuit board structure 200m of this embodiment is similar to the above-mentioned circuit board structure 200a. The difference between the two is that in this embodiment, a first side 168 and a second side 169 of the hole filling material 167 opposite to each other have a height difference D1 with a first surface 226a of the fifth dielectric layer 226 and a second surface 215a of the second dielectric layer 215 respectively, and the range of the height difference D1 is, for example, greater than minus 30 microns to less than plus 30 microns. Here, the first side 168 of the hole filling material 167 is higher than the first surface 226a of the fifth dielectric layer 226, that is, the first side 168 of the hole filling material 167 protrudes from the first surface 226a of the fifth dielectric layer 226, and the height difference D1 is plus 30 microns. and the second side 169 of the hole filling material 167 is higher than the second surface 215a of the second dielectric layer 215, that is, the second side 169 of the hole filling material 167 is concave in the second surface 215a of the second dielectric layer 215, and the height difference is minus 30 microns. In addition, the two opposite surfaces 216a, 216b of the third dielectric layer 216 of the substrate 210a' of this embodiment are also lower than the surface 217a of the first wiring layer 217 and higher than the surface 218a of the second wiring layer 218, that is, the third dielectric layer 216 is recessed between the first wiring layer 217 and the second wiring layer 218, wherein there is a height between the surface 216b of the third dielectric layer 216 and the surface 218a of the second wiring layer 218 The difference D2, so that the range of the height difference D2 is, for example, greater than minus 30 microns to equal to 0 microns. Here, since the third dielectric layer 216 is recessed in the second circuit layer 218 , the height difference D2 is minus 30 microns. If the third dielectric layer 216 is aligned with the second circuit layer 218 , the height difference is 0 microns. Accordingly, the circuit board structure 200m of this embodiment can have better electrical performance.

To sum up, in the design of the circuit board structure of the present invention, the first conductive via is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path, and the first external circuit layer, the second conductive via hole, the first circuit layer, the outer conductive layer, and the second external circuit layer define a ground path, and the ground path surrounds the signal path. In this way, a good high-frequency and high-speed signal loop can be formed, and the subsequent application of integrated circuits and antennas can also solve the problem of signal interference on the same plane, reduce signal energy loss and noise interference, and improve signal transmission reliability.

Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention, so the protection scope of the present invention The one defined in the scope of the appended patent application shall prevail.

200a: circuit board structure

210a: Base

211: core layer

212a: the first inner circuit layer

212b: the second inner circuit layer

214: the first dielectric layer

215: second dielectric layer

217: The first line layer

218: Second line layer

220a: the first build-up structure layer

222: The fourth dielectric layer

224: Third line layer

226: fifth dielectric layer

228: The fourth line layer

130a: the first external line layer

132a: The first signal line

134a: the first grounding line

140a: the second external line layer

142a: Second signal line

144a: second grounding line

170: The first cover layer

175: Second cover layer

219: The third opening

L11: signal path

L12: Ground path

Claims (22)

A circuit board structure, comprising: a substrate having at least one first opening and including a core layer, a first inner circuit layer, a second inner circuit layer, an inner conductive layer, a first dielectric layer, a second dielectric layer, a third dielectric layer, a first circuit layer, a second circuit layer and an outer conductive layer, the first inner circuit layer and the second inner circuit layer are arranged on opposite sides of the core layer, the core layer has a plurality of second openings, and the inner conductive layer covers the inner walls of the second openings and Connecting the first inner circuit layer and the second inner circuit layer, the first dielectric layer covers the first inner circuit layer and is located between the first inner circuit layer and the first circuit layer, the second dielectric layer covers the second inner circuit layer and is located between the second inner circuit layer and the second circuit layer, the at least one first opening is located between the second openings and runs through the first circuit layer, the first dielectric layer, the first inner circuit layer, the core layer, the second inner circuit layer and the second dielectric layer, and the outer conductive layer covering the inner wall of the at least one first opening and connecting the first wiring layer, the first inner wiring layer, the second inner wiring layer and the second wiring layer, the third dielectric layer filling the at least one first opening; a first build-up layer, disposed on the first wiring layer; a first outer wiring layer, disposed on the first build-up structural layer; a second outer wiring layer, disposed on the second wiring layer and partially on the third dielectric layer; electrically connecting the first external circuit layer and the second external circuit layer, and defining and a plurality of second conductive vias, surrounding the at least one first conductive via and penetrating the first build-up structure layer, the first circuit layer, the first dielectric layer, the first inner circuit layer, the core layer, the second inner circuit layer, the second dielectric layer and the second circuit layer, and electrically connecting the first external circuit layer, the first circuit layer, the first internal circuit layer, the second internal circuit layer and the second circuit layer, the first external circuit layer, the second conductive via hole, the first circuit layer, The outer conductive layer and the second outer circuit layer define a first ground path, and the first ground path surrounds the signal path. For example, the circuit board structure described in the request 1, where the first additional layer structure layer includes the first fourth media layer, the first third line layer, the first fifth media layer, and the first line layer. , And the fourth line layer is configured on the fifth media layer, and the first external line layer is configured on the fourth line layer. The circuit board structure according to claim 2 further includes: a second build-up structure layer disposed on the second circuit layer and part of the third dielectric layer, and the second outer circuit layer is located on the second build-up structure layer. The circuit board structure as described in claim 3, wherein the first build-up structure layer further includes at least one first conductive blind hole penetrating the fifth dielectric layer and the fourth circuit layer and electrically connecting the first external circuit layer, the fourth circuit layer and the third circuit layer, and the second build-up structure layer further includes at least one second conductive blind hole penetrating the second build-up structure layer and electrically connecting the second external circuit layer and the second circuit layer. The circuit board structure as described in claim 3, wherein the first build-up structure layer further includes at least one first conductive blind hole penetrating the fifth dielectric layer and the fourth dielectric layer and electrically connecting the first external circuit layer and the first circuit layer, and the second build-up structure layer further includes at least one second conductive blind hole penetrating the second build-up structure layer and electrically connecting the second external circuit layer and the second circuit layer. The circuit board structure as claimed in item 2, wherein the substrate further has at least one third opening, which runs through the first wiring layer, the first dielectric layer, the first inner wiring layer, the core layer, the second inner wiring layer, the second dielectric layer, and the second wiring layer, and communicates with the fourth dielectric layer and the second outer wiring layer. The circuit board structure according to claim 6, wherein the first build-up structure layer further includes at least one first conductive blind hole penetrating through the fifth dielectric layer and the fourth circuit layer and electrically connecting the first outer circuit layer, the fourth circuit layer and the third circuit layer. The circuit board structure according to claim 2, further comprising: at least one pad disposed in the fourth dielectric layer of the first build-up structure layer and connected to the at least one first conductive via. The circuit board structure according to claim 1, wherein a gap is formed between the outer conductive layer, the second dielectric layer and the second circuit layer, and the third dielectric layer further fills up the gap. The circuit board structure according to claim 1, further comprising: a hole filling material, at least filling up the second conductive vias. The circuit board structure as claimed in claim 10, wherein the hole-filling material further fills up the at least one first conductive via. The circuit board structure as described in claim 11, further comprising: a first cover layer covering the first external circuit layer; and a second cover layer covering the second external circuit layer, wherein the first cover layer and the second cover layer respectively cover the two ends of the hole-filling material. The circuit board structure as described in claim 11, further comprising: a first cover layer covering the first external circuit layer; and a second cover layer covering the second external circuit layer, wherein the first cover layer and the second cover layer respectively cover two ends of the hole filling material filling the at least one first conductive via, and expose two ends of the hole filling material located in the second conductive via holes. The circuit board structure as claimed in claim 1, wherein the at least one first conductive via comprises two first conductive vias. The circuit board structure as claimed in claim 14 further comprises: a hole filling material, at least filling up the second conductive vias. The circuit board structure as described in claim 15, further comprising: a first cover layer covering the first external circuit layer; and a second cover layer covering the second external circuit layer, wherein the first cover layer and the second cover layer respectively cover at least two ends of the hole-filling material filling the first conductive vias. The circuit board structure as described in claim 14, further comprising: a third conductive via, penetrating through the first build-up layer, the first wiring layer, the first dielectric layer, the first inner wiring layer, the core layer, the second inner wiring layer, the second dielectric layer, and the second wiring layer, and electrically connecting the first outer wiring layer, the first circuit layer, the first inner circuit layer, the second inner circuit layer, and the second circuit layer, the third conductive via is located between the first conductive vias, and the first external circuit layer, the third conductive via, the first circuit layer, the outer conductive layer and the second external circuit layer define a second ground path, and the signal path is located between the first ground path and the second ground path. The circuit board structure according to claim 17, further comprising: a hole-filling material, at least filling up the second conductive vias and the third conductive vias. The circuit board structure as claimed in claim 18, further comprising: a first cover layer covering the first external circuit layer; and a second cover layer covering the second external circuit layer, wherein the first cover layer and the second cover layer respectively cover at least two ends of the hole-filling material filling the first conductive vias. The circuit board structure as described in claim 1, wherein the first external circuit layer includes a first signal circuit and a first ground circuit, and the second external circuit layer includes a second signal circuit and a second ground circuit, the first signal circuit, the at least one first conductive via and the second signal circuit define the signal path, the first ground circuit, each of the second conductive vias, the first circuit layer, the outer conductive layer and the second ground circuit define the first ground path. The circuit board structure as described in claim 1, further comprising: a hole filling material, at least filling up the second conductive vias, wherein the first build-up structure layer includes a fourth dielectric layer, a third circuit layer, a fifth dielectric layer and a fourth circuit layer, the fourth dielectric layer is disposed on the first circuit layer and the third dielectric layer above, the third circuit layer is disposed on the fourth dielectric layer, the fifth dielectric layer is disposed on the third circuit layer and the fourth dielectric layer, and the fourth circuit layer is disposed on the fifth dielectric layer, and the first outer circuit layer is disposed on the fourth circuit layer, a first side and a second side of the hole-filling material opposite to each other have a height difference from a first surface of the fifth dielectric layer and a second surface of the second dielectric layer, and the height difference ranges from greater than minus 30 microns to less than plus 30 microns between. The circuit board structure as claimed in item 1, wherein the third dielectric layer is recessed between the surface of the first wiring layer and the surface of the second wiring layer, and there is a height difference between the surface of the third dielectric layer and the surface of the second wiring layer, and the range of the height difference is greater than minus 30 microns to equal to 0 microns.

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