TW202312803A - Method of manufacturing a circuit board - Google Patents

Method of manufacturing a circuit board Download PDF

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TW202312803A
TW202312803A TW110134495A TW110134495A TW202312803A TW 202312803 A TW202312803 A TW 202312803A TW 110134495 A TW110134495 A TW 110134495A TW 110134495 A TW110134495 A TW 110134495A TW 202312803 A TW202312803 A TW 202312803A
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auxiliary
layer
conductive
circuit board
pattern
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TW110134495A
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Chinese (zh)
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TWI792566B (en
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肖應敏
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大陸商宏啟勝精密電子(秦皇島)有限公司
大陸商鵬鼎控股(深圳)股份有限公司
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  • Manufacturing Of Printed Wiring (AREA)

Abstract

A method of manufacturing a circuit board includes: providing a metal substrate including a dielectric layer and a metal foil stacked together; pressing a photosensitive layer on the metal foil and exposing and developing the photosensitive layer to form a photosensitive pattern layer, wherein the photosensitive pattern layer includes a plurality of wiring grooves and at least one auxiliary groove between two adjacent wiring grooves; electroplating to form wiring portions corresponding to the wiring grooves and at least one auxiliary conductive portion corresponding to the at least one auxiliary groove, wherein the wiring portions and the at least one auxiliary conductive portion together form a conductive pattern layer; removing the photosensitive pattern layer, and removing a portion of the metal foil exposing from the conductive pattern layer by quickly etching, thereby forming a conductive design layer by the metal foil corresponding to the conductive pattern layer, wherein the wiring portions and portions of the conductive design layer corresponding to the wiring portions together form conductive wiring lines, the at least one auxiliary conductive portion and at least one portion of the conductive design layer corresponding to the at least one auxiliary conductive portion together form an auxiliary pattern; and removing the auxiliary pattern.

Description

電路板的製作方法How to make a circuit board

本申請涉及電路板領域,尤其涉及一種電路板的製作方法。The present application relates to the field of circuit boards, in particular to a method for manufacturing a circuit board.

隨著電子產品的多樣化,對電路板的精度要求日益增加。然,面對線路分佈相對稀疏的電路板,其在電鍍製作線路時容易產生電鍍厚度不均勻的問題。With the diversification of electronic products, the precision requirements for circuit boards are increasing. However, in the face of circuit boards with relatively sparse distribution of circuits, the problem of uneven plating thickness is likely to occur when making circuits by electroplating.

有鑑於此,本申請提供一種有利於降低電鍍不均勻的電路板的製作方法。In view of this, the present application provides a method for manufacturing a circuit board that is beneficial to reduce uneven plating.

一種電路板的製作方法,包括以下步驟:A method for manufacturing a circuit board, comprising the steps of:

提供一金屬基板,包括介電層及設置於所述金屬基板表面的金屬箔;A metal substrate is provided, including a dielectric layer and a metal foil disposed on the surface of the metal substrate;

在所述金屬箔背離所述介電層的一側壓合感光膜,並對所述感光膜進行曝光顯影形成感光圖形層,其中,所述圖形層包括多個線槽及位於相鄰二所述線槽之間的至少一輔助槽;A photosensitive film is pressed on the side of the metal foil away from the dielectric layer, and the photosensitive film is exposed and developed to form a photosensitive graphic layer, wherein the graphic layer includes a plurality of line grooves and is located between two adjacent at least one auxiliary groove between the wire grooves;

電鍍以對應所述線槽形成線路部並對應所述輔助槽形成輔助導電部,其中,所述線路部及所述輔助導電部共同形成導電圖形層;electroplating to form a line part corresponding to the line groove and an auxiliary conductive part corresponding to the auxiliary groove, wherein the line part and the auxiliary conductive part jointly form a conductive pattern layer;

去除所述感光圖形層,並藉由快速蝕刻以去除所述金屬箔未被所述導電圖形層覆蓋而裸露的部分,從而將所述金屬箔製成與所述導電圖形層對應的導電圖案層,其中,所述線路部與所述導電圖案層中與所述線路部對應的部分構成導電線路,所述輔助導電部與所述導電圖案層中與所述輔助導電部對應的部分構成輔助圖形;及removing the photosensitive pattern layer, and removing the exposed part of the metal foil not covered by the conductive pattern layer by rapid etching, so that the metal foil is made into a conductive pattern layer corresponding to the conductive pattern layer , wherein, the line part and the part corresponding to the line part in the conductive pattern layer form a conductive line, and the auxiliary conductive part and the part corresponding to the auxiliary conductive part in the conductive pattern layer form an auxiliary pattern ;and

去除所述輔助圖形。Remove the auxiliary graphics.

作為本申請一種方案,所述輔助圖形藉由蝕刻的方式去除。As a solution of the present application, the auxiliary pattern is removed by etching.

作為本申請一種方案,所述輔助圖形藉由鑽孔的方式去除。As a solution of the present application, the auxiliary pattern is removed by drilling.

作為本申請一種方案,藉由所述鑽孔的方式去除所述輔助圖形並在所述介電層上形成凹槽或貫穿孔,並藉由防焊材料或者樹脂材料對所述凹槽或者貫穿孔進行填充。As a solution of the present application, the auxiliary pattern is removed by the drilling method and a groove or a through hole is formed on the dielectric layer, and the groove or the through hole is formed with a solder resist material or a resin material. The hole is filled.

作為本申請一種方案,所述金屬基板還包括至少一線路層,所述線路層內埋於所述介電層中並與所述金屬箔間隔。As a solution of the present application, the metal substrate further includes at least one circuit layer, and the circuit layer is embedded in the dielectric layer and spaced from the metal foil.

作為本申請一種方案,二所述金屬箔設置於所述介電層的相對二側。As a solution of the present application, the two metal foils are disposed on two opposite sides of the dielectric layer.

作為本申請一種方案,去除所述輔助圖形之後,還包括:對所述電路板進行增層。As a solution of the present application, after removing the auxiliary pattern, further includes: building up the circuit board.

本申請的電路板的製作方法,其藉由先在電鍍形成導電圖形層時在所述線路部之間形成所述輔助導電部,而後再快速蝕刻形成導電線路與輔助圖形後將所述輔助圖形去除,從而實現在不影響電路板功能的情況下,有利於在電鍍時提升各處金屬沉積的均勻性使最後形成的各所述導電線路厚度更加均勻,進而提升電路板中線路的品質。The manufacturing method of the circuit board of the present application, it forms the auxiliary conductive part between the circuit parts when electroplating to form the conductive pattern layer, and then quickly etches the conductive circuit and the auxiliary pattern to form the auxiliary pattern Remove, so as to achieve without affecting the function of the circuit board, it is beneficial to improve the uniformity of metal deposition everywhere during electroplating, so that the thickness of each of the conductive lines formed at last is more uniform, thereby improving the quality of the lines in the circuit board.

下面將結合本申請實施例中的圖式,對本申請實施例中的技術方案進行清楚、完整地描述,顯然,所描述的實施例僅僅係本申請一部分實施例,而不係全部的實施例。The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of them.

除非另有定義,本文所使用的所有的技術及科學術語與屬於本申請的技術領域的技術人員通常理解的含義相同。本文中在本申請的說明書中所使用的術語只係為了描述具體的實施例的目的,不係旨在於限制本申請。Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field of the application. The terms used herein in the description of the application are for the purpose of describing specific embodiments only, and are not intended to limit the application.

下面結合圖式,對本申請的一些實施方式作詳細說明。在不衝突的情況下,下述的實施例/實施方式及實施例/實施方式中的特徵可相互組合。Some implementations of the present application will be described in detail below with reference to the drawings. In the case of no conflict, the following embodiments/implementations and features in the embodiments/implementations can be combined with each other.

請參閱圖1至圖6,本申請一實施方式的電路板的製作方法,其包括以下步驟:Please refer to Fig. 1 to Fig. 6, the manufacturing method of the circuit board of an embodiment of the present application, it comprises the following steps:

步驟S1,請參閱圖1,提供一金屬基板10,所述金屬基板10包括介電層11及設置於所述金屬基板10表面的金屬箔13。Step S1 , please refer to FIG. 1 , providing a metal substrate 10 , the metal substrate 10 includes a dielectric layer 11 and a metal foil 13 disposed on the surface of the metal substrate 10 .

在一些實施方式中,所述金屬基板10還可進一步包括至少一線路層15,所述線路層15內埋於所述介電層11中並與所述金屬箔13間隔。而本實施方式中,以所述金屬基板10包括二層線路層15為例進行說明。具體的,二所述線路層15分別為第一線路層151及第二線路層153,且所述第一線路層151與所述第二線路層153沿第一方向間隔並內埋於所述介電層11中。所述第一線路層151還可與所述第二線路層153電連接。In some embodiments, the metal substrate 10 may further include at least one circuit layer 15 embedded in the dielectric layer 11 and spaced from the metal foil 13 . In this embodiment, the metal substrate 10 includes a two-layer circuit layer 15 as an example for illustration. Specifically, the two circuit layers 15 are respectively the first circuit layer 151 and the second circuit layer 153, and the first circuit layer 151 and the second circuit layer 153 are spaced apart along the first direction and embedded in the Dielectric layer 11. The first circuit layer 151 can also be electrically connected to the second circuit layer 153 .

在一些實施方式中,所述金屬箔13可形成於所述介電層11的一側或者多側。在本實施方式中,以所述金屬箔13形成於所述介電層11沿所述第一方向間隔的相對二側為例。In some embodiments, the metal foil 13 may be formed on one or more sides of the dielectric layer 11 . In this embodiment, it is taken as an example that the metal foil 13 is formed on two opposite sides of the dielectric layer 11 spaced along the first direction.

在一些實施方式中,所述金屬箔13還可與所述線路層15電連接。在本實施方式中,具體的,臨近所述第一線路層151的所述金屬箔13可與所述第一線路層151電連接,臨近所述第二線路層153的所述金屬箔13可與所述第二線路層153電連接。In some embodiments, the metal foil 13 can also be electrically connected to the circuit layer 15 . In this embodiment, specifically, the metal foil 13 adjacent to the first circuit layer 151 can be electrically connected to the first circuit layer 151, and the metal foil 13 adjacent to the second circuit layer 153 can be It is electrically connected with the second circuit layer 153 .

步驟S2,請參閱圖2及圖3,在所述金屬箔13背離所述介電層11的一側壓合感光膜30,並對所述感光膜30進行曝光顯影形成感光圖形層30a。其中,每一所述感光圖形層30a包括多個線槽31及位於相鄰二所述線槽31之間的至少一輔助槽33。Step S2, please refer to FIG. 2 and FIG. 3 , press the photosensitive film 30 on the side of the metal foil 13 away from the dielectric layer 11, and expose and develop the photosensitive film 30 to form a photosensitive pattern layer 30a. Wherein, each photosensitive pattern layer 30a includes a plurality of wire grooves 31 and at least one auxiliary groove 33 between two adjacent wire grooves 31 .

在本實施方式中,二所述感光膜30分別壓合至二所述金屬箔13上並對其曝光顯影對應形成二感光圖形層30a。In this embodiment, the two photosensitive films 30 are pressed and bonded to the two metal foils 13 respectively, and are exposed and developed to form two photosensitive pattern layers 30a.

步驟S3,請參閱圖4,電鍍以對應所述線槽31形成線路部51並對應所述輔助槽33形成輔助導電部53,其中,所述線路部51及所述輔助導電部53共同形成導電圖形層50。Step S3, please refer to FIG. 4 , electroplating to form a line portion 51 corresponding to the wire groove 31 and an auxiliary conductive portion 53 corresponding to the auxiliary groove 33, wherein the line portion 51 and the auxiliary conductive portion 53 jointly form a conductive graphics layer 50 .

在本實施方式中,二所述導電圖形層50分別形成於二所述金屬箔13的表面。In this embodiment, the two conductive pattern layers 50 are respectively formed on the surfaces of the two metal foils 13 .

由於位於二所述線槽31之間的所述輔助槽33的存在,使得電鍍形成所述線路部51時同時對應所述輔助槽33在相鄰二所述線路部51之間形成輔助導電部53,有利於平衡電鍍時的電流,從而有利於電鍍時各處金屬沉積的均勻性,進而使得的各所述線路部51的厚度更加均勻。Due to the existence of the auxiliary groove 33 located between the two wire grooves 31, when forming the circuit part 51 by electroplating, an auxiliary conductive part is formed between two adjacent circuit parts 51 corresponding to the auxiliary groove 33 53 , which is beneficial to balance the current during electroplating, thereby facilitating the uniformity of metal deposition everywhere during electroplating, and further makes the thickness of each line part 51 more uniform.

步驟S4,請參閱圖5,去除所述感光圖形層30a,並藉由快速蝕刻以去除所述金屬箔13未被所述導電圖形層50覆蓋而裸露的部分,從而將所述金屬箔13製成與所述導電圖形層50對應的導電圖案層130。其中,所述線路部51與所述導電圖案層130中與所述線路部51對應的部分構成導電線路60,所述輔助導電部53與所述導電圖案層130中與所述輔助導電部53對應的部分構成輔助圖形63。Step S4, please refer to FIG. 5, remove the photosensitive pattern layer 30a, and remove the exposed part of the metal foil 13 that is not covered by the conductive pattern layer 50 by rapid etching, so that the metal foil 13 is made A conductive pattern layer 130 corresponding to the conductive pattern layer 50 is formed. Wherein, the line part 51 and the part corresponding to the line part 51 in the conductive pattern layer 130 form a conductive line 60, and the auxiliary conductive part 53 and the auxiliary conductive part 53 in the conductive pattern layer 130 The corresponding parts constitute the auxiliary figure 63 .

在本實施方式中,二所述導電線路60分別形成於所述介電層11的相對二側,且二所述輔助圖形63分別形成於所述介電層11的相對二側。In this embodiment, the two conductive lines 60 are respectively formed on two opposite sides of the dielectric layer 11 , and the two auxiliary patterns 63 are respectively formed on two opposite sides of the dielectric layer 11 .

步驟S5,請參閱圖6,去除所述輔助圖形63,從而製得所述電路板。Step S5, please refer to FIG. 6 , remove the auxiliary pattern 63, thereby manufacturing the circuit board.

在一些實施方式中,所述輔助圖形63可藉由局部蝕刻的方式去除。In some embodiments, the auxiliary pattern 63 can be removed by partial etching.

在一些實施方式中,所述輔助圖形63還可藉由鑽孔的方式去除。其中,鑽孔的深度保證完全去除所述輔助圖形63即可。例如,鑽孔時剛好去除所述輔助圖形63;又如,鑽孔時同時還去除部分所述介電層11從而在所述介電層11上形成凹槽(圖未示),並藉由防焊材料(例如防焊油墨)或者樹脂材料對所述介電層11上的所述凹槽進行填充;再如,如圖7所示,鑽孔時在不破壞所述介電層11內部線路的前提下,去除所述輔助圖形63的同時貫穿所述介電層11從而在所述介電層11上形成貫穿孔110,並藉由防焊材料或者樹脂材料對所述介電層11上的所述貫穿孔110進行填充。In some embodiments, the auxiliary pattern 63 can also be removed by drilling. Wherein, it only needs to ensure the depth of the drilling to completely remove the auxiliary pattern 63 . For example, the auxiliary pattern 63 is just removed during drilling; as another example, part of the dielectric layer 11 is also removed during drilling so as to form a groove (not shown) on the dielectric layer 11, and by Solder resist material (such as solder resist ink) or resin material fills the grooves on the dielectric layer 11; for another example, as shown in FIG. 7, the inside of the dielectric layer 11 is not damaged when drilling On the premise of wiring, the auxiliary pattern 63 is removed while penetrating through the dielectric layer 11 so as to form a through hole 110 on the dielectric layer 11, and the dielectric layer 11 is formed by solder resist material or resin material. The through-holes 110 above are filled.

在其他實施方式中,所述輔助圖形63還可藉由其他方式去除,不僅限於上述描述的方式。In other implementations, the auxiliary graphics 63 can also be removed in other ways, not limited to the ways described above.

在一些實施方式中,所述電路板的製作方法在步驟S5之後還可進一步地包括步驟S6,如圖8所示,在所述導電線路60上壓合單面金屬板70並進行棕化,以進行後續增層作業。其中,所述單面金屬板70包括層疊的介質層71與金屬層73,所述介質層71背離所述金屬層73的一側與所述導電線路60結合。In some embodiments, the manufacturing method of the circuit board may further include step S6 after step S5, as shown in FIG. 8 , pressing a single-sided metal plate 70 on the conductive circuit 60 and performing browning, for subsequent layering operations. Wherein, the single-sided metal plate 70 includes a laminated dielectric layer 71 and a metal layer 73 , and the side of the dielectric layer 71 away from the metal layer 73 is combined with the conductive circuit 60 .

本申請的電路板的製作方法,其藉由先在電鍍形成導電圖形層50時在所述線路部51之間形成所述輔助導電部53,而後再快速蝕刻形成導電線路60與輔助圖形63後將所述輔助圖形63去除,從而實現在不影響電路板功能的情況下,有利於在電鍍時提升各處金屬沉積的均勻性使最後形成的各所述導電線路60厚度更加均勻,進而提升電路板中線路的品質。The manufacturing method of the circuit board of the present application is to form the auxiliary conductive part 53 between the circuit parts 51 when the conductive pattern layer 50 is formed by electroplating, and then quickly etch to form the conductive circuit 60 and the auxiliary pattern 63. The auxiliary pattern 63 is removed, so as to realize that without affecting the function of the circuit board, it is beneficial to improve the uniformity of metal deposition everywhere during electroplating, so that the thickness of each of the conductive lines 60 formed at last is more uniform, and then the circuit is improved. The quality of the lines in the board.

10:金屬基板 11:介電層 13:金屬箔 15:線路層 151:第一線路層 153:第二線路層 30:感光膜 30a:感光圖形層 31:線槽 33:輔助槽 51:線路部 53:輔助導電部 50:導電圖形層 130:導電圖案層 60:導電線路 63:輔助圖形 110:貫穿孔 70:單面金屬板 71:介質層 73:金屬層 10: Metal substrate 11: Dielectric layer 13: metal foil 15: Line layer 151: The first line layer 153: Second line layer 30: photosensitive film 30a: photosensitive graphic layer 31: trunking 33: Auxiliary slot 51: Line Department 53: Auxiliary conductive part 50: Conductive graphic layer 130: conductive pattern layer 60: Conductive circuit 63: Auxiliary graphics 110: through hole 70:Single-sided metal plate 71: Dielectric layer 73: metal layer

圖1為本申請一實施方式的金屬基板的剖面示意圖。FIG. 1 is a schematic cross-sectional view of a metal substrate according to an embodiment of the present application.

圖2為在圖1所示的金屬基板上設置感光膜的剖面示意圖。FIG. 2 is a schematic cross-sectional view of disposing a photosensitive film on the metal substrate shown in FIG. 1 .

圖3為將圖2所示的感光膜曝光顯影形成感光圖形層的剖面示意圖。FIG. 3 is a schematic cross-sectional view of exposing and developing the photosensitive film shown in FIG. 2 to form a photosensitive graphic layer.

圖4為在圖3所示的金屬箔上形成導電圖形層的剖面示意圖。FIG. 4 is a schematic cross-sectional view of forming a conductive pattern layer on the metal foil shown in FIG. 3 .

圖5為將圖4中的感光圖形層去除並形成導電圖案層的剖面示意圖。FIG. 5 is a schematic cross-sectional view of removing the photosensitive pattern layer in FIG. 4 and forming a conductive pattern layer.

圖6為本申請一實施方式的電路板的剖面示意圖。FIG. 6 is a schematic cross-sectional view of a circuit board according to an embodiment of the present application.

圖7為本申請另一實施方式的電路板的剖面示意圖。FIG. 7 is a schematic cross-sectional view of a circuit board according to another embodiment of the present application.

圖8為本申請再一實施方式的電路板的剖面示意圖。FIG. 8 is a schematic cross-sectional view of a circuit board according to yet another embodiment of the present application.

none

11:介電層 11: Dielectric layer

13:金屬箔 13: metal foil

30a:感光圖形層 30a: photosensitive graphics layer

31:線槽 31: trunking

33:輔助槽 33: Auxiliary slot

Claims (7)

一種電路板的製作方法,包括以下步驟: 提供一金屬基板,包括介電層及設置於所述金屬基板表面的金屬箔; 在所述金屬箔背離所述介電層的一側壓合感光膜,並對所述感光膜進行曝光顯影形成感光圖形層,其中,所述圖形層包括多個線槽及位於相鄰二所述線槽之間的至少一輔助槽; 電鍍以對應所述線槽形成線路部並對應所述輔助槽形成輔助導電部,其中,所述線路部及所述輔助導電部共同形成導電圖形層; 去除所述感光圖形層,並藉由快速蝕刻以去除所述金屬箔未被所述導電圖形層覆蓋而裸露的部分,從而將所述金屬箔製成與所述導電圖形層對應的導電圖案層,其中,所述線路部與所述導電圖案層中與所述線路部對應的部分構成導電線路,所述輔助導電部與所述導電圖案層中與所述輔助導電部對應的部分構成輔助圖形;及 去除所述輔助圖形。 A method for manufacturing a circuit board, comprising the steps of: A metal substrate is provided, including a dielectric layer and a metal foil disposed on the surface of the metal substrate; A photosensitive film is pressed on the side of the metal foil away from the dielectric layer, and the photosensitive film is exposed and developed to form a photosensitive graphic layer, wherein the graphic layer includes a plurality of line grooves and is located between two adjacent at least one auxiliary groove between the wire grooves; electroplating to form a line part corresponding to the line groove and an auxiliary conductive part corresponding to the auxiliary groove, wherein the line part and the auxiliary conductive part jointly form a conductive pattern layer; removing the photosensitive pattern layer, and removing the exposed part of the metal foil not covered by the conductive pattern layer by rapid etching, so that the metal foil is made into a conductive pattern layer corresponding to the conductive pattern layer , wherein, the line part and the part corresponding to the line part in the conductive pattern layer form a conductive circuit, and the auxiliary conductive part and the part corresponding to the auxiliary conductive part in the conductive pattern layer form an auxiliary pattern ;and Remove the auxiliary graphics. 如請求項1所述的電路板的製作方法,其中,所述輔助圖形藉由蝕刻的方式去除。The method for manufacturing a circuit board according to claim 1, wherein the auxiliary pattern is removed by etching. 如請求項1所述的電路板的製作方法,其中,所述輔助圖形藉由鑽孔的方式去除。The method for manufacturing a circuit board according to claim 1, wherein the auxiliary pattern is removed by drilling. 如請求項3所述的電路板的製作方法,其中,藉由所述鑽孔的方式去除所述輔助圖形並在所述介電層上形成凹槽或貫穿孔,並藉由防焊材料或者樹脂材料對所述凹槽或者貫穿孔進行填充。The method for manufacturing a circuit board according to claim 3, wherein the auxiliary pattern is removed by the drilling method and a groove or a through hole is formed on the dielectric layer, and the solder resist material or The resin material fills the groove or the through hole. 如請求項1所述的電路板的製作方法,其中,所述金屬基板還包括至少一線路層,所述線路層內埋於所述介電層中並與所述金屬箔間隔。The method for manufacturing a circuit board according to claim 1, wherein the metal substrate further includes at least one circuit layer, and the circuit layer is embedded in the dielectric layer and spaced from the metal foil. 如請求項1所述的電路板的製作方法,其中,二所述金屬箔設置於所述介電層的相對二側。The method for manufacturing a circuit board as claimed in claim 1, wherein the two metal foils are disposed on two opposite sides of the dielectric layer. 如請求項1所述的電路板的製作方法,其中,去除所述輔助圖形之後,還包括:對所述電路板進行增層。The method for manufacturing a circuit board according to claim 1, further comprising: building up the circuit board after removing the auxiliary pattern.
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