TW202311581A - Detection method and detection system for wafer surface micro-damage - Google Patents

Abstract

The invention relates to a detection method and a detection system for wafer surface micro-damage. The detection method comprises the following steps: a selection step: selecting a polished wafer; a single crystal layer growth step: growing a single crystal layer on the surface of the selected wafer; a heat treatment step: carrying out heat treatment on the wafer on which the single crystal layer is grown; and a detection step: carrying out stacking fault detection on the single crystal layer of the wafer subjected to heat treatment so as to determine whether the surface micro-damage exists in the wafer or not.

Description

Detection method and detection system for wafer surface micro-damage

The invention belongs to the technical field of wafer processing and manufacturing, and in particular relates to a detection method and a detection system for micro-damages on the wafer surface.

In the wafer manufacturing process, mechanical processes such as rolling, slicing, and grinding will introduce mechanical damage to the surface of the wafer. For this reason, the damage layer will be removed in subsequent processing by steps such as etching and polishing, thereby , the surface of the polished wafer is usually no longer significantly damaged. However, in the process of polishing such as double-sided polishing, sometimes there are still micro-damages such as micro-scratches and local shallow pits caused by particles such as silicon slag and impurities in the polishing solution entering the polishing area and scratching on the wafer surface. Case. This micro-damage will also become larger and deeper in the subsequent cleaning steps due to the faster corrosion rate of the damaged defect by the chemical solution contained in the cleaning solution compared with the non-damaged place. Micro-damages destroy the original single crystal layer, and easily lead to leakage in the steps of thin film or circuit deposition in device manufacturing, thereby causing device failure.

Currently, commonly used methods for detecting wafer surface damage include microscope observation and angle polishing. However, for such micro-damages generated during the polishing stage, due to their small size, it is difficult to detect them with a microscope or other detection instruments. As for the angle polishing method, first of all, it is used to detect the damage layer generated after wafer cutting and grinding, that is, a layer of damage layer that is generally present on the entire surface of the wafer, while such micro-damages generated in the polishing process do not exist Therefore, if the angle polishing method is used to detect micro-damages on the wafer surface after the polishing process, the cracked small pieces selected for detection may not have micro-damages; Furthermore, even if there are micro-damages in the cracked small pieces selected for detection, since the grinding and polishing effect of angle polishing is far worse than that of the polishing process in the wafer production process, it is impossible to rely on the angle polishing method. The relevant detection means to detect the micro-damages generated in the polishing stage.

This section provides a general summary of the invention, rather than a comprehensive disclosure of the full scope or all features of the invention.

An object of the present invention is to provide a detection method capable of detecting micro-damages of small size on the wafer surface.

Another object of the present invention is to provide a method for detecting micro-damages on the wafer surface that can detect micro-damages scattered on the surface of the wafer.

In order to achieve one or more of the above objects, according to one aspect of the present invention, a method for detecting micro-damages on the surface of a wafer is provided, which includes: Selection step: selecting polished wafers; A single crystal layer growing step: growing a single crystal layer on the surface of the selected wafer; Heat treatment step: performing heat treatment on the wafer on which the single crystal layer has been grown; and Detection step: perform stacking fault detection on the single crystal layer of the heat-treated wafer to determine whether there is any surface micro-damage on the wafer.

In the above detection method for micro-damage on the surface of the wafer, before the single crystal layer growth step, a cleaning step may also be included: cleaning the selected wafer to remove the polishing liquid remaining on the surface of the wafer .

In the above detection method for micro-damage on the wafer surface, growing a single crystal layer on the surface of the selected wafer can use chemical vapor deposition, physical vapor deposition, liquid phase epitaxy, atomic layer epitaxy or molecular beam epitaxy to fulfill.

In the above method for detecting micro-damages on the wafer surface, the thickness of the single crystal layer may be 3-6 um.

In the above detection method for micro-damage on the surface of the wafer, growing a single crystal layer on the surface of the selected wafer may include using chemical vapor deposition to react 3 with SiHCl ₃ and H ₂ at 1100-1200°C ~5 min to grow a single crystal layer on the surface of the wafer.

In the above method for detecting micro-damages on the wafer surface, heat-treating the wafer on which the single crystal layer has been grown may include heat-treating the wafer at 1100-1200° C. for 8-16 hours.

In the above detection method for micro-damage on the wafer surface, the heat treatment can be carried out in a diffusion furnace, or in the case of utilizing chemical vapor deposition to grow a single crystal layer on the surface of the selected wafer, the heat treatment can be carried out in a It is carried out in a chemical vapor deposition reaction chamber with protective gas.

In the above method for detecting micro-damages on the wafer surface, the protective gas may be argon.

In the above detection method for micro-damage on the wafer surface, stacking fault detection can be performed by X-ray diffraction topography or copper fog method.

According to another aspect of the present invention, a kind of detection system for wafer surface micro-damage is provided, and it comprises: a selection unit, which is used to select polished wafers; Single crystal layer growth unit: it is used to grow a single crystal layer on the surface of the selected wafer; heat treatment unit: it is used to heat treat the wafer on which the single crystal layer has been grown; and Detection unit: it is used to perform stacking fault detection on the single crystal layer of the heat-treated wafer to determine whether there is any surface micro-damage on the wafer.

According to the present invention, by growing a single crystal layer on the surface of the wafer, stacking faults are formed on the micro-damages to "magnify" the micro-damages to an easily detectable level, so as to indirectly realize the detection of micro-sized micro-damages. Damage detection. In addition, the monocrystalline layer is grown on the entire surface of the wafer, so any micro-damage present on the entire surface of the wafer can be "magnified" to an easily detectable level, thereby making it possible to make the scattered Micro-damages on the surface of the wafer can be detected.

The above-mentioned features and advantages and other features and advantages of the present invention will be more apparent through the following detailed description of exemplary embodiments of the present invention in conjunction with the accompanying drawings.

In order for the Ligui Examiner to understand the technical features, content and advantages of the present invention and the effects it can achieve, the present invention is hereby combined with the accompanying drawings and appendices, and is described in detail in the form of embodiments as follows, and the drawings used therein , the purpose of which is only for illustration and auxiliary instructions, and not necessarily the true proportion and precise configuration of the present invention after implementation, so it should not be interpreted based on the proportion and configuration relationship of the attached drawings, and limit the application of the present invention in actual implementation The scope is described first.

In the description of the embodiments of the present invention, it should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical" , "horizontal", "top", "bottom", "inner", "outer" and other indicated orientations or positional relationships are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the embodiments of the present invention and simplifying the description , rather than indicating or implying that the device or element referred to must have a particular orientation, be constructed and operate in a particular orientation, and thus should not be construed as limiting the invention.

In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of said features. In the description of the embodiments of the present invention, "plurality" means two or more, unless otherwise specifically defined.

The invention is described in detail below by means of exemplary embodiments with reference to the drawings. It should be noted that the following detailed description of the present invention is for the purpose of illustration only, and by no means limits the present invention.

For micro-scratches, local shallow pits and other micro-damages on the wafer surface caused by particles such as silicon slag and impurities in the polishing solution entering the polishing area during polishing such as double-sided polishing, due to their small size and Scattered on the surface of the wafer, it is difficult to detect in time through some related detection equipment and detection methods.

In order to solve the above problems, the present invention indirectly realizes the detection of micro-damages by "magnifying" the micro-damages to an easily detectable level and using appropriate detection means to detect the "magnified" micro-damages.

Specifically, referring to FIG. 1, an embodiment of the present invention provides a method for detecting micro-damages on a wafer surface, which includes: S101: selecting step: selecting a polished wafer; S102: a single crystal layer growing step: growing a single crystal layer on the surface of the selected wafer; S103: heat treatment step: performing heat treatment on the wafer on which the single crystal layer has been grown; and S104: detection step: performing stacking fault detection on the single crystal layer of the heat-treated wafer to determine whether there is any surface micro-damage on the wafer.

The selecting step includes selecting inspection samples from the polished wafers, that is, performing sampling inspection. As mentioned above, during the polishing process, particles such as silicon slag and impurities in the polishing solution may enter the polishing area and scratch the surface of the wafer, resulting in micro-scratches, local shallow pits and other micro-damages. At this time, by sampling the polished wafers, it is possible to determine whether there are particles in the polished area for early intervention.

According to an embodiment of the present invention, a single crystal layer needs to be grown on the surface of the selected or sampled wafer, so as to grow a single crystal layer on the wafer surface. In the case of micro-damages on the wafer surface, during the growth of a single crystal layer, single crystal atoms will accumulate upward in the micro-damaged micro-pits or depressions, and the micro-pits or depressions will be deposited in the grown single-crystal layer. Introduces stress and thus dislocations. As the single crystal layer grows and thus its thickness increases, the dislocations form stacking faults which also propagate in the single crystal layer as the thickness of the single crystal layer continues to increase, thereby Part of the perfect lattice relative to the monocrystalline layer becomes apparent, thereby "magnifying" the microdamage.

After the growth of the single crystal layer is completed, the wafer on which the single crystal layer has been grown needs to be heat treated again. This heat treatment can further amplify the stacking faults in the single crystal layer, so that they become more obvious relative to the perfect lattice part of the single crystal layer, so that they can be easily detected, thus realizing the micro damage " magnified” to a level that is easily detectable.

In this case, the detection of micro-damages is allowed to be achieved indirectly through the detection of stacking faults in the monocrystalline layer grown on the wafer surface. Since stacking faults are generated in the grown single crystal layer due to micro-damages, and stacking faults are easily detected, for example, by some related detection equipment or methods, therefore, if it is detected that there is a stacking layer If it is wrong, it can be indirectly determined that there is a micro-damage, thereby indirectly realizing the detection of the micro-damage.

In the method, by growing a single crystal layer on the surface of the wafer to form stacking faults that can be clearly distinguished from the perfect lattice portion of the single crystal layer on micro-damages that are too small in size to be easily detected To "magnify" the micro-damage to the extent that it can be easily detected, so as to indirectly realize the detection of micro-damage with tiny size. Moreover, the monocrystalline layer is grown on the entire surface of the wafer, so any micro-damage present on the entire surface of the wafer can be "magnified" to an easily detectable level, thereby making it possible to make the scattered Micro-damages on the surface of the wafer can be detected.

In an embodiment according to the present invention, before the step of growing the single crystal layer, a cleaning step may also be included: cleaning the selected wafer to remove the polishing solution remaining on the wafer.

Polishing fluid may still remain on the surface of the polished wafer, which will adversely affect the growth of the single crystal layer on the wafer surface. The surface of the wafer may be cleaned with water to remove residual polishing liquid, and after being dried, the single crystal layer growth step can be continued.

It can be understood that the single crystal layer is a material homogeneous with the wafer, that is, the single crystal layer is a silicon single crystal layer. In this case, the grown single crystal layer can be connected to the same lattice structure as the wafer, in contrast to the failure of the lattice connection at the micro-damage, resulting in lattice errors, thus making it relatively Parts of the perfect lattice differ significantly from those of single-crystal layers, so that microdamages can be detected indirectly by detecting such lattice errors, known as stacking faults.

In an embodiment of the present invention, the single crystal layer can be grown on the surface of the wafer by chemical vapor deposition (Chemical Vapor Deposition, CVD), physical vapor deposition (Physical Vapor Deposition, PVD), liquid phase epitaxy (Liquid Phase Epitaxy, LPE), atomic layer epitaxy (Atom Layer Deposition, ALE) or molecular beam epitaxy (Molecular beam epitaxy, MBE).

It is conceivable that the growth of a single crystal layer on the surface of the wafer can also be achieved using other thin film deposition methods.

In an embodiment according to the present invention, the thickness of the single crystal layer may be 3-6 um.

For example, when chemical vapor deposition is used to grow a single crystal layer on the surface of a wafer, SiHCl ₃ and H ₂ can be fed into the chemical vapor deposition reaction chamber as raw materials and reacted at 1100~1200°C 3~5min to form a single crystal layer on the surface of the wafer. In this way, the thickness of the formed silicon single crystal layer can be approximately 3~6um.

In an embodiment according to the present invention, heat-treating the wafer on which the single crystal layer has been grown may include heat-treating the wafer at 1100-1200° C. for 8-16 hours.

The heat treatment can be performed in a diffusion furnace at 1100-1200°C for 8-16 hours, or in the case of using chemical vapor deposition to grow a single crystal layer on the surface of the wafer, it can be injected with a protective gas such as The chemical vapor deposition reaction chamber of argon (Ar) gas is carried out at 1100~1200°C for 8~16h.

After the above heat treatment, stacking fault detection is performed on the single crystal layer to realize the detection of micro-damages. In an embodiment according to the present invention, stacking fault detection may be performed by using X-ray Diffraction Topography (X-ray Diffraction Topography, XRT) or copper fog method. It can be understood that the detection of stacking faults in the single crystal layer can also be realized by using other suitable methods.

Hereinafter, the process of detecting the stacking fault by using XRT will be further described with reference to FIGS. 2 to 6 .

As shown in Figures 2 and 3, after the wafer has been subjected to the cleaning step, single crystal layer growth step, and heat treatment step, XRT can be used to detect stacking faults in the single crystal layer, including the following steps: S201: Place the wafer 100 processed through the above steps on the base 10 to be tested; S202: Select a test crystal plane, set parameters; and S203: Turn on the X light source to scan the entire wafer through transmission, that is, by emitting X-rays from the transmitting end 11 to the test crystal surface and receiving the diffracted X-rays from the receiving end 12, thereby obtaining a projection pattern of the entire wafer .

In XRT, a region with a defect such as a stacking fault does not meet the angle requirements of Bragg diffraction, resulting in a difference in contrast between the XRT pattern of this region and the XRT pattern of a perfect region, which can reveal the defect.

Referring to Figures 4 to 6, the XRT spectra when no stacking faults are detected, the XRT spectra when stacking faults are detected, and the XRT spectra when stacking faults are detected after grayscale processing are shown respectively. Atlas.

It can be clearly seen that in FIG. 5 and more obviously in FIG. 6 , a very obvious arc-shaped trace appears in the central area of the detected wafer, which is a stacking fault. Thus, it can be determined that there is micro-damage in the inspection wafer shown in FIGS. 5 and 6 .

In addition, it should be noted that in the XRT patterns shown in Figures 4 to 6, there are also many traces on the edge of the wafer, but these are only caused by the damage caused by the contact between the wafer and the furnace during heat treatment Edge stacking faults, not related to microdamages produced during the polishing phase, can be ignored.

The copper fog method can also be used to detect stacking faults in single crystal layers.

After cleaning the wafer, growing the single crystal layer and heat treating the wafer, the copper mist method can be used to detect stacking faults in the single crystal layer, including the following steps: Soak the wafer in a copper salt solution such as copper chloride solution or copper nitrate solution for 5 hours; drying and heat-treating the wafer at 1100°C for 1 hour, and then cooling the wafer down to room temperature; and The surface of the wafer is observed using a microscope to identify stacking fault areas.

In the copper mist method, since the solid solubility of copper ions in silicon is very large at high temperature, the ions are easy to enter the wafer, and the solid solubility of copper ions drops sharply at relatively low temperatures, and copper ions are precipitated outward. Ions in silicon tend to gather in the stacking fault region and not precipitate out, so the region where there is no copper precipitation on the surface after cooling is the stacking fault region.

Therefore, when observing the surface of the wafer with a microscope, if there is a part without copper precipitation on the surface, this part is a stacking fault region, and thus it can be determined that there is a micro-damage in the detected wafer.

According to another aspect of the present invention, there is also provided a detection system for wafer surface micro-damage, which includes: a selection unit, which is used to select polished wafers; Single crystal layer growth unit: it is used to grow a single crystal layer on the surface of the selected wafer; heat treatment unit: it is used to heat treat the wafer on which the single crystal layer has been grown; and Detection unit: it is used to perform stacking fault detection on the single crystal layer of the heat-treated wafer to determine whether there is any surface micro-damage on the wafer.

According to an embodiment of the present invention, the detection system for micro-damages on the wafer surface may also include a cleaning unit, which is used to clean the selected wafer before the single crystal layer growth unit grows a single crystal layer on the surface of the selected wafer. The selected wafer is cleaned to remove the polishing liquid remaining on the surface of the wafer.

The above are only preferred embodiments of the present invention, and are not used to limit the implementation scope of the present invention. If the present invention is modified or equivalently replaced without departing from the spirit and scope of the present invention, it shall be covered by the protection of the patent scope of the present invention. in the range.

S101-S104: Steps S201-S203: Steps 10: Base 11: Transmitter 12: Receiver 100: Wafer

1 is a schematic flow chart of a method for detecting micro-damages on a wafer surface according to an embodiment of the present invention; Figure 2 is a schematic flow chart of using XRT to detect stacking faults in a single crystal layer grown on a wafer surface; Fig. 3 schematically shows the operation process of using XRT to realize the detection of stacking faults in the single crystal layer; 4 is an XRT detection spectrum of the single crystal layer of the wafer after the single crystal layer growth step and the heat treatment step, wherein there is no stacking fault in the entire area of the wafer; 5 is an XRT detection pattern of the single crystal layer of another comparative wafer after the single crystal layer growth step and the heat treatment step, wherein there is a stacking fault in the central region of the wafer; and Fig. 6 is the XRT detection pattern of Fig. 5 which has been processed in grayscale in order to show micro-damages more clearly.

S101-S104: Steps

Claims (10)

A method for detecting micro-damages on a wafer surface, comprising: Selection step: selecting polished wafers; Single crystal layer growth step: growing a single crystal layer on the surface of the selected wafer; Heat treatment step: performing heat treatment on the wafer on which the single crystal layer has been grown; and Detection step: performing stacking fault detection on the single crystal layer of the wafer after the heat treatment, so as to determine whether there is any surface micro-damage on the wafer. The method for detecting micro-damages on the surface of a wafer as described in claim 1, wherein, before the single crystal layer growth step, a cleaning step is also included: cleaning the selected wafer to remove residues on the Polishing fluid on the surface of the wafer. The method for detecting micro-damages on the wafer surface as described in claim 1 or 2, wherein the growth of a single crystal layer on the surface of the selected wafer utilizes chemical vapor deposition, physical vapor deposition, liquid phase epitaxy, atomic layer epitaxy, or molecular beam epitaxy. The method for detecting micro-damages on the wafer surface as described in Claim 1 or 2, wherein the thickness of the single crystal layer is 3-6um. The method for detecting micro-damages on the surface of a wafer as described in claim 1 or 2, wherein, growing a single crystal layer on the surface of the selected wafer comprises using chemical vapor deposition by SiHCl ₃ and H ₂ in reacting at 1100-1200° C. for 3-5 minutes to form a single crystal layer on the surface of the wafer. The method for detecting micro-damages on the surface of a wafer as described in Claim 1 or 2, wherein the heat treatment of the wafer on which the single crystal layer has been grown includes placing the wafer under the condition of 1100-1200°C Heat treatment for 8~16h. The method for detecting micro-damages on the surface of a wafer as described in claim 1 or 2, wherein the heat treatment is carried out in a diffusion furnace, or the growth on the surface of the selected wafer is realized by chemical vapor deposition In the case of a single crystal layer, the heat treatment is carried out in a chemical vapor deposition reaction chamber filled with protective gas. The method for detecting micro-damages on the wafer surface as described in Claim 7, wherein the protective gas is argon. The method for detecting micro-damages on the wafer surface as described in claim 1 or 2, wherein the stacking fault detection is performed by X-ray diffraction topography or copper fog method. A detection system for micro-damages on a wafer surface, comprising: a selection unit, which is used to select polished wafers; Single crystal layer growth unit: it is used to grow a single crystal layer on the surface of the selected wafer; a heat treatment unit: it is used to heat treat the wafer on which the single crystal layer has been grown; and Detection unit: it is used to perform stacking fault detection on the single crystal layer of the wafer after the heat treatment, so as to determine whether there is any surface micro-damage on the wafer.

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