TW202305973A - Glass substrate, and glass interposer - Google Patents

Glass substrate, and glass interposer Download PDF

Info

Publication number
TW202305973A
TW202305973A TW111114625A TW111114625A TW202305973A TW 202305973 A TW202305973 A TW 202305973A TW 111114625 A TW111114625 A TW 111114625A TW 111114625 A TW111114625 A TW 111114625A TW 202305973 A TW202305973 A TW 202305973A
Authority
TW
Taiwan
Prior art keywords
glass substrate
wiring
glass
interposer
etching
Prior art date
Application number
TW111114625A
Other languages
Chinese (zh)
Inventor
大山陽照
齊藤俊介
三好雄三
Original Assignee
日商Nsc股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商Nsc股份有限公司 filed Critical 日商Nsc股份有限公司
Publication of TW202305973A publication Critical patent/TW202305973A/en

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/32Holders for supporting the complete device in operation, i.e. detachable fixtures
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

To provide a glass substrate and a glass interposer using the glass substrate that enable a narrower glass interposer pitch to be realized while suppressing manufacturing costs. A glass substrate 12 has a plurality of through-holes 126. The glass substrate 12 comprises: a wiring filling recess 128 that is provided in a planned wiring formation position on a main surface; and a through wiring section 122 and an in-plane wiring section 124 that are made of a conductive material and arranged in the through-holes 126 and the wiring filling recess 128, respectively. The top surface of the in-plane wiring section 124 and the main surface of the glass substrate 12 are arranged on the same plane and each have a smooth surface.

Description

玻璃基板及玻璃中介層Glass substrate and glass interposer

本發明,係關於玻璃基板及使用該玻璃基板之玻璃中介層。The present invention relates to a glass substrate and a glass interposer using the glass substrate.

以往,作為中介層之材料,係廣泛地採用矽系材料或樹脂系材料。In the past, as the material of the interposer, silicon-based materials or resin-based materials have been widely used.

然而,在考慮了連接墊(凸塊)之窄間距化及應對配線的微細化時,若為矽系材料則存在有生產成本變高這樣的缺點,若為樹脂系材料,則存在有不易實現微細化這樣的缺點。However, when considering the narrowing of the pitch of the connection pads (bumps) and the miniaturization of wiring, silicon-based materials have the disadvantage of increasing production costs, and resin-based materials are difficult to achieve. Miniaturization such disadvantages.

因此,在習知技術中,係存在有使用玻璃材料構成玻璃中介層的技術(例如,參閱專利文獻1。)。根據該技術,解決金屬化這樣的玻璃特有之技術課題,從而實現適宜的玻璃中介層。 [先前技術文獻] [專利文獻] Therefore, in the prior art, there is a technique of using a glass material to form a glass interposer (for example, refer to Patent Document 1). According to this technology, a technical problem peculiar to glass such as metallization is solved, and a suitable glass interposer can be realized. [Prior Art Literature] [Patent Document]

[專利文獻1]日本特開2019-044212號公報[Patent Document 1] Japanese Patent Laid-Open No. 2019-044212

[本發明所欲解決之課題][Problems to be Solved by the Invention]

然而,由於包含上述專利文獻1之以往的玻璃中介層,係在玻璃基板上形成由玻璃以外之複數個材料所構成的多層配線層,因此,有時連接墊(凸塊)之窄間距化及配線的微細化變得困難。However, since the conventional glass interposer including the above-mentioned Patent Document 1 forms a multilayer wiring layer composed of a plurality of materials other than glass on a glass substrate, the pitch of the connection pads (bumps) may be narrowed and Miniaturization of wiring becomes difficult.

例如,存在有因玻璃與多層配線層之間的熱膨脹係數之差而發生翹曲或多層配線層因層積時之外力而變形這樣的缺點。For example, there are disadvantages in that warpage occurs due to the difference in thermal expansion coefficient between the glass and the multilayer wiring layer, or that the multilayer wiring layer is deformed by external force during lamination.

而且,在多層配線層由樹脂所構成的情況下,係如上述般微細化困難,而且,由於用以形成多層配線層之工程涉及多個工程,因此,存在有生產成本變高的傾向。Furthermore, when the multilayer wiring layer is made of resin, it is difficult to miniaturize as described above, and since the process for forming the multilayer wiring layer involves many steps, the production cost tends to increase.

本發明之目的,係提供一種「可一邊抑制生產成本,一邊實現玻璃中介層之窄間距化」的玻璃基板及使用該玻璃基板的玻璃中介層。 [用以解決課題之手段] The object of the present invention is to provide a glass substrate that "can realize narrow pitch of glass interposer while suppressing production cost" and a glass interposer using the glass substrate. [Means to solve the problem]

本發明之玻璃基板,係具有複數個微細貫通孔。微細貫通孔之直徑,係5μm~500μm左右的範圍,例如藉由雷射輔助蝕刻所形成。The glass substrate of the present invention has a plurality of fine through holes. The diameter of the fine through hole is in the range of about 5 μm to 500 μm, and is formed by, for example, laser-assisted etching.

該玻璃基板,係具備有配線填充用凹部及配線部。配線填充用凹部,係被設置於玻璃基板之主面的配線形成預定位置。作為配線填充用凹部之例子,係雖可列舉出配置有微細配線的微細溝或以覆蓋所期望區域之方式而擴展的凹部等,但並不限定於此。This glass substrate is equipped with the recessed part for wiring filling, and a wiring part. The wiring filling recess is provided at a position where wiring is to be formed on the main surface of the glass substrate. Examples of the wiring-filling recess include fine grooves in which fine wiring is arranged, recesses extending so as to cover a desired region, and the like, but are not limited thereto.

配線部,係由以銅或鉻等之金屬材料為代表的導電性材料所構成,被分別配置於微細貫通孔及配線填充用凹部。The wiring part is made of a conductive material represented by a metal material such as copper or chromium, and is respectively arranged in the fine through-hole and the concave part for wiring filling.

該配線部中之被配置於配線填充用凹部的配線部之上面與玻璃基板之主面,係被配置於同一平面上且分別具有平滑面。為了實現像這樣的構成,係例如在將配線部填充於配線填充用凹部後,藉由化學性機械研磨處理等,對玻璃基板主面的整個區域進行拋光為佳。Among the wiring portions, the upper surface of the wiring portion disposed in the wiring filling concave portion and the main surface of the glass substrate are disposed on the same plane and each has a smooth surface. In order to realize such a structure, it is preferable to polish the whole area|region of the main surface of a glass substrate by chemical mechanical polishing process etc., for example after filling a wiring part in the recessed part for wiring filling.

在上述構成中,配置於配線填充用凹部之配線部的上面之平滑面與玻璃基板的主面之平滑面的表面粗糙度Ra,係只要分別為10nm以下即可,1nm以下為較佳。In the above configuration, the surface roughness Ra of the smooth surface of the upper surface of the wiring portion disposed in the wiring filling recess and the smooth surface of the main surface of the glass substrate should be 10 nm or less, preferably 1 nm or less.

其理由在於,玻璃基板之主面的平滑性越高,越容易將玻璃基板彼此接合而構成玻璃中介層。而且,當平滑面之表面粗糙度Ra藉由化學性機械研磨處理等被平滑化至0.5nm以下(更佳為0.1nm以下)時,則可藉由常溫接合容易地接合玻璃基板。The reason for this is that the higher the smoothness of the principal surfaces of the glass substrates, the easier it is to bond the glass substrates together to form the glass interposer. Furthermore, when the surface roughness Ra of the smooth surface is smoothed to 0.5 nm or less (more preferably 0.1 nm or less) by chemical mechanical polishing or the like, glass substrates can be easily bonded by bonding at room temperature.

藉由「提高複數個玻璃基板彼此的密著性,並使該些層積而構成具有多層配線構造之中介層」的方式,可低成本地形成不會因熱膨脹所引起的翹曲且不易因外力而變形的多層配線構造。By "improving the adhesion between a plurality of glass substrates, and stacking them to form an interposer with a multilayer wiring structure", it is possible to form at low cost without warpage caused by thermal expansion, and it is not easy to cause warping due to thermal expansion. Multilayer wiring structure deformed by external force.

特別是,由於玻璃基板,係容易實現大型化或超薄化,因此,與採用樹脂、陶瓷、矽等的其他材料的情形相比,容易抑制生產窄間距之中介層時的成本。 [發明之效果] In particular, since glass substrates are easy to realize large-scale and ultra-thin, compared with the case of using other materials such as resin, ceramics, and silicon, it is easier to suppress the cost of producing narrow-pitch interposers. [Effect of Invention]

根據該發明,可一邊抑制生產成本,一邊實現玻璃中介層的窄間距化。According to this invention, the pitch of the glass interposer can be narrowed while suppressing the production cost.

圖1(A)~圖1(D),係表示作為本發明的一實施形態之玻璃中介層10的概略。玻璃中介層10,係藉由探針卡2,位置調整自如地被支撐。在該實施形態中,係雖說明在探針卡2中使用玻璃中介層10的例子,但玻璃中介層10,係可使用於半導體記憶體等的其他用途。1(A) to 1(D) schematically show a glass interposer 10 as an embodiment of the present invention. The glass interposer 10 is supported by the probe card 2 so that its position can be adjusted freely. In this embodiment, an example in which the glass interposer 10 is used in the probe card 2 is described, but the glass interposer 10 can be used in other applications such as a semiconductor memory.

探針卡2,係被安裝於針測機4,該針測機4,係被構成為與測試器等連接並且移動自如。探針卡2,係被構成為測定平台(省略圖示)上之測定對象物6(例如,形成有半導體積體電路之矽晶圓等)的電氣特性。The probe card 2 is attached to a needle tester 4 which is configured to be connected to a tester or the like and to be able to move freely. The probe card 2 is configured to measure the electrical characteristics of a measurement object 6 (for example, a silicon wafer on which a semiconductor integrated circuit is formed) on a platform (not shown).

在玻璃中介層10中之與測定對象物6對向的主面,係連接有探針支撐基板8。該探針支撐基板8,係具有複數個探針9。另外,探針9,係僅圖示便於圖解的數量。探針支撐基板8,係雖由具有複數個貫通孔的樹脂、陶瓷、矽等所構成,但與玻璃中介層10相同地,亦可採用玻璃構件。A probe supporting substrate 8 is connected to the main surface of the glass interposer 10 that faces the measurement object 6 . The probe supporting substrate 8 has a plurality of probes 9 . In addition, the probes 9 are shown only for convenience of illustration. The probe supporting substrate 8 is made of resin, ceramics, silicon, etc. having a plurality of through holes, but similarly to the glass interposer 10, a glass member may also be used.

玻璃中介層10,係被構成為使設置在探針支撐基板8之探針9的間距適應於設置在探針卡2之彈簧電極(spring electrode)7的間距。具體而言,係被構成為使圖1(B)所示之配置間距相互不同的連接墊70與連接墊90之間導通。The glass interposer 10 is configured such that the pitch of the probes 9 provided on the probe supporting substrate 8 is adapted to the pitch of spring electrodes 7 provided on the probe card 2 . Specifically, it is configured so that the connection pads 70 and 90 having different arrangement pitches shown in FIG. 1(B) are electrically connected.

如圖1(B)所示般,玻璃中介層10,係被構成為層積複數個玻璃基板12。在該實施形態中,玻璃中介層10,係雖使三片玻璃基板12常溫接合而構成,但玻璃基板12的數量或接合手法並不限定於該些。As shown in FIG. 1(B), the glass interposer 10 is formed by laminating a plurality of glass substrates 12 . In this embodiment, the glass interposer 10 is formed by bonding three glass substrates 12 at room temperature, but the number of glass substrates 12 and the bonding method are not limited to these.

由於構成玻璃中介層10之玻璃基板12,係相互大致相同的構成,因此,在此,係為了方便起見,說明關於單一玻璃基板12。Since the glass substrates 12 constituting the glass interposer 10 have substantially the same configuration, a single glass substrate 12 will be described here for convenience.

如圖1(C)及圖1(D)所示般,玻璃基板12,係具備有:貫通配線部122,被設置於貫穿孔126的內壁面;及面內配線部124,作為電路圖案,從貫穿孔126的開口部被設置於玻璃基板12之主面的預定部分。面內配線部124,係以被填充於配線填充用凹部128的方式而配置。As shown in FIG. 1(C) and FIG. 1(D), the glass substrate 12 is provided with: a through-wiring portion 122 disposed on the inner wall surface of a through-hole 126; and an in-plane wiring portion 124 as a circuit pattern, The opening of the through hole 126 is provided at a predetermined portion of the main surface of the glass substrate 12 . The in-plane wiring portion 124 is arranged so as to be filled in the wiring filling concave portion 128 .

在該實施形態中,貫通配線部122及面內配線部124,係雖皆藉由銅鍍層所構成,但只要為具有導電性的層,則不限定於此。藉由上述貫通配線部122、面內配線部124、連接墊70、連接墊90及因應所需而被設置於貫穿孔126內或其附近的導電糊(銀、鉻、氮化矽等),電性連接探針9與彈簧電極7。In this embodiment, the penetrating wiring portion 122 and the in-plane wiring portion 124 are both composed of copper plating, but they are not limited to this as long as they are conductive layers. With the above-mentioned through wiring portion 122, in-plane wiring portion 124, connection pad 70, connection pad 90, and conductive paste (silver, chromium, silicon nitride, etc.) provided in or near the through hole 126 as required, Electrically connect the probe 9 and the spring electrode 7 .

在玻璃基板12中,係配線填充用凹部128內的面內配線部124之上面與玻璃基板12之主面被配置於同一平面上,而且,面內配線部124之上面與玻璃基板12之主面分別被實施表面處理為使得表面粗糙度1Ra成為1nm以下。In the glass substrate 12, the upper surface of the in-plane wiring portion 124 in the wiring filling recess 128 is arranged on the same plane as the main surface of the glass substrate 12, and the upper surface of the in-plane wiring portion 124 is aligned with the main surface of the glass substrate 12. Each surface is subjected to surface treatment so that the surface roughness 1Ra becomes 1 nm or less.

採用像這樣的構成之理由在於,容易使玻璃基板12彼此接合。當在玻璃基板12之接合面存在有凹凸時,雖層積玻璃基板12而構成玻璃中介層10變得困難,但藉由使包含面內配線部124之上面的玻璃基板12之主面整個區域平滑化的方式,容易進行玻璃基板12彼此之接合。例如,在藉由常溫接合將玻璃基板12彼此接合的情況下,係表面粗糙度1Ra為1nm以下,更佳為0.1nm~0.5nm左右,進而較佳為0.1nm以下。又,即便在使用接著劑等的情況下,玻璃基板12亦具有表面粗糙度10nm以下左右的平滑度為較佳。The reason for employing such a configuration is that it is easy to bond the glass substrates 12 to each other. If there are irregularities on the bonding surface of the glass substrate 12, it becomes difficult to form the glass interposer 10 by laminating the glass substrates 12. The method of smoothing facilitates bonding of the glass substrates 12 . For example, when the glass substrates 12 are bonded by bonding at room temperature, the surface roughness 1Ra is 1 nm or less, more preferably about 0.1 nm to 0.5 nm, and still more preferably 0.1 nm or less. Moreover, even when using an adhesive agent etc., it is preferable that the glass substrate 12 has the smoothness of about 10 nm or less of surface roughness.

接著,使用圖2(A)~圖2(E),說明製造玻璃基板12之手法的一例。首先,如圖圖2(A)~圖2(B)所示般,在玻璃基板12之主面的電路圖案形成位置設置配線填充用凹部128。配線填充用凹部128,係例如藉由「使用光阻、鉻光罩、耐蝕刻性膜而進行選擇性地蝕刻」的方式來形成。Next, an example of the method of manufacturing the glass substrate 12 is demonstrated using FIG.2(A) - FIG.2(E). First, as shown in FIGS. 2(A) to 2(B), a wiring filling recess 128 is provided at a circuit pattern formation position on the main surface of the glass substrate 12 . The wiring filling recess 128 is formed, for example, by "selective etching using a photoresist, a chrome mask, or an etch-resistant film".

其後,如圖2(C)所示般,設置貫穿孔126。貫穿孔126,係藉由所謂的雷射輔助蝕刻等所形成。在該實施形態中,係雖形成直徑50μm~100μm程度的貫穿孔126,但貫穿孔126之直徑,係可藉由調整雷射光之光束直徑的方式,適當地設定為5μm~500μm左右之範圍。Thereafter, as shown in FIG. 2(C), through-holes 126 are provided. The through hole 126 is formed by so-called laser-assisted etching or the like. In this embodiment, the through hole 126 is formed with a diameter of about 50 μm to 100 μm, but the diameter of the through hole 126 can be appropriately set to a range of about 5 μm to 500 μm by adjusting the beam diameter of the laser light.

接著,如圖2(D)所示般,形成貫通配線部122及面內配線部124。在此,係在藉由無電解鍍銅形成1μm左右的銅晶種層後,藉由電解鍍形成50~60μm的銅鍍層。而且,因應所需,將鉻等的導電性膏填充於貫穿孔126。Next, as shown in FIG. 2(D), the penetrating wiring portion 122 and the in-plane wiring portion 124 are formed. Here, after forming a copper seed layer of about 1 μm by electroless copper plating, a copper plating layer of 50 to 60 μm is formed by electrolytic plating. And, if necessary, conductive paste such as chromium is filled in the through holes 126 .

但是,貫通配線部122及面內配線部124之形成手法,係不限定於此。例如,關於貫通配線部122及面內配線部124,亦可採用以濺鍍來形成Ti或TiW等的黏著層及銅晶種層之手法。又,在形成銅晶種層時,亦可使用由溶膠-凝膠法(Sol-Gel method)所進行的金屬氧化物膜形成或底漆。However, the method of forming the penetrating wiring portion 122 and the in-plane wiring portion 124 is not limited to this. For example, regarding the through wiring portion 122 and the in-plane wiring portion 124 , a method of forming an adhesive layer of Ti or TiW or the like and a copper seed layer by sputtering may also be employed. Moreover, when forming a copper seed layer, metal oxide film formation or primer by a sol-gel method (Sol-Gel method) can also be used.

而且,如圖2(E)所示般,藉由CMP(Chemical Mechanical Polishing)處理亦即化學性機械研磨處理,包含面內配線部124之上面的玻璃基板12之主面整個區域被實施表面處理。Furthermore, as shown in FIG. 2(E), the entire main surface of the glass substrate 12 including the upper surface of the in-plane wiring portion 124 is subjected to surface treatment by CMP (Chemical Mechanical Polishing) treatment, that is, a chemical mechanical polishing treatment. .

在該實施形態中,係藉由SeO等的研磨劑(研磨粒)所具有之表面化學作用與漿料所含有的化學成分之作用,增大玻璃基板12之主面與漿料的相對運動所致之機械性研磨效果。該結果,可獲得足以常溫接合表面粗糙度1Ra為0.1nm以下之平滑的研磨面。In this embodiment, the effect of the relative movement between the main surface of the glass substrate 12 and the slurry is increased by the surface chemical action of the abrasive (abrasive grain) such as SeO and the action of the chemical composition contained in the slurry. To the mechanical grinding effect. As a result, it is possible to obtain a smooth polished surface having a surface roughness 1Ra of 0.1 nm or less for bonding at room temperature.

對主面施予了CMP處理之玻璃基板12,係藉由常溫接合,層積恰好所需的數量以用來構成玻璃中介層10。作為常溫接合之手法,係可列舉出表面活性化法或原子擴散接合法等的習知之接合方法。The glass substrate 12 subjected to the CMP treatment on the main surface is bonded at room temperature, and the required number is laminated to form the glass interposer 10 . As a method of bonding at room temperature, known bonding methods such as a surface activation method and an atomic diffusion bonding method are exemplified.

圖3(A)~圖3(C),係表示在使用圖2(B)所說明的玻璃基板12之主面形成配線填充用凹部128的態樣者。FIGS. 3(A) to 3(C) show an aspect in which the wiring filling recess 128 is formed on the main surface of the glass substrate 12 described using FIG. 2(B).

在此,係首先,如圖3(A)所示般,將耐蝕刻性的光阻30塗佈於玻璃基板12之主面,藉由曝光・顯像等去除所期望位置的光阻30,藉此,使配線填充用凹部128的形成位置露出。Here, first, as shown in FIG. 3(A), an etching-resistant photoresist 30 is applied to the main surface of the glass substrate 12, and the photoresist 30 at a desired position is removed by exposure and development. Thereby, the formation position of the wiring filling recessed part 128 is exposed.

其後,如圖3(B)所示般,藉由蝕刻處理,使玻璃基板12的所期望位置溶解,藉此,形成配線填充用凹部128。而且,如圖3(C)所示般,在形成配線填充用凹部128後,去除光阻30。另外,亦可代替由光阻30所進行的處理,在將耐蝕刻性膜貼附於玻璃基板12之主面後,以雷射處理去除所期望位置的膜,藉此,使配線填充用凹部128之形成位置露出或藉由以鉻光罩所進行的處理或其他手法來進行相同處理。Thereafter, as shown in FIG. 3(B), a desired position of the glass substrate 12 is dissolved by etching, thereby forming the wiring filling recess 128 . Then, as shown in FIG. 3(C) , after forming the wiring filling recess 128 , the photoresist 30 is removed. In addition, instead of processing with the photoresist 30, after affixing an etch-resistant film on the main surface of the glass substrate 12, laser processing may be used to remove the film at a desired position, thereby making the concave portion for wiring filling The formation positions of 128 are exposed or processed by chrome masking or other methods to perform the same treatment.

圖4(A)及圖4(B),係表示在玻璃基板12形成貫穿孔126之手法的一例。此處,係對玻璃基板12中之應當形成貫穿孔126的位置照射雷射光束,藉此,在該位置形成容易被蝕刻之性質的改質部。4(A) and 4(B) show an example of a method for forming the through-hole 126 in the glass substrate 12 . Here, a laser beam is irradiated to a position in the glass substrate 12 where the through hole 126 should be formed, thereby forming a modified portion that is easily etched at the position.

雷射光束,係只要可將12中之貫穿孔126的形成預定位置改質成容易被蝕刻之性質,則其種類及照射條件並不特別受到限定。在該實施形態中,係雖從雷射頭照射自短脈衝雷射(例如皮秒雷射、飛秒雷射)所振盪的雷射光束,但例如亦可使用CO 2雷射、奈秒雷射等。 The type and irradiation conditions of the laser beam are not particularly limited as long as the planned position of the through hole 126 in the 12 can be modified to be easily etched. In this embodiment, a laser beam oscillated by a short-pulse laser (such as a picosecond laser or a femtosecond laser) is irradiated from the laser head, but for example, a CO2 laser or a nanosecond laser can also be used. Shoot and so on.

又,在該實施形態中,係以使雷射光束之平均雷射能量成為約30μJ~300μJ左右的方式進行輸出控制,但並不限定於此。In addition, in this embodiment, the output control is performed so that the average laser energy of the laser beam becomes approximately 30 μJ to 300 μJ, but the present invention is not limited thereto.

雷射光束,係適當地調整其聚光區域為較佳。在此,係將雷射光束之聚光區域調整為遍及玻璃基板12之厚度方向的整個區域,藉此,貫穿孔126變得容易被形成。For the laser beam, it is better to properly adjust its focusing area. Here, the focusing area of the laser beam is adjusted to cover the entire area in the thickness direction of the glass substrate 12, whereby the through hole 126 can be easily formed.

接續於上述雷射加工處理,藉由蝕刻上述改質部的方式,在玻璃基板12形成貫穿孔126。Following the above-mentioned laser processing, the through-hole 126 is formed in the glass substrate 12 by etching the above-mentioned modified portion.

蝕刻處理,係例如使用如圖5(A)及圖5(B)所示般之枚葉式噴霧蝕刻方式的蝕刻裝置50。玻璃基板12,係被導入至蝕刻裝置50,施予包含氟酸及鹽酸等的蝕刻液所進行的蝕刻處理。通常,使用包含有氟酸1~10重量%、鹽酸5~20重量%的蝕刻液,並因應所需適當地併用界面活性劑等。For the etching process, for example, an etching apparatus 50 using a leaf-type spray etching method as shown in FIG. 5(A) and FIG. 5(B) is used. The glass substrate 12 is introduced into the etching apparatus 50, and is subjected to an etching process by applying an etching solution containing hydrofluoric acid, hydrochloric acid, or the like. Usually, an etching solution containing 1 to 10% by weight of hydrofluoric acid and 5 to 20% by weight of hydrochloric acid is used, and a surfactant or the like is used in combination as needed.

在蝕刻裝置50中,係如圖5(A)及圖5(B)般,一邊藉由搬送滾輪搬送玻璃基板12,一邊在蝕刻腔室52內使蝕刻液接觸於玻璃基板12之主面,藉此,進行對於玻璃基板12的蝕刻處理。In the etching device 50, as shown in FIG. 5(A) and FIG. 5(B), while the glass substrate 12 is being transported by the transport rollers, the etchant is brought into contact with the main surface of the glass substrate 12 in the etching chamber 52, Thereby, the etching process with respect to the glass substrate 12 is performed.

由於在蝕刻裝置50中之蝕刻腔室52的後段,係設置有用以沖洗附著於玻璃基板12之蝕刻液的洗淨腔室53,因此,玻璃基板12,係在去除了蝕刻液的狀態下,從蝕刻裝置50被排出。Since the rear stage of the etching chamber 52 in the etching device 50 is provided with a cleaning chamber 53 for rinsing the etching solution attached to the glass substrate 12, the glass substrate 12 is removed from the etching solution. It is discharged from the etching device 50 .

如此一來,藉由以雷射加工來輔助蝕刻的手法,可將蝕刻處理時間最小化至極限。In this way, by using laser processing to assist etching, the etching process time can be minimized to the limit.

該結果,在貫穿孔126之形成時,玻璃基板12的表面變得不易粗糙化或貫穿孔126的形狀變得不易變形。貫穿孔126之直徑,係可適當地調整為5μm~500μm左右的範圍。As a result, the surface of the glass substrate 12 becomes less likely to be roughened and the shape of the through-hole 126 becomes less likely to be deformed when the through-hole 126 is formed. The diameter of the through hole 126 can be appropriately adjusted to a range of about 5 μm to 500 μm.

原則上,若玻璃基板12之板厚薄,則容易減小貫穿孔126的直徑。其理由,係在蝕刻處理中,貫穿孔126之直徑比雷射光束直徑微增。In principle, if the thickness of the glass substrate 12 is thin, the diameter of the through hole 126 can be easily reduced. The reason is that during the etching process, the diameter of the through hole 126 is slightly increased compared with the diameter of the laser beam.

作為針對微增化之對策,藉由申請人的實驗明確了如下述內容:在蝕刻處理中,添加氧化鈦等的氟錯合劑或氫氧化鉀、氫氧化鈉等的鹼,藉此,蝕刻處理中之貫穿孔126的溝寬之微增化得到抑制。因此,因應所需,在蝕刻液中適量添加氟錯合劑或鹼,藉此,可調整貫穿孔126的直徑或形狀。As a countermeasure against microincreasing, the applicant's experiments have clarified the following: in the etching process, adding a fluorine complexing agent such as titanium oxide or an alkali such as potassium hydroxide or sodium hydroxide, thereby, the etching process The slight increase in the groove width of the through hole 126 is suppressed. Therefore, an appropriate amount of fluorine complexing agent or alkali is added to the etching solution as needed, thereby adjusting the diameter or shape of the through hole 126 .

接著,如圖6(A)及圖6(B)所示般,進行貫通配線部122及面內配線部124之形成處理與對於玻璃基板12的CMP處理。如上述般,在此,係在藉由無電解鍍銅形成1μm左右的銅晶種層後,藉由電解鍍形成50~60μm的銅鍍層。Next, as shown in FIG. 6(A) and FIG. 6(B), formation processing of the penetrating wiring portion 122 and the in-plane wiring portion 124 and CMP processing on the glass substrate 12 are performed. As mentioned above, here, after forming the copper seed layer of about 1 micrometer by electroless copper plating, the copper plating layer of 50-60 micrometers is formed by electrolytic plating.

另外,由於在貫穿孔126之直徑超過100μm的情況下,係存在有「僅藉由電解鍍,難以將導電性材料填充於貫穿孔126」的傾向,因此,將鉻等的導電性膏適當地填充於貫穿孔126為較佳。通常,貫穿孔126內之銅鍍層的厚度之1.1~1.5倍程度的厚度之銅鍍層,係被形成於玻璃基板12的兩主面。In addition, when the diameter of the through-hole 126 exceeds 100 μm, there is a tendency that “it is difficult to fill the through-hole 126 with a conductive material only by electrolytic plating”. It is preferable to fill the through hole 126 . Usually, a copper plating layer having a thickness approximately 1.1 to 1.5 times the thickness of the copper plating layer in the through hole 126 is formed on both main surfaces of the glass substrate 12 .

而且,如圖2(E)所示般,藉由CMP(Chemical Mechanical Polishing)處理亦即化學性機械研磨處理,包含面內配線部124之上面的玻璃基板12之主面整個區域被實施表面處理。Furthermore, as shown in FIG. 2(E), the entire main surface of the glass substrate 12 including the upper surface of the in-plane wiring portion 124 is subjected to surface treatment by CMP (Chemical Mechanical Polishing) treatment, that is, a chemical mechanical polishing treatment. .

在該實施形態中,係藉由SeO等的研磨劑(研磨粒)所具有之表面化學作用與漿料所含有的化學成分之作用,增大玻璃基板12之主面與漿料的相對運動所致之機械性研磨效果。該結果,表面粗糙度1Ra可調整成從10nm至0.1nm以下的範圍,並可獲得足以常溫接合之平滑的研磨面。In this embodiment, the effect of the relative movement between the main surface of the glass substrate 12 and the slurry is increased by the surface chemical action of the abrasive (abrasive grain) such as SeO and the action of the chemical composition contained in the slurry. To the mechanical grinding effect. As a result, the surface roughness 1Ra can be adjusted to a range from 10 nm to less than 0.1 nm, and a smooth polished surface sufficient for bonding at room temperature can be obtained.

對主面施予了CMP處理之玻璃基板12,係藉由常溫接合,層積恰好所需的數量以用來構成玻璃中介層10。The glass substrate 12 subjected to the CMP treatment on the main surface is bonded at room temperature, and the required number is laminated to form the glass interposer 10 .

根據上述實施形態,可適當地進行對玻璃基板的微細孔形成或金屬化,而且,可低成本地實現與連接墊之窄間距化對應的玻璃中介層10。According to the above-mentioned embodiment, it is possible to appropriately form micropores or metallize the glass substrate, and also realize the glass interposer 10 corresponding to the narrowing of the pitch of the connection pads at low cost.

藉由將上述雷射輔助蝕刻適當地使用於外形加工的方式,即便玻璃基板12為異形形狀(例如在角具有圓弧的多角形、圓形、橢圓形等),亦可適切地進行外形加工。By appropriately using the above-mentioned laser-assisted etching for contour processing, even if the glass substrate 12 has a special shape (such as a polygon with rounded corners, a circle, an ellipse, etc.), the contour can be appropriately processed. .

在上述實施形態中,係雖表示了藉由噴霧蝕刻方式之蝕刻裝置50進行蝕刻處理的例子,但並不限定於此。例如,如圖7(A)所示般,亦可採用「在溢流型之蝕刻腔室54中,一邊與溢流之蝕刻液接觸,一邊搬送玻璃基板12」的構成。In the above-mentioned embodiment, an example in which the etching process is performed by the etching apparatus 50 of the spray etching method was shown, but it is not limited thereto. For example, as shown in FIG. 7(A) , it is also possible to adopt a configuration of "transporting the glass substrate 12 while being in contact with the overflowing etching solution in the overflow type etching chamber 54".

再者,如圖7(B)所示般,亦可採用「使被收納於載體之單數或複數個玻璃基板12浸泡於收納有蝕刻液的蝕刻槽56」之浸漬式的蝕刻。Furthermore, as shown in FIG. 7(B), immersion etching of "soaking a single or a plurality of glass substrates 12 accommodated in a carrier in an etching tank 56 accommodating an etching solution" may also be used.

當然,如該圖所示般,玻璃基板12之形狀,係不僅為圓形,亦可為四角形。又,藉由適當地準備治具,亦可對應於所有形狀的玻璃基板12。Of course, as shown in this figure, the shape of the glass substrate 12 is not only a circle, but also a square. Moreover, by preparing a jig suitably, it can also correspond to the glass substrate 12 of all shapes.

在玻璃基板12之尺寸小且存在有搬送或操作出現障礙的可能性時,係亦可將具備有耐蝕刻性之網目構件使用支撐托盤、筐、治具等的載體構件。When the size of the glass substrate 12 is small and there is a possibility that transportation or handling may be hindered, a mesh member having etching resistance may be used as a carrier member such as a supporting tray, a basket, or a jig.

又,如圖8(A)~圖8(C)所示般,亦可利用雷射輔助蝕刻,同時形成貫穿孔126及配線填充用凹部128。Also, as shown in FIGS. 8(A) to 8(C), laser-assisted etching may be used to simultaneously form the through hole 126 and the wiring filling recess 128 .

在該情況下,如圖8(A)所示般,藉由「一邊調整雷射焦點,一邊照射雷射光束」的方式,對玻璃基板12中之應當形成配線填充用凹部128的區域進行改質。In this case, as shown in FIG. 8(A), by "irradiating the laser beam while adjusting the focus of the laser", the area in the glass substrate 12 where the concave portion 128 for wiring filling should be formed is modified. quality.

而且,如圖8(B)所示般,藉由雷射光束,對貫穿孔126的位置進行改質。而且,如圖8(C)所示般,藉由蝕刻處理使改質部分溶解,藉此,同時形成貫穿孔126及配線填充用凹部128。And, as shown in FIG. 8(B), the position of the through hole 126 is modified by the laser beam. Then, as shown in FIG. 8(C), the modified portion is dissolved by etching, whereby the through hole 126 and the wiring filling recess 128 are simultaneously formed.

上述實施形態之說明,係應被認為在所有方面皆為例示而並非限制性者。本發明之範圍,係並非藉由上述實施形態而是藉由申請專利範圍所表示。而且,在本發明之範圍,係意圖包含與申請專利範圍均等的意思及範圍內的所有變更。It should be thought that the description of the above-mentioned embodiment is an illustration and restrictive at no points. The scope of the present invention is not shown by the above-mentioned embodiments but by the claims. In addition, it is intended that all modifications within the meaning and range equivalent to the scope of claims are included in the scope of the present invention.

10:玻璃中介層 12:玻璃基板 122:貫通配線部 124:面內配線部 126:貫穿孔 128:配線填充用凹部 10: Glass interposer 12: Glass substrate 122: Through wiring part 124: In-plane wiring part 126: Through hole 128: Recess for wiring filling

[圖1]表示本發明之一實施形態的玻璃中介層之概略構成的圖。 [圖2]表示玻璃中介層的製造方法之一例的圖。 [圖3]表示配線填充用凹部的形成手法之一例的圖。 [圖4]表示貫穿孔的形成手法之一例的圖。 [圖5]表示在玻璃中介層之製造中使用的蝕刻裝置之一例的圖。 [圖6]表示貫通配線部及面內配線部的形成手法之一例的圖。 [圖7]表示在玻璃中介層之製造中使用的蝕刻裝置之其他例的圖。 [圖8]表示配線填充用凹部及貫穿孔的形成手法之其他例的圖。 [ Fig. 1 ] A diagram showing a schematic configuration of a glass interposer according to an embodiment of the present invention. [ Fig. 2 ] A diagram showing an example of a method of manufacturing a glass interposer. [ Fig. 3] Fig. 3 is a diagram showing an example of a method of forming a wiring filling recess. [ Fig. 4 ] A diagram showing an example of a method of forming a through-hole. [ Fig. 5 ] A diagram showing an example of an etching apparatus used in the production of a glass interposer. [FIG. 6] A diagram showing an example of a method of forming a through wiring portion and an in-plane wiring portion. [ Fig. 7] Fig. 7 is a diagram showing another example of an etching apparatus used in the production of a glass interposer. [ Fig. 8] Fig. 8 is a diagram showing another example of a method of forming a wiring filling recess and a through hole.

2:探針卡 2: Probe card

4:針測機 4: Needle measuring machine

6:測定對象物 6: Measurement object

7:彈簧電極 7: Spring electrode

8:探針支撐基板 8: Probe support substrate

9:探針 9: Probe

10:玻璃中介層 10: Glass interposer

12:玻璃基板 12: Glass substrate

70:連接墊 70: connection pad

90:連接墊 90: connection pad

122:貫通配線部 122: Through wiring part

124:面內配線部 124: In-plane wiring part

126:貫穿孔 126: Through hole

128:配線填充用凹部 128: Recess for wiring filling

Claims (3)

一種玻璃基板,係具有複數個微細貫通孔,該玻璃基板,其特徵係,至少具備有: 配線填充用凹部,被設置於前述玻璃基板之主面的配線形成預定位置;及 配線部,由被分別配置於前述微細貫通孔及前述配線填充用凹部的導電性材料所構成, 配置於前述配線填充用凹部的配線部之上面與玻璃基板之主面,係被配置於同一平面上且分別具有平滑面。 A glass substrate having a plurality of fine through holes, the glass substrate is characterized by at least: The concave portion for filling wiring is provided at a predetermined wiring formation position on the main surface of the glass substrate; and The wiring portion is made of a conductive material respectively disposed in the fine through hole and the wiring filling recess, The upper surface of the wiring portion arranged in the above-mentioned wiring filling concave portion and the main surface of the glass substrate are arranged on the same plane and each has a smooth surface. 如請求項1之玻璃基板,其中, 配置於前述配線填充用凹部之配線部的上面之平滑面與玻璃基板的主面之平滑面的表面粗糙度Ra分別為1nm以下。 The glass substrate of claim 1, wherein, The surface roughness Ra of the smooth surface of the upper surface of the wiring portion disposed in the wiring filling recess and the smooth surface of the main surface of the glass substrate is 1 nm or less, respectively. 一種玻璃中介層,係接合複數個如請求項1或2之玻璃基板而成。A glass interlayer formed by bonding a plurality of glass substrates according to claim 1 or 2.
TW111114625A 2021-04-19 2022-04-18 Glass substrate, and glass interposer TW202305973A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2021-070373 2021-04-19
JP2021070373A JP7114036B1 (en) 2021-04-19 2021-04-19 glass interposer

Publications (1)

Publication Number Publication Date
TW202305973A true TW202305973A (en) 2023-02-01

Family

ID=82748836

Family Applications (1)

Application Number Title Priority Date Filing Date
TW111114625A TW202305973A (en) 2021-04-19 2022-04-18 Glass substrate, and glass interposer

Country Status (3)

Country Link
JP (2) JP7114036B1 (en)
TW (1) TW202305973A (en)
WO (1) WO2022224855A1 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4214068B2 (en) 2004-03-09 2009-01-28 パナソニック株式会社 Multilayer glass substrate manufacturing method
JP2014236102A (en) 2013-05-31 2014-12-15 凸版印刷株式会社 Wiring board with through electrode, manufacturing method of the same, and semiconductor device
JP6840935B2 (en) 2016-05-10 2021-03-10 凸版印刷株式会社 Wiring circuit board manufacturing method
JP2019036607A (en) 2017-08-10 2019-03-07 リード・エレクトロニクス株式会社 Glass substrate containing multilayer wiring board with circuit and manufacturing method thereof

Also Published As

Publication number Publication date
WO2022224855A1 (en) 2022-10-27
JP2022165139A (en) 2022-10-31
JP2022165424A (en) 2022-10-31
JP7114036B1 (en) 2022-08-08

Similar Documents

Publication Publication Date Title
US10790209B2 (en) Wiring circuit substrate, semiconductor device, method of producing the wiring circuit substrate, and method of producing the semiconductor device
KR100821574B1 (en) Process for manufacturing semiconductor device
JP3530149B2 (en) Wiring board manufacturing method and semiconductor device
JP4785937B2 (en) Manufacturing method of semiconductor device
JP7298603B2 (en) Glass device manufacturing method
TWI713571B (en) Semiconductor device and manufacturing method thereof
CN106664795B (en) Structure and method for manufacturing same
JP2017143140A (en) Method for manufacturing core substrate for wiring circuit board, method for manufacturing wiring circuit board, and method for manufacturing semiconductor device
TW202305973A (en) Glass substrate, and glass interposer
JPH11135675A (en) Semiconductor device and manufacture thereof
JP2590251B2 (en) Method of manufacturing probe head for semiconductor LSI inspection apparatus and inspection apparatus
JP7404665B2 (en) Flip chip package, flip chip package substrate and flip chip package manufacturing method
JP7052464B2 (en) Manufacturing method of coreless substrate with fine wiring layer and manufacturing method of semiconductor package
KR19990005679A (en) Manufacturing method of package for flip chip mounting
WO2013073339A1 (en) Treatment method and template for substrate
WO1998034273A1 (en) Ball arranging substrate for forming bump, ball arranging head, ball arranging device, and ball arranging method
JP2023028803A (en) laminated glass substrate
Chen et al. Fabrication of second-level TriDelta interconnects using negative dry-film photoresist
JPH09270429A (en) Ball-array substrate and array head
KR100653831B1 (en) Probe substrate for test and manufacturing method thereof
JP3716403B2 (en) Projection electrode forming substrate and method of forming projection electrode using the same
KR101757860B1 (en) Probe, probe card and fabrication method of the same
JP2022012491A (en) Wiring board and manufacturing method of wiring board
JP2021150306A (en) Wiring substrate and manufacturing method of the same
KR100394415B1 (en) Micro ball array substrate and its fabrication