TW202240185A - Method of increasing accuracy of signal acquisition in chip testing equipment - Google Patents

Method of increasing accuracy of signal acquisition in chip testing equipment Download PDF

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TW202240185A
TW202240185A TW110127216A TW110127216A TW202240185A TW 202240185 A TW202240185 A TW 202240185A TW 110127216 A TW110127216 A TW 110127216A TW 110127216 A TW110127216 A TW 110127216A TW 202240185 A TW202240185 A TW 202240185A
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津 魏
經祥 張
吳艷平
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大陸商勝達克半導體科技(上海)有限公司
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Abstract

A method of increasing accuracy of signal acquisition in chip test equipment includes: selecting ideal transiting point(s); selecting sampling point(s), performing scan test(s) on each sampling point and each ideal transiting point, and storing scan test results; repeatedly performing the previous one step; building a statistical data model; acquiring real transiting point(s); repeatedly performing the previous three steps; calculating overall offset time of the signal; and compensating the overall offset time to a signal input terminal.

Description

晶片測試機內提高抓取訊號精度的方法A Method of Improving the Accuracy of Grabbing Signals in a Wafer Tester

本發明涉及晶片測試機技術領域,具體地說是一種晶片測試機內提高抓取訊號精度的方法。The invention relates to the technical field of wafer testing machines, in particular to a method for improving the accuracy of grabbing signals in a wafer testing machine.

由於晶片測試機各通道路徑不同,會導致訊號到達通道末端的時間不同,因此對傳輸較慢的訊號需要補償,保證訊號到達通道末端的時間保持一致。該補償需要精準抓到訊號變化的位置,但是因為訊號的不確定性,導致訊號每次抓取都會有偏差。如圖1所示,在訊號上升或者下降變化時刻,理想訊號為一條直線。而實際訊號,如圖2所示,實際應用中,訊號每次變化都會有偏差,這在需要重複性高度一致的情況下就會引起精確度的問題。晶片測試機內訊號每次變化都會有偏差主要有兩個原因,一是受到晶片測試機的可程式化邏輯陣列(FPGA)內部以及傳輸線路上的器件精度的限制,使得訊號的發生實際上是在一個範圍內抖動,此種因素是電路特性,很難去消除。二是由於晶片測試機產生訊號的最小單位是固定值100皮秒(ps),其產生訊號的時間是不連續的。 例如理想情況下可以產生10奈秒(ns)、10.1ns、10.2ns 是100ps倍數的上升或下降沿,而不能產生10.05ns、10.15ns、10.25ns這樣的上升或下降沿。並且由於硬體的精度限制,100ps本身也是一個變數。晶片測試機系統時脈為2ns,訊號在2ns的週期內需要走20個步長,這20個步長由於最小單位的不確定性導致訊號的每一步都不一樣。Since the paths of each channel of the chip testing machine are different, the time for the signal to reach the end of the channel will be different. Therefore, it is necessary to compensate for the slower signal transmission to ensure that the time for the signal to reach the end of the channel is consistent. This compensation needs to accurately capture the position of the signal change, but due to the uncertainty of the signal, the signal will be biased every time it is captured. As shown in Figure 1, when the signal rises or falls, the ideal signal is a straight line. As for the actual signal, as shown in Figure 2, in practical applications, there will be deviations every time the signal changes, which will cause accuracy problems when the repeatability is required to be highly consistent. There are two main reasons for the deviation of the signal in the chip tester every time it changes. One is that the chip tester is limited by the accuracy of the programmable logic array (FPGA) inside the chip tester and the devices on the transmission line, so that the signal actually occurs in the Jitter within a range, this factor is a circuit characteristic, it is difficult to eliminate. Second, because the minimum unit of the signal generated by the chip tester is a fixed value of 100 picoseconds (ps), the time for generating the signal is discontinuous. For example, ideally, rising or falling edges of 10 nanoseconds (ns), 10.1ns, and 10.2ns that are multiples of 100ps can be generated, but rising or falling edges of 10.05ns, 10.15ns, and 10.25ns cannot be generated. And due to the precision limitation of the hardware, 100ps itself is also a variable. The clock pulse of the chip tester system is 2ns, and the signal needs to take 20 steps in a period of 2ns. These 20 steps are different for each step of the signal due to the uncertainty of the smallest unit.

目前傳統方法是一般是通過平均取值,而平均取值忽略了各訊號的分佈,這樣得出的訊號並不是最優,抓取訊號變化的位置精度較低。The current traditional method generally uses the average value, but the average value ignores the distribution of each signal, the signal obtained in this way is not optimal, and the position accuracy of capturing signal changes is low.

抓取訊號時,如果以任意一次測量結果作為訊號的實際訊號來處理,必然會引起偏差。因為這只是一次測量結果,如果在其他的位置、時間去測量就會是另外一個結果。 如果在不做優化的情況下以隨機任意一次抓取訊號的來處理補償,當去變換不同的測試點重複檢驗的時候,時沿放置精度(edge placement accuracy,下稱EPA)只能在+/-300Ps,而簡單平均處理,EPA 也只能達到+/-200ps,訊號穩定性較差。When capturing the signal, if any measurement result is used as the actual signal of the signal to process, it will inevitably cause deviation. Because this is only one measurement result, if it is measured at other locations and times, it will be another result. If the compensation is handled by randomly grabbing the signal at any time without optimization, when changing different test points to repeat the inspection, the edge placement accuracy (EPA) can only be within +/- -300Ps, and simple average processing, EPA can only reach +/-200ps, poor signal stability.

因此,設計一種晶片測試機內提高抓取訊號精度的方法,取一個時間週期內所有點,並對所有點進行多點、多次掃描獲取數個真實點的位置,再對若干個真實點取平均以覆蓋一個週期內訊號在各個位置變化的情況,充分考慮訊號的分佈,獲取訊號變化的精準位置進行補償,從而提高訊號抓取精度。Therefore, a method for improving the accuracy of capturing signals in a chip testing machine is designed, taking all points in a time period, and performing multi-point and multiple scans on all points to obtain the positions of several real points, and then taking several real points. Averaging is used to cover the signal changes at various positions within a period, fully consider the signal distribution, and obtain the precise position of the signal change for compensation, thereby improving the signal capture accuracy.

本發明為克服現有技術的不足,提供一種晶片測試機內提高抓取訊號精度的方法,取一個時間週期內所有點,並對所有點進行多點、多次掃描獲取數個真實點的位置,再對數個真實點取平均以覆蓋一個週期內訊號在各個位置變化的情況,充分考慮訊號的分佈,獲取訊號變化的精準位置進行補償,從而提高訊號抓取精度。In order to overcome the deficiencies of the prior art, the present invention provides a method for improving the accuracy of capturing signals in a wafer testing machine, which takes all points in a time period, and performs multi-point and multiple scans on all points to obtain the positions of several real points. Then take the average of several real points to cover the signal changes at various positions within a period, fully consider the distribution of the signal, and obtain the precise position of the signal change for compensation, thereby improving the signal capture accuracy.

為實現上述目的,設計一種晶片測試機內提高抓取訊號精度的方法,包括:In order to achieve the above object, a method for improving the accuracy of capturing signals in a chip testing machine is designed, including:

S1,以100皮秒(ps)為時間間隔取21個點作為訊號變化的21個理想變化點(例如,標示為P n); S1, taking 100 picoseconds (ps) as the time interval to take 21 points as the 21 ideal change points of the signal change (for example, marked as P n );

S2,以該21個理想變化點中的第一理想變化點(例如,標示為P 1)為中心,前後時間內以100ps的時間間隔各取5個時間點作為樣本點,對每個樣本點及第一理想變化點P 1分別進行檢測掃描,並記錄每檢測掃描結果,檢測到訊號變化記錄為第一值(例如,標示為P),未檢測到訊號變化記錄為第二值(例如,標示為F); S2, take the first ideal change point (for example, marked as P 1 ) among the 21 ideal change points as the center, take 5 time points at intervals of 100 ps as sample points in the preceding and following periods, and for each sample point and the first ideal change point P 1 to perform detection scans respectively, and record the results of each detection scan. The detected signal change is recorded as the first value (for example, marked as P), and the signal change that is not detected is recorded as the second value (for example, marked as F);

S3,對每個樣本點及第一理想變化點P 1多次重複步驟S2的檢測掃描,並記錄該多次檢測掃描的多個檢測掃描結果; S3, repeating the detection scan in step S2 multiple times for each sample point and the first ideal change point P1, and recording multiple detection scan results of the multiple detection scans;

S4,根據該些檢測掃描結果建立統計資料模型,統計資料模型的縱列按照該每個樣本點及第一理想變化點P 1的時間順序進行排序,橫列按照掃描發現訊號變化的先後順序進行排序; S4. Establish a statistical data model based on the detection and scanning results. The columns of the statistical data model are sorted according to the time sequence of each sample point and the first ideal change point P1, and the horizontal columns are sorted according to the order in which the signal changes are found in the scan. sort;

S5,根據統計資料模型中訊號變化的位置,得到該理想變化點P 1訊號變化的第一真實變化點(例如,標示為V 1); S5. Obtain the first real change point (for example, marked as V 1 ) of the signal change at the ideal change point P 1 according to the position of the signal change in the statistical data model;

S6,重複步驟S2-S5,獲取該21個理想變化點P n的真實變化點(例如,標示為V n); S6, repeating steps S2-S5 to obtain the real change points of the 21 ideal change points P n (for example, marked as V n );

S7,根據該21個理想變化點P n與該21個真實變化點V n計算訊號的整體偏差時間(例如,標示為∆t); S7, calculating the overall deviation time of the signal (for example, marked as ∆t) according to the 21 ideal change points P n and the 21 real change points V n ;

S8,將整體偏差時間∆t補償在晶片測試機的訊號輸入端;S8, compensating the overall deviation time Δt at the signal input end of the wafer testing machine;

所述的步驟S5中得出訊號變化的該第一真實變化點V 1的方法具體如下: The method of obtaining the first real change point V1 of the signal change in the step S5 is specifically as follows:

若多次檢測掃描中,訊號變化點的位置一致,則取該點為訊號變化的該第一真實變化點V 1;若多次檢測掃描中,訊號變化點出現在多個位置,則取出現次數最多的點為訊號變化的該第一真實變化點V 1If the position of the signal change point is the same in multiple detection scans, then take this point as the first real change point V 1 of the signal change; if the signal change point appears in multiple positions in multiple detection scans, then take the present The most frequent point is the first real change point V 1 of signal change.

所述的步驟S3中重複檢測掃描次數為99次。The number of repeated detection scans in step S3 is 99 times.

所述的步驟S7中的整體偏差時間∆t的計算公式為

Figure 02_image001
,其中∆t為該整體偏差時間, P n為該21個理想變化點,且V n為該21個真實變化點。 The calculation formula of the overall deviation time ∆t in the step S7 is
Figure 02_image001
, where Δt is the overall deviation time, P n is the 21 ideal change points, and V n is the 21 real change points.

本發明同現有技術相比,取一個時間週期內所有點,並對所有點進行多點、多次掃描獲取數個真實點的位置,再對若數個真實點取平均以覆蓋一個週期內訊號在各個位置變化的情況,充分考慮訊號的分佈,獲取訊號變化的精準位置進行補償,從而提高訊號抓取精度。Compared with the prior art, the present invention takes all points in a time period, and performs multi-point and multiple scans on all points to obtain the positions of several real points, and then averages the several real points to cover the signal in one cycle In the case of various position changes, the distribution of the signal is fully considered, and the precise position of the signal change is obtained for compensation, thereby improving the accuracy of signal capture.

實施例一:Embodiment one:

本實施例是一種晶片測試機內提高抓取訊號精度的方法,具體包括如下步驟:This embodiment is a method for improving the accuracy of capturing signals in a chip testing machine, which specifically includes the following steps:

S1,以100皮秒(ps)為時間間隔取21個點作為訊號變化的理想變化點P n,分別為P 1=10ns、P 2=10.1ns、P 3=10.2ns、P 4=10.3ns、P 5=10.4ns、P 6=10.5ns、P 7=10.6ns、P 8=10.7ns、P 9=10.8ns、P 10=10.9ns、P 11=11ns、P 12=11.1ns、P 13=11.2ns、P 14=11.3ns、P 15=11.4ns、P 16=11.5ns、P 17=11.6ns、P 18=11.7ns、P 19=11.8ns、P 20=11.9ns、P 21=12ns; S1, take 100 picoseconds (ps) as the time interval to take 21 points as the ideal change point P n of the signal change, respectively P 1 =10ns, P 2 =10.1ns, P 3 =10.2ns, P 4 =10.3ns , P 5 =10.4ns, P 6 =10.5ns, P 7 =10.6ns, P 8 =10.7ns, P 9 =10.8ns, P 10 =10.9ns, P 11 =11ns, P 12 =11.1ns, P 13 =11.2ns, P 14 =11.3ns, P 15 =11.4ns, P 16 =11.5ns, P 17 =11.6ns, P 18 =11.7ns, P 19 =11.8ns, P 20 =11.9ns, P 21 =12ns ;

S2,以理想變化點P 1(10ns)為中心,前後時間內以100ps的時間間隔各取5個時間點作為樣本點,分別為9.5ns、9.6ns、9.7ns、9.8ns、9.9ns、10.1ns、10.2ns、10.3ns、10.4ns、10.5ns,分別對每個樣本點、及理想變化點P 1(10ns)分別進行檢測掃描,並記錄檢測掃描結果,檢測到訊號變化記錄為第一值(例如,標示為P),未檢測到訊號變化記錄為第二值(例如,標示為F); S2, with the ideal change point P 1 (10ns) as the center, take 5 time points at intervals of 100ps as sample points, respectively 9.5ns, 9.6ns, 9.7ns, 9.8ns, 9.9ns, 10.1 ns, 10.2ns, 10.3ns, 10.4ns, 10.5ns, each sample point and the ideal change point P 1 (10ns) were detected and scanned respectively, and the detection and scanning results were recorded, and the detected signal change was recorded as the first value (e.g. marked as P), no signal change detected is recorded as a second value (e.g. marked as F);

S3,對理想變化點P 1及10個樣本點進行99次檢測掃描,每次檢測掃描得到11個掃描結果; S3, 99 detection scans are performed on the ideal change point P1 and 10 sample points, and 11 scan results are obtained for each detection scan;

S4,根據掃描結果建立統計資料模型,統計資料模型的縱列按照理想變化點P 1及10個樣本點的時間順序進行排序,橫列按照掃描發現訊號變化的先後順序進行排序,得到的統計資料模型300如圖3所示。 S4. Establish a statistical data model based on the scanning results. The columns of the statistical data model are sorted according to the time sequence of the ideal change point P 1 and 10 sample points, and the horizontal columns are sorted according to the sequence of signal changes found in the scan. The obtained statistical data Model 300 is shown in FIG. 3 .

S5,在得到的統計資料模型中,可以看出訊號在某點發生了變化。從圖3中可以看出,訊號變化點出現在多個位置,則取出現次數最多的點,10.1ns為訊號變化的真實變化點V 1S5, in the resulting statistical model, it can be seen that the signal changes at a certain point. It can be seen from Figure 3 that the signal change point appears in multiple positions, and the point with the most occurrences is taken, and 10.1 ns is the real change point V 1 of the signal change.

S6,重複步驟S2-S5,獲取21個理想變化點P n分別對應的真實變化點V n,分別為V 2=9.9、V 3=10、V 4=9.7、V 5=10.2、V 6=10.3、V 7=10.4、V 8=10.4、V 9=10.5、V 10=10.6、V 11=10.7、V 12=10.8、V 13=10.9、V 14=11、V 15=11.2、V 16=11.3、V 17=11.4、V 18=11.5、V 19=11.5、V 20=11.6、V 21=11.7,如圖4所示。 S6, repeating steps S2-S5 to obtain the real change points V n corresponding to the 21 ideal change points P n respectively, V 2 =9.9, V 3 =10, V 4 =9.7, V 5 =10.2, V 6 = 10.3, V 7 =10.4, V 8 =10.4, V 9 =10.5, V 10 =10.6, V 11 =10.7, V 12 =10.8, V 13 =10.9, V 14 =11, V 15 =11.2, V 16 = 11.3, V 17 =11.4, V 18 =11.5, V 19 =11.5, V 20 =11.6, V 21 =11.7, as shown in Fig. 4 .

S7,根據理想變化點P n與真實變化點V n計算訊號的整體偏差時間∆t,

Figure 02_image003
; S7, calculate the overall deviation time ∆t of the signal according to the ideal change point P n and the real change point V n ,
Figure 02_image003
;

S8,將整體偏差時間∆t補償在晶片測試機的訊號輸入端。S8. Compensating the overall deviation time Δt at the signal input terminal of the wafer testing machine.

步驟S1中,晶片測試機訊號實現的最小單位是100ps,而訊號以2ns為週期,因此取21點可以覆蓋整個週期內訊號出現的位置。本實施例選取10-12ns之間的21個點,覆蓋一個訊號週期內訊號出現的所有位置。In step S1, the minimum unit of the chip tester signal is 100 ps, and the signal has a cycle of 2 ns, so taking 21 points can cover the position where the signal appears in the entire cycle. In this embodiment, 21 points between 10-12 ns are selected to cover all positions where the signal appears within a signal period.

步驟S2中,左右各取5點的原因是10*100ps=1ns,完全覆蓋了當前訊號可能變化的範圍。本步驟中利用晶片測試機內通道的比較單元分別檢測11個時間點內訊號是否升高。In step S2, the reason for taking 5 points on the left and right is that 10*100ps=1ns, which completely covers the possible range of the current signal. In this step, the comparison unit of the channel in the chip testing machine is used to detect whether the signal rises at 11 time points.

步驟S4中,統計資料模型的縱列按照掃描發現訊號變化的先後順序進行排序,而不是按照檢測掃描的時間順序進行排序。例如圖3中,第一次檢測掃描發現電平變化位置在10.1ns,而第二次檢測掃描發現電平變化位置在9.9ns,那麼在統計資料模型上中,第二次檢測掃描的結果要排列在第一次檢測掃描的前一行,便於建立統計資料模型。In step S4, the columns of the statistical data model are sorted according to the order in which the signal changes were detected in the scans, rather than in the order in which the scans were detected. For example, in Figure 3, the first detection scan finds that the level change position is at 10.1 ns, and the second detection scan finds that the level change position is at 9.9 ns, then in the statistical data model, the result of the second detection scan should be Arranged in the first line before the first detection scan, it is convenient to build statistical data model.

步驟S5中,若多次檢測掃描中,訊號變化點的位置一致,則取該點為訊號變化的真實變化點V nIn step S5, if the position of the signal change point is the same in multiple detection scans, this point is taken as the real change point V n of the signal change.

步驟S6中,在實際應用過程中,訊號可能會出現在一個週期內任意一個時間步長的位置,並且出現在任意一個時間步長的概率相等。因此,為了滿足21個步長位置偏差最小的要求,對各點的時間偏差去平均值,作為該通道內時間訊號偏差的補償值。In step S6, in the actual application process, the signal may appear at any time step within a cycle, and the probability of appearing at any time step is equal. Therefore, in order to meet the requirement of the minimum position deviation of 21 steps, the time deviation of each point is averaged, and used as the compensation value of the time signal deviation in the channel.

步驟S8補償整體偏差時間∆t後,對晶片測試機該通道的時沿放置精度(EPA)進行測試,測得EPA為 +/-120ps,與傳統方法的簡單平均處理相比,提高了訊號抓取精度。After compensating for the overall deviation time ∆t in step S8, test the time edge placement accuracy (EPA) of the channel of the wafer testing machine, and the measured EPA is +/-120ps, which improves the signal capture compared with the simple average processing of the traditional method. Take precision.

本發明取一個時間週期內所有點,並對所有點進行多點、多次掃描獲取數個真實點的位置,再對數個真實點取平均以覆蓋一個週期內訊號在各個位置變化的情況,充分考慮訊號的分佈,獲取訊號變化的精準位置進行補償,進而提高訊號抓取精度。The present invention takes all points in a time period, and performs multi-point and multiple scans on all points to obtain the positions of several real points, and then takes the average of several real points to cover the situation that the signal changes in each position within a cycle, fully Considering the distribution of the signal, the precise position of the signal change is obtained for compensation, thereby improving the accuracy of signal capture.

300:統計資料模型 P:第一值 F:第二值 300: Statistical Data Modeling P: first value F: second value

[圖1]為晶片測試機內理想訊號變化時的示意圖; [圖2]為晶片測試機內實際訊號變化時的示意圖; [圖3]為本發明實施例一步驟S4得到的資料統計模型;以及 [圖4]為本發明實施例一步驟S6與一步驟S7得到的理想變化點、真實變化點以及其差值之示意圖。 [Figure 1] is a schematic diagram of ideal signal changes in the wafer testing machine; [Figure 2] is a schematic diagram of the actual signal changes in the chip testing machine; [Fig. 3] is the data statistical model obtained in step S4 of the first embodiment of the present invention; and [ FIG. 4 ] is a schematic diagram of the ideal change point, the real change point and their difference obtained in step S6 and step S7 of the embodiment of the present invention.

300:統計資料模型 300: Statistical Data Modeling

P:第一值 P: first value

F:第二值 F: second value

Claims (3)

一種晶片測試機內提高抓取訊號精度的方法,包括以下步驟: S1,以100皮秒為時間間隔取21個點作為訊號變化的21個理想變化點; S2,以該21個理想變化點中的一第一理想變化點為中心,前後時間內以100皮秒的時間間隔各取5個時間點作為樣本點,對每個樣本點及該第一理想變化點分別進行檢測掃描,並記錄檢測掃描結果,檢測到訊號變化記錄為一第一值,未檢測到訊號變化記錄為一第二值; S3,對該每個樣本點及該第一理想變化點多次重複該步驟S2的檢測掃描,並記錄該多次檢測掃描的多個檢測掃描結果; S4,根據該些檢測掃描結果建立一統計資料模型,統計資料模型的縱列按照該每個樣本點及該第一理想變化點的時間順序進行排序,橫列按照掃描發現訊號變化的先後順序進行排序; S5,根據該統計資料模型中訊號變化的位置,得到該第一理想變化點訊號變化的一第一真實變化點; S6,重複該步驟S2-S5,獲取該21個理想變化點對應的21個真實變化點; S7,根據該21個理想變化點與該21個真實變化點計算訊號的整體偏差時間;以及 S8,將該整體偏差時間補償在一晶片測試機的訊號輸入端, 其中該步驟S5中得出訊號變化的該第一真實變化點包含: 若多次檢測掃描中,訊號變化點的位置一致,則取該點為訊號變化的該第一真實變化點;若多次檢測掃描中,訊號變化點出現在多個位置,則取出現次數最多的點為訊號變化的該第一真實變化點。 A method for improving the accuracy of capturing signals in a wafer testing machine, comprising the following steps: S1, take 21 points as the 21 ideal change points of the signal change with a time interval of 100 picoseconds; S2, taking a first ideal change point in the 21 ideal change points as the center, taking 5 time points at intervals of 100 picoseconds as sample points, for each sample point and the first ideal change point The change points are detected and scanned respectively, and the detection and scanning results are recorded. The detected signal change is recorded as a first value, and the signal change is not detected as a second value; S3. Repeat the detection scan in step S2 multiple times for each sample point and the first ideal change point, and record multiple detection scan results of the multiple detection scans; S4. Establish a statistical data model according to the detection and scanning results. The columns of the statistical data model are sorted according to the time order of each sample point and the first ideal change point, and the horizontal columns are sorted according to the sequence of signal changes found in the scan. sort; S5. Obtain a first real change point of the signal change at the first ideal change point according to the position of the signal change in the statistical data model; S6, repeating the steps S2-S5 to obtain 21 real change points corresponding to the 21 ideal change points; S7, calculating the overall deviation time of the signal according to the 21 ideal change points and the 21 real change points; and S8, compensating the overall deviation time at the signal input end of a chip testing machine, Wherein the first real change point of the signal change obtained in the step S5 includes: If the position of the signal change point is the same in multiple detection scans, then take this point as the first real change point of the signal change; if the signal change point appears in multiple positions in multiple detection scans, take the most frequent occurrence The point of is the first real change point of the signal change. 如請求項1之晶片測試機內提高抓取訊號精度的方法,其中在該步驟S3中重複檢測掃描次數為99次。The method for improving the accuracy of capturing signals in a wafer testing machine as claimed in item 1, wherein the number of repeated detection scans in step S3 is 99 times. 如請求項1之晶片測試機內提高抓取訊號精度的方法,其中在該步驟S7中的該整體偏差時間的計算公式為
Figure 03_image001
,其中∆t為該整體偏差時間, P n為該21個理想變化點,且V n為該21個真實變化點。
Such as the method for improving the accuracy of capturing signals in the chip testing machine of claim 1, wherein the calculation formula of the overall deviation time in the step S7 is:
Figure 03_image001
, where Δt is the overall deviation time, P n is the 21 ideal change points, and V n is the 21 real change points.
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Publication number Priority date Publication date Assignee Title
US7901873B2 (en) * 2001-04-23 2011-03-08 Tcp Innovations Limited Methods for the diagnosis and treatment of bone disorders
US9075106B2 (en) * 2009-07-30 2015-07-07 International Business Machines Corporation Detecting chip alterations with light emission
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US9671448B2 (en) * 2012-12-28 2017-06-06 Illinois Tool Works Inc. In-tool ESD events monitoring method and apparatus
US9563218B2 (en) * 2013-03-15 2017-02-07 Dominion Resources, Inc. Electric power system control with measurement of energy demand and energy efficiency using t-distributions
CN103353922B (en) * 2013-06-21 2016-09-21 中国科学院紫金山天文台 A kind of OTF observes scan method
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US11079212B2 (en) * 2014-10-24 2021-08-03 Qnovo Inc. Circuitry and techniques for determining swelling of a battery/cell and adaptive charging circuitry and techniques based thereon
CN105954796B (en) * 2016-06-17 2018-02-02 中国石油天然气集团公司 A kind of method and apparatus for the hypocentral location for determining microseism
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US11651492B2 (en) * 2019-07-12 2023-05-16 Bruker Nano, Inc. Methods and systems for manufacturing printed circuit board based on x-ray inspection
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