TW202231147A - Circuit board and manufacturing method thereof and electronic device - Google Patents

Abstract

A circuit board includes a first external circuit layer, a first substrate, a second substrate, a third substrate, and a conductive through hole structure. The first substrate includes a plurality of conductive pillars electrically connecting the first external circuit layer and the second substrate. The second substrate has an opening and includes a first dielectric layer. The opening penetrates the second substrate, and the first dielectric layer fills the opening. The third substrate includes an insulating layer, a second external circuit layer and a plurality of conductive holes. A conductive material layer of the conductive through hole structure covers an inner wall of a through hole and electrically connects the first external circuit layer and the second external circuit layer to define a signal path. The first external circuit layer, the conductive pillars, the second substrate, the conductive holes and the second external circuit layer are electrically connected to define a ground path, wherein the ground path surrounds the signal path.

Description

Circuit board, method of making the same, and electronic device

The present invention relates to a substrate structure and a manufacturing method thereof, and more particularly, to a circuit board and a manufacturing method thereof, and an electronic device using the circuit board.

In the existing circuit board, the design of the coaxial via requires one or more insulating layers between the inner conductor layer and the outer conductor layer for blocking, and the insulating layer is formed by pressing the build-up layer. way to achieve. Therefore, there will be impedance mismatch at both ends of the coaxial through hole and there will be electromagnetic interference (EMI) shielding gaps, which will affect the integrity of high-frequency signals. In addition, in the design of the coaxial through hole, the two ends of the signal path are respectively located on different planes, and the noise interference cannot be reduced.

The present invention provides a circuit board with good signal loop and better signal integrity.

The present invention also provides a manufacturing method of a circuit board, which is used to manufacture the above-mentioned circuit board.

The present invention further provides an electronic device comprising the above-mentioned circuit board, which has better signal transmission reliability.

The circuit board of the present invention includes a first external circuit layer, a first base material, a second base material, a third base material and a via structure. The first base material is disposed between the first external circuit layer and the second base material. The first substrate includes a plurality of conductive pillars, and the conductive pillars are electrically connected to the first external circuit layer and the second substrate. The second substrate has an opening and includes a first dielectric layer. The opening penetrates the second substrate, and the first dielectric layer fills the opening. The second base material is disposed between the first base material and the third base material. The third substrate includes an insulating layer, a second outer circuit layer on the insulating layer, and a plurality of vias penetrating the insulating layer and electrically connecting the second substrate and the second outer circuit layer. The via structure includes a through hole and a conductive material layer. The through hole penetrates through the first substrate, the first dielectric layer of the second substrate, and the third substrate. The conductive material layer covers the inner wall of the through hole and electrically connects the first outer circuit layer and the second outer circuit layer to define a signal path. The first external circuit layer, the conductive post, the second substrate, the via hole and the second external circuit layer are electrically connected to define a grounding path, wherein the grounding path surrounds the signal path.

In an embodiment of the present invention, the above-mentioned first substrate further includes a base, and the conductive pillars penetrate through the base. The second substrate further includes a core layer, a first circuit layer, a second circuit layer and a conductive connection layer. The first circuit layer and the second circuit layer are respectively disposed on opposite sides of the core layer. The core layer has an opening, and the conductive connection layer is disposed on the inner wall of the opening and located between the first dielectric layer and the core layer. The conductive connection layer electrically connects the first circuit layer and the second circuit layer. The conductive column is electrically connected to the first external circuit layer and the first circuit layer.

In an embodiment of the present invention, the above-mentioned first substrate further includes a dielectric material block that penetrates the substrate and is located between the conductive pillars. The surrounding surface of the block of dielectric material is in direct contact with the conductive pillars.

In an embodiment of the present invention, the above-mentioned first external circuit layer includes a first signal circuit and a first ground circuit. The second external circuit layer includes a second signal circuit and a second ground circuit. The first signal line, the conductive material layer and the second signal line define a signal path. The first ground line, the conductive post, the first line layer, the conductive connection layer, the second line layer, the via hole and the second ground line define a ground path.

In an embodiment of the present invention, the above-mentioned via structure further includes a second dielectric layer that fills the through hole. A first surface and a second surface of the second dielectric layer opposite to each other are aligned with an upper surface of the first outer circuit layer and a lower surface of the second outer circuit layer, respectively.

In an embodiment of the present invention, the above-mentioned via structure further includes a second dielectric layer that fills the through hole. The first outer circuit layer and the second outer circuit layer respectively cover a first surface and a second surface of the second dielectric layer opposite to each other.

The manufacturing method of the circuit board of the present invention includes the following steps. A metal layer, a first base material, a second base material and a third base material are pressed together, so that the first base material is located between the metal layer and the second base material, and the second base material is located at the first base between the material and the third substrate. The first substrate includes a plurality of conductive pillars. The second substrate has an opening and includes a first dielectric layer. The opening penetrates the second substrate, and the first dielectric layer fills the opening. The third substrate includes an insulating layer and a conductive layer on the insulating layer. Multiple blind holes and through holes are formed. The blind via extends from the third substrate to the second substrate. The through hole penetrates through the metal layer, the first base material, the first dielectric layer of the second base material, and the insulating layer and the conductive layer of the third base material. A conductive material layer is formed to cover the metal layer, the conductive layer of the third substrate and the inner wall of the through hole, and the blind holes are filled to define a plurality of through holes. The conductive material layer, the metal layer and the conductive layer are patterned to form a first external circuit layer on the first substrate and electrically connected to the conductive posts and a second external circuit on the insulating layer and electrically connected to the via holes layer, and defines a via structure connecting the first external circuit layer and the second external circuit layer and located in the through hole. The via structure electrically connects the first external circuit layer and the second external circuit layer to define a signal path. The first external circuit layer, the conductive post, the second substrate, the via hole and the second external circuit layer are electrically connected to define a grounding path. The ground path surrounds the signal path.

In an embodiment of the present invention, the aforementioned step of laminating the metal layer, the first substrate, the second substrate, and the third substrate includes providing a metal layer. A first base material is provided, wherein the first base material further includes a base, and the conductive column penetrates through the base. A second base material is provided, wherein the second base material further comprises a core layer, a first circuit layer, a second circuit layer and a conductive connection layer. The first circuit layer and the second circuit layer are respectively disposed on opposite sides of the core layer. The core layer has an opening, and the conductive connection layer is disposed on the inner wall of the opening and located between the first dielectric layer and the core layer. The conductive connection layer electrically connects the first circuit layer and the second circuit layer. A third substrate is provided. The first substrate and the second substrate are located between the metal layer and the third substrate, the first substrate is located between the metal layer and the second substrate, and the second substrate is located between the first substrate and the third substrate between substrates. A thermocompression bonding process is performed to bond the metal layer, the first substrate, the second substrate and the third substrate, so that the metal layer directly covers the base of the first substrate and one side of the conductive column. The conductive column connects the metal layer and the first circuit layer of the second substrate, and the insulating layer of the third substrate connects to the second circuit layer of the second substrate.

In an embodiment of the present invention, the above-mentioned method for fabricating a circuit board further includes, after forming the conductive material layer and before patterning the conductive material layer, the metal layer and the conductive layer, filling a second dielectric layer in the through-hole inside the hole. The second dielectric layer fills the through holes, and a first surface and a second surface opposite to each other of the second dielectric layer are flush with an upper surface and a lower surface of the conductive material layer, respectively.

In an embodiment of the present invention, the above-mentioned manufacturing method of the circuit board further includes forming a cover after filling the second dielectric layer in the through hole and before patterning the conductive material layer, the metal layer and the conductive layer The capping layer is on the conductive material layer. The cover layer covers the conductive material layer and the first surface and the second surface of the second dielectric layer. The cap layer, the conductive material layer, the metal layer and the conductive layer are patterned to form a first outer circuit layer and a second outer circuit layer. The first external circuit layer is located on the base of the first substrate and on the first surface of the second dielectric layer. The second external circuit layer is located on the insulating layer of the third substrate and on the second surface of the second dielectric layer.

In an embodiment of the present invention, the above-mentioned first external circuit layer includes a first signal circuit and a first ground circuit. The second external circuit layer includes a second signal circuit and a second ground circuit. The first signal line, the conductive material layer and the second signal line define a signal path. The first ground line, the conductive post, the first line layer, the conductive connection layer, the second line layer, the via hole and the second ground line define a ground path.

In an embodiment of the present invention, the aforementioned step of laminating the metal layer, the first substrate, the second substrate, and the third substrate includes providing a metal layer. A first substrate is provided, wherein the first substrate further includes a substrate and a block of dielectric material extending through the substrate. The blocks of dielectric material are located between the conductive pillars, and the surrounding surfaces of the blocks of dielectric material directly contact the conductive pillars. A second base material is provided, wherein the second base material further comprises a core layer, a first circuit layer, a second circuit layer and a conductive connection layer. The first circuit layer and the second circuit layer are respectively disposed on opposite sides of the core layer. The core layer has an opening, and the conductive connection layer is disposed on the inner wall of the opening and located between the first dielectric layer and the core layer. The conductive connection layer electrically connects the first circuit layer and the second circuit layer. A third substrate is provided. The first substrate and the second substrate are positioned between the metal layer and the third substrate. The first substrate is located between the metal layer and the second substrate. The second substrate is located between the first substrate and the third substrate. A thermocompression bonding process is performed to bond the metal layer, the first base material, the second base material and the third base material, so that the metal layer directly covers the base of the first base material, one side of the conductive column and the dielectric material a surface of the block. The conductive column connects the metal layer and the first circuit layer of the second substrate. The other surface of the dielectric material block directly contacts the first dielectric layer and the first circuit layer of the second substrate. The insulating layer of the third substrate is connected to the second circuit layer of the second substrate.

In an embodiment of the present invention, when the above-mentioned through holes are formed, the through holes pass through the dielectric material block at the same time.

In an embodiment of the present invention, the above-mentioned method for fabricating a circuit board further includes, after forming the conductive material layer and before patterning the conductive material layer, the metal layer and the conductive layer, filling a second dielectric layer in the through-hole inside the hole. The second dielectric layer fills the through holes, and a first surface and a second surface opposite to each other of the second dielectric layer are flush with an upper surface and a lower surface of the conductive material layer, respectively.

In an embodiment of the present invention, the above-mentioned manufacturing method of the circuit board further includes forming a cover after filling the second dielectric layer in the through hole and before patterning the conductive material layer, the metal layer and the conductive layer The capping layer is on the conductive material layer. The cover layer covers the conductive material layer and the first surface and the second surface of the second dielectric layer. The cap layer, the conductive material layer, the metal layer and the conductive layer are patterned to form a first outer circuit layer and a second outer circuit layer. The first external circuit layer is located on the base of the first substrate and on the first surface of the second dielectric layer. The second external circuit layer is located on the insulating layer of the third substrate and on the second surface of the second dielectric layer.

In an embodiment of the present invention, the above-mentioned first external circuit layer includes a first signal circuit and a first ground circuit. The second external circuit layer includes a second signal circuit and a second ground circuit. The first signal line, the conductive material layer and the second signal line define a signal path. The first ground line, the conductive post, the first line layer, the conductive connection layer, the second line layer, the via hole and the second ground line define a ground path.

In an embodiment of the present invention, the dielectric loss (Dissipation Factor, Df) of the above-mentioned dielectric material block is greater than 0 and less than 0.016.

The electronic device of the present invention includes a circuit board and an electronic component. The circuit board includes a first external circuit layer, a first base material, a second base material, a third base material and a via structure. The first base material is disposed between the first external circuit layer and the second base material. The first substrate includes a plurality of conductive pillars, and the conductive pillars are electrically connected to the first external circuit layer and the second substrate. The second substrate has an opening and includes a first dielectric layer. The opening penetrates the second substrate, and the first dielectric layer fills the opening. The second base material is disposed between the first base material and the third base material. The third substrate includes an insulating layer, a second outer circuit layer on the insulating layer, and a plurality of vias penetrating the insulating layer and electrically connecting the second substrate and the second outer circuit layer. The via structure includes a through hole and a conductive material layer. The through hole penetrates through the first substrate, the first dielectric layer of the second substrate, and the third substrate. The conductive material layer covers the inner wall of the through hole and electrically connects the first outer circuit layer and the second outer circuit layer to define a signal path. The first external circuit layer, the conductive post, the second substrate, the via hole and the second external circuit layer are electrically connected to define a grounding path, wherein the grounding path surrounds the signal path. The electronic components are electrically connected to the circuit board.

In an embodiment of the present invention, the above-mentioned electronic device further includes a plurality of connecting elements disposed between the third substrate of the circuit board and the electronic components. The electronic component is electrically connected to the circuit board through the connector.

In an embodiment of the present invention, the aforementioned connector includes a plurality of solder balls.

Based on the above, in the design of the circuit board of the present invention, the conductive material layer of the via structure electrically connects the first external circuit layer and the second external circuit layer to define a signal path, and the first external circuit layer, the conductive posts, The second substrate, the via hole and the second external circuit layer are electrically connected to define a ground path, wherein the ground path surrounds the signal path. In this way, a good high-frequency and high-speed signal loop can be formed, and the subsequent application of integrated circuits and antennas can also solve the problem of signal interference on the same plane, which can reduce signal energy loss and noise interference, thereby improving the signal. Transmission reliability.

In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, the following embodiments are given and described in detail with the accompanying drawings as follows.

1A to 1E are schematic cross-sectional views of a method for fabricating a circuit board according to an embodiment of the present invention. FIG. 1F is a schematic top view of the circuit board of FIG. 1E . Regarding the manufacturing method of the circuit board of this embodiment, first, referring to FIG. 1A , a metal layer 112 , a first substrate 120 , a second substrate 130 and a third substrate 140 are provided.

In detail, the first substrate 120 includes a plurality of conductive pillars 124 extending through the base 122 . The step of providing the first substrate 120 includes firstly providing the substrate 122, wherein the substrate 122 is in a B-stage state at this time, meaning that it has not yet been fully cured. Next, release films may be attached on opposite sides of the substrate 122 , wherein the material of the release films is polyester polymer (PET). Afterwards, a drilling process is performed on the substrate 122 to form through holes, wherein the drilling process is, for example, but not limited to, laser drilling or mechanical drilling. Finally, by printing or injection, the conductive paste is filled in the through holes to form the conductive pillars 124 . After that, the release films attached to the opposite sides of the substrate 122 are removed, and the opposite surfaces of the conductive pillars 124 are respectively protruded from the opposite surfaces of the substrate 122 to complete the fabrication of the first substrate 120 .

Next, referring to FIG. 1A , the second substrate 130 includes a core layer 132 , a first circuit layer 134 , a first dielectric layer 135 , a second circuit layer 136 and a conductive connection layer 138 . The core layer 132 has an opening 133 , and the opening 133 penetrates the second substrate 130 , and the first dielectric layer 135 fills the opening 133 . Here, opposite sides of the first dielectric layer 135 are substantially aligned with opposite ends of the opening 133 . The first circuit layer 134 and the second circuit layer 136 are respectively disposed on opposite sides of the core layer 132 . The conductive connection layer 138 covers the inner wall of the opening 133 and is located between the first dielectric layer 135 and the core layer 132 , wherein the conductive connection layer 138 electrically connects the first circuit layer 134 and the second circuit layer 136 . The third substrate 140 includes an insulating layer 142 and a conductive layer 143 on the insulating layer 142 .

Next, referring to FIG. 1A again, the first substrate 120 and the second substrate 130 are located between the metal layer 112 and the third substrate 140 , and the first substrate 120 is located between the metal layer 112 and the second substrate 130 while the second substrate 130 is located between the first substrate 120 and the third substrate 140 .

Next, referring to FIG. 1B , a thermocompression bonding process is performed to bond the metal layer 112 , the first substrate 120 , the second substrate 130 and the third substrate 140 , so that the metal layer 112 directly covers the first substrate One side of the base 122 and the conductive pillar 124 of 120 . Here, because the thermocompression bonding process is used, the base 122 of the first substrate 120 will be transformed from the original B-stage state to a C-stage state, which means that it is in a fully cured state, so that the metal layer 112 and the The second substrates 130 are respectively connected on the first substrates 120 . The conductive pillars 124 of the first substrate 120 are deformed by contacting the metal layer 112 and the first circuit layer 134 , and the conductive pillars 124 are electrically connected to the metal layer 112 and the first circuit layer 134 of the second substrate 130 . The base 122 of the first substrate 120 covers the core layer 132 , the first circuit layer 134 and the first dielectric layer 135 of the second substrate 130 . The insulating layer 142 of the third substrate 140 is connected to the second wiring layer 136 and covers the core layer 132 , the first dielectric layer 135 and the second wiring layer 136 of the second substrate 130 .

Next, referring to FIG. 1C , a plurality of blind holes 145 and through holes T are formed. The blind vias 145 extend from the third substrate 140 to the second substrate 130 to expose the second circuit layer 136 . The through hole T penetrates through the metal layer 112 , the first substrate 120 , the first dielectric layer 135 of the second substrate 130 , and the insulating layer 142 and the conductive layer 143 of the third substrate 140 . Here, the method of forming the blind hole 145 is, for example, laser drilling, and the method of forming the through hole T is, for example, mechanical drilling, but not limited thereto.

After that, referring to FIG. 1D , a conductive material layer 150 is formed, covering the metal layer 112 , the conductive layer 143 of the third substrate 140 and the inner wall of the through hole T, and filling the blind holes 145 to define a plurality of through holes 148 . Here, the manner of forming the conductive material layer 150 is, for example, electroplating, and the conductive material layer 150 is, for example, copper, but not limited thereto.

Finally, please refer to FIG. 1D and FIG. 1E at the same time, through a lithography process, the conductive material layer 150 , the metal layer 112 and the conductive layer 143 are patterned to form a conductive material layer 150 on the first substrate 120 and electrically connected to the conductive column 124 . The first outer circuit layer 110a and a second outer circuit layer 144a located on the insulating layer 142 and electrically connected to the via hole 148 are defined to connect the first outer circuit layer 110a and the second outer circuit layer 144a and located in the through hole T A via structure 160a inside. The via structure 160a electrically connects the first external circuit layer 110a and the second external circuit layer 144a to define a signal path L1. The first external circuit layer 110a, the conductive post 124, the second substrate 130, the via hole 148 and the second external circuit layer 144a are electrically connected to define a grounding path L2. In particular, the ground path L2 surrounds the signal path L1, and two sides of the signal path L1 and two sides of the ground path L2 are respectively located on the same plane. So far, the fabrication of the circuit board 100a has been completed.

1E and 1F at the same time, in this embodiment, the circuit board 100a includes a first external circuit layer 110a, a first substrate 120, a second substrate 130, a third substrate 140 and via holes Structure 160a. The first substrate 120 is disposed between the first external circuit layer 110 a and the second substrate 130 . The first substrate 120 includes conductive pillars 124 , and the conductive pillars 124 are electrically connected to the first external circuit layer 110 a and the second substrate 130 . The second substrate 130 has openings 133 and includes a first dielectric layer 135 . The opening 133 penetrates through the second substrate 130 , and the first dielectric layer 135 fills the opening 133 . The second base material 130 is disposed between the first base material 120 and the third base material 140 . The third substrate 140 includes an insulating layer 142 , a second outer circuit layer 144 a on the insulating layer 142 , and a via hole 148 penetrating the insulating layer 142 and electrically connecting the second substrate 130 and the second outer circuit layer 144 a . The via structure 160 a includes the through hole T and the conductive material layer 150 . The through hole T penetrates through the first substrate 120 , the first dielectric layer 135 of the second substrate 130 and the third substrate 140 . The conductive material layer 150 covers the inner wall of the through hole T and electrically connects the first outer circuit layer 110a and the second outer circuit layer 144a to define the L1 signal path. The first external circuit layer 110a, the conductive pillars 124, the second substrate 130, the via holes 148 and the second external circuit layer 144a are electrically connected to define an L2 grounding path, wherein the grounding path L2 surrounds the signal path L1.

In detail, the first substrate 120 further includes a base 122 , and the conductive pillars 124 penetrate through the base 122 . The second substrate 130 further includes a core layer 132 , a first circuit layer 134 , a second circuit layer 136 and a conductive connection layer 138 . The first circuit layer 134 and the second circuit layer 136 are respectively disposed on opposite sides of the core layer 132 . The core layer 132 has an opening 133 , and the conductive connection layer 138 is disposed on the inner wall of the opening 133 and between the first dielectric layer 135 and the core layer 132 . The conductive connection layer 138 electrically connects the first wiring layer 134 and the second wiring layer 136 . The conductive pillars 124 are electrically connected to the first external circuit layer 110 a and the first circuit layer 134 .

In addition, the first external circuit layer 110a of this embodiment includes a first signal circuit 114a1 and a first ground circuit 114a2. The second external circuit layer 144a includes a second signal circuit 144a1 and a second ground circuit 144a2. The first signal line 114a1, the conductive material layer 150 and the second signal line 144a1 define a signal path L1. The first ground line 114a2, the conductive post 124, the first line layer 134, the conductive connection layer 138, the second line layer 136, the via hole 148, and the second ground line 144a2 define a ground path L2. Since the signal path L1 is surrounded by the ground path L2 and is enclosed in a closed manner, a good high-frequency high-speed loop can be formed. In addition, both sides of the signal path L1 are respectively located on the same plane as the two sides of the ground path L2, and since the circuit board 100a of this embodiment has the conductive pillars 124 and the via holes 148, the shielding gap can be filled up to form a complete Shielding can effectively reduce signal energy loss and noise interference, thereby improving signal transmission reliability.

In short, in this example, the signal path L1 defined by the first signal line 114a1, the conductive material layer 150 and the second signal line 144a1 is connected by the first ground line 114a2, the conductive post 124, the first circuit layer 134, the conductive connection The grounding path L2 defined by the layer 138 , the second circuit layer 136 , the via hole 148 and the second grounding circuit 144a2 is surrounded and surrounded. That is, a grounding path L2 with good sealing is arranged around the signal path L1 that can transmit high-frequency and high-speed signals such as 5G, so that a good high-frequency high-speed loop can be formed, so that the circuit board 100a of this embodiment can have better performance. signal integrity. Here, the high frequency means that the frequency is greater than 1 GHz; and the high speed means that the data transmission speed is greater than 100 Mbps.

Furthermore, the first substrate 120 and the second substrate 130 provided in this embodiment are finished circuit boards, while the metal layer 112 and the third substrate 140 are semi-finished products, and the metal layer 112 is pressed together. , the first substrate 120 , the second substrate 130 and the third substrate 140 are integrated together. The via structure 160 a , the conductive connection layer 138 of the second substrate 130 and the first dielectric layer 135 define a coaxial via, wherein the first dielectric layer 135 is located between the via structure 160 a and the conductive connection layer 138 . Compared with the conventional technique of blocking the inner conductor layer and the outer conductor layer of the coaxial through-hole in the build-up method of pressing the insulating layer, the fabrication method of the circuit board 100a of the present embodiment can avoid impedance mismatch and cause high impact. the integrity of the frequency signal.

In addition, since this embodiment does not use the build-up method of pressing the insulating layers to increase the number of layers of the circuit board, the stacking design of the via holes is not used to conduct the adjacent structural layers. Therefore, the manufacturing method of the circuit board 100a of this embodiment can not only overcome the energy loss of the via holes, but also avoid the problem of poor thermal stress reliability of the stacked vias.

It must be noted here that the following embodiments use the element numbers and part of the contents of the previous embodiments, wherein the same numbers are used to represent the same or similar elements, and the description of the same technical contents is omitted. For the description of the omitted part, reference may be made to the foregoing embodiments, and repeated descriptions in the following embodiments will not be repeated.

2A to 2B are schematic cross-sectional views of partial steps of another method for fabricating a circuit board according to another embodiment of the present invention. Please refer to FIG. 1D and FIG. 2A at the same time. The manufacturing method of the circuit board of this embodiment is similar to the above-mentioned circuit board manufacturing method. The difference between the two is: after the step of forming the conductive material layer 150 in FIG. 1D, please refer to FIG. 2A, A plugging process is performed to fill a second dielectric layer 162 in the through hole T, wherein the second dielectric layer 162 fills the through hole T. Preferably, a first surface 163 and a second surface 165 of the second dielectric layer 162 opposite to each other are aligned with an upper surface S1 and a lower surface S2 of the conductive material layer 150 , respectively. If the second dielectric layer 162 is higher than the upper surface S1 and the lower surface S2 of the conductive material layer 150 , the first surface 163 and the second surface 165 of the second dielectric layer 162 can be selectively polished by grinding. The upper surface S1 and the lower surface S2 of the conductive material layer 150 are cut to be flush with each other, thereby maintaining better flatness. Here, the material of the second dielectric layer 162 is, for example, resin, which can be regarded as a plugging agent.

2A and 2B at the same time, a lithography process is performed to pattern the conductive material layer 150, the metal layer 112 and the conductive layer 143 to form a first external circuit layer 110b and a second external circuit layer 144b. The first outer circuit layer 110b is located on the base 132 of the first substrate 120, and the second outer circuit layer 144a is located on the insulating layer 142 of the third substrate 140b. Here, the via structure 160b includes a through hole T, a conductive material layer 150 and a second dielectric layer 162 in the through hole T. As shown in FIG. So far, the fabrication of the circuit board 100b has been completed.

3A to 3B are schematic cross-sectional views of partial steps of another method for fabricating a circuit board according to another embodiment of the present invention. Please refer to FIG. 2A and FIG. 3A at the same time. The manufacturing method of the circuit board of this embodiment is similar to the manufacturing method of the above-mentioned circuit board. The difference between the two lies in the step of filling the second dielectric layer 162 in the through hole T in FIG. After that, referring to FIG. 3A , a capping layer 155 is formed on the conductive material layer 150 . The cap layer 155 covers the conductive material layer 150 and the first surface 163 and the second surface 165 of the second dielectric layer 162 . Here, the material of the capping layer 155 is, for example, copper, but not limited thereto.

3A and 3B at the same time, a lithography process is performed to pattern the cap layer 155, the conductive material layer 150, the metal layer 112 and the conductive layer 143 to form a first external circuit layer 110c and a second external circuit layer 110c. External wiring layer 144c. The first external circuit layer 110c is located on the base 122 of the first substrate 120 and on the first surface 163 of the second dielectric layer 162 . The second outer circuit layer 144c is located on the insulating layer 142 of the third substrate 140c and on the second surface 165 of the second dielectric layer 162 . So far, the fabrication of the circuit board 100c has been completed.

4A to 4E are schematic cross-sectional views of another method for fabricating a circuit board according to another embodiment of the present invention. Please refer to FIG. 1A and FIG. 4A at the same time. The manufacturing method of the circuit board in this embodiment is similar to the above-mentioned circuit board manufacturing method. Material 120.

In detail, the first substrate 120d of this embodiment further includes a dielectric material block 126 penetrating the substrate 122, wherein the dielectric material block 126 is located between the conductive pillars 124, and the surrounding surfaces of the dielectric material block 126 are in direct contact with each other Conductive pillars 124 . In production, the substrate 122 is first provided, wherein the substrate 122 is in a B-stage state at this time, which means that the substrate 122 has not been fully cured. The material of the substrate 122 is, for example, epoxy, PTFE, poly Phenyl ether (Polyphenylene Ether, PPE), polyimide (Polyimide, PI), BT resin (Bismaleimide Triazine, BT), phenolic resin (Phenolic Novolac, PN), hydrocarbons (Hydrocarbon). Next, release films may be attached on opposite sides of the substrate 122 , wherein the material of the release films is polyester polymer (PET). Next, a drilling process is performed on the substrate 122 to form through holes and openings, wherein the drilling process is, for example, but not limited to, laser drilling or punching with a mechanical drill. Next, the conductive paste is filled in the through holes by printing or injection to form the conductive pillars 124 . After that, a low dielectric constant (Dielectric Constant; Dk) and low dielectric loss (Dielectric Loss; Df) dielectric material is printed in the opening by printing or injection, and pre-baking is performed to A block of dielectric material 126 is formed. After that, the release films attached to the opposite sides of the substrate 122 are removed, and the opposite surfaces of the conductive pillars 124 and the dielectric material blocks 126 are respectively protruded from the opposite surfaces of the substrate 122 to complete the second substrate 120d. make. Here, the dielectric loss of the dielectric material block 126 is between 0.0002 and 0.006.

It is generally known that high-frequency circuits focus on the speed and quality of the transmission signal, and the main factors affecting these two are the electrical properties of the transmission material, that is, the material dielectric constant ( Dk ) and dielectric loss ( Df ). By reducing the dielectric constant and dielectric loss of the substrate, the Signal Propagation Delay Time can be effectively shortened, the signal transmission rate can be increased, and the Signal Transmission Loss can be reduced. Since only the relatively expensive dielectric material block 126 is disposed around the through hole T in this embodiment, compared with the previous use of this dielectric material for the entire substrate, this embodiment can effectively reduce the amount of dielectric material. It can effectively reduce the cost, increase the signal transmission rate and reduce the signal transmission loss.

Next, referring to FIG. 4B , a thermocompression bonding process is performed to bond the metal layer 112 , the first substrate 120 d , the second substrate 130 and the third substrate 140 , so that the metal layer 112 directly covers the first substrate The base 122 of 120d, one side of the conductive pillar 124, and a surface 126a of the block 126 of dielectric material. The conductive pillars 124 connect the metal layer 112 and the first circuit layer 134 of the second substrate 130 . The other surface 126b of the dielectric material block 126 directly contacts the first dielectric layer 135 and the first circuit layer 134 of the second substrate 130 . The insulating layer 142 of the third substrate 140 is connected to the second wiring layer 136 of the second substrate 130 and covers the core layer 132 , the first dielectric layer 135 and the second wiring layer 136 .

Next, referring to FIG. 4C , a plurality of blind holes 145 and through holes T' are formed. The blind vias 145 extend from the third substrate 140 to the second substrate 130 to expose the second circuit layer 136 . The through hole T' penetrates through the metal layer 112 , the dielectric material block 126 of the first substrate 120 d , the first dielectric layer 135 of the second substrate 130 , and the insulating layer 142 and the conductive layer 143 of the third substrate 140 . Here, the method of forming the blind hole 145 is, for example, laser drilling, and the method of forming the through hole T' is, for example, mechanical drilling, but not limited thereto.

4D, a conductive material layer 150' is formed, covering the metal layer 112, the conductive layer 143 of the third substrate 140 and the inner wall of the through hole T', and filling the blind holes 145 to define a plurality of conductive hole 148'. Here, the method of forming the conductive material layer 150' is, for example, plating, and the conductive material layer 150' is, for example, copper, but not limited thereto.

Finally, please refer to FIG. 4D and FIG. 4E at the same time, through a lithography process, the conductive material layer 150 ′, the metal layer 112 and the conductive layer 143 are patterned to form the conductive material layer 150 d on the first substrate 120 d and electrically connected to the conductive column 124 . A first outer circuit layer 110d and a second outer circuit layer 144d located on the insulating layer 142 and electrically connected to the via hole 148', defining a connection between the first outer circuit layer 110d and the second outer circuit layer 144d and located in the through hole 148' A via structure 160d in the hole T'. The via structure 160d electrically connects the first outer circuit layer 110d and the second outer circuit layer 144d to define a signal path L1'. The first external circuit layer 110d, the conductive post 124, the second substrate 130, the via hole 148' and the second external circuit layer 144d are electrically connected to define a ground path L2'. In particular, the ground path L2' surrounds the signal path L1', and two sides of the signal path L1' are respectively located on the same plane as the two sides of the ground path L2'. So far, the fabrication of the circuit board 100d has been completed.

1E and FIG. 4E at the same time, the circuit board 100d of this embodiment is similar to the above-mentioned circuit board 100a, the difference between the two is: in this embodiment, the first substrate 120d further includes a dielectric material A block 126 penetrates the substrate 122 and is located between the conductive pillars 124 , wherein the peripheral surface of the dielectric material block 126 directly contacts the conductive pillars 124 . By disposing the dielectric material block 126 , not only the cost of the entire circuit board 100d can be reduced, but also the signal transmission rate can be increased and the signal transmission loss can be reduced.

More specifically, the first external circuit layer 110d of this embodiment includes a first signal circuit 114d1 and a first ground circuit 114d2. The second external circuit layer 144d includes a second signal circuit 144d1 and a second ground circuit 144d2. The first signal line 114d1, the conductive material layer 150' and the second signal line 144d1 define a signal path L1'. The first ground line 114d2, the conductive post 124, the first line layer 134, the conductive connection layer 138, the second line layer 136, the via hole 148' and the second ground line 144d2 define a ground path L2'.

In short, the signal path L1 ′ defined by the first signal line 114d1 , the conductive material layer 150 ′ and the second signal line 144d1 in this embodiment is defined by the first ground line 114d2 , the conductive pillar 124 , and the first circuit layer 134 . , the conductive connection layer 138 , the second circuit layer 136 , the via hole 148 ′ and the grounding path L2 ′ defined by the second grounding circuit 144d2 is surrounded and surrounded. That is to say, a ground path L2' with good sealing is arranged around the signal path L1' that can transmit high-frequency and high-speed signals such as 5G, so that a good high-frequency high-speed loop can be formed, so that the circuit board 100d of this embodiment can have Better signal integrity.

5A to 5B are schematic cross-sectional views of partial steps of another method for fabricating a circuit board according to another embodiment of the present invention. Please refer to FIG. 4D and FIG. 5A at the same time. The manufacturing method of the circuit board of this embodiment is similar to the above-mentioned manufacturing method of the circuit board. The difference between the two is: after the step of forming the conductive material layer 150 ′ in 4D, please refer to FIG. A plugging process is performed to fill a second dielectric layer 162 in the through hole T', wherein the second dielectric layer 162 fills the through hole T'. Preferably, a first surface 163 and a second surface 165 of the second dielectric layer 162 opposite to each other are aligned with an upper surface S1' and a lower surface S2' of the conductive material layer 150', respectively. If the second dielectric layer 162 is higher than the upper surface S1 ′ and the lower surface S2 ′ of the conductive material layer 150 ′, the first surface 163 of the second dielectric layer 162 and the second surface S2 ′ can be selectively ground by grinding. The two surfaces 165 are aligned with the upper surface S1 ′ and the lower surface S2 ′ of the conductive material layer 150 ′, respectively. Here, the material of the second dielectric layer 162 is, for example, resin, which can be regarded as a plugging agent.

5A and 5B at the same time, a lithography process is performed to pattern the conductive material layer 150 ′, the metal layer 112 and the conductive layer 143 to form a first external circuit layer 110e and a second external circuit layer 144e . The first external wiring layer 110e is located on the base 132 of the first substrate 120, and the second external wiring layer 144e is located on the insulating layer 142 of the third substrate 140e. Here, the via structure 160e includes a through hole T', a conductive material layer 150', and a second dielectric layer 162 located in the through hole T'. So far, the fabrication of the circuit board 100e has been completed.

6A to 6B are schematic cross-sectional views of partial steps of another method for fabricating a circuit board according to another embodiment of the present invention. Please refer to FIG. 5A and FIG. 6A at the same time. The manufacturing method of the circuit board of the present embodiment is similar to the manufacturing method of the above-mentioned circuit board. After the step, referring to FIG. 6A , a capping layer 155 ′ is formed on the conductive material layer 150 ′. The cap layer 155' covers the conductive material layer 150' and the first surface 163 and the second surface 165 of the second dielectric layer 162. Here, the material of the capping layer 155' is copper, for example, but not limited thereto.

6A and 6B at the same time, a lithography process is performed to pattern the cap layer 155', the conductive material layer 150', the metal layer 112 and the conductive layer 143 to form a first external circuit layer 110f and a The second outer wiring layer 144f. The first external circuit layer 110f is located on the base 122 of the first substrate 120 and on the first surface 163 of the second dielectric layer 162 . The second outer circuit layer 144f is located on the insulating layer 142 of the third substrate 140f and on the second surface 165 of the second dielectric layer 162 . So far, the fabrication of the circuit board 100f has been completed.

7 is a schematic cross-sectional view of an electronic device according to an embodiment of the present invention. Referring to FIG. 7 , in this embodiment, the electronic device 10a includes the above-mentioned circuit board 100c such as the circuit board 100c shown in FIG. 3B and an electronic component 200 , wherein the electronic component 200 is electrically connected to the circuit board 100c , and the electronic component 200 includes a plurality of pads 210. In addition, the electronic device 10a of this embodiment further includes a plurality of connectors 300 disposed between the third substrate 140c of the circuit board 100c and the electronic component 200, wherein the electronic component 200 is electrically connected to the circuit board 100c through the connectors 300 . Here, the connecting member 300 is, for example, a solder ball, but not limited thereto. In application, an antenna structure can be disposed on the other side of the circuit board 100c relative to the electronic component 200, and the antenna structure can be electrically connected to the circuit board 100c. In the application of integrated circuits and antennas, the circuit board 100c of this embodiment can solve the problem of signal interference on the same plane, reduce signal energy loss and noise interference, and further improve signal transmission reliability.

8 is a schematic cross-sectional view of an electronic device according to another embodiment of the present invention. Referring to FIG. 8 , in this embodiment, the electronic device 10b includes the circuit board 100f shown in FIG. 6B and an electronic component 200, wherein the electronic component 200 is electrically connected to the circuit board 100f, and the electronic component 200 includes a plurality of pads 210. In addition, the electronic device 10b of this embodiment further includes a plurality of connectors 300 disposed between the third substrate 140f of the circuit board 100f and the electronic components 200, wherein the electronic components 200 are electrically connected to the circuit board 100f through the connectors 300 . Here, the connecting member 300 is, for example, a solder ball, but not limited thereto. In application, an antenna structure may be disposed on the other side of the circuit board 100f relative to the electronic component 200, and the antenna structure may be electrically connected to the circuit board 100f. In the application of integrated circuits and antennas, the circuit board 100f of this embodiment can solve the problem of signal interference on the same plane, reduce signal energy loss and noise interference, and further improve signal transmission reliability.

To sum up, in the design of the circuit board of the present invention, the conductive material layer of the via structure electrically connects the first external circuit layer and the second external circuit layer to define a signal path, and the first external circuit layer, the conductive material The pillar, the second substrate, the via hole and the second external circuit layer are electrically connected to define a ground path, wherein the ground path surrounds the signal path. In this way, a good high-frequency and high-speed signal loop can be formed, and the subsequent application of integrated circuits and antennas can also solve the problem of signal interference on the same plane, which can reduce signal energy loss and noise interference, thereby improving the signal. Transmission reliability.

Although the present invention has been disclosed above by the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, The protection scope of the present invention shall be determined by the scope of the appended patent application.

10a, 10b: Electronic device 100a, 100b, 100c, 100d, 100e, 100f: circuit boards 110a, 110b, 110c, 110d, 110e, 110f: the first external circuit layer 112: Metal layer 114a1: The first signal line 114a2: First ground line 120, 120d: the first substrate 122: Base 124: Conductive column 126: Dielectric Material Block 126a: Surface 126b: another surface 130: Second substrate 132: Core Layer 133: Opening 134: The first circuit layer 135: first dielectric layer 136: Second circuit layer 138: Conductive connection layer 140, 140a, 140b, 140c, 140d, 140e, 140f: the third substrate 142: Insulation layer 143: Conductive layer 144a, 144b, 144c, 144d, 144e, 144f: second external circuit layer 144a1: Second signal line 144a2: Second ground line 145: Blind hole 148, 148': Via hole 150, 150': conductive material layer 155, 155': cover layer 160a, 160b, 160d, 160e: Via structure 162: Second Dielectric Layer 163: First Surface 165: Second Surface 200: Electronic Components 210: Pad 300: Connector L1, L1': Signal path L2, L2': ground path S1, S1': upper surface S2, S2': lower surface T, T': through hole

1A to 1E are schematic cross-sectional views of a method for fabricating a circuit board according to an embodiment of the present invention. FIG. 1F is a schematic top view of the circuit board of FIG. 1E . 2A to 2B are schematic cross-sectional views of partial steps of another method for fabricating a circuit board according to another embodiment of the present invention. 3A to 3B are schematic cross-sectional views of partial steps of another method for fabricating a circuit board according to another embodiment of the present invention. 4A to 4E are schematic cross-sectional views of another method for fabricating a circuit board according to another embodiment of the present invention. 5A to 5B are schematic cross-sectional views of partial steps of another method for fabricating a circuit board according to another embodiment of the present invention. 6A to 6B are schematic cross-sectional views of partial steps of another method for fabricating a circuit board according to another embodiment of the present invention. 7 is a schematic cross-sectional view of an electronic device according to an embodiment of the present invention. 8 is a schematic cross-sectional view of an electronic device according to another embodiment of the present invention.

100a: Circuit Board

110a: first external circuit layer

114a1: The first signal line

114a2: First ground line

120: The first substrate

122: Base

124: Conductive column

130: Second substrate

132: Core Layer

133: Opening

134: The first circuit layer

135: first dielectric layer

136: Second circuit layer

138: Conductive connection layer

140a: Third substrate

142: Insulation layer

144a: Second external circuit layer

144a1: Second signal line

144a2: Second ground line

148: Via hole

150: Conductive material layer

160a: Via Structure

L1: Signal path

L2: Ground Path

T: through hole

Claims (20)

A circuit board includes a first external circuit layer, a first substrate, a second substrate, a third substrate and a via structure, wherein The first substrate is disposed between the first external circuit layer and the second substrate, and the first substrate includes a plurality of conductive pillars that electrically connect the first external circuit layer and the second substrate. two substrates; The second substrate has an opening and includes a first dielectric layer, the opening penetrates the second substrate, the first dielectric layer fills the opening, and the second substrate is disposed on the first substrate and the third substrate; the third substrate includes an insulating layer, a second outer circuit layer on the insulating layer, and a plurality of vias penetrating the insulating layer and electrically connecting the second substrate and the second outer circuit layer; The via structure includes a through hole and a conductive material layer, the through hole penetrates the first substrate, the first dielectric layer of the second substrate and the third substrate, and the conductive material layer covers the through hole The inner wall of the hole is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path; and The first external circuit layer, the conductive pillars, the second substrate, the via holes and the second external circuit layer are electrically connected to define a ground path, wherein the ground path surrounds the signal path. The circuit board of claim 1, wherein the first base material further comprises a base, and the conductive pillars penetrate through the base, the second base material further comprises a core layer, a first circuit layer, a second A circuit layer and a conductive connection layer, the first circuit layer and the second circuit layer are respectively disposed on opposite sides of the core layer, the core layer has the opening, and the conductive connection layer is disposed on the inner wall of the opening and Located between the first dielectric layer and the core layer, the conductive connection layer is electrically connected to the first circuit layer and the second circuit layer, and the conductive pillars are electrically connected to the first external circuit layer and the first circuit layer. a line layer. The circuit board as claimed in claim 2, wherein the first substrate further comprises a block of dielectric material that penetrates the substrate and is located between the conductive pillars, and a peripheral surface of the block of dielectric material directly contacts the conductive pillars . The circuit board of claim 2, wherein the first outer circuit layer includes a first signal circuit and a first ground circuit, and the second outer circuit layer includes a second signal circuit and a second ground circuit, The first signal line, the conductive material layer and the second signal line define the signal path, the first ground line, the conductive pillars, the first line layer, the conductive connection layer, the second line layer, The via holes and the second ground line define the ground path. The circuit board of claim 1, wherein the via structure further comprises a second dielectric layer filling the through hole, and a first surface and a second surface of the second dielectric layer opposite to each other are respectively It is aligned with an upper surface of the first outer circuit layer and a lower surface of the second outer circuit layer. The circuit board of claim 1, wherein the via structure further comprises a second dielectric layer filling the through hole, and the first external circuit layer and the second external circuit layer respectively cover the second dielectric layer A first surface and a second surface of the electrical layer are opposite to each other. A manufacturing method of a circuit board, comprising: A metal layer, a first base material, a second base material and a third base material are laminated, so that the first base material is located between the metal layer and the second base material, and the second base material is between the first base material and the third base material, wherein the first base material includes a plurality of conductive pillars, the second base material has an opening and includes a first dielectric layer, and the opening penetrates the second base material a substrate, and the first dielectric layer fills the opening, the third substrate includes an insulating layer and a conductive layer on the insulating layer; A plurality of blind holes and through holes are formed, wherein the blind holes extend from the third substrate to the second substrate, and the through holes penetrate through the metal layer, the first substrate, and the first substrate of the second substrate a dielectric layer and the insulating layer and the conductive layer of the third substrate; forming a conductive material layer covering the metal layer, the conductive layer of the third substrate and the inner wall of the through hole, and filling the blind holes to define a plurality of through holes; and patterning the conductive material layer, the metal layer and the conductive layer to form a first external circuit layer on the first substrate and electrically connected to the conductive pillars and on the insulating layer and electrically connected to the a second outer circuit layer of the via holes, and defines a via structure connecting the first outer circuit layer and the second outer circuit layer and located in the through hole, wherein the via structure is electrically connected to the first outer circuit layer An external circuit layer and the second external circuit layer define a signal path, and the first external circuit layer, the conductive pillars, the second substrate, the via holes and the second external circuit layer are electrically connected A ground path is defined, and the ground path surrounds the signal path. The method for manufacturing a circuit board as claimed in claim 7, wherein the step of laminating the metal layer, the first substrate, the second substrate and the third substrate comprises: providing the metal layer; providing the first base material, the first base material further comprises a base, and the conductive pillars penetrate the base; The second substrate is provided, the second substrate further comprises a core layer, a first circuit layer, a second circuit layer and a conductive connection layer, the first circuit layer and the second circuit layer are respectively arranged on the On opposite sides of the core layer, the core layer has the opening, and the conductive connection layer is disposed on the inner wall of the opening and between the first dielectric layer and the core layer, and the conductive connection layer is electrically connected to the first dielectric layer. a circuit layer and the second circuit layer; providing the third substrate; The first substrate and the second substrate are located between the metal layer and the third substrate, the first substrate is located between the metal layer and the second substrate, and the second substrate between the first substrate and the third substrate; and A hot pressing process is performed to press the metal layer, the first base material, the second base material and the third base material, so that the metal layer directly covers the base of the first base material and the one side of the conductive pillars, and the conductive pillars connect the metal layer and the first circuit layer of the second substrate, and the insulating layer of the third substrate is connected to the second circuit layer of the second substrate . The manufacturing method of a circuit board according to claim 8, wherein the first external circuit layer includes a first signal circuit and a first ground circuit, and the second external circuit layer includes a second signal circuit and a second a ground line, the first signal line, the conductive material layer and the second signal line define the signal path, the first ground line, the conductive posts, the first line layer, the conductive connection layer, the second The circuit layer, the vias and the second ground line define the ground path. The method for making a circuit board according to claim 7, further comprising: After forming the conductive material layer and before patterning the conductive material layer, the metal layer and the conductive layer, a second dielectric layer is filled in the through hole, and the second dielectric layer fills the through hole , and a first surface and a second surface of the second dielectric layer opposite to each other are respectively aligned with an upper surface and a lower surface of the conductive material layer. The method for making a circuit board according to claim 10, further comprising: After filling the second dielectric layer in the through hole and before patterning the conductive material layer, the metal layer and the conductive layer, a capping layer is formed on the conductive material layer, wherein the capping layer covering the first surface and the second surface of the conductive material layer and the second dielectric layer; and The cover layer, the conductive material layer, the metal layer and the conductive layer are patterned to form the first outer circuit layer and the second outer circuit layer, wherein the first outer circuit layer is located on the first base material On the substrate and on the first surface of the second dielectric layer, the second external circuit layer is located on the insulating layer of the third substrate and on the second surface of the second dielectric layer. The method for manufacturing a circuit board as claimed in claim 7, wherein the step of laminating the metal layer, the first substrate, the second substrate and the third substrate comprises: providing the metal layer; The first substrate is provided, the first substrate further includes a base and a block of dielectric material penetrating the base, wherein the block of dielectric material is located between the conductive pillars, and the surrounding surface of the block of dielectric material directly contacting the conductive posts; The second substrate is provided, the second substrate further comprises a core layer, a first circuit layer, a second circuit layer and a conductive connection layer, the first circuit layer and the second circuit layer are respectively arranged on the On opposite sides of the core layer, the core layer has the opening, and the conductive connection layer is disposed on the inner wall of the opening and between the first dielectric layer and the core layer, and the conductive connection layer is electrically connected to the first dielectric layer. a circuit layer and the second circuit layer; providing the third substrate; The first substrate and the second substrate are located between the metal layer and the third substrate, the first substrate is located between the metal layer and the second substrate, and the second substrate between the first substrate and the third substrate; and A hot pressing process is performed to press the metal layer, the first substrate, the second substrate and the third substrate, so that the metal layer directly covers the base, the first substrate and the third substrate. One side of the conductive pillar and a surface of the dielectric material block, and the conductive pillars are connected to the metal layer and the first circuit layer of the second substrate, and the other surface of the dielectric material block is in direct contact The first dielectric layer of the second substrate and the first circuit layer, and the insulating layer of the third substrate is connected to the second circuit layer of the second substrate. The method for fabricating a circuit board according to claim 12, wherein when the through hole is formed, the through hole simultaneously penetrates the dielectric material block. The method for making a circuit board according to claim 12, further comprising: After forming the conductive material layer and before patterning the conductive material layer, the metal layer and the conductive layer, a second dielectric layer is filled in the through hole, and the second dielectric layer fills the through hole , and a first surface and a second surface of the second dielectric layer opposite to each other are respectively aligned with an upper surface and a lower surface of the conductive material layer. The method for making a circuit board as claimed in claim 14, further comprising: After filling the second dielectric layer in the through hole and before patterning the conductive material layer, the metal layer and the conductive layer, a capping layer is formed on the conductive material layer, wherein the capping layer covering the first surface and the second surface of the conductive material layer and the second dielectric layer; and The cover layer, the conductive material layer, the metal layer and the conductive layer are patterned to form the first outer circuit layer and the second outer circuit layer, wherein the first outer circuit layer is located on the first base material On the substrate and on the first surface of the second dielectric layer, the second external circuit layer is located on the insulating layer of the third substrate and on the second surface of the second dielectric layer. The manufacturing method of a circuit board as claimed in claim 12, wherein the first external circuit layer includes a first signal circuit and a first ground circuit, and the second external circuit layer includes a second signal circuit and a second a ground line, the first signal line, the conductive material layer and the second signal line define the signal path, the first ground line, the conductive posts, the first line layer, the conductive connection layer, the second The circuit layer, the vias and the second ground line define the ground path. The method for manufacturing a circuit board according to claim 12, wherein the dielectric loss of the dielectric material block is greater than 0 and less than 0.016. An electronic device, comprising: A circuit board includes a first external circuit layer, a first substrate, a second substrate, a third substrate and a via structure, wherein The first substrate is disposed between the first external circuit layer and the second substrate, and the first substrate includes a plurality of conductive pillars that electrically connect the first external circuit layer and the second substrate. two substrates; The second substrate has an opening and includes a first dielectric layer, the opening penetrates the second substrate, the first dielectric layer fills the opening, and the second substrate is disposed on the first substrate and the third substrate; the third substrate includes an insulating layer, a second outer circuit layer on the insulating layer, and a plurality of vias penetrating the insulating layer and electrically connecting the second substrate and the second outer circuit layer; The via structure includes a through hole and a conductive material layer, the through hole penetrates the first substrate, the first dielectric layer of the second substrate and the third substrate, and the conductive material layer covers the through hole The inner wall of the hole is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path; and The first external circuit layer, the conductive pillars, the second substrate, the via holes and the second external circuit layer are electrically connected to define a ground path, wherein the ground path surrounds the signal path; and An electronic component is electrically connected to the circuit board. The electronic device as claimed in claim 18, further comprising: A plurality of connecting pieces are disposed between the third base material of the circuit board and the electronic component, wherein the electronic component is electrically connected to the circuit board through the connecting pieces. The electronic device of claim 19, wherein the connectors comprise a plurality of solder balls.

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