TW202226909A - Copper clad laminate and method for producing copper clad laminate capable of reducing the defect rate of a wiring pattern formed by a semi-additive method - Google Patents
Copper clad laminate and method for producing copper clad laminate capable of reducing the defect rate of a wiring pattern formed by a semi-additive method Download PDFInfo
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/06—Wires; Strips; Foils
- C25D7/0614—Strips or foils
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
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- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/60—Electroplating characterised by the structure or texture of the layers
- C25D5/605—Surface topography of the layers, e.g. rough, dendritic or nodular layers
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
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Abstract
Description
本發明涉及一種覆銅積層板及覆銅積層板之製造方法。更詳細而言,本發明涉及一種用於撓性印刷配線板、覆晶薄膜等之製造的覆銅積層板及其覆銅積層板之製造方法。The present invention relates to a copper-clad laminate and a manufacturing method of the copper-clad laminate. More specifically, the present invention relates to a copper clad laminate used for the manufacture of flexible printed wiring boards, chip clad films, and the like, and a method of manufacturing the copper clad laminate.
在液晶面板、筆記型電腦、數位相機、行動電話等電子設備中,使用在樹脂薄膜的表面上形成了配線圖案的撓性印刷配線板(FPC)、在撓性印刷配線板上安裝了半導體晶片的覆晶薄膜(COF)。In electronic devices such as liquid crystal panels, notebook computers, digital cameras, and mobile phones, flexible printed wiring boards (FPCs) in which wiring patterns are formed on the surface of resin films are used, and semiconductor chips are mounted on the flexible printed wiring boards. chip-on-film (COF).
藉由半加成法(semi-additive process)、減成法(subtractive process)等在覆銅積層板上形成配線圖案來獲得撓性印刷配線板。尤其是在需要微細配線的形成、高精度的配線尺寸的情況下,使用半加成法(例如,專利文獻1)。A flexible printed wiring board is obtained by forming a wiring pattern on a copper-clad laminate by a semi-additive process, a subtractive process, or the like. In particular, when the formation of fine wiring and high-precision wiring size are required, the semi-additive method is used (for example, Patent Document 1).
在半加成法中,藉由蝕刻除去覆銅積層板的導體層中不需要的部分。當導體層過厚時,則蝕刻時間變長,連配線部也被蝕刻,因此配線的截面形狀難以成為矩形。因此,藉由半加成法加工的覆銅積層板的導體層較佳為較薄的導體層。因此,作為藉由半加成法加工的覆銅積層板,常使用具有厚度為0.2~3.0μm的導體層的覆銅積層板。In the semi-additive method, unnecessary portions of the conductor layers of the copper clad laminate are removed by etching. When the conductor layer is too thick, the etching time becomes long, and the wiring portion is also etched, so that the cross-sectional shape of the wiring becomes difficult to be rectangular. Therefore, the conductor layer of the copper clad laminate processed by the semi-additive method is preferably a thinner conductor layer. Therefore, as a copper clad laminate processed by a semi-additive method, a copper clad laminate having a conductor layer having a thickness of 0.2 to 3.0 μm is often used.
藉由配線圖案廠商和組裝廠商按順序加工覆銅積層板而製造覆晶薄膜。配線圖案廠商在長條帶狀的覆銅積層板上排列了之後會成為複數個單片的複數個配線圖案的狀態下形成長條帶狀的撓性印刷配線板,將保持長條帶狀之撓性印刷配線板發送到組裝廠商。在此,在複數個配線圖案中,對發生配線的斷線、欠缺等缺陷的配線圖案標上表示不良的標記。組裝廠商在各個配線圖案上安裝半導體晶片。此時,當撓性印刷配線板的不良率(在撓性印刷配線板上形成的複數個配線圖案中不良配線圖案的比例)高時,安裝的生產性降低。因此,交付給組裝廠商的撓性印刷配線板大多規定配線圖案的容許不良率。雖然規格因組裝廠商而不同,但容許不良率大多定為30%。 [先前技術文獻] [專利文獻] The chip on film is manufactured by sequentially processing the copper clad laminate by the wiring pattern maker and the assembler. The wiring pattern manufacturer forms a long strip-shaped flexible printed wiring board in a state where the long strip-shaped copper-clad laminate will be formed into a plurality of single-piece wiring patterns, and will maintain the long strip-shaped flexible printed wiring board. The flexible printed wiring board is sent to the assembler. Here, among the plurality of wiring patterns, a mark indicating a defect is attached to a wiring pattern in which a defect such as a disconnection or a chipping of the wiring occurs. The assembler mounts the semiconductor wafer on each wiring pattern. At this time, when the defective rate of the flexible printed wiring board (the ratio of defective wiring patterns among a plurality of wiring patterns formed on the flexible printed wiring board) is high, the productivity of the mounting decreases. Therefore, many flexible printed wiring boards delivered to assemblers specify the allowable defect rate of the wiring pattern. Although specifications vary by assembler, the allowable defect rate is generally set at 30%. [Prior Art Literature] [Patent Literature]
專利文獻1:日本特開2010-108964號公報Patent Document 1: Japanese Patent Laid-Open No. 2010-108964
[發明欲解決之課題][The problem to be solved by the invention]
本發明鑒於上述情況,其目的是提供一種能夠降低藉由半加成法形成的配線圖案的不良率的覆銅積層板以及覆銅積層板之製造方法。 [用以解決課題之手段] In view of the above-mentioned circumstances, the present invention aims to provide a copper clad laminate and a method for producing the copper clad laminate which can reduce the defective rate of a wiring pattern formed by a semi-additive method. [means to solve the problem]
本發明的覆銅積層板,其特徵在於,其具有在基膜的表面上形成的含有鍍銅被膜的導體層,所述導體層的厚度為0.4~3.0μm,並且所述導體層中直徑5μm以上的針孔為0.04個/cm 2以下。 本發明的覆銅積層板之製造方法,其特徵在於,使用鍍敷裝置,在藉由卷對卷搬送基材的同時,藉由電解鍍敷形成該基材的表面的鍍銅被膜,獲得具有厚度為0.4~3.0μm的導體層的覆銅積層板,在使用鍍敷裝置獲得覆銅積層板時,所述鍍敷裝置中與所述基材的鍍敷面接觸的全部的輥的搬送面的表面粗糙度Rmax為0.1μm以下。 [發明之效果] The copper-clad laminate of the present invention is characterized in that it has a conductor layer containing a copper-plated film formed on the surface of the base film, the conductor layer has a thickness of 0.4 to 3.0 μm, and the conductor layer has a diameter of 5 μm. The above pinholes are 0.04 pieces/cm 2 or less. The method for producing a copper-clad laminate of the present invention is characterized by forming a copper-plated film on the surface of the base material by electrolytic plating while conveying the base material by roll-to-roll using a plating apparatus to obtain a A copper-clad laminate having a conductor layer having a thickness of 0.4 to 3.0 μm, when a copper-clad laminate is obtained using a plating apparatus, the conveying surfaces of all the rollers in contact with the plating surface of the base material in the plating apparatus The surface roughness Rmax is 0.1 μm or less. [Effect of invention]
在本發明的覆銅積層板中,由於導體層中存在的直徑5μm以上的針孔為0.04個/cm 2以下,而能夠將藉由半加成法形成的配線圖案的不良率抑制到30%以下。 根據本發明的覆銅積層板之製造方法,能夠製造具有直徑5μm以上的針孔為0.04個/cm 2以下的導體層的覆銅積層板。 In the copper-clad laminate of the present invention, since the number of pinholes having a diameter of 5 μm or more in the conductor layer is 0.04/cm 2 or less, the defect rate of the wiring pattern formed by the semi-additive method can be suppressed to 30% the following. According to the method for producing a copper-clad laminate of the present invention, a copper-clad laminate having a conductor layer with pinholes having a diameter of 5 μm or more and a conductor layer of 0.04 pieces/cm 2 or less can be produced.
[用以實施發明的形態][Form for carrying out the invention]
接著,基於附圖說明本發明的實施方式。
(覆銅積層板)
如圖1所示,本發明的一實施方式的覆銅積層板1由基膜10和在基膜10的表面上形成的導體層20構成。可以如圖1所示的僅在基膜10的一面形成導體層20,也可以在基膜10的兩面形成導體層20。
Next, embodiments of the present invention will be described based on the drawings.
(Copper Clad Laminate)
As shown in FIG. 1 , a copper-clad laminate 1 according to an embodiment of the present invention includes a
作為基膜10能夠使用聚醯亞胺膜、液晶聚合物(LCP)膜等樹脂膜。導體層20由藉由濺射等乾式成膜法成膜的金屬層21和藉由電解鍍敷成膜的鍍銅被膜22構成。在基膜10的表面上按照金屬層21和鍍銅被膜22的順序層疊。As the
金屬層21由基底金屬層21a和銅薄膜層21b構成。在基膜10的表面上按照基底金屬層21a和銅薄膜層21b的順序層疊。通常,基底金屬層21a由鎳、鉻或鎳鉻合金構成。可以沒有基底金屬層21a。銅薄膜層21b可以隔著基底金屬層21a在基膜10的表面上成膜,也可以不隔著基底金屬層21a直接在基膜10的表面上成膜。The
沒有特別的限定,但基膜10的厚度通常為10~100μm。基底金屬層21a的厚度通常為5~50nm,銅薄膜層21b的厚度通常為50~400nm。在藉由半加成法加工的覆銅積層板1的情況下,導體層20的厚度通常為0.4~3.0μm。Although not particularly limited, the thickness of the
藉由半加成法對覆銅積層板1進行加工,能夠製造撓性印刷配線板。藉由半加成法製造撓性印刷配線板,按照以下步驟進行。首先,在覆銅積層板1的鍍銅被膜22的表面上形成抗蝕劑層。接著,在抗蝕劑層中的形成配線圖案的部分形成開口部。接著,將從抗蝕劑層的開口部露出的鍍銅被膜22作為陰極來進行電解鍍敷,從而形成配線部。接著,除去抗蝕劑層,藉由閃蝕(Flash etching)等除去配線部以外的導體層20。由此,獲得撓性印刷配線板。By processing the copper-clad laminate 1 by the semi-additive method, a flexible printed wiring board can be produced. Manufacturing a flexible printed wiring board by a semi-additive method is performed according to the following procedure. First, a resist layer is formed on the surface of the copper-plated
由於藉由半加成法加工的覆銅積層板1的鍍銅被膜22薄,因此藉由電解鍍敷形成鍍銅被膜22時易產生針孔。在半加成法中藉由電解鍍敷在鍍銅被膜22上層疊配線圖案的銅鍍敷。此時,如果鍍銅被膜22中存在針孔,則會阻礙層疊的銅鍍敷的生長,會發生配線的斷線、欠缺等缺陷。尤其是在製造覆晶薄膜的情況下,由於需要形成配線寬為15μm以下的微細配線,因此容易產生因針孔而引起的配線的缺陷。Since the copper-plated
導體層20的針孔的數量越少,配線越不易產生缺陷,從而能夠抑制配線圖案的不良率。本實施方式的覆銅積層板1的導體層20中,直徑5μm以上的針孔是0.04個/cm
2以下。如此地,由於導體層20的針孔少,因此能夠將藉由半加成法形成的配線圖案的不良率抑制到30%以下。
The smaller the number of pinholes in the
(覆銅積層板的製造方法)
接著,說明本發明的一實施方式的覆銅積層板的製造方法。
使用卷對卷方式的濺射裝置,能夠在長條帶狀的基膜10的表面上形成金屬層21。以下,將在基膜10的表面上形成金屬層21的物品稱作基材。使用卷對卷方式的鍍敷裝置,能夠在長條帶狀的基材的表面上形成鍍銅被膜22。由此,獲得長條帶狀的覆銅積層板1。
(Manufacturing method of copper clad laminate)
Next, the manufacturing method of the copper clad laminated board which concerns on one Embodiment of this invention is demonstrated.
Using a roll-to-roll sputtering apparatus, the
鍍敷裝置是在藉由卷對卷搬送長條帶狀的基材的同時對基材進行電解鍍敷的裝置。鍍敷裝置具有將捲繞成卷狀的基材送出的供給裝置和將鍍敷後的基材(覆銅積層板1)捲繞成卷狀的卷取裝置。在供給裝置與卷取裝置之間的搬送路徑上,配置有前處理槽、鍍敷槽、後處理槽。在鍍敷槽中進行電解鍍敷。在將基材搬送到鍍敷槽內的同時,藉由電解鍍敷在其表面上形成鍍銅被膜22。The plating apparatus is an apparatus for electroplating the base material while conveying the long strip-shaped base material by roll-to-roll. The plating apparatus has a supply device that sends out the base material wound in a roll shape, and a winding device that winds the plated base material (copper clad laminate 1 ) into a roll shape. A pre-processing tank, a plating tank, and a post-processing tank are arranged on the conveyance path between the supply device and the coiling device. Electrolytic plating is performed in a plating tank. The
鍍敷槽中貯留鍍銅液。鍍銅液包含水溶性銅鹽。只要是通常用於鍍銅液的水溶性銅鹽就可以沒有特別限定地使用。鍍銅液可以包含硫酸。藉由調節硫酸的添加量,能夠調節鍍銅液的pH和硫酸離子濃度。鍍銅液可以包含通常添加到鍍敷液中的添加劑。作為添加劑,可以單獨使用從光亮劑成分、整平劑成分、聚合物成分、氯成分等中選擇的一種,也可以組合使用兩種以上。The copper plating solution is stored in the plating tank. The copper plating solution contains a water-soluble copper salt. As long as it is a water-soluble copper salt generally used for a copper plating solution, it can be used without particular limitation. The copper plating solution may contain sulfuric acid. By adjusting the amount of sulfuric acid added, the pH and sulfuric acid ion concentration of the copper plating solution can be adjusted. The copper plating solution may contain additives that are usually added to the plating solution. As an additive, 1 type selected from a brightener component, a leveler component, a polymer component, a chlorine component, etc. may be used individually, and 2 or more types may be used together.
能夠任意選擇鍍銅液的各成分的含量。但是,鍍銅液較佳含有15~70g/L的銅和20~250g/L的硫酸。如此,能夠以足夠的速度形成鍍銅被膜22。鍍銅液較佳含有1~50mg/L的光亮劑(brightener)成分。如此,能夠使析出的晶體微細化並使鍍銅被膜22的表面平滑。鍍銅液較佳含有1~300mg/L的整平劑成分。如此,能夠抑制突起並形成平坦的鍍銅被膜22。鍍銅液較佳含有10~1500mg/L的聚合物成分。如此,能夠緩和電流向基材端部集中並形成均勻的鍍銅被膜22。鍍銅液較佳含有20~80mg/L的氯成分。如此,能夠抑制異常析出。The content of each component of the copper plating solution can be arbitrarily selected. However, the copper plating solution preferably contains 15 to 70 g/L of copper and 20 to 250 g/L of sulfuric acid. In this way, the
鍍銅液的溫度較佳為20~35℃。另外,較佳攪拌鍍敷槽內的鍍銅液。例如,能夠藉由將從噴嘴噴出的鍍銅液向基材噴射,來攪拌鍍銅液。The temperature of the copper plating solution is preferably 20 to 35°C. In addition, it is preferable to stir the copper plating liquid in the plating tank. For example, the copper plating liquid can be stirred by spraying the copper plating liquid discharged from the nozzle to the base material.
能夠藉由電解鍍敷中的電流密度和鍍敷時間來調節鍍銅被膜22的厚度。例如,調節鍍銅被膜22的厚度使得導體層20的厚度為0.4~3.0μm。The thickness of the
鍍敷裝置具有用於搬送基材的各種輥。在鍍敷裝置所具有的輥中,作為與基材的鍍敷面接觸的全部的輥,使用搬送面(輥外周面中與基材的鍍敷面接觸的區域)的表面粗糙度(Rmax)為0.1μm以下的輥。如此,在藉由電解鍍敷形成鍍銅被膜22時不易產生針孔。因此,能夠製造具有直徑5μm以上的針孔為0.04個/cm
2以下的導體層20的覆銅積層板1。
[實施例]
The plating apparatus has various rolls for conveying the base material. Among the rolls included in the plating apparatus, the surface roughness (Rmax) of the conveyance surface (region in contact with the plating surface of the base material in the outer peripheral surface of the roll) was used as all the rolls in contact with the plating surface of the base material. A roll of 0.1 μm or less. In this way, pinholes are less likely to be generated when the copper-plated
(共同的條件) 作為基膜,準備了寬570mm、厚度34μm的長條帶狀的聚醯亞胺膜(宇部興產公司製,Upilex)。將基膜設置於磁控濺射裝置中。在磁控濺射裝置內設置鎳鉻合金靶和銅靶。鎳鉻合金靶的組成為20質量%的Cr和80質量%的Ni。在真空環境下,在基膜的一面上形成由厚度為25nm的鎳鉻合金構成的基底金屬層,並在其上形成厚度為100nm的銅薄膜層。 (common conditions) As the base film, a strip-shaped polyimide film (manufactured by Ube Industries, Ltd., Upilex) having a width of 570 mm and a thickness of 34 μm was prepared. The base film was set in a magnetron sputtering apparatus. A nickel-chromium alloy target and a copper target are set in the magnetron sputtering device. The composition of the nichrome target was 20 mass % of Cr and 80 mass % of Ni. In a vacuum environment, a base metal layer composed of a nickel-chromium alloy with a thickness of 25 nm was formed on one side of the base film, and a copper thin film layer with a thickness of 100 nm was formed thereon.
使用卷對卷方式的鍍敷裝置在基材的一面上形成鍍銅被膜以獲得覆銅積層板。鍍敷槽中貯留的鍍銅液含有120g/L的硫酸銅、70g/L的硫酸、16mg/L的光亮劑成分、20mg/L的整平劑成分、1100mg/L的聚合物成分和50mg/L的氯成分。作為光亮劑成分,使用了雙(3-磺丙基)二硫化物(RASCHIG GmbH製的試劑)。作為整平劑成分,使用了二烯丙基二甲基氯化銨-二氧化硫共聚物(日東紡醫藥股份有限公司(Nittobo Medical Co., Ltd.)製,PAS-A-5)。作為聚合物成分,使用了聚乙二醇-聚丙二醇共聚物(日油股份有限公司製,Unilube 50MB-11)。作為氯成分,使用了鹽酸(和光純藥工業股份有限公司製的35%鹽酸)。A copper-plated film was formed on one side of the substrate using a roll-to-roll plating apparatus to obtain a copper-clad laminate. The copper plating solution stored in the plating tank contains 120g/L copper sulfate, 70g/L sulfuric acid, 16mg/L brightener component, 20mg/L leveler component, 1100mg/L polymer component and 50mg/L The chlorine content of L. As a brightener component, bis(3-sulfopropyl)disulfide (a reagent manufactured by RASCHIG GmbH) was used. As a leveler component, a diallyldimethylammonium chloride-sulfur dioxide copolymer (manufactured by Nittobo Medical Co., Ltd., PAS-A-5) was used. As a polymer component, a polyethylene glycol-polypropylene glycol copolymer (manufactured by NOF Corporation, Unilube 50MB-11) was used. As the chlorine component, hydrochloric acid (35% hydrochloric acid manufactured by Wako Pure Chemical Industries, Ltd.) was used.
(實施例1) 在鍍敷裝置所具有的輥中,作為與基材的鍍敷面接觸的全部輥,使用搬送面的表面粗糙度(Rmax)為0.068~0.074μm的輥。調節鍍銅被膜的厚度使導體層的厚度為0.4μm。 (Example 1) Among the rolls included in the plating apparatus, as all the rolls in contact with the plating surface of the substrate, a roll having a surface roughness (Rmax) of a conveying surface of 0.068 to 0.074 μm was used. The thickness of the copper plating film was adjusted so that the thickness of the conductor layer was 0.4 μm.
(實施例2) 在鍍敷裝置所具有的輥中,作為與基材的鍍敷面接觸的全部輥,使用搬送面的表面粗糙度(Rmax)為0.068~0.074μm的輥。調節鍍銅被膜的厚度使導體層的厚度為2.0μm。 (Example 2) Among the rolls included in the plating apparatus, as all the rolls in contact with the plating surface of the substrate, a roll having a surface roughness (Rmax) of a conveying surface of 0.068 to 0.074 μm was used. The thickness of the copper plating film was adjusted so that the thickness of the conductor layer was 2.0 μm.
(實施例3) 在鍍敷裝置所具有的輥中,作為與基材的鍍敷面接觸的全部輥,使用搬送面的表面粗糙度(Rmax)為0.068~0.074μm的輥。調節鍍銅被膜的厚度使導體層的厚度為3.0μm。 (Example 3) Among the rolls included in the plating apparatus, as all the rolls in contact with the plating surface of the substrate, a roll having a surface roughness (Rmax) of a conveying surface of 0.068 to 0.074 μm was used. The thickness of the copper plating film was adjusted so that the thickness of the conductor layer was 3.0 μm.
(比較例1) 在鍍敷裝置所具有的輥中,作為與基材的鍍敷面接觸的全部輥,使用搬送面的表面粗糙度(Rmax)為4.003~4.218μm的輥。調節鍍銅被膜的厚度使導體層的厚度為3.0μm。 (Comparative Example 1) Among the rolls included in the plating apparatus, as all the rolls in contact with the plating surface of the substrate, a roll having a surface roughness (Rmax) of a conveying surface of 4.003 to 4.218 μm was used. The thickness of the copper plating film was adjusted so that the thickness of the conductor layer was 3.0 μm.
(比較例2) 在鍍敷裝置所具有的輥中,作為與基材的鍍敷面接觸的全部輥,使用搬送面的表面粗糙度(Rmax)為7.101~7.129μm的輥。調節鍍銅被膜的厚度使導體層的厚度為0.5μm。 (Comparative Example 2) Among the rolls included in the plating apparatus, as all the rolls in contact with the plating surface of the substrate, a roll having a surface roughness (Rmax) of a conveying surface of 7.101 to 7.129 μm was used. The thickness of the copper plating film was adjusted so that the thickness of the conductor layer was 0.5 μm.
從實施例1~3和比較例1、2中獲得的各覆銅積層板裁出250×160mm的試樣。使用以鹵素燈為光源的背光照明檢查各試樣,並計數直徑5μm以上的針孔數。一邊與預先準備的直徑5μm的針孔的樣品進行比較,一邊進行目視檢查。將其結果示於表1。Samples of 250×160 mm were cut out from the copper-clad laminates obtained in Examples 1 to 3 and Comparative Examples 1 and 2. Each sample was examined using backlight illumination using a halogen lamp as a light source, and the number of pinholes having a diameter of 5 μm or more was counted. Visual inspection was performed while comparing with a sample with a pinhole of 5 μm in diameter prepared in advance. The results are shown in Table 1.
在使用了表面粗糙度(Rmax)為0.068~0.074μm的輥的實施例1~3中,針孔數均為0.04個/cm 2以下。相對於此,在使用了表面粗糙度(Rmax)為4.003~4.218μm或7.101~7.129μm的輥的比較例1、2中,針孔數均超過0.04個/cm 2。由此,確認了當使用表面粗糙度(Rmax)為0.1μm以下的輥時,能夠製造具有直徑5μm以上的針孔為0.04個/cm 2以下的導體層的覆銅積層板。 In Examples 1 to 3 using a roller having a surface roughness (Rmax) of 0.068 to 0.074 μm, the number of pinholes was all 0.04 pieces/cm 2 or less. On the other hand, in Comparative Examples 1 and 2 using a roller having a surface roughness (Rmax) of 4.003 to 4.218 μm or 7.101 to 7.129 μm, the number of pinholes exceeded 0.04/cm 2 . From this, it was confirmed that a copper-clad laminate having a conductor layer having a pinhole diameter of 5 μm or more and a conductor layer of 0.04/cm 2 or less can be produced when a roller having a surface roughness (Rmax) of 0.1 μm or less is used.
接著,加工實施例1~3和比較例1、2中獲得的各覆銅積層板以製造撓性印刷配線板。按照以下步驟進行撓性印刷配線板的製造。在覆銅積層板的鍍銅被膜的表面上層疊乾膜抗蝕劑,以形成排列了複數個配線圖案的抗蝕劑掩模。各配線圖案的尺寸約為70×40mm,最小間距為20μm,配線寬為10μm。接著,將從抗蝕劑掩模的開口部露出的鍍銅被膜作為陰極進行電解鍍敷,層疊銅鍍敷以使其與覆銅積層板的導體層的總厚度為8μm。Next, each copper-clad laminate obtained in Examples 1 to 3 and Comparative Examples 1 and 2 was processed to manufacture a flexible printed wiring board. Manufacture of a flexible printed wiring board is performed according to the following procedure. A dry film resist is laminated on the surface of the copper-plated film of the copper-clad laminate to form a resist mask in which a plurality of wiring patterns are arranged. The size of each wiring pattern was about 70×40 mm, the minimum pitch was 20 μm, and the wiring width was 10 μm. Next, the copper plating film exposed from the opening of the resist mask was electrolytically plated as a cathode, and the copper plating was laminated so that the total thickness with the conductor layer of the copper-clad laminate was 8 μm.
用顯微鏡觀察從抗蝕劑掩模的開口部露出的層疊的銅鍍敷(配線圖案)。將存在配線寬的三分之一以上尺寸的欠缺或斷線的配線圖案判斷為不良,並求出配線圖案的不良率。將其結果示於表1。The laminated copper plating (wiring pattern) exposed from the opening of the resist mask was observed with a microscope. A wiring pattern with a size of not less than one third of the wiring width or a disconnection was judged to be defective, and the defective rate of the wiring pattern was obtained. The results are shown in Table 1.
確認了在導體層的針孔數為0.04個/cm 2以下的實施例1~3中,不良率均為30%以下,在容許範圍內。相對於此,在導體層的針孔數為0.07個/cm 2、0.10個/cm 2的比較例1、2中,不良率均超過30%。由此,確認了當導體層的針孔數為0.04個/cm 2以下時,藉由半加成法形成的配線圖案的不良率為30%以下。 It was confirmed that in Examples 1 to 3 in which the number of pinholes in the conductor layer was 0.04 pieces/cm 2 or less, the defect rates were all 30% or less, which was within the allowable range. On the other hand, in Comparative Examples 1 and 2 in which the number of pinholes in the conductor layer was 0.07 pieces/cm 2 and 0.10 pieces/cm 2 , the defective rate exceeded 30%. From this, it was confirmed that when the number of pinholes in the conductor layer was 0.04 pieces/cm 2 or less, the defective rate of the wiring pattern formed by the semi-additive method was 30% or less.
另外,由表1可知導體層的針孔數越少,配線圖案的不良率越低。當針孔數為0.04個/cm 2以下時,不良率能夠為27%以下。當針孔數為0.02個/cm 2以下時,不良率能夠為21%以下。當針孔數為0.01個/cm 2以下時,不良率能夠為18%以下。 In addition, it can be seen from Table 1 that the smaller the number of pinholes in the conductor layer, the lower the defective rate of the wiring pattern. When the number of pinholes is 0.04 pieces/cm 2 or less, the defective rate can be 27% or less. When the number of pinholes is 0.02 pieces/cm 2 or less, the defective rate can be 21% or less. When the number of pinholes is 0.01/cm 2 or less, the defective rate can be 18% or less.
[表1]
1:覆銅積層板
10:基膜
20:導體層
21:金屬層
21a:基底金屬層
21b:銅薄膜層
22:鍍銅被膜
1: Copper clad laminate
10: base film
20: Conductor layer
21:
圖1為本發明的一實施方式的覆銅積層板的截面圖。1 is a cross-sectional view of a copper clad laminate according to an embodiment of the present invention.
1:覆銅積層板 1: Copper clad laminate
10:基膜 10: base film
20:導體層 20: Conductor layer
21:金屬層 21: Metal layer
21a:基底金屬層 21a: base metal layer
21b:銅薄膜層 21b: Copper thin film layer
22:鍍銅被膜 22: Copper coating film
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