TWI818380B - Copper-clad laminated boards and manufacturing methods of copper-clad laminated boards - Google Patents

Copper-clad laminated boards and manufacturing methods of copper-clad laminated boards Download PDF

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TWI818380B
TWI818380B TW110146010A TW110146010A TWI818380B TW I818380 B TWI818380 B TW I818380B TW 110146010 A TW110146010 A TW 110146010A TW 110146010 A TW110146010 A TW 110146010A TW I818380 B TWI818380 B TW I818380B
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copper
film
conductor layer
plating
clad laminated
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TW202226909A (en
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下地匠
西山芳英
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日商住友金屬鑛山股份有限公司
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    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/06Wires; Strips; Foils
    • C25D7/0614Strips or foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60Electroplating characterised by the structure or texture of the layers
    • C25D5/605Surface topography of the layers, e.g. rough, dendritic or nodular layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Laminated Bodies (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)

Abstract

本發明的課題為提供一種能夠降低藉由半加成法(semi-additive process)形成的配線圖案的不良率的覆銅積層板以及覆銅積層板之製造方法。本發明的解決手段為一種覆銅積層板(1),其具有在基膜(10)的表面上形成的含有鍍銅被膜(22)的導體層(20)。導體層(20)的厚度為0.4~3.0μm,並且直徑5μm以上的針孔為0.04個/cm 2以下。使用鍍敷裝置,在藉由卷對卷搬送基材的同時,藉由電解鍍敷形成基材的表面的鍍銅被膜(22),獲得具有厚度為0.4~3.0μm的導體層(20)的覆銅積層板(1)。鍍敷裝置中與基材的鍍敷面接觸的全部的輥的搬送面的表面粗糙度Rmax是0.1μm以下。 An object of the present invention is to provide a copper-clad laminated board and a method for manufacturing the copper-clad laminated board that can reduce the defective rate of wiring patterns formed by a semi-additive process. The solution of the present invention is a copper-clad laminate (1) having a conductor layer (20) including a copper-plated film (22) formed on the surface of a base film (10). The thickness of the conductor layer (20) is 0.4 to 3.0 μm, and the number of pinholes with a diameter of 5 μm or more is 0.04/cm 2 or less. Using a plating device, while conveying the base material from roll to roll, a copper plated film (22) on the surface of the base material is formed by electrolytic plating to obtain a conductor layer (20) having a thickness of 0.4 to 3.0 μm. Copper clad laminate(1). The surface roughness Rmax of the conveyance surfaces of all rollers in contact with the plated surface of the base material in the plating device is 0.1 μm or less.

Description

覆銅積層板及覆銅積層板之製造方法Copper-clad laminated boards and manufacturing methods of copper-clad laminated boards

本發明涉及一種覆銅積層板及覆銅積層板之製造方法。更詳細而言,本發明涉及一種用於撓性印刷配線板、覆晶薄膜等之製造的覆銅積層板及其覆銅積層板之製造方法。The invention relates to a copper-clad laminated board and a method for manufacturing the copper-clad laminated board. More specifically, the present invention relates to a copper-clad laminated board used for manufacturing flexible printed wiring boards, chip-on-chip films, and the like, and a method for manufacturing the copper-clad laminated board.

在液晶面板、筆記型電腦、數位相機、行動電話等電子設備中,使用在樹脂薄膜的表面上形成了配線圖案的撓性印刷配線板(FPC)、在撓性印刷配線板上安裝了半導體晶片的覆晶薄膜(COF)。Electronic devices such as liquid crystal panels, notebook computers, digital cameras, and mobile phones use flexible printed wiring boards (FPCs) with wiring patterns formed on the surface of resin films. Semiconductor wafers are mounted on the flexible printed wiring boards. Chip on film (COF).

藉由半加成法(semi-additive process)、減成法(subtractive process)等在覆銅積層板上形成配線圖案來獲得撓性印刷配線板。尤其是在需要微細配線的形成、高精度的配線尺寸的情況下,使用半加成法(例如,專利文獻1)。A flexible printed wiring board is obtained by forming a wiring pattern on a copper-clad laminate using a semi-additive process, a subtractive process, or the like. Especially when the formation of fine wiring and high-precision wiring size are required, the semi-additive method is used (for example, Patent Document 1).

在半加成法中,藉由蝕刻除去覆銅積層板的導體層中不需要的部分。當導體層過厚時,則蝕刻時間變長,連配線部也被蝕刻,因此配線的截面形狀難以成為矩形。因此,藉由半加成法加工的覆銅積層板的導體層較佳為較薄的導體層。因此,作為藉由半加成法加工的覆銅積層板,常使用具有厚度為0.2~3.0μm的導體層的覆銅積層板。In the semi-additive method, unnecessary parts of the conductor layer of the copper-clad laminate are removed by etching. When the conductor layer is too thick, the etching time becomes longer and even the wiring portion is etched, making it difficult for the cross-sectional shape of the wiring to be rectangular. Therefore, the conductor layer of the copper-clad laminate processed by the semi-additive method is preferably a thin conductor layer. Therefore, as a copper-clad laminated board processed by a semi-additive method, a copper-clad laminated board having a conductor layer with a thickness of 0.2 to 3.0 μm is often used.

藉由配線圖案廠商和組裝廠商按順序加工覆銅積層板而製造覆晶薄膜。配線圖案廠商在長條帶狀的覆銅積層板上排列了之後會成為複數個單片的複數個配線圖案的狀態下形成長條帶狀的撓性印刷配線板,將保持長條帶狀之撓性印刷配線板發送到組裝廠商。在此,在複數個配線圖案中,對發生配線的斷線、欠缺等缺陷的配線圖案標上表示不良的標記。組裝廠商在各個配線圖案上安裝半導體晶片。此時,當撓性印刷配線板的不良率(在撓性印刷配線板上形成的複數個配線圖案中不良配線圖案的比例)高時,安裝的生產性降低。因此,交付給組裝廠商的撓性印刷配線板大多規定配線圖案的容許不良率。雖然規格因組裝廠商而不同,但容許不良率大多定為30%。 [先前技術文獻] [專利文獻] Chip-on-chip films are manufactured by sequentially processing copper-clad laminates by wiring pattern manufacturers and assembly manufacturers. The wiring pattern manufacturer forms a long strip-shaped flexible printed wiring board by arranging a plurality of wiring patterns that will become a plurality of single pieces on a long strip-shaped copper-clad laminate, and maintains the long strip shape. The flexible printed wiring board is sent to the assembly manufacturer. Here, among the plurality of wiring patterns, a defective mark is given to a wiring pattern in which defects such as disconnection or missing wiring occur. The assembler mounts the semiconductor wafers on each wiring pattern. At this time, when the defective rate of the flexible printed wiring board (the ratio of defective wiring patterns among the plurality of wiring patterns formed on the flexible printed wiring board) is high, the productivity of mounting decreases. Therefore, the allowable defective rate of wiring patterns is often specified for flexible printed wiring boards delivered to assembly manufacturers. Although specifications vary among assembly manufacturers, the allowable defective rate is mostly set at 30%. [Prior technical literature] [Patent Document]

專利文獻1:日本特開2010-108964號公報Patent Document 1: Japanese Patent Application Publication No. 2010-108964

[發明欲解決之課題][Problem to be solved by the invention]

本發明鑒於上述情況,其目的是提供一種能夠降低藉由半加成法形成的配線圖案的不良率的覆銅積層板以及覆銅積層板之製造方法。 [用以解決課題之手段] In view of the above circumstances, an object of the present invention is to provide a copper-clad laminated board and a method for manufacturing the copper-clad laminated board that can reduce the defective rate of wiring patterns formed by a semi-additive method. [Means used to solve problems]

本發明的覆銅積層板,其特徵在於,其具有在基膜的表面上形成的含有鍍銅被膜的導體層,所述導體層的厚度為0.4~3.0μm,並且所述導體層中直徑5μm以上的針孔為0.04個/cm 2以下。 本發明的覆銅積層板之製造方法,其特徵在於,使用鍍敷裝置,在藉由卷對卷搬送基材的同時,藉由電解鍍敷形成該基材的表面的鍍銅被膜,獲得具有厚度為0.4~3.0μm的導體層的覆銅積層板,在使用鍍敷裝置獲得覆銅積層板時,所述鍍敷裝置中與所述基材的鍍敷面接觸的全部的輥的搬送面的表面粗糙度Rmax為0.1μm以下。 [發明之效果] The copper-clad laminated board of the present invention is characterized in that it has a conductor layer containing a copper-plated film formed on the surface of a base film, the thickness of the conductor layer is 0.4 to 3.0 μm, and the diameter of the conductor layer is 5 μm The number of pinholes above is 0.04/ cm2 or less. The manufacturing method of a copper-clad laminated board of the present invention is characterized by using a plating device to transport the base material from roll to roll and at the same time forming a copper-plated film on the surface of the base material by electrolytic plating to obtain a copper-plated film having When a copper-clad laminated board with a conductor layer having a thickness of 0.4 to 3.0 μm is obtained using a plating device, the conveying surfaces of all rollers in the plating device that are in contact with the plated surface of the base material The surface roughness Rmax is below 0.1μm. [Effects of the invention]

在本發明的覆銅積層板中,由於導體層中存在的直徑5μm以上的針孔為0.04個/cm 2以下,而能夠將藉由半加成法形成的配線圖案的不良率抑制到30%以下。 根據本發明的覆銅積層板之製造方法,能夠製造具有直徑5μm以上的針孔為0.04個/cm 2以下的導體層的覆銅積層板。 In the copper-clad laminate of the present invention, since the number of pinholes with a diameter of 5 μm or more present in the conductor layer is 0.04/cm 2 or less, the defective rate of the wiring pattern formed by the semi-additive method can be suppressed to 30%. the following. According to the manufacturing method of a copper-clad laminated board of the present invention, a copper-clad laminated board having a conductor layer having a pinhole diameter of 5 μm or more and 0.04/cm 2 or less can be manufactured.

[用以實施發明的形態][Form used to implement the invention]

接著,基於附圖說明本發明的實施方式。 (覆銅積層板) 如圖1所示,本發明的一實施方式的覆銅積層板1由基膜10和在基膜10的表面上直接形成的導體層20構成。可以如圖1所示的僅在基膜10的一面形成導體層20,也可以在基膜10的兩面形成導體層20。 Next, embodiments of the present invention will be described based on the drawings. (copper clad laminate) As shown in FIG. 1 , a copper-clad laminated board 1 according to an embodiment of the present invention is composed of a base film 10 and a conductor layer 20 formed directly on the surface of the base film 10 . The conductor layer 20 may be formed on only one side of the base film 10 as shown in FIG. 1 , or the conductor layer 20 may be formed on both sides of the base film 10 .

作為基膜10能夠使用聚醯亞胺膜、液晶聚合物(LCP)膜等樹脂膜。導體層20由藉由濺射等乾式成膜法直接成膜在基膜10上的金屬層21和藉由電解鍍敷直接成膜在金屬層21上的鍍銅被膜22構成。在基膜10的表面上按照金屬層21和鍍銅被膜22的順序層疊。 As the base film 10, a resin film such as a polyimide film or a liquid crystal polymer (LCP) film can be used. The conductor layer 20 is composed of a metal layer 21 directly formed on the base film 10 by a dry film formation method such as sputtering, and a copper plating film 22 directly formed on the metal layer 21 by electrolytic plating. A metal layer 21 and a copper-plated film 22 are laminated on the surface of the base film 10 in this order.

金屬層21由基底金屬層21a和銅薄膜層21b構成。在基膜10的表面上按照基底金屬層21a和銅薄膜層21b的順序層疊。通常,基底金屬層21a由鎳、鉻或鎳鉻合金構成。可以沒有基底金屬層21a。銅薄膜層21b可以隔著基底金屬層21a在基膜10的表面上成膜,也可以不隔著基底金屬層21a直接在基膜10的表面上成膜。 The metal layer 21 is composed of a base metal layer 21a and a copper thin film layer 21b. A base metal layer 21a and a copper thin film layer 21b are laminated on the surface of the base film 10 in this order. Typically, the base metal layer 21a is composed of nickel, chromium or nickel-chromium alloy. The base metal layer 21a may be omitted. The copper thin film layer 21b may be formed on the surface of the base film 10 via the base metal layer 21a, or may be directly formed on the surface of the base film 10 without interposing the base metal layer 21a.

沒有特別的限定,但基膜10的厚度通常為10~100μm。基底金屬層21a的厚度通常為5~50nm,銅薄膜層21b的厚度通常為50~400nm。在藉由半加成法加工的覆銅積層板1的情況下,導體層20的厚度通常為0.4~3.0μm。 There is no particular limitation, but the thickness of the base film 10 is usually 10 to 100 μm. The thickness of the base metal layer 21a is usually 5~50nm, and the thickness of the copper thin film layer 21b is usually 50~400nm. In the case of the copper-clad laminate 1 processed by the semi-additive method, the thickness of the conductor layer 20 is usually 0.4~3.0 μm.

藉由半加成法對覆銅積層板1進行加工,能夠製造撓性印刷配線板。藉由半加成法製造撓性印刷配線板,按照以下步驟進行。首先,在覆銅積層板1的鍍銅被膜22的表面上形成抗蝕劑層。接著,在抗蝕劑層中的形成配線圖案的部分形成開口部。接著,將從抗蝕劑層的開口部露出的鍍銅被膜22作為陰極來進行電解鍍敷,從而形成配線部。接著,除去抗蝕劑層,藉由閃蝕(Flash etching)等除去配線部以外的導體層20。由此,獲得撓性印刷配線板。By processing the copper-clad laminated board 1 by the semi-additive method, a flexible printed wiring board can be manufactured. To manufacture flexible printed wiring boards by the semi-additive method, follow the following steps. First, a resist layer is formed on the surface of the copper plating film 22 of the copper-clad laminated board 1 . Next, an opening is formed in a portion of the resist layer where the wiring pattern is formed. Next, the copper-plated film 22 exposed from the opening of the resist layer is electrolytically plated as a cathode, thereby forming a wiring portion. Next, the resist layer is removed, and the conductor layer 20 other than the wiring portion is removed by flash etching or the like. Thus, a flexible printed wiring board is obtained.

由於藉由半加成法加工的覆銅積層板1的鍍銅被膜22薄,因此藉由電解鍍敷形成鍍銅被膜22時易產生針孔。在半加成法中藉由電解鍍敷在鍍銅被膜22上層疊配線圖案的銅鍍敷。此時,如果鍍銅被膜22中存在針孔,則會阻礙層疊的銅鍍敷的生長,會發生配線的斷線、欠缺等缺陷。尤其是在製造覆晶薄膜的情況下,由於需要形成配線寬為15μm以下的微細配線,因此容易產生因針孔而引起的配線的缺陷。Since the copper-plated film 22 of the copper-clad laminate 1 processed by the semi-additive method is thin, pinholes are easily generated when the copper-plated film 22 is formed by electrolytic plating. In the semi-additive method, copper plating in which a wiring pattern is laminated on the copper plating film 22 is performed by electrolytic plating. At this time, if there are pinholes in the copper plating film 22, the growth of the stacked copper plating will be hindered, and defects such as disconnection and missing wiring may occur. Especially when manufacturing a chip-on-chip film, it is necessary to form fine wiring with a wiring width of 15 μm or less, so wiring defects caused by pinholes are likely to occur.

導體層20的針孔的數量越少,配線越不易產生缺陷,從而能夠抑制配線圖案的不良率。本實施方式的覆銅積層板1的導體層20中,直徑5μm以上的針孔是0.04個/cm 2以下。如此地,由於導體層20的針孔少,因此能夠將藉由半加成法形成的配線圖案的不良率抑制到30%以下。 The smaller the number of pinholes in the conductor layer 20 is, the less likely it is that wiring defects will occur, and the defective rate of wiring patterns can be suppressed. In the conductor layer 20 of the copper-clad laminated board 1 of this embodiment, the number of pinholes having a diameter of 5 μm or more is 0.04/cm 2 or less. In this way, since the conductor layer 20 has few pinholes, the defective rate of the wiring pattern formed by the semi-additive method can be suppressed to 30% or less.

(覆銅積層板的製造方法) 接著,說明本發明的一實施方式的覆銅積層板的製造方法。 使用卷對卷方式的濺射裝置,能夠在長條帶狀的基膜10的表面上形成金屬層21。以下,將在基膜10的表面上形成金屬層21的物品稱作基材。使用卷對卷方式的鍍敷裝置,能夠在長條帶狀的基材的表面上形成鍍銅被膜22。由此,獲得長條帶狀的覆銅積層板1。 (Manufacturing method of copper-clad laminate) Next, a method for manufacturing a copper-clad laminated board according to one embodiment of the present invention will be described. The metal layer 21 can be formed on the surface of the long strip-shaped base film 10 using a roll-to-roll sputtering device. Hereinafter, the article in which the metal layer 21 is formed on the surface of the base film 10 is called a base material. The copper plating film 22 can be formed on the surface of a long strip-shaped base material using a roll-to-roll type plating apparatus. Thus, the long strip-shaped copper-clad laminated board 1 is obtained.

鍍敷裝置是在藉由卷對卷搬送長條帶狀的基材的同時對基材進行電解鍍敷的裝置。鍍敷裝置具有將捲繞成卷狀的基材送出的供給裝置和將鍍敷後的基材(覆銅積層板1)捲繞成卷狀的卷取裝置。在供給裝置與卷取裝置之間的搬送路徑上,配置有前處理槽、鍍敷槽、後處理槽。在鍍敷槽中進行電解鍍敷。在將基材搬送到鍍敷槽內的同時,藉由電解鍍敷在其表面上形成鍍銅被膜22。The plating device is a device that performs electrolytic plating on the base material while transporting the long strip-shaped base material from roll to roll. The plating device includes a supply device that feeds out the base material wound into a roll shape, and a winding device that winds the plated base material (copper-clad laminated board 1 ) into a roll shape. On the conveyance path between the supply device and the winding device, a pre-treatment tank, a plating tank, and a post-treatment tank are arranged. Electrolytic plating is performed in a plating bath. While the base material is transported into the plating bath, the copper plating film 22 is formed on the surface by electrolytic plating.

鍍敷槽中貯留鍍銅液。鍍銅液包含水溶性銅鹽。只要是通常用於鍍銅液的水溶性銅鹽就可以沒有特別限定地使用。鍍銅液可以包含硫酸。藉由調節硫酸的添加量,能夠調節鍍銅液的pH和硫酸離子濃度。鍍銅液可以包含通常添加到鍍敷液中的添加劑。作為添加劑,可以單獨使用從光亮劑成分、整平劑成分、聚合物成分、氯成分等中選擇的一種,也可以組合使用兩種以上。The copper plating liquid is stored in the plating tank. Copper plating solutions contain water-soluble copper salts. Any water-soluble copper salt commonly used in copper plating solutions can be used without particular limitation. The copper plating solution may contain sulfuric acid. By adjusting the amount of sulfuric acid added, the pH and sulfate ion concentration of the copper plating solution can be adjusted. The copper plating solution may contain additives commonly added to plating solutions. As the additive, one selected from a brightener component, a leveling agent component, a polymer component, a chlorine component, etc. may be used alone, or two or more may be used in combination.

能夠任意選擇鍍銅液的各成分的含量。但是,鍍銅液較佳含有15~70g/L的銅和20~250g/L的硫酸。如此,能夠以足夠的速度形成鍍銅被膜22。鍍銅液較佳含有1~50mg/L的光亮劑(brightener)成分。如此,能夠使析出的晶體微細化並使鍍銅被膜22的表面平滑。鍍銅液較佳含有1~300mg/L的整平劑成分。如此,能夠抑制突起並形成平坦的鍍銅被膜22。鍍銅液較佳含有10~1500mg/L的聚合物成分。如此,能夠緩和電流向基材端部集中並形成均勻的鍍銅被膜22。鍍銅液較佳含有20~80mg/L的氯成分。如此,能夠抑制異常析出。The content of each component of the copper plating solution can be selected arbitrarily. However, the copper plating solution preferably contains 15 to 70 g/L of copper and 20 to 250 g/L of sulfuric acid. In this way, the copper plating film 22 can be formed at a sufficient speed. The copper plating solution preferably contains a brightener component of 1 to 50 mg/L. In this way, the precipitated crystals can be made fine and the surface of the copper plating film 22 can be smoothed. The copper plating solution preferably contains a leveling agent component of 1 to 300 mg/L. In this way, the protrusions can be suppressed and the flat copper plating film 22 can be formed. The copper plating solution preferably contains a polymer component of 10 to 1500 mg/L. In this way, the concentration of electric current on the edge portion of the base material can be alleviated and a uniform copper plating film 22 can be formed. The copper plating solution preferably contains a chlorine component of 20 to 80 mg/L. In this way, abnormal precipitation can be suppressed.

鍍銅液的溫度較佳為20~35℃。另外,較佳攪拌鍍敷槽內的鍍銅液。例如,能夠藉由將從噴嘴噴出的鍍銅液向基材噴射,來攪拌鍍銅液。The temperature of the copper plating liquid is preferably 20 to 35°C. In addition, it is preferable to stir the copper plating liquid in the plating tank. For example, the copper plating liquid can be stirred by spraying the copper plating liquid discharged from the nozzle toward the base material.

能夠藉由電解鍍敷中的電流密度和鍍敷時間來調節鍍銅被膜22的厚度。例如,調節鍍銅被膜22的厚度使得導體層20的厚度為0.4~3.0μm。The thickness of the copper plating film 22 can be adjusted by the current density and plating time during electrolytic plating. For example, the thickness of the copper plating film 22 is adjusted so that the thickness of the conductor layer 20 is 0.4 to 3.0 μm.

鍍敷裝置具有用於搬送基材的各種輥。在鍍敷裝置所具有的輥中,作為與基材的鍍敷面接觸的全部的輥,使用搬送面(輥外周面中與基材的鍍敷面接觸的區域)的表面粗糙度(Rmax)為0.1μm以下的輥。如此,在藉由電解鍍敷形成鍍銅被膜22時不易產生針孔。因此,能夠製造具有直徑5μm以上的針孔為0.04個/cm 2以下的導體層20的覆銅積層板1。 [實施例] The plating apparatus has various rollers for conveying the base material. Among the rollers included in the plating apparatus, the surface roughness (Rmax) of the conveying surface (the area on the outer peripheral surface of the roller that is in contact with the plated surface of the base material) is used as all the rollers in contact with the plated surface of the base material. It is a roller below 0.1μm. In this way, pinholes are less likely to occur when the copper plated film 22 is formed by electrolytic plating. Therefore, it is possible to manufacture the copper-clad laminated board 1 having the conductor layer 20 having a pinhole diameter of 5 μm or more and 0.04/cm 2 or less. [Example]

(共同的條件) 作為基膜,準備了寬570mm、厚度34μm的長條帶狀的聚醯亞胺膜(宇部興產公司製,Upilex)。將基膜設置於磁控濺射裝置中。在磁控濺射裝置內設置鎳鉻合金靶和銅靶。鎳鉻合金靶的組成為20質量%的Cr和80質量%的Ni。在真空環境下,在基膜的一面上形成由厚度為25nm的鎳鉻合金構成的基底金屬層,並在其上形成厚度為100nm的銅薄膜層。 (common conditions) As a base film, a long strip-shaped polyimide film (manufactured by Ube Kosan Co., Ltd., Upilex) with a width of 570 mm and a thickness of 34 μm was prepared. The base film was placed in a magnetron sputtering device. A nickel-chromium alloy target and a copper target are installed in the magnetron sputtering device. The composition of the nickel-chromium alloy target is 20 mass% Cr and 80 mass% Ni. In a vacuum environment, a base metal layer composed of a nickel-chromium alloy with a thickness of 25 nm is formed on one side of the base film, and a copper thin film layer with a thickness of 100 nm is formed on it.

使用卷對卷方式的鍍敷裝置在基材的一面上形成鍍銅被膜以獲得覆銅積層板。鍍敷槽中貯留的鍍銅液含有120g/L的硫酸銅、70g/L的硫酸、16mg/L的光亮劑成分、20mg/L的整平劑成分、1100mg/L的聚合物成分和50mg/L的氯成分。作為光亮劑成分,使用了雙(3-磺丙基)二硫化物(RASCHIG GmbH製的試劑)。作為整平劑成分,使用了二烯丙基二甲基氯化銨-二氧化硫共聚物(日東紡醫藥股份有限公司(Nittobo Medical Co., Ltd.)製,PAS-A-5)。作為聚合物成分,使用了聚乙二醇-聚丙二醇共聚物(日油股份有限公司製,Unilube 50MB-11)。作為氯成分,使用了鹽酸(和光純藥工業股份有限公司製的35%鹽酸)。A copper-plated film is formed on one side of the base material using a roll-to-roll plating device to obtain a copper-clad laminate. The copper plating liquid stored in the plating tank contains 120g/L copper sulfate, 70g/L sulfuric acid, 16mg/L brightener component, 20mg/L leveler component, 1100mg/L polymer component and 50mg/L. Chlorine content of L. As a brightener component, bis(3-sulfopropyl) disulfide (reagent manufactured by RASCHIG GmbH) was used. As a leveling agent component, diallyldimethylammonium chloride-sulfur dioxide copolymer (manufactured by Nittobo Medical Co., Ltd., PAS-A-5) was used. As the polymer component, polyethylene glycol-polypropylene glycol copolymer (Unilube 50MB-11, manufactured by NOF Co., Ltd.) was used. As the chlorine component, hydrochloric acid (35% hydrochloric acid manufactured by Wako Pure Chemical Industries, Ltd.) was used.

(實施例1) 在鍍敷裝置所具有的輥中,作為與基材的鍍敷面接觸的全部輥,使用搬送面的表面粗糙度(Rmax)為0.068~0.074μm的輥。調節鍍銅被膜的厚度使導體層的厚度為0.4μm。 (Example 1) Among the rollers included in the plating apparatus, rollers having a conveying surface surface roughness (Rmax) of 0.068 to 0.074 μm are used as all rollers that come into contact with the plated surface of the base material. The thickness of the copper plating film was adjusted so that the thickness of the conductor layer was 0.4 μm.

(實施例2) 在鍍敷裝置所具有的輥中,作為與基材的鍍敷面接觸的全部輥,使用搬送面的表面粗糙度(Rmax)為0.068~0.074μm的輥。調節鍍銅被膜的厚度使導體層的厚度為2.0μm。 (Example 2) Among the rollers included in the plating apparatus, rollers having a conveying surface surface roughness (Rmax) of 0.068 to 0.074 μm are used as all rollers that come into contact with the plated surface of the base material. The thickness of the copper plating film was adjusted so that the thickness of the conductor layer was 2.0 μm.

(實施例3) 在鍍敷裝置所具有的輥中,作為與基材的鍍敷面接觸的全部輥,使用搬送面的表面粗糙度(Rmax)為0.068~0.074μm的輥。調節鍍銅被膜的厚度使導體層的厚度為3.0μm。 (Example 3) Among the rollers included in the plating apparatus, rollers having a conveying surface surface roughness (Rmax) of 0.068 to 0.074 μm are used as all rollers that come into contact with the plated surface of the base material. The thickness of the copper plating film was adjusted so that the thickness of the conductor layer was 3.0 μm.

(比較例1) 在鍍敷裝置所具有的輥中,作為與基材的鍍敷面接觸的全部輥,使用搬送面的表面粗糙度(Rmax)為4.003~4.218μm的輥。調節鍍銅被膜的厚度使導體層的厚度為3.0μm。 (Comparative example 1) Among the rollers included in the plating apparatus, rollers having a conveyance surface surface roughness (Rmax) of 4.003 to 4.218 μm are used as all rollers that come into contact with the plated surface of the base material. The thickness of the copper plating film was adjusted so that the thickness of the conductor layer was 3.0 μm.

(比較例2) 在鍍敷裝置所具有的輥中,作為與基材的鍍敷面接觸的全部輥,使用搬送面的表面粗糙度(Rmax)為7.101~7.129μm的輥。調節鍍銅被膜的厚度使導體層的厚度為0.5μm。 (Comparative example 2) Among the rollers included in the plating apparatus, rollers having a conveyance surface surface roughness (Rmax) of 7.101 to 7.129 μm are used as all rollers that come into contact with the plated surface of the base material. The thickness of the copper plating film was adjusted so that the thickness of the conductor layer was 0.5 μm.

從實施例1~3和比較例1、2中獲得的各覆銅積層板裁出250×160mm的試樣。使用以鹵素燈為光源的背光照明檢查各試樣,並計數直徑5μm以上的針孔數。一邊與預先準備的直徑5μm的針孔的樣品進行比較,一邊進行目視檢查。將其結果示於表1。A 250×160 mm sample was cut out from each of the copper-clad laminated boards obtained in Examples 1 to 3 and Comparative Examples 1 and 2. Use backlighting with a halogen lamp as the light source to inspect each sample and count the number of pinholes with a diameter of 5 μm or more. A visual inspection was performed while comparing it with a previously prepared sample of a pinhole having a diameter of 5 μm. The results are shown in Table 1.

在使用了表面粗糙度(Rmax)為0.068~0.074μm的輥的實施例1~3中,針孔數均為0.04個/cm 2以下。相對於此,在使用了表面粗糙度(Rmax)為4.003~4.218μm或7.101~7.129μm的輥的比較例1、2中,針孔數均超過0.04個/cm 2。由此,確認了當使用表面粗糙度(Rmax)為0.1μm以下的輥時,能夠製造具有直徑5μm以上的針孔為0.04個/cm 2以下的導體層的覆銅積層板。 In Examples 1 to 3 using rollers with a surface roughness (Rmax) of 0.068 to 0.074 μm, the number of pinholes was all 0.04/cm 2 or less. On the other hand, in Comparative Examples 1 and 2 using rollers with surface roughness (Rmax) of 4.003 to 4.218 μm or 7.101 to 7.129 μm, the number of pinholes exceeded 0.04/cm 2 in both cases. From this, it was confirmed that when a roller with a surface roughness (Rmax) of 0.1 μm or less is used, a copper-clad laminated board having a conductor layer with a pinhole diameter of 5 μm or more and 0.04/cm 2 or less can be manufactured.

接著,加工實施例1~3和比較例1、2中獲得的各覆銅積層板以製造撓性印刷配線板。按照以下步驟進行撓性印刷配線板的製造。在覆銅積層板的鍍銅被膜的表面上層疊乾膜抗蝕劑,以形成排列了複數個配線圖案的抗蝕劑掩模。各配線圖案的尺寸約為70×40mm,最小間距為20μm,配線寬為10μm。接著,將從抗蝕劑掩模的開口部露出的鍍銅被膜作為陰極進行電解鍍敷,層疊銅鍍敷以使其與覆銅積層板的導體層的總厚度為8μm。Next, each of the copper-clad laminated boards obtained in Examples 1 to 3 and Comparative Examples 1 and 2 was processed to produce a flexible printed wiring board. Follow the steps below to manufacture a flexible printed wiring board. A dry film resist is laminated on the surface of the copper-plated film of the copper-clad laminate to form a resist mask in which a plurality of wiring patterns are arranged. The size of each wiring pattern is approximately 70×40mm, the minimum pitch is 20μm, and the wiring width is 10μm. Next, the copper plating film exposed from the opening of the resist mask was electrolytically plated as a cathode, and the copper plating was laminated so that the total thickness of the copper plating and the conductor layer of the copper-clad laminate was 8 μm.

用顯微鏡觀察從抗蝕劑掩模的開口部露出的層疊的銅鍍敷(配線圖案)。將存在配線寬的三分之一以上尺寸的欠缺或斷線的配線圖案判斷為不良,並求出配線圖案的不良率。將其結果示於表1。The laminated copper plating (wiring pattern) exposed from the opening of the resist mask was observed with a microscope. Wiring patterns with defects or disconnections that are one-third or more of the wiring width are determined to be defective, and the defective rate of the wiring patterns is calculated. The results are shown in Table 1.

確認了在導體層的針孔數為0.04個/cm 2以下的實施例1~3中,不良率均為30%以下,在容許範圍內。相對於此,在導體層的針孔數為0.07個/cm 2、0.10個/cm 2的比較例1、2中,不良率均超過30%。由此,確認了當導體層的針孔數為0.04個/cm 2以下時,藉由半加成法形成的配線圖案的不良率為30%以下。 It was confirmed that in Examples 1 to 3 in which the number of pinholes in the conductor layer was 0.04/cm 2 or less, the defective rates were all 30% or less, which was within the allowable range. On the other hand, in Comparative Examples 1 and 2 in which the number of pinholes in the conductor layer was 0.07 pinholes/cm 2 and 0.10 pinholes/cm 2 , the defective rates exceeded 30%. From this, it was confirmed that when the number of pinholes in the conductor layer is 0.04/cm 2 or less, the defective rate of the wiring pattern formed by the semi-additive method is 30% or less.

另外,由表1可知導體層的針孔數越少,配線圖案的不良率越低。當針孔數為0.04個/cm 2以下時,不良率能夠為27%以下。當針孔數為0.02個/cm 2以下時,不良率能夠為21%以下。當針孔數為0.01個/cm 2以下時,不良率能夠為18%以下。 In addition, it can be seen from Table 1 that the smaller the number of pinholes in the conductor layer, the lower the defective rate of the wiring pattern. When the number of pinholes is 0.04/cm or less, the defective rate can be less than 27%. When the number of pinholes is 0.02/cm or less, the defective rate can be less than 21%. When the number of pinholes is 0.01/ cm2 or less, the defective rate can be less than 18%.

[表1]   輥的表面粗糙度(Rmax) [μm] 導體層厚度 [μm] 針孔數 [個/cm 2] 不良率 [%] 實施例1 0.068~0.074 0.4 0.04 27 實施例2 2.0 0.02 21 實施例3 3.0 0.01 18 比較例1 4.003~4.218 2.0 0.10 39 比較例2 7.101~7.129 0.5 0.07 33 [Table 1] Roller surface roughness (Rmax) [μm] Conductor layer thickness [μm] Number of pinholes [pieces/cm 2 ] Defective rate [%] Example 1 0.068~0.074 0.4 0.04 27 Example 2 2.0 0.02 twenty one Example 3 3.0 0.01 18 Comparative example 1 4.003~4.218 2.0 0.10 39 Comparative example 2 7.101~7.129 0.5 0.07 33

1:覆銅積層板 10:基膜 20:導體層 21:金屬層 21a:基底金屬層 21b:銅薄膜層 22:鍍銅被膜 1: Copper clad laminate 10: Basement membrane 20: Conductor layer 21:Metal layer 21a: Base metal layer 21b: Copper film layer 22: Copper coating

圖1為本發明的一實施方式的覆銅積層板的截面圖。FIG. 1 is a cross-sectional view of a copper-clad laminate according to an embodiment of the present invention.

1:覆銅積層板 1: Copper clad laminate

10:基膜 10: Basement membrane

20:導體層 20: Conductor layer

21:金屬層 21:Metal layer

21a:基底金屬層 21a: Base metal layer

21b:銅薄膜層 21b: Copper film layer

22:鍍銅被膜 22: Copper coating

Claims (2)

一種覆銅積層板,其特徵在於,該覆銅積層板具有在基膜的表面上直接形成的導體層,該導體層具有:藉由乾式成膜法直接成膜在該基膜上的金屬層、及藉由電解鍍敷直接成膜在該金屬層上的鍍銅被膜,該導體層的厚度為0.4~3.0μm,並且該導體層中直徑5μm以上的針孔為0.01個/cm2以下。 A copper-clad laminate, characterized in that the copper-clad laminate has a conductor layer directly formed on the surface of a base film, and the conductor layer has: a metal layer directly formed on the base film by a dry film forming method. , and a copper-plated film directly formed on the metal layer by electrolytic plating, the thickness of the conductor layer is 0.4~3.0μm, and the number of pinholes in the conductor layer with a diameter of 5μm or more is 0.01/ cm2 or less. 一種覆銅積層板之製造方法,其特徵在於,使用鍍敷裝置,在藉由卷對卷搬送在基膜的表面上形成金屬層而成之基材的同時,藉由電解鍍敷形成該基材的表面的鍍銅被膜,獲得具有厚度為0.4~3.0μm且直徑5μm以上的針孔為0.01個/cm2以下的導體層的覆銅積層板,在使用該鍍敷裝置獲得該覆銅積層板時,該鍍敷裝置中與該基材的鍍敷面接觸的全部的輥的搬送面的表面粗糙度Rmax為0.1μm以下,該導體層係直接形成在該基膜的表面上,該導體層具有:藉由乾式成膜法直接成膜在該基膜上的金屬層、及藉由電解鍍敷直接成膜在該金屬層上的鍍銅被膜。 A method for manufacturing a copper-clad laminated board, characterized by using a plating device to transport a base material in which a metal layer is formed on a surface of a base film by roll-to-roll roll-to-roll transport, and at the same time forming the base material by electrolytic plating. The copper-plated film on the surface of the material is used to obtain a copper-clad laminate having a conductor layer with a thickness of 0.4 to 3.0 μm and a pinhole diameter of 5 μm or more and a pinhole count of 0.01/cm or less, and the copper-clad laminate is obtained using the plating device. When the plate is used, the surface roughness Rmax of the conveying surfaces of all the rollers in contact with the plated surface of the base material in the plating device is 0.1 μm or less, and the conductor layer is directly formed on the surface of the base film, and the conductor layer The layer includes a metal layer directly formed on the base film by a dry film forming method, and a copper plating film directly formed on the metal layer by electrolytic plating.
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