TW202226347A - Method for manufacturing semiconductor film by using sputtering technology - Google Patents
Method for manufacturing semiconductor film by using sputtering technology Download PDFInfo
- Publication number
- TW202226347A TW202226347A TW109144478A TW109144478A TW202226347A TW 202226347 A TW202226347 A TW 202226347A TW 109144478 A TW109144478 A TW 109144478A TW 109144478 A TW109144478 A TW 109144478A TW 202226347 A TW202226347 A TW 202226347A
- Authority
- TW
- Taiwan
- Prior art keywords
- thin film
- semiconductor thin
- sputtering
- gas
- layer
- Prior art date
Links
Images
Landscapes
- Physical Vapour Deposition (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Abstract
Description
本發明為半導體薄膜製造之有關技術領域,尤指一種使用濺鍍技術製作半導體薄膜之方法。 The present invention relates to the technical field of semiconductor thin film manufacturing, and more particularly, to a method for manufacturing semiconductor thin films using sputtering technology.
LED為目前廣泛應用之發光元件,其具有體積小、使用壽命長等優點,因而被廣泛地應用於人類的日常生活之中。隨著LED背光源被廣泛地應用至顯示器、平板電腦、與智慧型手機,LED的電子元件的尺寸被要求必須進一步地微縮至微米尺寸。Mini LED又名「次毫米發光二極體」,最早是由晶元光電(EPISTAR Corporation)所提出,晶粒的對角線長度介於50微米至60微米之間的LED。近年,微發光二極體(Micro LED)則成為新一代顯示技術,藉由將LED晶粒進一步地微小化,使其晶粒的對角線長度小於50微米,同時透過薄膜化、陣列化與單獨驅動發光的技術來實現每個LED晶粒之圖元單獨定址。 LED is a widely used light-emitting element at present. It has the advantages of small size and long service life, so it is widely used in human daily life. As LED backlight sources are widely used in displays, tablet computers, and smart phones, the size of LED electronic components is required to be further scaled down to the micron size. Mini LED, also known as "sub-millimeter light-emitting diode", was first proposed by EPISTAR Corporation. The diagonal length of the die is between 50 microns and 60 microns. In recent years, Micro LED (Micro LED) has become a new generation of display technology. By further miniaturizing the LED die, the diagonal length of the die is less than 50 microns. The technology of driving light-emitting separately realizes the individual addressing of the picture element of each LED die.
金屬有機化學氣相沉積(Metal Organic Chemical Vapor Phase Deposition,MOCVD)是一種晶體成長方式,其已經普遍運 用在發光二極體(LED)、雷射(Laser)、電晶體(Transistor)、及太陽能電池(Solar cell)的元件製作。以製作氮化鎵(GaN)薄膜為例,當前驅物和摻雜物由反應氣體送入一個已加熱的高溫反應腔體,氮(N)原子和鎵(Ga)原子受熱產生化學反應,並且在基板產生晶格化的成長最後形成原子排列整齊的薄膜,這種薄膜的沉積方式又稱為磊晶(Epitaxy)。 Metal Organic Chemical Vapor Phase Deposition (MOCVD) is a crystal growth method, which has been widely used. Used in the fabrication of light-emitting diodes (LEDs), lasers (Laser), transistors (Transistor), and solar cells (Solar cell). Taking the production of gallium nitride (GaN) thin films as an example, the precursors and dopants are fed into a heated high-temperature reaction chamber by reactive gases, and nitrogen (N) atoms and gallium (Ga) atoms are heated to produce chemical reactions, and The growth of lattices on the substrate finally forms a thin film with neatly arranged atoms. The deposition method of this thin film is also called epitaxy.
除了MOCVD外,分子束磊晶(Molecular Beam Epitaxy,MBE)也經常應用在LED元件的製作。已知,業界目前正大量運用MOCVD技術於LED元件的製作。可惜的是,在製作厚度約為2μm的未摻雜氮化鎵(Undoped GaN,u-GaN)時,MOCVD與MBE的低成長速率顯然已經不符經濟效益。另一方面,業界致力於直接在碳化矽(SiC)基板上直接成長氮化鋁及/或氮化鎵薄膜,達到降地LED元件之製造成本並解決傳統藍寶石基板的散熱不佳之問題。然而,使用碳化矽作為LED元件的基板時,就必須在N型氮化鎵和碳化矽基板之間成長一層氮化鋁(AlN)以作為一緩衝層。在製作氮化鋁(AlN)緩衝層的過程中需要大量的三甲基鋁(TMAl)氣體作為鋁成分的來源,還需要氫氣與大量的氨氣(NH3)與氮氣(N2)作為填充氣體。 In addition to MOCVD, Molecular Beam Epitaxy (MBE) is also often used in the fabrication of LED components. It is known that the industry is currently using a lot of MOCVD technology in the manufacture of LED components. Unfortunately, when making undoped gallium nitride (Undoped GaN, u-GaN) with a thickness of about 2 μm, the low growth rates of MOCVD and MBE are obviously uneconomical. On the other hand, the industry is committed to directly growing aluminum nitride and/or gallium nitride thin films on silicon carbide (SiC) substrates to reduce the manufacturing cost of LED devices and solve the problem of poor heat dissipation of traditional sapphire substrates. However, when silicon carbide is used as the substrate of the LED element, a layer of aluminum nitride (AlN) must be grown between the N-type gallium nitride and the silicon carbide substrate as a buffer layer. In the process of making the aluminum nitride (AlN) buffer layer, a large amount of trimethylaluminum (TMAl) gas is required as the source of aluminum components, and hydrogen, a large amount of ammonia gas (NH 3 ) and nitrogen gas (N 2 ) are also required as fillings gas.
由上述說明可知,應用在例如GaN和AlN等半導體薄膜的製作時,習知的MOCVD技術及/或MBE技術仍具有進一步改善的空間。有鑑於此,本案之發明人係極力加以研究發明,而終於研發完成本發明之一種使用濺鍍技術製作半導體薄膜之方法。 It can be seen from the above description that when applied to the fabrication of semiconductor thin films such as GaN and AlN, the conventional MOCVD technology and/or MBE technology still has room for further improvement. In view of this, the inventor of the present case has made great efforts to research and invent, and finally developed and completed a method of producing a semiconductor thin film using sputtering technology of the present invention.
本發明之主要目的在於提供一種使用濺鍍技術製作半導體薄膜之方法,其特徵在於,在固定總氣體流量的情況下將通入一濺鍍腔體內的一反應氣體與一工作氣體之間的一氣體比例控制在15%至25%之間。如此,在該氣體比例被控制在介於15%至25%之間的情況下,來自於靶材的一原子與該反應氣體之一原子會在一介穩態模式(Metastable mode)下反應成用以組成一半導體薄膜的一化合物,從而加速該半導體薄膜於一基板上的鍍膜速率。因此,本發明之方法具有取代習知的MOCVD技術及/或MBE技術之潛力,從而被大量運用在LED元件的製作。 The main purpose of the present invention is to provide a method for fabricating a semiconductor thin film using sputtering technology, which is characterized in that, under the condition of a fixed total gas flow rate, a reaction gas and a working gas flowing into a sputtering chamber are The gas ratio is controlled between 15% and 25%. In this way, when the gas ratio is controlled between 15% and 25%, an atom from the target material and an atom of the reaction gas will react in a metastable mode (Metastable mode) A compound of a semiconductor thin film is used to accelerate the coating rate of the semiconductor thin film on a substrate. Therefore, the method of the present invention has the potential to replace the conventional MOCVD technology and/or MBE technology, and thus is widely used in the fabrication of LED devices.
為達成上述目的,本發明提出所述使用濺鍍技術製作半導體薄膜之方法之一實施例,其包括以下步驟: In order to achieve the above object, the present invention proposes an embodiment of the method for fabricating a semiconductor thin film using sputtering technology, which includes the following steps:
(1)將一靶材與一底層物分別置於一濺鍍設備的一濺鍍腔體內的一第一載台與一第二載台之上; (1) respectively placing a target and a substrate on a first stage and a second stage in a sputtering chamber of a sputtering equipment;
(2)依一總氣體流量將至少一反應氣體與一工作氣體通入該濺鍍腔體內,其中該總氣體流量介於135sccm至165sccm之間; (2) Passing at least one reaction gas and a working gas into the sputtering chamber according to a total gas flow, wherein the total gas flow is between 135 sccm and 165 sccm;
(3)調整該濺鍍設備之一固定濺鍍功率介於90W至110W之間,且在固定所述總氣體流量的情況下調整該反應氣體與該工作氣體之間的一氣體比例,使該氣體比例介於15%至25%之間;以及 (3) Adjust a fixed sputtering power of the sputtering equipment between 90W and 110W, and adjust a gas ratio between the reactive gas and the working gas under the condition of fixing the total gas flow so that the Gas ratio between 15% and 25%; and
(4)在該濺鍍腔體內的一製程溫度介於600℃至800℃的情況下,該底層物3的表面上鍍覆一半導體薄膜。 (4) Under the condition that a process temperature in the sputtering chamber is between 600° C. and 800° C., a semiconductor film is plated on the surface of the substrate 3 .
於前述本發明之使用濺鍍技術製作半導體薄膜之方法的實施例中,在該氣體比例被控制在介於15%至25%之間的情況下,來自於 該靶材的一原子與該反應氣體之一原子在一介穩態模式(Metastable mode)下反應成用以組成該半導體薄膜的一化合物。 In the foregoing embodiments of the present invention of the method for fabricating a semiconductor thin film using sputtering technology, under the condition that the gas ratio is controlled between 15% and 25%, the An atom of the target reacts with an atom of the reactive gas in a metastable mode to form a compound for composing the semiconductor thin film.
於前述本發明之使用濺鍍技術製作半導體薄膜之方法的實施例中,在該底層物為一藍寶石基板(Sapphire)、一矽基板、一碳化矽基板、或一玻璃基板的情況下,形成於該底層物之上的該半導體薄膜為一緩衝層,且該緩衝層的製造材料為下列任一種:未摻雜的氮化鎵(Undoped GaN,u-GaN)、氧化鋅(ZnO)或氮化鋁(AlN)層。 In the above-mentioned embodiment of the method for fabricating a semiconductor thin film using sputtering technology of the present invention, when the underlying material is a sapphire substrate (Sapphire), a silicon substrate, a silicon carbide substrate, or a glass substrate, it is formed on the The semiconductor thin film on the underlying material is a buffer layer, and the buffer layer is made of any one of the following materials: undoped gallium nitride (Undoped GaN, u-GaN), zinc oxide (ZnO) or nitride Aluminum (AlN) layer.
於前述本發明之使用濺鍍技術製作半導體薄膜之方法的實施例中,在該底層物為一緩衝層的情況下,形成於該底層物之上的該半導體薄膜為一N型氮化鎵(n-type gallium nitride,n-GaN)層。 In the above-mentioned embodiment of the method for fabricating a semiconductor thin film using sputtering technology of the present invention, when the underlying material is a buffer layer, the semiconductor thin film formed on the underlying material is an N-type gallium nitride ( n-type gallium nitride, n-GaN) layer.
於前述本發明之使用濺鍍技術製作半導體薄膜之方法的實施例中,在該底層物為一N型氮化鎵層的情況下,形成於該底層物之上的該半導體薄膜為一主動層。 In the above-mentioned embodiments of the method for fabricating a semiconductor thin film using sputtering technology of the present invention, when the underlying material is an N-type gallium nitride layer, the semiconductor thin film formed on the underlying material is an active layer .
於前述本發明之使用濺鍍技術製作半導體薄膜之方法的實施例中,在該底層物為一主動層的情況下,形成於該底層物之上的該半導體薄膜為一P型氮化鎵(p-type gallium nitride,p-GaN)層。 In the above-mentioned embodiment of the method for fabricating a semiconductor thin film using sputtering technology of the present invention, when the underlying material is an active layer, the semiconductor thin film formed on the underlying material is a P-type gallium nitride ( p-type gallium nitride, p-GaN) layer.
<本發明> <The present invention>
S1-S4:步驟 S1-S4: Steps
1:濺鍍設備 1: Sputtering equipment
10:濺鍍腔體 10: Sputtering chamber
101:第一載台 101: The first stage
102:第二載台 102: Second stage
B1:靶材 B1: Target
B2:基板 B2: Substrate
BL:緩衝層 BL: buffer layer
NS:N型氮化鎵層 NS: N-type gallium nitride layer
AL:主動層 AL: Active layer
PS:P型氮化鎵層 PS: P-type GaN layer
SL:半導體材料層 SL: semiconductor material layer
圖1顯示本發明之一種使用濺鍍技術製作半導體薄膜之方法的流程圖; 1 shows a flow chart of a method for fabricating a semiconductor thin film using sputtering technology according to the present invention;
圖2顯示利用本發明之方法於一基板上形成一緩衝層的製程示意圖; FIG. 2 shows a schematic diagram of a process for forming a buffer layer on a substrate using the method of the present invention;
圖3顯示氮氣(N2)濃度相對於半導體薄膜之鍍膜速率的資料曲線圖; Figure 3 is a graph showing the data of nitrogen (N 2 ) concentration versus deposition rate of semiconductor thin films;
圖4顯示利用本發明之方法於一緩衝層上形成一半導體材料層的製程示意圖; FIG. 4 shows a schematic diagram of a process for forming a semiconductor material layer on a buffer layer using the method of the present invention;
圖5顯示利用本發明之方法於一緩衝層上形成另一半導體材料層的製程示意圖; 5 shows a schematic diagram of a process for forming another semiconductor material layer on a buffer layer by using the method of the present invention;
圖6顯示利用本發明之方法於一緩衝層上形成另一半導體材料層的製程示意圖; 6 shows a schematic diagram of a process for forming another semiconductor material layer on a buffer layer by using the method of the present invention;
圖7顯示利用本發明之方法鍍覆於一基板上的一緩衝層與一半導體材料層的側剖視圖; 7 shows a side cross-sectional view of a buffer layer and a semiconductor material layer plated on a substrate by the method of the present invention;
圖8顯示該緩衝層與該半導體材料層的穿透式電子顯微鏡(Transmission electron microscopy,TEM)圖; Fig. 8 shows the transmission electron microscope (Transmission electron microscopy, TEM) picture of this buffer layer and this semiconductor material layer;
圖9顯示利用操作在廣角繞射(WAG)模式的X光繞射分析儀(X-ray diffraction,XRD)從GaN層量測到的一XRD圖譜;以及 FIG. 9 shows an XRD pattern measured from a GaN layer using an X-ray diffraction (XRD) analyzer operating in wide angle diffraction (WAG) mode; and
圖10顯示為利用操作在廣角繞射模式的X光繞射分析儀從ZnO層量測到的一XRD圖。 Figure 10 shows an XRD pattern measured from a ZnO layer using an X-ray diffraction analyzer operating in wide angle diffraction mode.
為了能夠更清楚地描述本發明所提出之一種使用濺鍍技術製作半導體薄膜之方法,以下將配合圖式,詳盡說明本發明之較佳實施例。 In order to more clearly describe a method for fabricating a semiconductor thin film using sputtering technology proposed by the present invention, preferred embodiments of the present invention will be described in detail below with reference to the drawings.
圖1顯示本發明之一種使用濺鍍技術製作半導體薄膜之方法的流程圖。如圖1所示,本發明之使用濺鍍技術製作半導體薄膜之方法主要包括以下步驟: FIG. 1 shows a flow chart of a method for fabricating a semiconductor thin film by sputtering according to the present invention. As shown in FIG. 1 , the method for producing a semiconductor thin film using sputtering technology of the present invention mainly includes the following steps:
步驟S1:將一靶材與一底層物分別置於一濺鍍設備的一濺鍍腔體內的一第一載台與一第二載台之上; Step S1: respectively placing a target and a substrate on a first stage and a second stage in a sputtering chamber of a sputtering apparatus;
步驟S2:依一總氣體流量將至少一反應氣體與一工作氣體通入該濺鍍腔體內,其中該總氣體流量介於135sccm至165sccm之間; Step S2: passing at least one reactive gas and one working gas into the sputtering chamber according to a total gas flow, wherein the total gas flow is between 135 sccm and 165 sccm;
步驟S3:調整該濺鍍設備之一固定濺鍍功率介於90W至110W之間,且在固定所述總氣體流量的情況下調整該反應氣體與該工作氣體之間的一氣體比例,使該氣體比例介於15%至25%之間;以及 Step S3: Adjust a fixed sputtering power of the sputtering equipment to be between 90W and 110W, and adjust a gas ratio between the reactive gas and the working gas under the condition of fixing the total gas flow so that the Gas ratio between 15% and 25%; and
步驟S4:在該濺鍍腔體內的一製程溫度介於600℃至800℃的情況下,該底層物的表面上鍍覆一半導體薄膜。 Step S4 : under the condition that a process temperature in the sputtering chamber is between 600° C. and 800° C., a semiconductor film is plated on the surface of the substrate.
下文將配合相關圖示加以說明本發明之一種使用濺鍍技術製作半導體薄膜之方法。圖2顯示利用本發明之方法於一基板上形成一緩衝層的製程示意圖。如圖2所示,一靶材B1與一基板B2(即,底層物)分別置於一濺鍍設備1的一濺鍍腔體10內的一第一載台101與一第二載台102之上(即,步驟S1)。接著,依一總氣體流量將至少一反應氣體與一工作氣體通入該濺鍍腔體10內,其中該總氣體流量介於135sccm至165sccm之間(即,步驟S2)。繼續地,調整該濺鍍設備之一固定濺鍍功率介於90W至110W之間,且在固定所述總氣體流量的情況下調整該反應氣體與該工作氣體之間的一氣體比例,使該氣體比例介於15%至25%之間(即,步驟S3)。最終,在該濺鍍腔體10內的
一製程溫度介於600℃至800℃的情況下,該基板B2(即,底層物)的表面上鍍覆一半導體薄膜作為一緩衝層BL(即,步驟S4)。
A method for fabricating a semiconductor thin film using sputtering technology of the present invention will be described below in conjunction with the relevant figures. FIG. 2 shows a schematic diagram of a process of forming a buffer layer on a substrate by using the method of the present invention. As shown in FIG. 2 , a target B1 and a substrate B2 (ie, the substrate) are respectively placed on a
以製作LED元件為例,該基板B2可為藍寶石基板(Sapphire)、矽基板、碳化矽基板、或玻璃基板,且所述緩衝層的製造材料可為未摻雜的氮化鎵(Undoped GaN,u-GaN)、氧化鋅(ZnO)或氮化鋁(AlN)。以氮化鎵作為該緩衝層的製造材料為例,反應氣體和工作氣體分別為氮氣(N2)和氬氣(Ar),且靶材為氮化鎵靶材或鎵靶材。在一實驗例中,所述總氣體流量被控制在150sccm,且該反應氣體與該工作氣體之間的一氣體比例被控制在介於15%至25%之間。在此製程條件下,來自於該靶材2的一原子(Ga)與該反應氣體之一原子(N)在一介穩態模式下(Metastable mode)反應成用以組成該緩衝層BL薄膜的一化合物(即,GaN)。
Taking the manufacture of LED devices as an example, the substrate B2 can be a sapphire substrate (Sapphire), a silicon substrate, a silicon carbide substrate, or a glass substrate, and the buffer layer can be made of undoped gallium nitride (Undoped GaN, u-GaN), Zinc Oxide (ZnO) or Aluminum Nitride (AlN). Taking gallium nitride as the manufacturing material of the buffer layer as an example, the reactive gas and the working gas are nitrogen (N 2 ) and argon (Ar) respectively, and the target material is a gallium nitride target or a gallium target. In an experimental example, the total gas flow was controlled at 150 sccm, and a gas ratio between the reaction gas and the working gas was controlled between 15% and 25%. Under this process condition, an atom (Ga) from the
圖3為氮氣(N2)濃度相對於半導體薄膜之鍍膜速率的資料曲線圖。由圖3可知,在固定濺鍍功率和總氣體流量分別為100W和150sccm的情況下,當氮氣的濃度超過25%(即,前述之反應氣體與工作氣體的氣體比例),氮化鎵的鍍膜速率趨近於平緩,即進入氮化態的鍍膜階段。另一方面,在固定濺鍍功率和總氣體流量分別為100W和150sccm的情況下,當氮氣的濃度超過介於15%至25%之間時,鎵原子與氮原子在一介穩態模式下(Metastable mode)反應成鍍覆在該基板B2的表面上的一氮化鎵薄膜。由圖3可知,處於介穩態的氮化鎵之鍍膜速率明顯大於處於氮化態的氮化鎵之鍍膜速率。 FIG. 3 is a data plot of nitrogen (N 2 ) concentration versus deposition rate of a semiconductor thin film. It can be seen from Figure 3 that under the condition of fixed sputtering power and total gas flow of 100W and 150sccm, respectively, when the concentration of nitrogen exceeds 25% (that is, the gas ratio of the aforementioned reactive gas and working gas), the coating of gallium nitride will The rate tends to be flat, that is, it enters the coating stage of the nitrided state. On the other hand, at a fixed sputtering power and total gas flow of 100 W and 150 sccm, respectively, when the nitrogen concentration exceeds between 15% and 25%, gallium atoms and nitrogen atoms are in a metastable mode ( Metastable mode) reacts into a gallium nitride film plated on the surface of the substrate B2. It can be seen from FIG. 3 that the coating rate of gallium nitride in the metastable state is significantly greater than that of gallium nitride in the nitrided state.
更詳細地說明,以氧化鋅(ZnO)作為該緩衝層的製造材料時,反應氣體和工作氣體分別為氧氣(O2)和氬氣(Ar),且靶材為鋅靶材。並且,以氮化鋁(AlN)作為該緩衝層的製造材料時,反應氣體和工作氣體分別為氮氣(N2)和氬氣(Ar),且靶材為鋁靶材。 More specifically, when zinc oxide (ZnO) is used as the material for producing the buffer layer, the reactive gas and the working gas are oxygen (O 2 ) and argon (Ar), respectively, and the target is a zinc target. In addition, when aluminum nitride (AlN) is used as the material for producing the buffer layer, the reaction gas and the working gas are nitrogen (N 2 ) and argon (Ar), respectively, and the target is an aluminum target.
繼續地,圖4顯示利用本發明之方法於一緩衝層上形成一半導體材料層的製程示意圖。如圖4所示,一靶材B1置於一濺鍍設備1的一濺鍍腔體10內的一第一載台101,且覆有一緩衝層BL的一基板B2置於該濺鍍腔體10內的一第二載台102之上。應可理解,相對於該靶材B1而言,覆於該基板B2之上的該緩衝層BL為所謂的底層物。以製作LED元件為例,在所述底層物為覆於基板B2上的一緩衝層BL的情況下,可利用本發明之方法接續地在該底層物之上形成一半導體材料層,例如為一N型氮化鎵(n-type gallium nitride,n-GaN)層NS。
Continuing, FIG. 4 shows a schematic diagram of a process for forming a semiconductor material layer on a buffer layer using the method of the present invention. As shown in FIG. 4, a target B1 is placed on a
並且,圖5顯示利用本發明之方法於一緩衝層上形成另一半導體材料層的製程示意圖。如圖5所示,一靶材B1置於一濺鍍設備1的一濺鍍腔體10內的一第一載台101,且依序覆有一緩衝層BL和一N型氮化鎵(n-GaN)層NS的一基板B2置於該濺鍍腔體10內的一第二載台102之上。此時,該N型氮化鎵層NS係相對於該靶材B1而為所謂的底層物。以製作LED元件為例,在所述底層物為N型氮化鎵層NS的情況下,可利用本發明之方法接續地在該底層物之上形成一主動層AL,亦即多重量子井層。
Moreover, FIG. 5 shows a schematic diagram of a process of forming another semiconductor material layer on a buffer layer by using the method of the present invention. As shown in FIG. 5 , a target B1 is placed on a
另一方面,圖6顯示利用本發明之方法於一緩衝層上形成另一半導體材料層的製程示意圖。如圖6所示,一靶材B1置於一濺鍍設備
1的一濺鍍腔體10內的一第一載台101,且依序覆有一緩衝層BL、一N型氮化鎵(n-GaN)層NS、與一主動層AL的一基板B2置於該濺鍍腔體10內的一第二載台102之上。此時,該主動層AL係相對於該靶材B1而為所謂的底層物。以製作LED元件為例,在所述底層物為主動層AL的情況下,可利用本發明之方法接續地在該底層物之上形成一半導體材料層,例如為一P型氮化鎵(p-type gallium nitride,p-GaN)層PS。
On the other hand, FIG. 6 shows a schematic diagram of a process of forming another semiconductor material layer on a buffer layer by using the method of the present invention. As shown in Figure 6, a target B1 is placed in a sputtering equipment
A
實驗例 Experimental example
圖7顯示利用本發明之方法鍍覆於一基板上的一緩衝層與一半導體材料層的側剖視圖。如圖7所示,於實驗例中,係利用本發明之方法將一緩衝層BL與一半導體材料層SL依序地鍍覆在一基板B2的表面上。並且,圖7特別標示該緩衝層BL為一ZnO層,而該半導體材料層SL為一GaN層。進一步地,圖8顯示該緩衝層與該半導體材料層的穿透式電子顯微鏡(Transmission electron microscopy,TEM)圖。並且,圖9為利用操作在廣角繞射(WAG)模式的X光繞射分析儀(X-ray diffraction,XRD)從該GaN層量測到的一XRD圖譜,且圖10為利用操作在廣角繞射(WAG)模式的X光繞射分析儀(X-ray diffraction,XRD)從該ZnO層量測到的一XRD圖。 7 shows a side cross-sectional view of a buffer layer and a semiconductor material layer plated on a substrate using the method of the present invention. As shown in FIG. 7 , in the experimental example, a buffer layer BL and a semiconductor material layer SL are sequentially plated on the surface of a substrate B2 by using the method of the present invention. Moreover, FIG. 7 specifically indicates that the buffer layer BL is a ZnO layer, and the semiconductor material layer SL is a GaN layer. Further, FIG. 8 shows a transmission electron microscope (TEM) image of the buffer layer and the semiconductor material layer. Also, FIG. 9 is an XRD pattern measured from the GaN layer using an X-ray diffraction (XRD) operating in a wide-angle diffraction (WAG) mode, and FIG. 10 is a An XRD pattern measured from the ZnO layer by X-ray diffraction (XRD) in Diffraction (WAG) mode.
應知道,GaN為六方纖鋅礦結構,且ZnO為一六角晶格材料。由於該X光繞射分析儀係操作在廣角繞射模式,故而圖9顯示GaN的繞射峰訊號出現17.5°附近,而ZnO的繞射峰訊號出現34.5°附近。一 因此,實驗資料顯示,本發明之方法的確能夠以高鍍膜速率在基板B2上依序鍍覆ZnO緩衝層與GaN半導體材料層。 It should be known that GaN is a hexagonal wurtzite structure, and ZnO is a hexagonal lattice material. Since the X-ray diffraction analyzer operates in the wide-angle diffraction mode, Fig. 9 shows that the diffraction peak signal of GaN appears around 17.5°, while the diffraction peak signal of ZnO appears around 34.5°. one Therefore, experimental data show that the method of the present invention can indeed sequentially coat the ZnO buffer layer and the GaN semiconductor material layer on the substrate B2 at a high coating rate.
如此,上述係已完整且清楚地說明本發明所揭示的一種使用濺鍍技術製作半導體薄膜之方法。必須加以強調的是,上述之詳細說明係針對本發明可行實施例之具體說明,惟該實施例並非用以限制本發明之專利範圍,凡未脫離本發明技藝精神所為之等效實施或變更,均應包含於本案之專利範圍中。 Thus, the above has completely and clearly explained a method for fabricating a semiconductor thin film using sputtering technology disclosed in the present invention. It must be emphasized that the above detailed description is directed to the specific description of the feasible embodiments of the present invention, but the embodiments are not intended to limit the scope of the patent of the present invention. Any equivalent implementation or modification that does not depart from the technical spirit of the present invention, All should be included in the scope of the patent in this case.
S1-S4:步驟 S1-S4: Steps
Claims (6)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW109144478A TWI799766B (en) | 2020-12-16 | 2020-12-16 | Method for manufacturing semiconductor film by using sputtering technology |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW109144478A TWI799766B (en) | 2020-12-16 | 2020-12-16 | Method for manufacturing semiconductor film by using sputtering technology |
Publications (2)
Publication Number | Publication Date |
---|---|
TW202226347A true TW202226347A (en) | 2022-07-01 |
TWI799766B TWI799766B (en) | 2023-04-21 |
Family
ID=83436775
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW109144478A TWI799766B (en) | 2020-12-16 | 2020-12-16 | Method for manufacturing semiconductor film by using sputtering technology |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI799766B (en) |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040045810A1 (en) * | 2002-09-05 | 2004-03-11 | Plasmion Corporation | Apparatus and method of forming thin film from negatively charged sputtered ions |
JP2005036250A (en) * | 2003-07-16 | 2005-02-10 | Matsushita Electric Ind Co Ltd | Sputtering apparatus |
US9123508B2 (en) * | 2004-02-22 | 2015-09-01 | Zond, Llc | Apparatus and method for sputtering hard coatings |
DE102004014855A1 (en) * | 2004-03-26 | 2004-10-21 | Applied Films Gmbh & Co. Kg | Device for reactive sputtering comprises a controllable valve to control the total gas flow into a sputtering chamber, and a control unit for keeping the ratio of the partial pressures of at least two gases constant |
JP4875135B2 (en) * | 2009-11-18 | 2012-02-15 | 出光興産株式会社 | In-Ga-Zn-O-based sputtering target |
-
2020
- 2020-12-16 TW TW109144478A patent/TWI799766B/en active
Also Published As
Publication number | Publication date |
---|---|
TWI799766B (en) | 2023-04-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8882910B2 (en) | AlGaN substrate and production method thereof | |
US5239188A (en) | Gallium nitride base semiconductor device | |
TWI524552B (en) | Semiconductor wafer with a layer of alzga1-zn and process for producing it | |
US20130181240A1 (en) | Composite substrate, manufacturing method thereof and light emitting device having the same | |
US20120145991A1 (en) | High-quality non-polar/semi-polar semiconductor element on tilt substrate and fabrication method thereof | |
US20110003420A1 (en) | Fabrication method of gallium nitride-based compound semiconductor | |
US9105471B2 (en) | Rare earth oxy-nitride buffered III-N on silicon | |
JP2008034834A (en) | Growing method of nitride single crystal on silicon substrate, nitride-semiconductor light-emitting element using the same and manufacturing method of the same | |
JP2010232322A (en) | Compound semiconductor substrate | |
CN112531082B (en) | Micro light-emitting diode epitaxial wafer and manufacturing method thereof | |
CN111676451A (en) | Preparation method of polarity-controllable high-quality AlN template | |
US20240113174A1 (en) | Laminate and method of manufacturing laminate | |
US7902556B2 (en) | Method for fabricating high-quality semiconductor light-emitting devices on silicon substrates | |
JP4535935B2 (en) | Nitride semiconductor thin film and manufacturing method thereof | |
TW202226347A (en) | Method for manufacturing semiconductor film by using sputtering technology | |
CN111146318A (en) | Based on MoS2Thin layer ultraviolet light-emitting diode and manufacturing method thereof | |
US8957426B2 (en) | Laminate substrate and method of fabricating the same | |
US20090068780A1 (en) | Method of fabricating semiconductor optoelectronic device and recycling substrate during fabrication thereof | |
CN102054907B (en) | Method for manufacturing gallium nitride series compound semiconductor | |
KR20020070110A (en) | Method for fabricating a nitride film | |
CN109860023A (en) | Gallium nitride transistor and its manufacturing method | |
KR101890750B1 (en) | Method for growing nitride semiconductor | |
TWI684681B (en) | Electronic apparatus, light emitting device, and growth substrate and manufacturing method thereof | |
CN101651176A (en) | Method for manufacturing semiconductor optoelectronic element and method for recovering substrate in manufacturing process | |
TWI362124B (en) | Semiconductor device |