TW202209728A - Display device and assembling method thereof - Google Patents

Abstract

A display device includes a first substrate, a second substrate, a sealant, a display medium layer, a hydrophobic film and a plurality of electrode sets. The second substrate is opposite to the first substrate. The sealant is disposed between the first substrate and the second substrate. The display medium layer is disposed between the first substrate, the second substrate and the sealant. The hydrophobic film is disposed between the display medium layer and the first substrate and adjacent to the sealant. The plurality of electrode sets is disposed between the hydrophobic film and the display medium layer, and each electrode set includes a plurality of electrode pairs. An assembling method of the display device is also provided.

Description

Display device and assembling method thereof

The present invention relates to a display device, and more particularly, to a display device with improved reliability.

In the design of display products, narrow borders have become a trend, which can maximize the visual range of the screen under the same resolution, and can reduce the visual interference of the border when splicing into a large-size panel.

However, due to the design of the narrow frame, during the process of pairing the substrates (such as the pairing of the element array substrate and the filter substrate), the liquid crystal will contact the sealant and cause contamination or puncture, resulting in light leakage in the display products. This results in poor reliability of display products.

The present invention provides a display device with improved reliability.

An embodiment of the present invention provides a display device, comprising: a first substrate; a second substrate opposite to the first substrate; a sealant located between the first substrate and the second substrate; a display medium layer located on the first substrate, Between the second substrate and the sealant; a hydrophobic film, located between the display medium layer and the first substrate, and adjacent to the sealant; and a plurality of electrode groups, located between the hydrophobic film and the display medium layer, and each electrode group includes Plural electrode pairs.

In an embodiment of the present invention, the above-mentioned hydrophobic film has a rectangular loop shape.

In an embodiment of the present invention, the above-mentioned plural electrode groups include 2 to 10 groups of electrode groups.

In an embodiment of the present invention, the width of each electrode group is less than 100 μm.

In an embodiment of the present invention, the above-mentioned plural electrode pairs include 2 to 10 electrode pairs.

In an embodiment of the present invention, the above-mentioned plurality of electrode pairs include transparent conductive materials.

In an embodiment of the present invention, each of the above-mentioned electrode pairs includes two parallel wires.

In an embodiment of the present invention, the line width of each of the above-mentioned parallel wires is between 2 μm and 5 μm.

In an embodiment of the present invention, the distance between the two parallel wires is between 10 μm and 16 μm.

In an embodiment of the present invention, the line width to spacing ratio of the two parallel wires is between 1:2 and 1:8.

In an embodiment of the present invention, each of the above-mentioned parallel wires has a bent shape.

In an embodiment of the present invention, each of the above-mentioned parallel wires has a bending angle, and the bending angle is between 10 degrees and 50 degrees.

In an embodiment of the present invention, each of the above-mentioned electrode groups further includes two electrode ends, and the two electrode ends are respectively electrically connected to two parallel wires.

In an embodiment of the present invention, the two electrode ends of the above-mentioned plurality of electrode groups are respectively electrically connected to each other.

In an embodiment of the present invention, the above-mentioned display device further includes pixel electrodes, and the plurality of electrode pairs and the pixel electrodes belong to the same film layer.

An embodiment of the present invention provides a method for assembling a display device, including: providing an element array substrate, wherein the element array substrate includes a first substrate, a hydrophobic film, and a plurality of electrode groups, and the hydrophobic film is located between the plurality of electrode groups and the first substrate. and adjacent to the periphery of the first substrate, a plurality of electrode groups are located on the hydrophobic film and respectively include a plurality of electrode pairs; a filter substrate is provided, wherein the filter substrate includes a second substrate and a sealant, and the sealant is adjacent to the periphery of the second substrate; The display medium is dripped on the element array substrate; and the element array substrate and the filter substrate are assembled while applying voltage to the plurality of electrode groups, so that the sealant is bonded to the element array substrate and the filter substrate, and the plurality of electrode groups are adjacent to the sealant. inside, and the display medium is located between the element array substrate, the filter substrate and the sealant.

In an embodiment of the present invention, the above-mentioned voltage application to the plurality of electrode groups is to sequentially apply voltage to each electrode group from the outer side to the inner side.

In an embodiment of the present invention, the voltage difference between the above-mentioned electrode pairs is between 10 volts and 100 volts.

In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, the following embodiments are given and described in detail with the accompanying drawings as follows.

FIG. 1A is a schematic top view of a display device 10 according to an embodiment of the present invention. Fig. 1B is a schematic cross-sectional view taken along the section line A-A' of Fig. 1A. FIG. 1C is an enlarged schematic view of the region I of the electrode group ES1 of the display device 10 of FIG. 1A . FIG. 1D is an enlarged schematic view of a region II of the electrode group ES1 of the display device 10 of FIG. 1A . FIG. 1E is an enlarged schematic view of the region III of the electrode pair EP1 of FIG. 1C . In order to simplify the expression of the drawings, FIG. 1A omits other components except the first substrate 110 , the sealant 130 , the hydrophobic film 150 and the electrode group 160 in FIG. 1B . Hereinafter, please refer to FIGS. 1A to 1E at the same time for a clear understanding of the overall structure of the display device 10 .

1A to FIG. 1E at the same time, the display device 10 includes: a first substrate 110 , a second substrate 120 , a sealant 130 , a display medium layer 140 , a hydrophobic film 150 and a plurality of electrode groups 160 . The second substrate 120 is opposite to the first substrate 110 . The sealant 130 is located between the first substrate 110 and the second substrate 120 . The display medium layer 140 is located between the first substrate 110 , the second substrate 120 and the sealant 130 . The hydrophobic film 150 is located between the display medium layer 140 and the first substrate 110 and is adjacent to the sealant 130 . The plurality of electrode groups 160 are located between the hydrophobic film 150 and the display medium layer 140 , and each electrode group 160 includes a plurality of electrode pairs.

Based on the above, in the display device 10 according to an embodiment of the present invention, the contact angle between the display medium in the display medium layer 140 and the hydrophobic film 150 can be changed by arranging the plurality of electrode groups 160 to avoid the contact angle between the first substrate 110 and the hydrophobic film 150 . During the alignment process of the second substrate 120 , the contamination or puncture phenomenon caused by the contact between the medium and the sealant 130 is displayed, thereby improving the reliability of the display device 10 .

Hereinafter, with reference to FIGS. 1A to 1E , the embodiments of each element and film layer of the display device 10 will be continued to be described, but the present invention is not limited thereto.

1A and 1B at the same time, the first substrate 110 of the display device 10 can be a transparent substrate, and its material includes a quartz substrate, a glass substrate, a polymer substrate, etc., but the invention is not limited thereto.

Various film layers for forming switching elements, signal lines, driving elements, storage capacitors, etc. can be disposed on the first substrate 110 . For example, in this embodiment, the display device 10 further includes a thin film transistor TS and a pixel electrode PE, wherein the thin film transistor TS includes a gate GE, a semiconductor layer CH, a source SE and a drain DE, and the pixel electrode The electrode PE is electrically connected to the drain electrode DE of the thin film transistor TS through the through hole TH in the flat layer PL. The gate GE of the thin film transistor TS overlaps the semiconductor layer CH, and the region where the semiconductor layer CH overlaps the gate GE can be regarded as a channel region of the thin film transistor TS. A gate insulating layer GI is arranged between the gate electrode GE and the semiconductor layer CH. The source SE and the drain DE of the thin film transistor TS are separated from each other, and the source SE and the drain DE respectively contact the semiconductor layer CH. In addition, the gate electrode GE may be electrically connected to a scan line (not shown) of the display device 10 , and the source electrode SE may be electrically connected to a data line (not shown) of the display device 10 . In this way, the thin film transistor TS can be turned on or off through the signal transmitted by the scan line, and when the thin film transistor TS is turned on, the signal transmitted by the data line can be transmitted to the pixel electrode PE, and the pixel electrode PE can be further driven. The display medium in the display medium layer 140 is rotated.

The second substrate 120 of the display device 10 is opposite to the first substrate 110 , and the second substrate 120 may be a transparent substrate, such as a quartz substrate, a glass substrate, a polymer substrate, and the like. The display medium layer 140 is located between the first substrate 110 and the second substrate 120, and the display medium layer 140 may include a display material such as a liquid crystal material, an electrophoretic material, or an electrowetting material.

Various film layers for forming color filter elements and alignment layers may be disposed on the second substrate 120 . For example, in this embodiment, the display device 10 further includes a color filter layer 122 and an alignment film 124, the color filter layer 122 is located between the alignment film 124 and the second substrate 120, and the alignment film 124 is located in the display medium layer 140 and the color filter layer 122 . The color filter layer 122 may further include a red filter element, a green filter element, and a blue filter element, so as to achieve a full-color display effect. The alignment film 124 may define the initial deflection angle of the display medium (eg, liquid crystal molecules) in the display medium layer 140 . In this embodiment, the second substrate 120 , the color filter layer 122 and the alignment film 124 disposed thereon may constitute the filter substrate FS of the display device 10 .

The sealant 130 of the display device 10 is sandwiched between the peripheral regions of the first substrate 110 and the second substrate 120 to seal the space between the first substrate 110 and the second substrate 120 . The display medium layer 140 can be formed by sealing the display medium in the enclosed space formed by the 110 , the second substrate 120 and the sealant 130 . The material of the sealant 130 may include light-curing adhesive, heat-curing adhesive or a combination thereof, but the invention is not limited thereto.

The hydrophobic film 150 may be located on the first substrate 110 in an area adjacent to the sealant 130 . For example, in this embodiment, the hydrophobic film 150 may be disposed on the flat layer PL in a region adjacent to the sealant 130, and the hydrophobic film 150 may have the shape of a rectangular loop, but the invention is not limited thereto. In some embodiments, the hydrophobic film 150 may also be partially located between the sealant 130 and the planarization layer PL. The material of the hydrophobic film 150 may include a dielectric material, such as a liquid crystal polymer, but the present invention is not limited thereto.

A plurality of electrode groups 160 may be disposed on the hydrophobic film 150 . When a voltage is applied to the plurality of electrode groups 160 , charge distribution can be generated on the hydrophobic film 150 , thereby changing the contact angle of the display medium in the display medium layer 140 to the hydrophobic film 150 . In addition, in this embodiment, the first substrate 110 and the hydrophobic film 150 disposed thereon, the plurality of electrode groups 160, the thin film transistor TS, the pixel electrode PE, the flat layer PL, the gate insulating layer GI, the scanning line , data lines and the like can constitute the element array substrate AS of the display device 10 .

The number of electrode groups in the plurality of electrode groups 160 is not particularly limited. In some embodiments, the plurality of electrode sets 160 may include 2 to 10 electrode sets. For example, in this embodiment, the plurality of electrode groups 160 may include 6 groups of electrode groups ES1, ES2, ES3, ES4, ES5, and ES6. In certain embodiments, the plurality of electrode sets 160 may include 2, 3, 4, 5, 7, 8, 9, or 10 electrode sets.

In this embodiment, six electrode sets ES1, ES2, ES3, ES4, ES5, ES6 of the plurality of electrode sets 160 can be sequentially disposed on the hydrophobic film 150 from the outer side to the inner side of the first substrate 110, and each electrode The groups are all disposed on both sides of the center line CL of the first substrate 110 in a mirror-symmetrical manner, but the invention is not limited thereto.

The electrode sets ES1 , ES2 , ES3 , ES4 , ES5 , and ES6 may have the same or similar structures as each other, and the following description will be given by taking the electrode set ES1 as an example.

Please refer to FIG. 1C and FIG. 1D at the same time, the width D1 of the electrode group ES1 may be less than 100 μm. For example, in this embodiment, the width D1 of the electrode group ES1 may be about 80 μm, but the invention is not limited to this.

In this embodiment, the electrode set ES1 may include 4 pairs of electrode pairs EP1 , EP2 , EP3 , and EP4 , but the present invention is not limited thereto. In some embodiments, electrode set ES1 may include 2 to 10 electrode pairs. The electrode pairs EP1, EP2, EP3, and EP4 may belong to the same film layer as the pixel electrode PE, but the present invention is not limited to this. The electrode pairs EP1 , EP2 , EP3 , EP4 may comprise transparent conductive materials such as metal nitrides, metal oxides, metal oxynitrides or other suitable materials, or stacked layers of the aforementioned conductive materials. In some embodiments, the electrode pairs EP1, EP2, EP3, EP4 may include indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium gallium zinc oxide, or other suitable oxides or be A stacked layer of at least two of the above.

Each electrode pair may include two parallel wires. For example, in this embodiment, the electrode pair EP1 may include parallel wires W11 and W21, the electrode pair EP2 may include parallel wires W12 and W22, and the electrode pair EP3 may include parallel wires W12 and W22. The parallel wires W13, W23, and the electrode pair EP4 may include parallel wires W14, W24.

In this embodiment, the electrode set ES1 may further include two electrode terminals E11, E12, wherein the electrode terminal E11 can be electrically connected to the wires W11, W12, W13, W14, and the electrode terminal E12 can be electrically connected to the wires W21, W22, W23, W24. In some embodiments, the electrode terminals E11 and E12 may also belong to the same film layer as the drain electrode DE or the gate electrode GE of the thin film transistor TS. In addition, the electrode terminal E11 can be electrically connected to the common electrode P1, and the electrode terminals on the same side as the electrode terminal E11 in the electrode groups ES2, ES3, ES4, ES5, ES6 can also be electrically connected to the common electrode P1, so that the electrode terminal E11 And the electrode terminals on the same side as the electrode terminal E11 in the electrode sets ES2, ES3, ES4, ES5, ES6 can be electrically connected to each other through the common electrode P1. Similarly, the electrode terminal E12 and the electrode terminals on the same side as the electrode terminal E12 in the electrode groups ES2, ES3, ES4, ES5, and ES6 can be electrically connected to each other through the common electrode P2.

Referring to FIG. 1E , the spacing SP between the wires W11 and W21 of the electrode pair EP1 may be between 9 μm and 18 μm. For example, in this embodiment, the spacing SP of the wires W11 and W21 may be about 14 μm, but the invention is not limited to this.

The line widths of the wires W11, W12, W13, W14, W21, W22, W23, and W24 may be between 2 μm and 6 μm. For example, in this embodiment, the line width D2 of the wire W11 may be about 4 μm, but the invention is not limited to this.

The ratio of the line width D2 to the spacing SP of the wires W11 and W21 of the electrode pair EP1 may be between 1:2 and 1:8. For example, in this embodiment, the ratio of the line width D2 to the spacing SP is about 1:3.5, but the invention is not limited to this.

In this embodiment, the wires W11, W12, W13, W14, W21, W22, W23, and W24 may have a bent shape, and the wires W11, W12, W13, W14, W21, W22, W23, and W24 may have a bending angle theta. The bending angle θ may be between 10 degrees and 50 degrees. For example, in this embodiment, the bending angle θ may be 30 degrees, but the present invention is not limited to this.

2A to 2D are schematic cross-sectional views illustrating the steps of the assembling method of the display device 10 shown in FIGS. 1A to 1E . The assembling method of the display device 10 will be described below with reference to FIGS. 2A to 2D .

Referring to FIG. 2A , first, an element array substrate AS is provided. In this embodiment, the element array substrate AS may include the aforementioned first substrate 110, thin film transistor TS, pixel electrode PE, flat layer PL, gate insulating layer GI, hydrophobic film 150, and a plurality of electrode groups 160 and other components and film layers, wherein the thin film transistor TS includes a gate electrode GE, a semiconductor layer CH, a source electrode SE and a drain electrode DE, and the pixel electrode PE is electrically connected to the drain electrode DE of the thin film transistor TS. The hydrophobic thin film 150 is located between the plurality of electrode sets 160 and the first substrate 110 , and the hydrophobic thin film 150 may be adjacent to the periphery EA of the first substrate 110 , for example, the hydrophobic thin film 150 may have the shape of a rectangular loop. The plurality of electrode groups 160 are located on the hydrophobic film 150, and the plurality of electrode groups 160 may include 6 groups of electrode groups ES1, ES2, ES3, ES4, ES5, and ES6. The electrode sets ES1, ES2, ES3, ES4, ES5, and ES6 all include 4 pairs of electrode pairs EP1, EP2, EP3, EP4 and two electrode ends E11, E12 as shown in FIG. 1C to FIG. 1D, wherein the electrode pair EP1 may include The parallel wires W11, W21, the electrode pair EP2 may include parallel wires W12, W22, the electrode pair EP3 may include parallel wires W13, W23, the electrode pair EP4 may include parallel wires W14, W24, and the electrode terminal E11 can be electrically The connecting wires W11, W12, W13, W14, and the electrode terminal E12 can be electrically connected to the wires W21, W22, W23, W24.

Next, referring to FIG. 2B , a filter substrate FS is provided, and the filter substrate FS may include the second substrate 120 , the color filter layer 122 and the alignment film 124 as described above. In this embodiment, the filter substrate FS further includes a sealant 130 , and the sealant 130 is disposed adjacent to the peripheral edge EF of the second substrate 120 .

Next, referring to FIG. 2C , the display medium DM is dropped on the element array substrate AS. In this embodiment, the display medium DM may include liquid crystal molecules, but the present invention is not limited thereto.

Next, referring to FIG. 2D , the filter substrate FS shown in FIG. 2B is reversed by 180 degrees and placed on top of the element array substrate AS shown in FIG. 2C in alignment, wherein the plurality of electrode groups 160 can be made through alignment. The orthographic projection on the second substrate 120 is adjacent to the inner side IS of the orthographic projection of the sealant 130 on the second substrate 120 . Then, a voltage is applied to the plurality of electrode groups 160 to move the display medium DM on the hydrophobic film 150 away from the peripheral edge EA, and at the same time, the element array substrate AS and the filter substrate FS are paired to make the sealant 130 bond the elements The array substrate AS and the filter substrate FS, and the sealant 130 can be cured immediately, so that the display medium DM can be sealed between the element array substrate AS, the filter substrate FS, and the sealant 130 . In this way, during the pairing process of the element array substrate AS and the filter substrate FS, the display medium DM will not touch the uncured sealant 130 at all. In addition, after the grouping is completed, the application of voltage to the plurality of electrode groups 160 can be stopped, so that the display medium DM can move in the direction of the peripheral edge EA, thereby obtaining the display device 10 as shown in FIG. 1B .

FIG. 3A is a timing diagram of applying voltages to the plurality of electrode groups 160 according to an embodiment of the present invention. In this embodiment, the voltage applied to the plurality of electrode groups 160 is to apply voltage to each electrode group sequentially from the outer side to the inner side. For example, referring to FIG. 3A , in this embodiment, the voltages applied to the plurality of electrode groups 160 may be sequentially applied to the electrode group ES1 at time t1 by applying the voltage V1 , starting at time t2 by applying the voltage V2 to the electrode group ES2 , and at Application of voltage V3 to electrode set ES3 begins at time t3, voltage V4 to electrode set ES4 begins at time t4, voltage V5 to electrode set ES5 begins at time t5, and voltage V6 begins to be applied to electrode set ES6 at time t6. The above-mentioned "applying the voltage V1 to the electrode set ES1" means that the voltage difference between the two electrode terminals E11 and E12 of the electrode set ES1 is about V1, that is, to make the voltage between the wire W11 and the wire W21 of the electrode pair EP1. The difference is about V1, and "apply voltage V2 to electrode group ES2", "apply voltage V3 to electrode group ES3", "apply voltage V4 to electrode group ES4", "apply voltage V5 to electrode group ES5", and "apply voltage V5 to electrode group ES3" ES6 applies the voltage V6" also has similar meanings, which will not be repeated here.

In this embodiment, the element array substrate AS and the filter substrate FS may be paired during the period from time t1 to time t6. In addition, the voltages V1, V2, V3, V4, V5, and V6 may be the same, but the present invention is not limited thereto. Additionally, the voltages V1, V2, V3, V4, V5, V6 may be between 10 volts and 100 volts. In this embodiment, the voltages V1 , V2 , V3 , V4 , V5 and V6 are about 15 volts, but the present invention is not limited thereto.

FIG. 3B is a timing diagram of applying voltages to the plurality of electrode groups 160 according to an embodiment of the present invention. In this embodiment, referring to FIG. 3B , the voltage V1 may be applied to the electrode group ES1 at time t1 , and the application of the voltage V1 to the electrode group ES1 may be stopped after the application of the voltage V2 to the electrode group ES2 at time t2 . Likewise, the application of the voltage V2 to the electrode set ES2 may start at time t2, and the application of the voltage V2 to the electrode set ES2 may be stopped after the start of the application of the voltage V3 to the electrode set ES3 at the time t3. Likewise, the application of the voltage V3 to the electrode set ES3 may start at time t3, and the application of the voltage V3 to the electrode set ES3 may be stopped after the start of the application of the voltage V4 to the electrode set ES4 at the time t4. Likewise, application of voltage V4 to electrode group ES4 may begin at time t4, and application of voltage V4 to electrode group ES4 may be stopped after application of voltage V5 to electrode group ES5 begins at time t5. Likewise, the application of the voltage V5 to the electrode group ES5 may begin at time t5, and the application of the voltage V5 to the electrode group ES5 may be stopped after the start of the application of the voltage V6 to the electrode group ES6 at the time t6.

In the embodiment shown in FIG. 3B , the duration of applying voltage V1 to electrode set ES1, the duration of applying voltage V2 to electrode set ES2, the duration of applying voltage V3 to electrode set ES3, and the duration of applying voltage V4 to electrode set ES4 The duration of , the duration of applying the voltage V5 to the electrode group ES5 and the duration of applying the voltage V6 to the electrode group ES6 may be the same, but not limited thereto. Likewise, the element array substrate AS and the filter substrate FS may be paired during the period from time t1 to time t6.

FIG. 4 is a schematic top view of an element array substrate AS' according to an embodiment of the present invention. Referring to FIG. 4 , the element array substrate AS' may include a plurality of element array substrates AS as shown in FIG. 2A . That is, the device array substrate AS' can be cut to form a plurality of device array substrates AS, and the mother substrate 100 of the device array substrate AS' can be cut to form a plurality of the aforementioned first substrates 110. As mentioned above, each element array substrate AS may include a plurality of electrode groups 160, and the two electrode terminals of the plurality of electrode groups 160 are electrically connected to the common electrodes P1 and P2, respectively. In this embodiment, the common electrode P1 of each element array substrate AS can be electrically connected to the voltage source VS1 via the wire W1, and the common electrode P2 of each element array substrate AS can be electrically connected to the voltage source VS2 via the wire W2. In this way, when the element array substrate AS' is provided to perform the steps of the assembly method as shown in FIG. 2A to FIG. 2D , during the process of applying voltage to the plurality of electrode groups 160 , the voltage sources VS1 and VS2 can simultaneously A bias voltage is applied to the common electrodes P1 and P2 of each element array substrate AS. In addition, after the steps of the assembly method shown in FIGS. 2A to 2D are completed, cutting can be performed along the cutting line SL to manufacture a plurality of display devices 10 shown in FIGS. 1A to 1E at one time.

To sum up, the present invention can change the contact angle of the display medium to the hydrophobic film by setting a plurality of electrode groups, which can prevent the display medium from contacting the sealant during the process of pairing the substrates, thereby improving the reliability of the display device.

Although the present invention has been disclosed above by the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, The protection scope of the present invention shall be determined by the scope of the appended patent application.

10: Display device 100: Mother substrate 110: The first substrate 120: Second substrate 122: color filter layer 124: Alignment film 130: Frame glue 140: Display medium layer 150: Hydrophobic film 160: Complex electrode set A-A’: hatch line AS, AS': element array substrate CH: semiconductor layer CL: Centerline D1: width D2: Line width DE: drain DM: Display Media E11, E12: Electrode terminal EA, EF: Peripheral EP1, EP2, EP3, EP4: electrode pair ES1, ES2, ES3, ES4, ES5, ES6: Electrode set FS: filter substrate GE: gate GI: gate insulating layer I, II, III: Regions IS: inside P1, P2: common electrode PE: pixel electrode PL: flat layer SE: source SL: cutting line SP: Spacing t1, t2, t3, t4, t5, t6: time TH: through hole TS: Thin Film Transistor V1, V2, V3, V4, V5, V6: Voltage VS1, VS2: Voltage source W1, W2: wires W11, W12, W13, W14, W21, W22, W23, W24: Wire θ: bending angle

FIG. 1A is a schematic top view of a display device 10 according to an embodiment of the present invention. Fig. 1B is a schematic cross-sectional view taken along the section line A-A' of Fig. 1A. FIG. 1C is an enlarged schematic view of the region I of the electrode group ES1 of the display device 10 of FIG. 1A . FIG. 1D is an enlarged schematic view of a region II of the electrode group ES1 of the display device 10 of FIG. 1A . FIG. 1E is an enlarged schematic view of the region III of the electrode pair EP1 of FIG. 1C . 2A to 2D are schematic cross-sectional views illustrating the steps of the assembling method of the display device 10 shown in FIGS. 1A to 1E . FIG. 3A is a timing diagram of applying voltages to the plurality of electrode groups 160 according to an embodiment of the present invention. FIG. 3B is a timing diagram of applying voltages to the plurality of electrode groups 160 according to an embodiment of the present invention. FIG. 4 is a schematic top view of an element array substrate AS' according to an embodiment of the present invention.

10: Display device

110: The first substrate

120: Second substrate

122: color filter layer

124: Alignment film

130: Frame glue

140: Display medium layer

150: Hydrophobic film

160: Complex electrode set

AS: Element Array Substrate

CH: semiconductor layer

DE: drain

ES1, ES2, ES3, ES4, ES5, ES6: Electrode set

FS: filter substrate

GE: gate

GI: gate insulating layer

PE: pixel electrode

PL: flat layer

SE: source

TH: through hole

TS: Thin Film Transistor

Claims (18)

A display device, comprising: a first substrate; a second substrate opposite to the first substrate; a sealant located between the first substrate and the second substrate; a display medium layer located between the first substrate, the second substrate and the sealant; a hydrophobic film located between the display medium layer and the first substrate and adjacent to the sealant; and A plurality of electrode groups are located between the hydrophobic film and the display medium layer, and each electrode group includes a plurality of electrode pairs. The display device of claim 1, wherein the hydrophobic film has a rectangular loop shape. The display device of claim 1, wherein the plurality of electrode groups include 2 to 10 electrode groups. The display device according to claim 1, wherein the width of each electrode group is less than 100 μm. The display device of claim 1, wherein the plurality of electrode pairs includes 2 to 10 electrode pairs. The display device of claim 1, wherein the plurality of electrode pairs comprise transparent conductive materials. The display device of claim 1, wherein each of the electrode pairs includes two parallel wires. The display device of claim 7, wherein the line width of each of the parallel wires is between 2 μm and 5 μm. The display device of claim 7, wherein the distance between the two parallel wires is between 10 μm and 16 μm. The display device of claim 7, wherein a line width to spacing ratio of the two parallel wires is between 1:2 and 1:8. The display device of claim 7, wherein each of the parallel wires has a bent shape. The display device of claim 11, wherein each of the parallel wires has a bending angle, and the bending angle is between 10 degrees and 50 degrees. The display device according to claim 7, wherein each electrode group further comprises two electrode terminals, and the two electrode terminals are respectively electrically connected to the two parallel wires. The display device of claim 13, wherein the two electrode ends of the plurality of electrode groups are electrically connected to each other, respectively. The display device according to claim 1, further comprising a pixel electrode, and the plurality of electrode pairs and the pixel electrode belong to the same film layer. A method for assembling a display device, comprising: A device array substrate is provided, wherein the device array substrate includes a first substrate, a hydrophobic film and a plurality of electrode groups, the hydrophobic film is located between the plurality of electrode groups and the first substrate and is adjacent to the periphery of the first substrate , the plurality of electrode groups are located on the hydrophobic film and respectively include a plurality of electrode pairs; A filter substrate is provided, wherein the filter substrate includes a second substrate and a sealant, and the sealant is adjacent to the periphery of the second substrate; dropping a display medium on the device array substrate; and The element array substrate and the filter substrate are assembled while applying voltage to the plurality of electrode groups, so that the frame glue adheres the element array substrate and the filter substrate, the plurality of electrode groups are adjacent to the inner side of the frame glue, and the The display medium is located between the element array substrate, the filter substrate and the sealant. The assembling method of the display device according to claim 16, wherein the voltage applied to the plurality of electrode groups is to apply voltage to each of the electrode groups in sequence from the outside to the inside. The assembling method of the display device as claimed in claim 17, wherein the voltage difference between the electrode pairs is between 10 volts and 100 volts.

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