CN107221281B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN107221281B CN107221281B CN201710579855.8A CN201710579855A CN107221281B CN 107221281 B CN107221281 B CN 107221281B CN 201710579855 A CN201710579855 A CN 201710579855A CN 107221281 B CN107221281 B CN 107221281B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
Abstract
The invention discloses a display panel and a display device. The display panel comprises a display area and a frame area, wherein the frame area comprises a first frame and a second frame which are oppositely arranged in a first direction, and the display area comprises a cutting area, an independent pixel area and a conventional pixel area; the display panel comprises a signal driving circuit positioned in the frame area and a data line extending in a first direction; the data lines comprise independent data lines and conventional data lines; the signal driving circuit charges the pixels of the independent pixel region through the independent data lines and the normal data lines at a first time, and the signal driving circuit charges the pixels of the normal pixel region through the normal data lines at a second time. By the invention, the driving of the display panel with the cutting area is realized, and the display uniformity of the display panel is good.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
As the display panel is more and more commonly used in various electronic devices, for example, the display panel has been widely used in devices such as smart phones, tablet personal computers, laptop computers, digital cameras, camcorders, Personal Digital Assistants (PDAs), and thin televisions, and research on the display panel has been more and more intensive.
Fig. 1 is a schematic diagram of a display panel provided in the prior art, the display panel is applied to a smart phone, and a handset of the smart phone is disposed in the middle of the display panel, as shown in fig. 1, which requires that an area of the display panel 10 ' where the handset is disposed is hollowed out, and a cutting area 20 ' for preventing the handset from being disposed is formed in the display panel 10 '. For the display panel 10 'with such a structure, since the cutting region 20' is hollow, the display panel 10 'is divided into two discontinuous upper and lower portions by the cutting region 20', and for the data lines which are usually routed in the vertical direction and run through a column of pixels, the data lines will be blocked by the cutting region 20 'and cannot run through, so that the display panel 10' cannot be driven by the conventional driving design in the prior art.
Therefore, it is an urgent problem to be solved in the art to provide a complete solution for a display panel having a cutting area.
Disclosure of Invention
In view of the above, the present invention provides a display panel and a display device, which solve the technical problem that the display panel with a cutting area cannot be driven by the prior art driving design.
In order to solve the above technical problem, according to an aspect of the present invention, a display panel is provided.
The display panel comprises a display area and a frame area surrounding the display area, wherein the frame area comprises a first frame and a second frame which are oppositely arranged in a first direction; the display area comprises a cutting area, an independent pixel area and a conventional pixel area, wherein the independent pixel area is a part from the edge of the cutting area close to the first frame in the display area; the display panel comprises a signal driving circuit positioned in the frame area and a data line extending in a first direction; the data lines comprise independent data lines and conventional data lines, wherein the conventional data lines are respectively connected with the pixels of the conventional pixel area and the signal driving circuit, and the independent data lines are respectively connected with the pixels of the independent pixel area and the conventional data lines; the signal driving circuit charges the pixels of the independent pixel region through the independent data lines and the normal data lines at a first time, and the signal driving circuit charges the pixels of the normal pixel region through the normal data lines at a second time.
In order to solve the above technical problem, according to another aspect of the present invention, a display device is provided. The display device comprises any one of the display panels provided by the invention.
Compared with the prior art, the display panel and the display device provided by the invention have the beneficial effects that: the display panel is provided with a cutting area, for the area of the data line blocked by the cutting area, namely an independent pixel area, the independent data line is independently arranged, partial conventional data lines are multiplexed at different time, the independent data line is indirectly connected with a signal driving circuit through the multiplexed conventional data line, the pixel of the independent pixel area is charged at the first time to complete the gray scale display of the independent pixel area, the pixel of the conventional pixel area is charged at the second time to complete the gray scale display of the conventional pixel area, the driving display of the display panel provided with the hollowed-out cutting area is realized, the independent data line and the conventional data line are in the same direction, namely all the data line routing on the display panel are in the same line, the whole pixels on the display panel can be arranged in the same line, the color resistance can be arranged in the same line, and the difference of the visual effect between the independent pixel area and the conventional pixel area can not be caused, the uniformity of the whole display panel is good.
Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
Fig. 1 is a schematic structural diagram of a display panel provided in the prior art;
fig. 2 is a schematic top view of a display panel according to an embodiment of the present invention;
fig. 3 is a schematic diagram of data line routing of a display panel according to an embodiment of the invention;
fig. 4 is a schematic diagram of scan line routing of a display panel according to an embodiment of the invention;
fig. 5 is a schematic cross-sectional structural diagram of a display panel according to an embodiment of the present invention;
fig. 6 is a schematic cross-sectional structural view of an array substrate according to an embodiment of the present invention;
fig. 7 is a schematic diagram of data line routing of a display panel according to another embodiment of the invention;
fig. 8 is a schematic view of scan line routing of a display panel according to another embodiment of the invention; and
fig. 9 is a schematic view of a display device provided by the present invention.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
The display panel provided by the invention is provided with a hollow area, namely a cutting area, in the extending direction of the data line (taking the vertical direction as an example in the attached drawing of the invention), the pixel part (namely an independent pixel area) of the display panel, which is over against the cutting area, and the other pixel part (namely a conventional pixel area) of the display panel are charged at different time, so that the driving of the pixels on the display panel with the cutting area is realized. Specifically, the structure of the display panel is described below.
Fig. 2 is a schematic top view structure diagram of a display panel according to an embodiment of the present invention, fig. 3 is a schematic data line routing diagram of the display panel according to the embodiment of the present invention, fig. 4 is a schematic scan line routing diagram of the display panel according to the embodiment of the present invention, fig. 7 is a schematic data line routing diagram of the display panel according to another embodiment of the present invention, and fig. 8 is a schematic scan line routing diagram of the display panel according to another embodiment of the present invention.
With reference to fig. 2 to 4, 7 and 8 as appropriate, the display panel provided by the invention includes a display area 10 and a frame area 20 surrounding the display area 10, the display area 10 has a plurality of pixels for displaying images, and the frame area 20 is provided with related circuits for driving the pixels to complete the image display. The frame region 20 includes a first frame 21 and a second frame 22 disposed opposite to each other in the first direction a. The display area 10 includes a cutting area 13, an independent pixel area 11 and a regular pixel area 12, wherein the independent pixel area 11 is a portion of the display area 10 from an edge of the cutting area 13 near the first frame 21 to the first frame 21, and the cutting area 13 may be located in the middle of the display area 10 or at an edge of the display area 10.
Referring to fig. 3 and 7 as appropriate, the display panel includes a signal driving circuit 30 located at the bezel region 20 and data lines (3 DD1, 3DD2, 3DC1, 3DC2, 3DC3 in fig. 3, 7DD1, 7DD2, 7DC1, 7DC2, 7DC3 in fig. 7) extending in a first direction (vertical direction in fig. 3 and 7), wherein the signal driving circuit 30 may be an integrated circuit chip IC.
The data lines include independent data lines and normal data lines, wherein the independent data lines are data lines disposed in the independent pixel regions 11, as shown in fig. 3, straight lines extending in a vertical direction in the independent pixel regions 11 are schematic diagrams of the independent data 3DD1, 3DD2, and as shown in fig. 7, straight lines extending in a vertical direction in the independent pixel regions 11 are schematic diagrams of the independent data 7DD1, 7DD 2. The normal data lines are disposed in the normal pixel region 12, and as shown in fig. 3, the straight lines extending in the vertical direction in the normal pixel region 12 are schematic diagrams of the normal data lines 3DC1, 3DC2, and 3DC3, and as shown in fig. 7, the straight lines extending in the vertical direction in the normal pixel region 12 are schematic diagrams of the normal data lines 7DC1, 7DC2, and 7DC 3.
As shown in fig. 3, with respect to the normal data lines disposed in the normal pixel region 12, a part of the normal data lines 3DC3 is connected only to the pixels of the normal pixel region 12 and the signal driving circuit 30, and the other part of the normal data lines 3DC1, 3DC2 is connected to the independent data lines 3DD1, 3DD2 in addition to the pixels of the normal pixel region 12 and the signal driving circuit 30; as shown in fig. 7, with respect to the normal data lines disposed in the normal pixel region 12, a portion of the normal data lines 7DC3 is connected only to the pixels of the normal pixel region 12 and the signal driving circuit 30, and the other portion of the normal data lines 7DC1, 7DC2 is connected to the independent data lines 7DD1, 7DD2 in addition to the pixels of the normal pixel region 12 and the signal driving circuit 30. The latter part of the normal data 3DC1, 3DC2, 7DC1, 7DC2 is equivalent to being multiplexed by the pixels of the normal pixel region 12 and the pixels of the individual pixel region 11.
As shown in fig. 3, the independent data lines 3DD1, 3DD2 provided in the independent pixel region 11 are connected to the pixels of the independent pixel region 11 and the multiplexed normal data lines 3DC1, 3DC2, respectively. As shown in fig. 7, the independent data lines 7DD1, 7DD2 provided in the independent pixel area 11 are connected to the pixels of the independent pixel area 11 and the above-described multiplexed normal data lines 7DC1, 7DC2, respectively.
The signal driving circuit 30 charges the individual pixel regions 11 and the normal pixel regions 12 at different times, and specifically, charges the pixels of the individual pixel regions 11 through the individual data lines and the multiplexed normal data lines described above during a first time, and charges the pixels of the normal pixel regions 12 through the normal data lines during a second time.
In this embodiment, the display panel is provided with a cutting area, and a part of the data lines cannot penetrate through the whole display panel due to the blocking of the cutting area, so that by adopting the display panel provided by the embodiment, the conventional data lines are arranged in an area where the data lines can be continuously arranged, namely the conventional pixel area, and the conventional data lines are directly connected with the signal driving circuit, and the pixels in the conventional pixel area are charged at the second time, so that the gray scale display of the conventional pixel area is completed; for the area where the data lines are blocked, namely the independent pixel area, the independent data lines are independently arranged, the conventional data lines of different time multiplexing parts are indirectly connected with the signal driving circuit through the multiplexed conventional data lines, the pixels of the independent pixel area are charged at the first time, the gray scale display of the independent pixel area is completed, and therefore the driving display problem that the display panel is provided with the hollow cutting area is solved. Further, in this embodiment, the independent data lines and the conventional data lines run in the same direction, that is, all the data lines on the display panel run in the same direction, the whole pixels on the display panel can be arranged in the same direction, the color resistances can be arranged in the same direction, the difference between the independent pixel area and the conventional pixel area in the visual effect is not caused, and the whole uniformity of the display panel is good.
Further, in an alternative embodiment, with proper reference to fig. 2, 3 and 4, the display panel further includes a scan driving circuit VSR located in the frame area 20 and a scan line G extending in a second direction (horizontal direction in fig. 4), wherein the first direction intersects with the second direction, preferably perpendicular to the second direction.
In this alternative embodiment, the scanning drive circuit VSR includes an independent scanning circuit 1 region VSRL for scanning the pixels of the independent pixel region 11 and a conventional scanning circuit for scanning the pixels of the conventional pixel region 12, which are cascaded with each other, and a conventional scanning circuit 1 region VSRR for scanning the pixels of the conventional pixel region 2 region VSRR, which are cascaded with each other, as appropriate with reference to fig. 3 and 4.
The scan lines G include independent scan lines and normal scan lines, wherein the independent scan lines are scan lines disposed in the independent pixel regions 11, and as shown in fig. 4, straight lines extending in the horizontal direction in the independent pixel regions 11 are schematic diagrams of the independent scan lines. The normal scan line is a scan line disposed in the normal pixel region 12, and as shown in fig. 4, a straight line extending in the horizontal direction in the normal pixel region 12 is a schematic diagram of the normal scan line.
For the conventional scanning lines arranged in the conventional pixel area 12, the pixels of the conventional pixel area 12 and the conventional scanning circuit are respectively connected; the independent scan lines provided in the independent pixel region 11 are connected to the pixels of the independent pixel region 11 and the independent scan circuits, respectively.
The independent scanning circuit is cascaded with the conventional scanning circuit, and when the display panel carries out pixel scanning, the pixels of the independent pixel area 11 are scanned by the independent scanning circuit through the independent scanning lines at a certain time, so that the charging process of the pixels of the independent pixel area 11 is realized; at the second time, the pixels in the normal pixel area 12 are scanned by the normal scanning circuit through the normal scanning lines, so that the charging process of the pixels in the normal pixel area 12 is realized, and finally, the gray scale display of all the pixels on the display panel is completed.
In this embodiment, by providing separate scan driving circuits for the pixels of the independent pixel area 11 and the pixels of the normal pixel area 12, and completing the scanning process in different time, the pixels of the independent pixel area 11 and the pixels of the normal pixel area 12 are charged in different time.
Further, in the case where different scan driving circuits are provided for the individual pixel regions 11 and the regular pixel regions 12, in an alternative embodiment, with appropriate reference to fig. 2 and 4, the bezel region includes a third bezel 23 and a fourth bezel 24 oppositely disposed in the second direction b.
In this case, the cutting region 13 may not only block the data lines but also block a portion of the scan lines so as not to penetrate the entire display panel. Based on this, with continued reference to fig. 2 and 4, the normal pixel region 12 is divided into a first normal region 121 and a second normal region 122, where the first normal region 121 includes a portion of the cut region 13 near the edge of the third frame 23 to the third frame 23 and a portion of the independent pixel region 11 near the edge of the third frame 23 to the third frame 23, and the second normal region 122 includes a portion of the cut region 13 near the edge of the fourth frame 24 to the fourth frame 24 and a portion of the independent pixel region 11 near the edge of the fourth frame 24 to the fourth frame 24.
Meanwhile, with continued reference to fig. 2 and 4, the conventional scan circuit includes a first conventional scan circuit (i.e., a 2-region VSRL) located at the third frame 23 and a second conventional scan circuit (i.e., a 2-region VSRR) located at the fourth frame 24.
The normal scan lines also include first and second normal scan lines, respectively. The first normal scan lines, i.e., G21, G23, G25 through G2M-1 shown in fig. 4, disposed in the first normal region 121 are connected to the pixels of the first normal region 121 and the first normal scan circuit (i.e., the 2-region VSRL), respectively. For the second normal scan lines disposed in the second normal region 122, i.e., G22, G24, G26 through G2M as shown in fig. 4, are respectively connected to the pixels of the second normal region 122 and the second normal scan circuit (i.e., 2-region VSRR).
In this embodiment, for the case that the cutting area is disposed in the middle of the display panel, the scan driving circuits are disposed on the left and right frames, and the areas on the left and right sides of the cutting area and the independent pixel area are scanned, respectively, thereby solving the problem that the scan lines are blocked.
Further, for the case where the above-mentioned cutting region is disposed on the display panel, in an alternative embodiment, with reference to fig. 3 and 4 as appropriate, the normal data lines also include a first normal data line 3DC1 and a second normal data line 3DC2, respectively, wherein the first normal data line 3DC1 is connected to the pixel and signal driving circuit of the first normal region 121, the second normal data line 3DC2 is connected to the pixel and signal driving circuit of the second normal region 122, the first normal data line 3DC1 or the second normal data line 3DC2 is used as a multiplexed data line, and the independent data line is connected to the first normal data line or the second normal data line.
In this embodiment, the data lines on both sides of the cutting area, i.e., the first normal data line or the second normal data line, are used as the multiplexed data lines, and the multiplexed data lines are closer to the independent data lines in spatial distribution, so that the length of the connection lines between the multiplexed data lines and the independent data lines is reduced, and space is saved on the routing lines.
Further, in the case of multiplexing the data lines on both sides of the cutting area as described above, in an alternative embodiment, with reference to fig. 2 and 3 as appropriate, the independent pixel area 11 includes a first independent area 111 and a second independent area 112 sequentially arranged in the second direction (horizontal direction in fig. 3), wherein the first independent area 111 is adjacent to the third frame 23, and the second independent area 112 is adjacent to the fourth frame 24. The independent data lines include a first independent data line 3DD1 and a second independent data line 3DD2, wherein the first independent data line 3DD1 disposed in the first independent area 111 is connected to the pixels of the first independent area 111 and the first normal data line 3DC1, respectively, and the second independent data line 3DD2 disposed in the second independent area 112 is connected to the pixels of the second independent area 112 and the second normal data line 3DC2, respectively.
In this embodiment, the independent pixel area is divided into two areas, namely, the independent data line of each area multiplexes the conventional data line close to one side of the independent pixel area, that is, the independent data line of the left half part of the independent pixel area is connected with the first conventional data line of the first conventional area on the left side, the independent data line of the right half part of the independent pixel area is connected with the second conventional data line of the second conventional area on the right side, the length of the connection line between the multiplexed data line and the independent data line is further shortened, and the space on the routing line is saved.
Further, in an optional embodiment, fig. 5 is a schematic cross-sectional structure diagram of a display panel according to an embodiment of the present invention, and as shown in fig. 5, the display panel includes an array substrate 502 and a color filter substrate 503 which are oppositely disposed, and a liquid crystal layer 504 is disposed between the array substrate 502 and the color filter substrate 503. The color film substrate comprises a substrate and a black matrix formed on the substrate, pixels of the display panel are formed at openings of the black matrix, after light generated by the backlight module reaches the color film substrate, one part of the light is shielded by the black matrix, and the other part of the light is emitted at the positions of the pixels. The array substrate comprises a substrate base plate and a plurality of film layers formed on the substrate base plate, wherein each film layer is used for realizing a thin film transistor, a common electrode, a pixel electrode, a data line, a scanning line and the like. Each pixel is internally provided with a thin film transistor and a pixel electrode, wherein the grid electrode of the thin film transistor is connected with a scanning line of the display panel and is connected with a data line through the source electrode of the thin film transistor, the drain electrode of the thin film transistor is connected with the pixel electrode, and voltage is loaded to the pixel electrode through the data line, so that an electric field is formed between the pixel electrode and the common electrode, and then liquid crystal molecules of the liquid crystal layer deflect in the electric field to realize the display process of the display panel.
Referring to fig. 3 as appropriate, the first independent data line 3DD1 is connected to the first normal data line 3DC1 by a first bridge-spanning line B1, and the second independent data line 3DD2 is connected to the second normal data line 3DC2 by a second bridge-spanning line B2, i.e., the first bridge-spanning line B1 and the second bridge-spanning line B2 are shown as horizontal line segments in the display area in fig. 3.
In above-mentioned array substrate, independent data line and conventional data line are located the same rete of array substrate, first bridge line and the second of striding is striden the bridge line and is located the different retes of array substrate with independent data line respectively, when making array substrate, the wiring of independent data line and conventional data line is accomplished simultaneously to accessible one process, and simple process sets up the first bridge line and the second of striding in the rete of difference with the data line respectively, and the first line of striding the bridge line and the second of striding the bridge line is walked the line that can not influence the data line.
Specifically, in an alternative embodiment, fig. 6 is a schematic cross-sectional structure diagram of an array substrate provided in an embodiment of the present invention, and referring to fig. 6 as appropriate, the array substrate includes a substrate base plate GS, a first metal layer M1 located on one side of the substrate base plate, and a second metal layer M2 located on one side of the first metal layer M1 away from the substrate base plate GS. Referring to fig. 3 properly, the first bridge spanning line and the second bridge spanning line extend in the second direction, and the first bridge spanning line, the second bridge spanning line and the scan line are located in the first metal layer as shown in fig. 6, and the data line is located in the second metal layer as shown in fig. 6.
In the embodiment, the scanning lines, the first bridge-spanning lines and the second bridge-spanning lines are all wired in the second direction and are wired on the same layer, so that the scanning lines, the first bridge-spanning lines and the second bridge-spanning lines are not crossed, the wiring mode is simple, and the interference is small. The routing direction of the data lines is crossed with the scanning lines, the first bridge spanning lines and the second bridge spanning lines, the data lines are uniformly distributed on the second metal layer and cannot be crossed with the scanning lines, the first bridge spanning lines and the second bridge spanning lines, and the data lines can be connected with the first bridge spanning lines and the second bridge spanning lines through the via holes from the second metal layer to the first metal layer.
Specifically, in another alternative embodiment, with continued reference to fig. 6, the array substrate includes an underlying substrate GS, a light shielding layer LS on the underlying substrate GS, a first metal layer M1 on a side of the light shielding layer LS away from the underlying substrate GS, and a second metal layer M2 on a side of the first metal layer M1 away from the light shielding layer LS. The first bridge wire and the second bridge wire are arranged on the light shielding layer LS, the scanning lines are arranged on the first metal layer, the data lines are arranged on the second metal layer, wiring of all layers is independent, and wiring modes are simple.
Further, as shown in fig. 6, the array substrate sequentially includes, from bottom to top in fig. 6, a substrate GS, a light shielding layer LS, a buffer layer BU, a semiconductor active layer ASL, a gate insulating layer GI, a first metal layer M1, an interlayer insulating layer ILD, a second metal layer M2, a planarization layer PLN, a common electrode layer ITO1, a passivation layer PV, and a pixel electrode layer ITO 2.
Further, in an alternative embodiment, with continued reference to fig. 2 and 4, the independent pixel regions 11 also adopt a bilateral scanning driving mode, and specifically, the independent scanning circuits include a first independent scanning circuit (i.e., region 1 VSRL) located in the third frame 23 and a second independent scanning circuit (i.e., region 1 VSRR) located in the fourth frame 24.
The independent scan lines include a first independent scan line and a second independent scan line, for example, scan line G11 and scan line G13 in fig. 4 are both the first independent scan line, and scan line G12 and scan line G14 in fig. 4 are both the second independent scan line. The first independent scan lines are respectively connected to the pixels of the first pixel row in the independent pixel region 11 and the first independent scan circuits, the second independent scan lines are respectively connected to the pixels of the second pixel row in the independent pixel region 11 and the second independent scan circuits, the first pixel row and the second pixel row are sequentially and alternately arranged in a first direction from the first frame 21 to the second frame 22, the first independent scan circuits (i.e., the 1-region VSRL) are cascaded with the first conventional scan circuits (i.e., the 2-region VSRL), and the second independent scan circuits (i.e., the 1-region VSRR) are cascaded with the second conventional scan circuits (i.e., the 2-region VSRR).
Further, in an alternative embodiment, with reference to fig. 2 and 4, the normal pixel area 12 further includes a third normal area 123, where the third normal area 123 includes a portion from a straight line where the edge of the cutting area 13 near the second frame 12 is located to the second frame 12, and the scan line and the data line in the third normal area 123 are not affected by the cutting area, and a bilateral scan driving circuit is used.
The normal scan lines in the third normal region 123 are the third normal scan line and the fourth normal scan line, for example, the scan line G2N-1 in fig. 4 is the third normal scan line, and the scan line G2N in fig. 4 is the fourth normal scan line. The third regular scan lines are respectively connected to the pixels of the third pixel row in the third regular region 123 and the first regular scan circuit (i.e., the 2-region VSRL), the fourth regular scan lines are respectively connected to the pixels of the fourth pixel row in the third regular region 123 and the second regular scan circuit (i.e., the 2-region VSRR), and the third pixel row and the fourth pixel row are alternately arranged in sequence in a first direction from the first frame 21 to the second frame 22.
Further, in another alternative embodiment, with appropriate reference to fig. 2, 7 and 8, the display panel further comprises a switch control module 40 and a transfer switch SW, wherein a first end of the transfer switch SW is connected to the independent data lines 7DD1, 7DD2 in the independent pixel area 11, and a second end of the transfer switch SW is connected to the normal data lines 7DC1, 7DC2 in the normal pixel area 12, wherein the normal data lines 7DC1, 7DC2 connected to the transfer switch SW constitute multiplexed data lines, and the normal data lines 7DC3 not connected to the transfer switch SW are only used to drive pixels in the normal pixel area 12. The switch control module 40 may be integrated in an integrated circuit chip IC of the display panel, or may be separately provided. The switch SW preferably uses a thin film transistor, wherein the source and drain of the thin film transistor are respectively connected to the independent data line and the conventional data line, and the gate of the thin film transistor is connected to the switch control module 40.
The switch control module 40 is configured to control the first terminal of the transfer switch SW and the second terminal of the transfer switch SW to be turned on at a first time, and control the first terminal of the transfer switch SW and the second terminal of the transfer switch SW to be turned off at a second time.
When the display panel performs pixel scanning, at a first time, the first end of the switch SW is connected with the second end of the switch SW, the independent data line 7DD1 is connected with the multiplexed normal data line 7DC1, the independent data line 7DD2 is connected with the multiplexed normal data line 7DC2, and the signal driving circuit charges the pixels of the independent pixel region 11 through the multiplexed normal data line and the independent data line, at this time, in the normal pixel region 12, the pixels which are in the same pixel row as the independent pixel region 11 and connected with the multiplexed normal data line are also charged together; at the second time, the first end of the switch SW and the second end of the switch SW are turned off, the independent data line is disconnected from the multiplexed conventional data line, the conventional data line does not charge the pixels of the independent pixel area 11 any more, and only charges the pixels of the conventional pixel area 12, at this time, the charged pixels in the conventional pixel area 12 are refreshed and recharged in the first time, and finally, gray scale display of all pixels on the display panel is completed.
In this embodiment, the on-off time of the independent data line and the on-off time of the conventional data line are controlled by the transfer switch, the on-off states of the transfer switch are different at different times, that is, the on-off states of the independent data line and the conventional data line are different, when the independent data line and the conventional data line are conducted, the pixel in the independent pixel area is charged, when the independent data line and the conventional data line are not conducted, the pixel in the conventional pixel area is charged, and finally, the charging of the pixel in the independent pixel area and the charging of the pixel in the conventional pixel area are completed at different times. Preferably, as shown in fig. 7, the switch SW and the related peripheral connection lines may be disposed in the frame area, and have no influence on the data lines and other lines in the display area.
Further, upon providing the above-described changeover switch and the switch control module, with reference to fig. 2, 7 and 8 as appropriate, the display panel further includes a scan driving circuit VSR located in the frame area 20 and a scan line G extending in a second direction (horizontal direction in fig. 8), wherein the first direction intersects with the second direction, preferably, is perpendicular thereto.
With continued reference to fig. 2, 7, and 8, the bezel region includes a third bezel 23 and a fourth bezel 24 oppositely disposed in the second direction b, and the cutting region 13 is located in the middle of the display region 10.
In this case, the cutting region 13 may not only block the data lines but also block a portion of the scan lines so as not to penetrate the entire display panel. Based on this, with continuing reference to fig. 2 and 8, the normal pixel area 12 is divided into a fourth normal area 124, a fifth normal area 125 and a sixth normal area 126, wherein the fourth normal area 124 includes a portion of the cut area 13 near the edge of the third frame 23 to the third frame 23, the fifth normal area 125 includes a portion of the cut area 13 near the edge of the fourth frame 24 to the fourth frame 24, and the sixth normal area 12 includes a portion of the cut area 13 near the edge of the second frame 22 to the second frame 22 and a portion of the cut area 13 near the edge of the first frame 21 to the first frame 21.
The scan driving circuit includes a first scan driving circuit VSRL in the third frame 23 and a second scan driving circuit VSRR in the fourth frame 24.
The scan lines G respectively include a first scan line, a second scan line, a third scan line and a fourth scan line, wherein the first scan line is located in the fourth normal region 124, and the first scan line is respectively connected to the pixels of the fourth normal region 124 and the first scan driving circuit VSRL; the second scan lines are located in the fifth normal area 125, and are respectively connected to the pixels of the fifth normal area 125 and the second scan circuits VSRR; the third scanning line is located in the sixth regular area 126, and the third scanning line is respectively connected to the pixels of the fifth pixel row in the sixth regular area 126 and the first scanning driving circuit VSRL; the fourth scan line is respectively connected to the pixels of the sixth pixel row in the sixth normal area 126 and the second scan driving circuit VSRR, and the fifth pixel row and the sixth pixel row are alternately arranged in sequence in the first direction from the first frame to the second frame.
Fig. 9 is a schematic structural diagram of a display device 90 according to an embodiment of the present invention, where the display device includes a display panel 91 and a housing 92, where the housing forms an accommodating space for accommodating the display panel 91, and the housing 92 may be rigid or flexible, which is not limited in this respect. Fig. 9 illustrates a display device by taking a mobile phone as an example, but it should be understood that the display device provided in the embodiment of the present invention may be other display devices having a display function, such as a computer, a television, and a vehicle-mounted display device, and the present invention is not limited thereto. The display panel 91 may adopt any one of the display panels provided in the embodiments of the present invention, which has the beneficial effects of the display panel provided in the embodiments of the present invention, and specific reference may be specifically made to the specific description of the display panel in each of the above embodiments, and this embodiment is not described herein again.
According to the embodiment, the display panel and the display device of the invention have the following beneficial effects: the display panel is provided with a cutting area, for the area of the data line blocked by the cutting area, namely an independent pixel area, the independent data line is independently arranged, partial conventional data lines are multiplexed at different time, the independent data line is indirectly connected with a signal driving circuit through the multiplexed conventional data line, the pixel of the independent pixel area is charged at the first time to complete the gray scale display of the independent pixel area, the pixel of the conventional pixel area is charged at the second time to complete the gray scale display of the conventional pixel area, the driving display of the display panel provided with the hollowed-out cutting area is realized, the independent data line and the conventional data line are in the same direction, namely all the data line routing on the display panel are in the same line, the whole pixels on the display panel can be arranged in the same line, the color resistance can be arranged in the same line, and the difference of the visual effect between the independent pixel area and the conventional pixel area can not be caused, the uniformity of the whole display panel is good.
Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.
Claims (11)
1. A display panel is characterized in that a plurality of pixels are arranged in a matrix,
the display panel comprises a display area and a frame area surrounding the display area, wherein the frame area comprises a first frame and a second frame which are oppositely arranged in a first direction; the frame area further comprises a third frame and a fourth frame which are oppositely arranged in the second direction;
the display area comprises a cutting area, an independent pixel area and a conventional pixel area, wherein the independent pixel area is a part between the cutting area and the first frame, and the part is close to the edge of the first frame; the normal pixel region comprises a first normal region and a second normal region, wherein the first normal region comprises a part from the cut region to the third frame near the edge of the third frame and a part from the independent pixel region to the third frame near the edge of the third frame, and the second normal region comprises a part from the cut region to the fourth frame near the edge of the fourth frame and a part from the independent pixel region to the fourth frame near the edge of the fourth frame;
the display panel further comprises a signal driving circuit located in the frame region and a data line extending in the first direction;
the data lines comprise independent data lines and normal data lines, wherein the normal data lines comprise first normal data lines and second normal data lines, the first normal data lines are respectively connected with the pixels of the first normal area and the signal driving circuit, and the second normal data lines are respectively connected with the pixels of the second normal area and the signal driving circuit; the independent data line is connected with the pixels of the independent pixel area, and is also connected with the first conventional data line or the second conventional data line;
the signal driving circuit charges the pixels of the independent pixel region through the independent data lines and the normal data lines at a first time, and the signal driving circuit charges the pixels of the normal pixel region through the normal data lines at a second time.
2. The display panel according to claim 1,
the display panel further comprises a scanning driving circuit positioned in the frame area and a scanning line extending in a second direction, wherein the first direction intersects the second direction;
the scanning driving circuit comprises an independent scanning circuit and a conventional scanning circuit which are mutually cascaded, and the scanning lines comprise independent scanning lines and conventional scanning lines;
the independent scanning lines are respectively connected with the pixels of the independent pixel areas and the independent scanning circuits, and the independent scanning circuits are used for scanning the pixels of the independent pixel areas through the independent scanning lines at the first time;
the normal scan lines are respectively connected with the pixels of the normal pixel area and the normal scan circuit, and the normal scan circuit is used for scanning the pixels of the normal pixel area through the normal scan lines at the second time.
3. The display panel according to claim 2,
the normal scanning circuit comprises a first normal scanning circuit positioned on the third frame and a second normal scanning circuit positioned on the fourth frame;
the normal scanning lines include a first normal scanning line and a second normal scanning line, wherein the first normal scanning line is respectively connected with the pixel of the first normal area and the first normal scanning circuit, and the second normal scanning line is respectively connected with the pixel of the second normal area and the second normal scanning circuit.
4. The display panel according to claim 3,
the independent pixel regions comprise a first independent region and a second independent region which are sequentially arranged in the second direction, wherein the first independent region is close to the third frame, and the second independent region is close to the fourth frame;
the independent data lines include first independent data lines and second independent data lines, wherein the first independent data lines are respectively connected with the pixels of the first independent area and the first normal data lines, and the second independent data lines are respectively connected with the pixels of the second independent area and the second normal data lines.
5. The display panel according to claim 4,
the display panel comprises an array substrate, wherein the array substrate comprises a plurality of film layers;
the independent data line and the conventional data line are positioned on the same film layer of the array substrate;
the first independent data line is connected with the first conventional data line through a first bridge spanning line, and the second independent data line is connected with the second conventional data line through a second bridge spanning line;
the first bridge spanning line and the second bridge spanning line are respectively positioned on different film layers of the array substrate together with the independent data line.
6. The display panel according to claim 5,
the array substrate comprises a substrate base plate, a first metal layer and a second metal layer, wherein the first metal layer is positioned on one side of the substrate base plate, and the second metal layer is positioned on one side, far away from the substrate base plate, of the first metal layer;
the first bridge spanning line and the second bridge spanning line extend in the second direction, and the first bridge spanning line, the second bridge spanning line and the scanning line are located in the first metal layer;
the data line is located on the second metal layer.
7. The display panel according to claim 5,
the array substrate comprises a substrate, a shading layer positioned on the substrate, a first metal layer positioned on one side of the shading layer far away from the substrate and a second metal layer positioned on one side of the first metal layer far away from the shading layer;
the first bridge spanning line and the second bridge spanning line are positioned on the light shielding layer;
the scanning lines are all located on the first metal layer;
the data line is located on the second metal layer.
8. The display panel according to claim 4,
the independent scanning circuits comprise a first independent scanning circuit positioned on the third frame and a second independent scanning circuit positioned on the fourth frame;
the independent scanning lines comprise first independent scanning lines and second independent scanning lines, wherein the first independent scanning lines are respectively connected with pixels of a first pixel row in the independent pixel area and the first independent scanning circuit, the second independent scanning lines are respectively connected with pixels of a second pixel row in the independent pixel area and the second independent scanning circuit, and the first pixel row and the second pixel row are sequentially and alternately arranged in the first direction from the first frame to the second frame;
the first independent scanning circuit is cascaded with the first normal scanning circuit, and the second independent scanning circuit is cascaded with the second normal scanning circuit.
9. The display panel according to claim 8,
the regular pixel area further comprises a third regular area, wherein the third regular area comprises a part from a straight line of the cutting area close to the edge of the second frame to the second frame;
the normal scanning lines further include third normal scanning lines and fourth normal scanning lines, wherein the third normal scanning lines are respectively connected to pixels of a third pixel row in the third normal area and the first normal scanning circuit, the fourth normal scanning lines are respectively connected to pixels of a fourth pixel row in the third normal area and the second normal scanning circuit, and the third pixel row and the fourth pixel row are alternately arranged in sequence in the first direction from the first frame to the second frame.
10. The display panel according to claim 1,
the display panel further comprises a switch control module and a change-over switch, wherein a first end of the change-over switch is connected with the independent data line, and a second end of the change-over switch is connected with the conventional data line;
the switch control module is used for controlling the first end of the change-over switch and the second end of the change-over switch to be connected at the first time and controlling the first end of the change-over switch and the second end of the change-over switch to be disconnected at the second time.
11. A display device characterized by comprising the display panel according to any one of claims 1 to 10.
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| KR102483956B1 (en) | 2016-03-31 | 2023-01-03 | 삼성디스플레이 주식회사 | Display device |
| CN107870492B (en) | 2017-10-31 | 2020-06-05 | 上海天马微电子有限公司 | Array substrate, display panel and display device thereof |
| CN108010949A (en) * | 2017-11-30 | 2018-05-08 | 武汉华星光电半导体显示技术有限公司 | The OLED display panel and OLED display of abnormity cutting |
| CN108447887B (en) * | 2018-02-27 | 2020-11-03 | 上海天马微电子有限公司 | Display panel and display device |
| US10692415B2 (en) | 2018-04-24 | 2020-06-23 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Gate driving circuit of irregular screen panel and driving method |
| CN108538235B (en) * | 2018-04-24 | 2019-10-25 | 武汉华星光电技术有限公司 | The gate drive circuit and driving method of special-shaped panel plate |
| CN108873419B (en) * | 2018-06-26 | 2020-12-04 | 南京中电熊猫液晶显示科技有限公司 | Display device and voltage adjusting method thereof |
| US11852938B2 (en) | 2018-08-21 | 2023-12-26 | Apple Inc. | Displays with data lines that accommodate openings |
| CN108962037B (en) * | 2018-09-19 | 2021-08-27 | 京东方科技集团股份有限公司 | Display device and control method thereof |
| CN109192073A (en) * | 2018-10-24 | 2019-01-11 | 昆山国显光电有限公司 | display panel and display device |
| TWI706393B (en) * | 2019-08-21 | 2020-10-01 | 友達光電股份有限公司 | Array substrate |
| TWI750895B (en) * | 2020-08-21 | 2021-12-21 | 友達光電股份有限公司 | Electronic device |
| WO2022226967A1 (en) * | 2021-04-30 | 2022-11-03 | 京东方科技集团股份有限公司 | Display panel and display apparatus |
| CN114200727A (en) * | 2021-12-20 | 2022-03-18 | 昆山龙腾光电股份有限公司 | Substrate convenient for hole opening design and display device |
| CN114387936B (en) * | 2022-02-17 | 2023-05-02 | 深圳市华星光电半导体显示技术有限公司 | Pixel structure and display panel |
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| US8619007B2 (en) * | 2005-03-31 | 2013-12-31 | Lg Display Co., Ltd. | Electro-luminescence display device for implementing compact panel and driving method thereof |
| JP2009047902A (en) * | 2007-08-20 | 2009-03-05 | Hitachi Displays Ltd | Display device |
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