TW202201672A - 半導體裝置及製造半導體裝置的方法 - Google Patents

半導體裝置及製造半導體裝置的方法 Download PDF

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TW202201672A
TW202201672A TW110101123A TW110101123A TW202201672A TW 202201672 A TW202201672 A TW 202201672A TW 110101123 A TW110101123 A TW 110101123A TW 110101123 A TW110101123 A TW 110101123A TW 202201672 A TW202201672 A TW 202201672A
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clip
component
face
pad
electronic component
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TW110101123A
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柳智妍
新及補
李泰勇
金炳辰
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新加坡商安靠科技新加坡控股私人有限公司
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Abstract

在一個實例中，一種半導體裝置包括電子構件，所述電子構件包括：構件面側、構件基底側、將構件面側連接到構件基底側的構件橫向側以及鄰近於構件面側的構件端口，其中構件端口包括構件端口面。夾結構包括第一夾襯墊、第二夾襯墊、將第一夾襯墊連接到第二夾襯墊的第一夾支腿以及第一夾面。囊封物覆蓋電子構件和夾結構的部分。囊封物包括囊封物面，第一夾襯墊耦接到電子構件，且構件端口面和第一夾面從囊封物面暴露。本文中還揭示其它實例和相關方法。

Description

半導體裝置及製造半導體裝置的方法
本揭示內容大體上涉及電子裝置，且更明確地說涉及半導體裝置和製造半導體裝置的方法。
現有的半導體封裝和用於形成半導體封裝的方法是不適當的，例如，導致成本過大、可靠性降低、性能相對低或封裝大小過大。通過比較此類方法與本揭示內容並參考圖式，所屬領域的技術人士將顯而易見常規和傳統方法的其它限制和缺點。
本發明的一態樣為一種半導體裝置，其包括：電子構件，所述電子構件包括：構件面側；構件基底側；構件橫向側，所述構件橫向側將所述構件面側連接到所述構件基底側；以及構件端口，所述構件端口鄰近於所述構件面側；夾結構，所述夾結構耦接到所述電子構件；以及囊封物，所述囊封物覆蓋所述電子構件和所述夾結構；其中：所述構件端口包括構件端口面；所述囊封物包括囊封物面；所述夾結構包括第一夾面；以及所述構件端口面和所述第一夾面從所述囊封物面暴露。
根據本發明的該態樣所述的半導體裝置，所述囊封物面、所述第一夾面和所述構件端口面是共面的。
根據本發明的該態樣所述的半導體裝置，所述夾結構包括：第一夾襯墊；第二夾襯墊；以及第一夾支腿，所述第一夾支腿將所述第一夾襯墊和所述第二夾襯墊連接在一起。
根據本發明的該態樣所述的半導體裝置，所述第一夾襯墊連接到所述電子構件的所述構件基底側；所述第二夾襯墊包括所述第一夾面；所述構件端口包括構件端子；且所述構件端子包括所述構件端口面。
根據本發明的該態樣所述的半導體裝置，所述囊封物包括不同於所述囊封物面的第二囊封物面；所述第一夾襯墊從所述第二囊封物面暴露；且所述半導體裝置還包括：板，所述板耦接到所述第一夾襯墊。
根據本發明的該態樣所述的半導體裝置，所述第一夾襯墊連接到所述電子構件的所述構件面側；所述第一夾襯墊包括所述第一夾面；所述構件端口包括構件端子和耦接到所述構件端子的構件互連件；且所述構件互連件包括所述構件端口面。
根據本發明的該態樣所述的半導體裝置還包括：板，所述板連接到所述電子構件的所述構件基底側且連接到所述第二夾襯墊以將所述電子構件的所述構件基底側電耦接到所述夾結構。
根據本發明的該態樣所述的半導體裝置，所述夾結構包括：夾橋，其連接到所述構件基底側；第一夾襯墊；第二夾襯墊；第一夾支腿，所述第一夾支腿將所述第一夾襯墊連接到所述夾橋；以及第二夾支腿，所述第二夾支腿將所述第二夾襯墊連接到所述夾橋；所述第一夾襯墊包括所述第一夾面；且所述第二夾襯墊包括從所述囊封物面暴露的第二夾面。
根據本發明的該態樣所述的半導體裝置，所述夾結構包括：第一夾襯墊，所述第一夾襯墊耦接到所述電子構件；第二夾襯墊；第一夾支腿，所述第一夾支腿將所述第一夾和所述第二夾襯墊連接在一起；第三夾襯墊，所述第三夾襯墊耦接到所述電子構件；第四夾襯墊；以及第二夾支腿，所述第二夾支腿將所述第三夾襯墊和所述第四夾襯墊連接在一起。
根據本發明的該態樣所述的半導體裝置，所述第一夾襯墊在所述電子構件的第一外圍邊緣處耦接到所述構件面側；所述第三夾襯墊在所述電子構件的第二外圍邊緣處耦接到所述構件面側；所述構件端口包括插入於所述第一夾襯墊與所述第三夾襯墊之間的構件互連件；所述第一夾襯墊包括所述第一夾面；所述第三夾襯墊包括從所述囊封物面暴露的第二夾面；所述構件互連件包括所述構件端口面；且所述囊封物插入於所述構件互連件、所述第一夾襯墊和所述第三夾襯墊之間。
根據本發明的該態樣所述的半導體裝置還包括：板，所述板耦接到所述電子構件的所述構件基底側、所述第二夾襯墊和所述第四夾襯墊。
根據本發明的該態樣所述的半導體裝置，所述第一夾襯墊在所述電子構件的第一外圍邊緣處耦接到所述構件基底側；所述第三夾襯墊在所述電子構件的第二外圍邊緣處耦接到所述構件基底側；所述構件端口包括構件端子；所述第二夾襯墊包括所述第一夾面；所述第四夾襯墊包括從所述囊封物面暴露的第二夾面；所述構件端子包括所述構件端口面；且所述囊封物插入於所述構件橫向側、所述第二夾襯墊和所述第四夾襯墊之間。
根據本發明的該態樣所述的半導體裝置還包括：介電質層，所述介電質層在所述囊封物面上方，具有暴露所述第一夾面和所述構件端口面的開口；以及外部互連件，所述外部互連件通過所述開口電耦接到所述夾結構和所述電子構件。
本發明的另一態樣為一種半導體裝置，其包括：電子構件，所述電子構件包括：構件面側；構件基底側；構件橫向側，所述構件橫向側將所述構件面側連接到所述構件基底側；以及構件端口，所述構件端口鄰近於所述構件面側，其中所述構件端口包括構件端口面；夾結構，所述夾結構包括：第一夾襯墊；第二夾襯墊；第一夾支腿，所述第一夾支腿將所述第一夾襯墊連接到所述第二夾襯墊；以及第一夾面；以及囊封物，所述囊封物覆蓋所述電子構件和所述夾結構；其中：所述囊封物包括囊封物面；所述第一夾襯墊耦接到所述電子構件；且所述構件端口面和所述第一夾面從所述囊封物面暴露。
根據本發明的另一態樣所述的半導體裝置，所述第一夾襯墊耦接到所述電子構件的所述構件面側；所述第一夾襯墊包括所述第一夾面；所述構件端口包括構件端子和構件互連件；所述構件互連件包括所述構件端口面；所述構件端口面和所述第一夾面是共面的；且所述半導體裝置還包括將所述電子構件的所述構件基底側耦接到所述第二夾襯墊的板。
根據本發明的另一態樣所述的半導體裝置，所述第一夾襯墊耦接到所述電子構件的所述構件基底側；所述第二夾襯墊包括所述第一夾面；所述構件端口包括構件端子；所述構件端子包括所述構件端口面；且所述構件端口面和所述第一夾面是共面的。
根據本發明的另一態樣所述的半導體裝置還包括：板，所述板耦接到所述第一夾襯墊。
本發明的又一態樣為一種形成半導體裝置的方法，其包括：提供電子構件，所述電子構件包括：構件面側；構件基底側；構件橫向側，所述構件橫向側將所述構件面側連接到所述構件基底側；以及構件端口，所述構件端口鄰近於所述構件面側，其中所述構件端口包括構件端口面；提供具有第一夾面的夾結構；將所述夾結構耦接到所述電子構件；以及提供囊封物，所述囊封物覆蓋所述電子構件和所述夾結構；其中：所述囊封物包括囊封物面；且所述構件端口面和所述第一夾面從所述囊封物面暴露。
根據本發明的又一態樣所述的方法還包括：提供板；其中：提供所述電子構件包括：將所述電子構件的所述構件基底側連接到所述板；以及提供所述構件端口，所述構件端口包括構件端子和構件互連件；其中所述構件互連件包括所述構件端口面；提供所述夾結構包括：提供第一夾襯墊、第二夾襯墊和將所述第一夾襯墊連接到所述第二夾襯墊的第一夾支腿；其中所述第一夾襯墊包括所述第一夾面；耦接所述夾結構包括：將所述第一夾襯墊連接到所述電子構件的所述構件面側；以及將所述第二夾襯墊連接到所述板；提供所述囊封物包括：形成覆蓋所述板、所述電子構件、所述構件互連件和所述夾結構的所述囊封物；以及移除所述囊封物的一部分以提供所述囊封物面；且所述方法還包括：提供耦接到所述構件端口面和所述第一夾面的外部互連件。
根據本發明的又一態樣所述的方法還包括：提供載體；其中：提供所述電子構件包括：將所述電子構件的所述構件面側連接到所述載體；以及提供包括構件端子的所述構件端口；其中所述構件端子包括所述構件端口面；提供所述夾結構包括：提供第一夾襯墊、第二夾襯墊和將所述第一夾襯墊連接到所述第二夾襯墊的第一夾支腿；其中所述第二夾襯墊包括所述第一夾面；耦接所述夾結構包括：將所述第一夾襯墊連接到所述電子構件的所述構件基底側；以及將所述第二夾襯墊連接到所述載體；提供所述囊封物包括：形成覆蓋所述載體、所述電子構件和所述夾結構的所述囊封物；且所述方法還包括：移除所述載體以提供所述囊封物面；提供耦接到所述構件端口面和所述第一夾面的外部互連件；以及提供耦接到所述第一夾襯墊的板。
以下論述提供半導體裝置和製造半導體裝置的方法的各種實例。此類實例是非限制性的，且所附申請專利範圍的範疇不應限於揭示內容的特定實例。在下文論述中，術語“實例”和“例如”是非限制性的。
諸圖說明一般構造方式，且可能省略熟知特徵和技術的描述和細節以免不必要地混淆本發明。另外，圖式中的元件未必按比例繪製。舉例來說，各圖中的一些元件的尺寸可能相對於其它元件放大，以幫助改進對本揭示內容中論述的實例的理解。不同諸圖中的相同附圖標記表示相同元件。
術語“或”表示由“或”連接的列表中的項目中的任何一個或多個項目。作為實例，“x或y”表示三元素集合{(x), (y), (x, y)}中的任何元素。作為另一實例，“x、y或z”表示七元素集合{(x), (y), (z), (x， y), (x, z), (y, z), (x, y, z)}中的任一元素。
術語“包括”和/或“包含”為“開放”術語，並且指定所陳述特徵的存在，但並不排除一個或多個其它特徵的存在或添加。
在本文中可以使用術語“第一”、“第二”等來描述各種元件，並且這些元件不應受這些術語的限制。這些術語僅用於區分一個元件與另一元件。因此，例如，在不脫離本揭示內容所教示的情況下，可將本揭示內容中論述的第一元件稱為第二元件。
除非另外指定，否則術語“耦接”可以用於描述彼此直接接觸的兩個元件或描述通過一個或多個其它元件間接連接的兩個元件。例如，如果元件A耦接到元件B，那麼元件A可以直接接觸元件B或通過介入元件C間接連接到元件B。類似地，術語“在……上方”或“在……上”可用於描述彼此直接接觸的兩個元件或描述通過一個或多個其它元件間接連接的兩個元件。
本說明書除了其它特徵之外還包含電子裝置和相關方法，所述方法包含連接到電子構件的夾結構。所述電子構件包含具有構件面的端口，且所述夾結構包含夾面。囊封物覆蓋所述電子構件、構件端口和夾結構。所述囊封物包含囊封物面；且所述夾面和構件端口面從囊封物面暴露。在一些實例中，構件端口包括構件端子。在其它實例中，構件端口包括構件端子和構件互連件。在一些實例中，夾結構包含第一夾襯墊和互連到第一夾襯墊的第二夾襯墊。在一些實例中，第一夾襯墊連接到電子構件。在某一實例中，第一夾襯墊包括第一夾面。在其它實例中，第二夾襯墊包括第一夾面。此外，所述裝置和方法實現在電子裝置的一個側面上的電互連。
在一實例中，半導體裝置包括電子構件，所述電子構件包括：構件面側、構件基底側、將構件面側連接到構件基底側的構件橫向側以及鄰近於構件面側的構件端口。夾結構耦接到電子構件，且囊封物覆蓋電子構件和夾結構的部分。構件端口包括構件端口面，囊封物包括囊封物面，夾結構包括第一夾面，且構件端口面和第一夾面從囊封物面暴露。
在一實例中，半導體裝置包括電子構件，所述電子構件包括：構件面側、構件基底側、將構件面側連接到構件基底側的構件橫向側以及鄰近於構件面側的構件端口，其中構件端口包括構件端口面。夾結構包括第一夾襯墊、第二夾襯墊、將第一夾襯墊連接到第二夾襯墊的第一夾支腿和第一夾面。囊封物覆蓋電子構件和夾結構的部分。囊封物包括囊封物面，第一夾襯墊耦接到電子構件，且構件端口面和第一夾面從囊封物面暴露。
在一實例中，用於形成半導體裝置的方法包括提供電子構件，所述電子構件包括：構件面側、構件基底側、將構件面側連接到構件基底側的構件橫向側以及鄰近於構件面側的構件端口，其中構件端口包括構件端口面。所述方法包含提供具有第一夾面的夾結構，且將所述夾結構耦接到電子構件。所述方法包含提供覆蓋電子構件和夾結構的部分的囊封物，其中所述囊封物包括囊封物面，且構件端口面和第一夾面從囊封物面暴露。
其它實例包含於本揭示內容中。在諸圖、申請專利範圍和/或本揭示內容的描述中可以找到此類實例。
圖1示出實例半導體裝置100的橫截面圖。在圖1所示的實例中，半導體裝置100可以包括板110、電子構件120、夾結構130、囊封物140、介電質150和外部互連件160。
電子構件120可以包括構件基底側120a和構件面側120b。電子構件120可以包括構件端子121a、121b、121c以及構件互連件122。在一些實例中，構件端子121a、121b、121c與相應構件互連件122一起可被稱作構件端口。在一些實例中，構件互連件122可被稱作構件端口。
板110、夾結構130、囊封物140、介電質150和外部互連件160可以包括或稱為半導體封裝101，且可為電子構件120提供針對外部元件和/或環境曝光的保護。半導體封裝101可以提供外部構件與電子構件120之間的電耦接。
圖2A、2B、2C、2D、2E、2F和2G示出用於製造實例半導體裝置100的實例方法的橫截面圖。
圖2A示出在半導體裝置100的早期製造階段的橫截面圖。在圖2A所示的實例中，板110可為基本上平坦的，且可以包括或稱為導電板或散熱板。在一些實例中，板110可由例如銅材料的材料（銅或具有銅和另一元素的合金，所述另一元素例如鎳（Ni）、矽（Si）、磷（P）或鈦（Ti）、鐵鎳合金或銅/不銹鋼/銅包層金屬）製成。為了防止板110被腐蝕，可在板110的側面上部分地或完全地電鍍金（Au）、銀（Ag）、錫（Sn）、鎳（Ni）或鈀（Pd）。在一些實例中，板110的厚度範圍可以是約3μm（微米）到約2000μm，或板110的寬度範圍可以是約0.5mm（毫米）到約10mm。
圖2B示出半導體裝置100的稍後製造階段的橫截面圖。在圖2B所示的實例中，包括構件互連件122的電子構件120可附接到板110的頂側110b。
在一些實例中，電子構件120可以包括或稱為半導體晶粒、半導體晶片或半導體封裝。在一些實例中，電子構件120可以包括功率裝置或電晶體裝置，例如場效應電晶體（FET）裝置。在一些實例中，電子構件120可以包括主動或被動電路。在一些實例中，電子構件120可以包括一個或多個電晶體、數位信號處理器（DSP）、微處理器、網絡處理器、功率管理處理器、音頻處理器、RF電路、無線基帶晶片上系統（SoC）處理器、感測器、光學或光感測器、發射器、無線、光學或光發射器或特定應用積體電路（ASIC）。在一些實例中，電子構件120可以包括矽襯底或玻璃襯底。在一些實例中，電子構件120的厚度範圍可以是約30μm到約780μm，或電子構件120的寬度範圍可以是約0.5mm到約10mm。電子構件120可具有彼此相對的構件基底側120a和構件面側120b。
電子構件120可以在構件基底側120a處包括構件端子121c。在一些實例中，構件端子121c可被配置成用於接收或發射信號或功率。在一些實例中，構件端子121c可以包括或稱為電子構件120的源極端子或汲極端子。在一些實例中，構件端子121c可以在構件基底側120a處包括電子構件120的構件基底或表面。
電子構件120可以包括提供於構件面側120b上的構件端子121a、121b。構件端子121a、121b可以包括電子構件120的信號或功率端子，且可以包括或稱為構件面端子、襯墊、凸塊下金屬化物（UBM）或凸塊。構件端子121a、121b可以包括例如鋁、銅或錫等導電材料的一個或多個層。在一些實例中，構件端子121b可以包括或稱為電子構件120的汲極端子或源極端子。在一些實例中，構件端子121a可以包括或稱為電子構件120的閘極或控制端子。在一些實例中，構件端子121的寬度範圍可以是約0.01mm到約1mm。
構件互連件122可提供於構件端子121上或與構件端子121耦接。構件互連件122可從構件端子121向上延伸。在一些實例中，構件互連件122的高度範圍可以是約0.05mm到約2mm。在一些實例中，可通過電鍍、無電電鍍、濺鍍、物理氣相沉積（PVD）、化學氣相沉積（CVD）、金屬有機CVD（MOCVD）、原子層沉積（ALD）、低壓CVD（LPCVD）或等離子體增強CVD（PECVD）來提供構件互連件122。在一些實例中，構件互連件122可以包括基本上垂直延伸的線接合導線。在一些實例中，構件互連件122可以包括銅、金、銀、鈀、鎢或鎳材料中的一種或多種。構件互連件122可以包括或稱為凸塊、柱、垂直導線、桿或導電路徑。在一些實例中，構件互連件122可將外部互連件160電學地和機械地連接到電子構件120。
電子構件120的構件基底側120a可通過界面材料111接合到板110的頂側110b。在一些實例中，電子構件120可由取放設備拾取且放在定位於板110上的界面材料111上。在一些實例中，可首先將界面材料111施加到電子構件120，並且接著可通過界面材料111將電子構件120耦接到板110。在一些實例中，可使用大規模回焊製程、熱壓製程或雷射輔助接合製程通過界面材料111將電子構件120電學地或熱學耦接到板110。
在一些實例中，使用塗佈製程，例如旋塗、刮刀塗佈、噴塗；印刷製程，例如網版印刷、射流印刷；或膜或條帶的直接附接，界面材料111可提供於板110的頂側110b上，或構件基底側120a上。界面材料111可以包括或稱為黏著劑、膏、焊料；電導體或導熱體材料。在一些實例中，界面材料111可以包括銅、鐵、鎳、金、銀、鈀或錫。界面材料111可將電子構件120的構件基底側120a電學或熱學連接到板110。
圖2C示出半導體裝置100的稍後製造階段的橫截面圖。在圖2C所示的實例中，板110和在電子構件120的構件面側120b處的構件端子121c可通過夾結構130連接。
在一些實例中，夾結構130可以包括夾130a或夾130b。夾結構130a可以包括耦接到電子構件120的構件面側120b的夾襯墊131a，以及耦接到夾襯墊131a和板110的頂側110b且在它們之間延伸的夾支腿132a。在一些實例中，夾支腿132a可以包括或可以耦接到夾襯墊133a，所述夾襯墊耦接到板110的頂側110b。在一些實例中，耦接到構件面側120b的夾襯墊131a的表面可基本上平行於構件面側120b。在一些實例中，耦接到板110的夾襯墊133a的表面可基本上平行於板110的頂側110b。在一些實例中，夾支腿132a可從夾襯墊133a朝向板110或夾襯墊133a對角地延伸。在一些實例中，夾130b可以包括相應夾襯墊131b、夾支腿132b或夾襯墊133b。
在一些實例中，可通過彎曲或蝕刻一個或多個導電板來提供夾結構130。在一些實例中，夾結構130可以包括引線框的部分。在一些實例中，夾結構130可由銅材料（銅或具有銅和例如Ni、Si、P或T等另一元素的合金）、鐵鎳合金材料或Cu/SUS/Cu包層金屬製成。在一些實例中，夾結構130的厚度範圍可以是約0.05mm到約2mm。
在一些實例中，可在板110的頂側110b上施加界面材料111，且可在電子構件120的構件面側120b上施加接合材料123。夾結構130的夾片130a、130b可被定位，使得夾襯墊131a、131b與接合材料123耦接以與電子構件120的構件面側120b接合，且使得夾支腿132a、132b或夾襯墊133a、133b與界面材料111耦接以與板110接合。在一些實例中，夾襯墊131a、131b可附接在構件面側120b的外圍或邊緣處。在一些實例中，夾支腿132a、132b可耦接在板110的頂側110b上鄰近於電子構件120的橫向側。
在一些實例中，接合材料123可以包括或稱為電絕緣材料。在一些實例中，接合材料123可以包括或稱為導熱材料。在一些實例中，接合材料123可以包括或稱為黏著劑、膏或焊料。夾結構130可通過界面材料111電學、熱學或機械地連接到板110。夾結構130可通過接合材料123機械地或熱學地連接到電子構件120的構件面側120b。在一些實施方案中夾結構130可與電子構件120的構件面側120b電隔離。舉例來說，接合材料123可以包括在夾襯墊131a、131b與電子構件120的構件面側120b之間的電絕緣材料。作為另一實例，接合材料123可以包括導電材料，但不接觸夾襯墊131a、131b與電子構件120的構件面側120b之間的半導體裝置120的任何暴露端子。
圖2D示出半導體裝置100的稍後製造階段的橫截面圖。在圖2D所示的實例中，囊封物140可覆蓋板110、電子構件120和夾結構130。在一些實例中，囊封物140可接觸板110的頂側110b。在一些實例中，囊封物140可接觸電子構件120的構件面側120b或橫向側。在一些實例中，囊封物140可接觸構件互連件122的頂側或橫向側。在一些實例中，囊封物140可接觸夾結構130的頂部或橫向側。在一些實例中，囊封物140可在夾結構130與電子構件120的橫向側之間延伸。
在一些實例中，囊封物140可以包括或稱為環氧模製化合物、環氧樹脂模製樹脂，或密封劑。在一些實例中，囊封物140可以包括或稱為模製部分、密封部分、囊封部分、保護部分或封裝體。在一些實例中，囊封物140可以包括有機樹脂、無機填充劑、固化劑、催化劑、偶聯劑、著色劑和阻燃劑。可通過多種製程提供囊封物140。在一些實例中，可通過壓縮模製製程、液相囊封物模製製程、真空層壓製程、膏印刷製程或膜輔助模製製程來提供囊封物140。囊封物140的厚度範圍可以是近似0.08mm到近似3mm。囊封物140可覆蓋板110、電子構件120和夾結構130以保護板110、電子構件120和夾結構130免受外部元件和/或環境曝光影響。
圖2E示出半導體裝置100的稍後製造階段的橫截面圖。在圖2E所示的實例中，可移除囊封物140的一部分以從囊封物140暴露構件互連件122的面122z以及夾結構130的夾襯墊131a、131b的面131z。可通過研磨或化學蝕刻移除囊封物140。在一些實例中，囊封物140的側140z可與構件互連件122的面122z和夾襯墊131a、131b的面131z共面。在一些實例中，頂部部分移除的囊封物140的厚度範圍可以是約0.08mm到約3mm。
圖2F示出半導體裝置100的稍後製造階段的橫截面圖。在圖2F所示的實例中，可提供介電質150以覆蓋囊封物140的頂側140z、構件互連件122的面122z以及夾結構130的夾襯墊131a、131b的面131z。
介電質150可以包括或稱為介電質層、鈍化層、絕緣層或保護層。在一些實例中，介電質150可以包括電絕緣材料，例如聚合物、聚醯亞胺（PI）、苯並環丁烯（BCB）、聚苯並噁唑（PBO）、雙馬來醯亞胺三嗪（BT）、模製材料、酚系樹脂、環氧樹脂、矽酮或丙烯酸酯聚合物。在一些實例中，可通過多種製程中的任一種提供介電質150。舉例來說，可通過旋塗、噴塗、印刷、PVD、CVD、MOCVD、ALD、LPCVD或PECVD提供介電質150。介電質150的厚度範圍可以是約2 μm到約30 μm。
可在介電質150上提供使構件互連件122的面122z和夾襯墊131a、131b的面131z暴露的孔隙151和152。在一些實例中，可通過在介電質150的頂側上圖案化掩模來形成孔隙151和152，並且接著可通過蝕刻來移除暴露的介電質150以暴露構件互連件122的面122z和夾襯墊131a、131b的面131z。在一些實例中，通過孔隙151和152暴露的構件互連件122的面122z或夾襯墊131a、131b的面131z可為圓形、矩形或多邊形。
圖2G示出半導體裝置100的稍後製造階段的橫截面圖。在圖2G所示的實例中，可在構件互連件122的面122z或夾襯墊131a、131b的面131z上提供外部互連件160。外部互連件160可電連接到構件互連件122的面122z，或夾襯墊131a、131b的面131z。外部互連件160可通過夾結構130和板110在電子構件120的構件基底側120a處電連接到構件端子121c，或可通過構件互連件122電連接到電子構件120的構件端子121a、121b。
在一些實例中，外部互連件160可以包括錫（Sn）、銀（Ag）、鉛（Pb）、銅（Cu）、Sn-Pb、Sn37-Pb、Sn95-Pb、Sn-Pb-Ag、Sn-Cu、Sn-Ag、Sn-Au、Sn-Bi或Sn-Ag-Cu。舉例來說，可通過球滴製程、網版印刷製程或電鍍製程提供外部互連件160。舉例來說，可通過球滴製程將包含焊料的導電材料施加到構件互連件122的面122z和夾襯墊131的面131z，隨後執行回焊製程，來提供外部互連件160。外部互連件160可以被稱作導電球（例如焊料球）、導電柱（例如銅柱），或具有銅柱上的焊料蓋的導電桿。外部互連件160的大小範圍可以是約50mm到約700mm。另外，可將完成的半導體裝置100翻轉，因此外部互連件160定位於半導體裝置100的底側上。在一些實例中，外部互連件160可以稱為半導體裝置100的外部輸入/輸出端子。
圖3示出實例半導體裝置200的橫截面圖。在圖3所示的實例中，半導體裝置200可以包括電子構件220、夾結構230、囊封物240、介電質250和外部互連件160。
電子構件220可以包括構件基底側220a和構件面側220b。電子構件220可包含構件端口，所述構件端口包括構件端子221a、221b、221c。
夾結構230、囊封物240、介電質250和外部互連件160可以包括或稱為半導體封裝201或封裝201，且可為電子構件220提供針對外部元件和/或環境曝光的保護。半導體封裝201可以提供外部構件與電子構件220之間的電耦接。半導體裝置200是裝置的實例，其中囊封物240插入於電子構件220的構件橫向側、夾襯墊233a或夾襯墊233b之間。
圖4A、4B、4C、4D、4E和4F示出用於製造實例半導體裝置200的實例方法的橫截面圖。
圖4A示出在早期製造階段的半導體裝置200的橫截面圖。在圖 4A所示的實例中，電子構件220可附接在載體10上。
電子構件220可以包括構件基底側220a和與構件基底側220a相對的構件面側220b。構件基底側220a可以包括構件端子221c，且構件面側220b可以包括構件端子221a、221b。電子構件220和其特徵或元件類似於電子構件120和其相應特徵或元件。電子構件220可被定位成構件面側220b和構件端子221接合到載體10。
載體10可為基本上平坦的板。舉例來說，載體10可以包括或稱為板、晶片、面板或條帶。在一些實例中，載體10可以包括鋼、不銹鋼、鋁、銅、陶瓷、矽或玻璃。載體10的厚度範圍可以是100mm到780mm，且載體10的寬度範圍可以是200mm到300mm。載體10可用於電子構件220和夾結構230的附接，且可以陣列形式同時處置多個半導體裝置的形成。
載體10可以包括在電子構件220的附接之前施加的黏著劑11。黏著劑11可以包括或稱為臨時黏著劑膜或臨時黏著帶。在一些實例中，黏著劑11可以包括可熱釋放的條帶（膜）或可光釋放的條帶（膜）。在一些實例中，可通過熱量或光來減弱或移除黏附性。在一些實例中，可通過物理和/或化學外力來減弱或移除黏著劑11的黏附性。黏著劑11的厚度範圍可以是約5 μm到約100 μm。
圖4B示出半導體裝置200的稍後製造階段的橫截面圖。在圖4C所示的實例中，夾結構230可設置為耦接於電子構件220與載體10之間。
夾結構230可類似於本揭示內容中描述的夾結構130和其對應的特徵或元件。夾結構230可以包括夾230a，所述夾具有耦接到電子構件220的構件基底側220a的夾襯墊231a，且具有耦接到夾襯墊231a和載體10且在它們之間延伸的夾支腿232a。在一些實例中，夾支腿232a可以包括或可耦接到夾襯墊233a，所述夾襯墊耦接到載體10。在一些實例中，耦接到構件基底側220a的夾襯墊231a的表面可基本上平行於構件基底側220a。在一些實例中，耦接到載體10的夾襯墊233a的表面可基本上平行於載體10。在一些實例中，夾支腿232a可從夾襯墊231a朝向載體10或夾襯墊233a對角地延伸。在一些實例中，夾結構230可以包括夾230b，所述夾具有相應的夾襯墊231b、夾支腿232b或夾襯墊233b。
在一些實例中，可在電子構件220的構件基底側220a上施加界面材料211。在一些實例中，界面材料211可類似於先前相對於圖1-2描述的界面材料111，或可以類似地形成或施加。界面材料可在電子構件220的構件基底側220a處將夾結構230電學或熱學耦接到構件端子221c。夾結構230的夾230a、230b可以被定位，使得夾襯墊231a、231b耦接到界面材料211以與電子構件220的構件基底側220a接合，且使得夾支腿232a、232b或夾襯墊233a、233b耦接到黏著劑11以與載體10接合。在一些實例中，夾襯墊231a、231b可附接在構件基底側220a的外圍或邊緣處。在一些實例中，夾支腿232a、232b可鄰近於電子構件220的橫向側耦接到載體10。
圖4C示出半導體裝置200的稍後製造階段的橫截面圖。在圖4C所示的實例中，囊封物240可覆蓋電子構件220和夾結構230。在一些實例中，囊封物240可接觸電子構件220的構件基底側220a或橫向側。在一些實例中，囊封物240可接觸夾結構230的頂部或橫向側，或可定位於夾結構230與電子構件220的橫向側之間。囊封物240可類似於囊封物140或可類似地形成或施加。
圖4D示出在稍後製造階段的半導體裝置200的橫截面圖。在圖 4D所示的實例中，可移除載體10。黏著劑11可以在其保持接合到載體10的狀態中從電子構件220、夾結構230和囊封物240釋放。在一些實例中，可以施加熱量、光、化學溶液和/或物理外力以移除或減少黏著劑11的黏附性。在載體10移除的情況下，電子構件220的構件面側220b、電子構件220的構件端子221a、221b的面221z、夾結構230的夾襯墊233a、233b的面233z或囊封物240的側240z可暴露。
圖4E示出半導體裝置200的稍後製造階段的橫截面圖。在圖4E所示的實例中，可提供介電質250以覆蓋電子構件220的構件面側220b、夾結構230的夾襯墊233a、233b的面233z，和囊封物240的側240z。穿過介電質250的孔隙251、252可暴露構件端子221a、221b的面221z，且可暴露夾襯墊233a、233b的面233z。介電質250可類似於介電質150並且可類似地形成。
圖4F示出半導體裝置200的稍後製造階段的橫截面圖。在圖4F所示的實例中，外部互連件260提供於構件端子221a、221b的面221z上和夾襯墊233a、233b的面233z上。外部互連件260可通過夾結構230電連接到電子構件220的構件基底側220a。外部互連件260可類似於外部互連件160並且可類似地形成。
圖5示出實例半導體裝置300的橫截面圖。在圖5所示的實例中，半導體裝置300可以包括板310、電子構件220、夾結構230、囊封物240、介電質250和外部互連件260。
半導體裝置300可在結構或形成方面類似於本揭示內容中所描述的其它半導體裝置，例如圖3-4中描述的半導體裝置200。半導體裝置300包括在夾襯墊231a、231b的面231z處耦接到夾結構230的板310。在一些實例中，板310可類似於相對於圖1-2描述的板110。在一些實例中，在板310的耦接之前，可移除囊封物240的一部分以暴露夾襯墊231a、231b的面231z，類似於如關於圖2E所描述。在一些實例中，板310可直接形成於夾結構30的夾襯墊231a、231b上或與它們耦接或者與囊封物240耦接。在一些實例中，板310可通過界面材料111與夾結構30的夾襯墊231a、231b耦接。
圖6示出實例半導體裝置400的橫截面圖。在圖6所示的實例中，半導體裝置400可以包括電子構件220、夾結構430、囊封物240、介電質250和外部互連件160。
半導體裝置400可在結構或形成方面類似於本揭示內容中所描述的其它半導體裝置，例如在圖3-4中描述的半導體裝置200，或在圖5中描述的半導體裝置300。
夾結構430可在結構或形成方面類似於在圖3-5中描述的夾結構230，且包括在構件基底側220a上方在夾支腿232a、232b之間延伸的夾橋430z。在一些實例中，夾橋430可橫跨電子構件220的整個寬度。在一些實例中，界面材料211可在電子構件220的構件基底側220a處耦接橋430與構件端子221c。在一些實例中，界面材料211可覆蓋構件基底側220a的寬度或區域的大部分。
本揭示內容包含對某些實例的引用，然而，所屬領域的技術人士應理解，在不脫離本揭示內容的範圍的情況下，可做出各種改變且可取代等效物。另外，在不脫離本揭示內容的範圍的情況下可以對揭示內容的實例作出修改。因此，預期本揭示內容不限於揭示的實例，而是本揭示內容將包含屬於所附申請專利範圍的範疇內的所有實例。
10:載體 11:黏著劑 100:半導體裝置 101:半導體封裝 110:板 110b:頂側 111:界面材料 120:電子構件 120a:構件基底側 120b:構件面側 121a:構件端子 121b:構件端子 121c:構件端子 122:構件互連件 122z:面 123:接合材料 130:夾結構 130a:夾/夾結構/夾片 130b:夾/夾片 131a:夾襯墊 131b:夾襯墊 131z:面 132a:夾支腿 132b:夾支腿 133a:夾襯墊 133b:夾襯墊 140:囊封物 140z:側/頂側 150:介電質 151:孔隙 152:孔隙 160:外部互連件 200:半導體裝置 201:半導體封裝/封裝 211:界面材料 220:電子構件 220a:構件基底側 220b:構件面側 221a:構件端子 221b:構件端子 221c:構件端子 221z:面 230:夾結構 230a:夾 230b:夾 231a:夾襯墊 231b:夾襯墊 231z:面 232a:夾支腿 232b:夾支腿 233a:夾襯墊 233b:夾襯墊 233z:面 240:囊封物 240z:側 250:介電質 251:孔隙 252:孔隙 260:外部互連件 300:半導體裝置 310:板 400:半導體裝置 430:夾結構 430z:夾橋
[圖1]示出實例半導體裝置的橫截面圖。
[圖2A、2B、2C、2D、2E、2F和2G]示出用於製造實例半導體裝置的實例方法的橫截面圖。
[圖3]示出實例半導體裝置的橫截面圖。
[圖4A、4B、4C、4D、4E和4F]示出用於製造實例半導體裝置的實例方法的橫截面圖。
[圖5]示出實例半導體裝置的橫截面圖。
[圖6]示出實例半導體裝置的橫截面圖。
100:半導體裝置
101:半導體封裝
110:板
120:電子構件
120a:構件基底側
120b:構件面側
121a:構件端子
121b:構件端子
121c:構件端子
122:構件互連件
130:夾結構
140:囊封物
150:介電質
160:外部互連件

Claims (20)

  1. 一種半導體裝置，其包括： 電子構件，所述電子構件包括： 構件面側； 構件基底側； 構件橫向側，所述構件橫向側將所述構件面側連接到所述構件基底側；以及 構件端口，所述構件端口鄰近於所述構件面側； 夾結構，所述夾結構耦接到所述電子構件；以及 囊封物，所述囊封物覆蓋所述電子構件和所述夾結構； 其中： 所述構件端口包括構件端口面； 所述囊封物包括囊封物面； 所述夾結構包括第一夾面；以及 所述構件端口面和所述第一夾面從所述囊封物面暴露。
  2. 根據請求項1所述的半導體裝置，其中： 所述囊封物面、所述第一夾面和所述構件端口面是共面的。
  3. 根據請求項1所述的半導體裝置，其中： 所述夾結構包括： 第一夾襯墊； 第二夾襯墊；以及 第一夾支腿，所述第一夾支腿將所述第一夾襯墊和所述第二夾襯墊連接在一起。
  4. 根據請求項3所述的半導體裝置，其中： 所述第一夾襯墊連接到所述電子構件的所述構件基底側； 所述第二夾襯墊包括所述第一夾面； 所述構件端口包括構件端子；且 所述構件端子包括所述構件端口面。
  5. 根據請求項4所述的半導體裝置，其中： 所述囊封物包括不同於所述囊封物面的第二囊封物面； 所述第一夾襯墊從所述第二囊封物面暴露；且 所述半導體裝置還包括： 板，所述板耦接到所述第一夾襯墊。
  6. 根據請求項3所述的半導體裝置，其中： 所述第一夾襯墊連接到所述電子構件的所述構件面側； 所述第一夾襯墊包括所述第一夾面； 所述構件端口包括構件端子和耦接到所述構件端子的構件互連件；且 所述構件互連件包括所述構件端口面。
  7. 根據請求項6所述的半導體裝置，還包括： 板，所述板連接到所述電子構件的所述構件基底側且連接到所述第二夾襯墊以將所述電子構件的所述構件基底側電耦接到所述夾結構。
  8. 根據請求項1所述的半導體裝置，其中： 所述夾結構包括： 夾橋，其連接到所述構件基底側； 第一夾襯墊； 第二夾襯墊； 第一夾支腿，所述第一夾支腿將所述第一夾襯墊連接到所述夾橋；以及 第二夾支腿，所述第二夾支腿將所述第二夾襯墊連接到所述夾橋； 所述第一夾襯墊包括所述第一夾面；且 所述第二夾襯墊包括從所述囊封物面暴露的第二夾面。
  9. 根據請求項1所述的半導體裝置，其中： 所述夾結構包括： 第一夾襯墊，所述第一夾襯墊耦接到所述電子構件； 第二夾襯墊； 第一夾支腿，所述第一夾支腿將所述第一夾和所述第二夾襯墊連接在一起； 第三夾襯墊，所述第三夾襯墊耦接到所述電子構件； 第四夾襯墊；以及 第二夾支腿，所述第二夾支腿將所述第三夾襯墊和所述第四夾襯墊連接在一起。
  10. 根據請求項9所述的半導體裝置，其中： 所述第一夾襯墊在所述電子構件的第一外圍邊緣處耦接到所述構件面側； 所述第三夾襯墊在所述電子構件的第二外圍邊緣處耦接到所述構件面側； 所述構件端口包括插入於所述第一夾襯墊與所述第三夾襯墊之間的構件互連件； 所述第一夾襯墊包括所述第一夾面； 所述第三夾襯墊包括從所述囊封物面暴露的第二夾面； 所述構件互連件包括所述構件端口面；且 所述囊封物插入於所述構件互連件、所述第一夾襯墊和所述第三夾襯墊之間。
  11. 根據請求項10所述的半導體裝置，還包括： 板，所述板耦接到所述電子構件的所述構件基底側、所述第二夾襯墊和所述第四夾襯墊。
  12. 根據請求項9所述的半導體裝置，其中： 所述第一夾襯墊在所述電子構件的第一外圍邊緣處耦接到所述構件基底側； 所述第三夾襯墊在所述電子構件的第二外圍邊緣處耦接到所述構件基底側； 所述構件端口包括構件端子； 所述第二夾襯墊包括所述第一夾面； 所述第四夾襯墊包括從所述囊封物面暴露的第二夾面； 所述構件端子包括所述構件端口面；且 所述囊封物插入於所述構件橫向側、所述第二夾襯墊和所述第四夾襯墊之間。
  13. 根據請求項1所述的裝置，還包括： 介電質層，所述介電質層在所述囊封物面上方，具有暴露所述第一夾面和所述構件端口面的開口；以及 外部互連件，所述外部互連件通過所述開口電耦接到所述夾結構和所述電子構件。
  14. 一種半導體裝置，其包括： 電子構件，所述電子構件包括： 構件面側； 構件基底側； 構件橫向側，所述構件橫向側將所述構件面側連接到所述構件基底側；以及 構件端口，所述構件端口鄰近於所述構件面側，其中所述構件端口包括構件端口面； 夾結構，所述夾結構包括： 第一夾襯墊； 第二夾襯墊； 第一夾支腿，所述第一夾支腿將所述第一夾襯墊連接到所述第二夾襯墊；以及 第一夾面； 以及 囊封物，所述囊封物覆蓋所述電子構件和所述夾結構； 其中： 所述囊封物包括囊封物面； 所述第一夾襯墊耦接到所述電子構件；且 所述構件端口面和所述第一夾面從所述囊封物面暴露。
  15. 根據請求項14所述的半導體裝置，其中： 所述第一夾襯墊耦接到所述電子構件的所述構件面側； 所述第一夾襯墊包括所述第一夾面； 所述構件端口包括構件端子和構件互連件； 所述構件互連件包括所述構件端口面； 所述構件端口面和所述第一夾面是共面的；且 所述半導體裝置還包括將所述電子構件的所述構件基底側耦接到所述第二夾襯墊的板。
  16. 根據請求項14所述的半導體裝置，其中： 所述第一夾襯墊耦接到所述電子構件的所述構件基底側； 所述第二夾襯墊包括所述第一夾面； 所述構件端口包括構件端子； 所述構件端子包括所述構件端口面；且 所述構件端口面和所述第一夾面是共面的。
  17. 根據請求項16所述的半導體裝置，還包括： 板，所述板耦接到所述第一夾襯墊。
  18. 一種形成半導體裝置的方法，其包括： 提供電子構件，所述電子構件包括： 構件面側； 構件基底側； 構件橫向側，所述構件橫向側將所述構件面側連接到所述構件基底側；以及 構件端口，所述構件端口鄰近於所述構件面側，其中所述構件端口包括構件端口面； 提供具有第一夾面的夾結構； 將所述夾結構耦接到所述電子構件；以及 提供囊封物，所述囊封物覆蓋所述電子構件和所述夾結構； 其中： 所述囊封物包括囊封物面；且 所述構件端口面和所述第一夾面從所述囊封物面暴露。
  19. 根據請求項18所述的方法，還包括： 提供板； 其中： 提供所述電子構件包括： 將所述電子構件的所述構件基底側連接到所述板；以及 提供所述構件端口，所述構件端口包括構件端子和構件互連件； 其中所述構件互連件包括所述構件端口面； 提供所述夾結構包括： 提供第一夾襯墊、第二夾襯墊和將所述第一夾襯墊連接到所述第二夾襯墊的第一夾支腿； 其中所述第一夾襯墊包括所述第一夾面； 耦接所述夾結構包括： 將所述第一夾襯墊連接到所述電子構件的所述構件面側；以及 將所述第二夾襯墊連接到所述板； 提供所述囊封物包括： 形成覆蓋所述板、所述電子構件、所述構件互連件和所述夾結構的所述囊封物；以及 移除所述囊封物的一部分以提供所述囊封物面；且 所述方法還包括： 提供耦接到所述構件端口面和所述第一夾面的外部互連件。
  20. 根據請求項18所述的方法，還包括： 提供載體； 其中： 提供所述電子構件包括： 將所述電子構件的所述構件面側連接到所述載體；以及 提供包括構件端子的所述構件端口； 其中所述構件端子包括所述構件端口面； 提供所述夾結構包括： 提供第一夾襯墊、第二夾襯墊和將所述第一夾襯墊連接到所述第二夾襯墊的第一夾支腿； 其中所述第二夾襯墊包括所述第一夾面； 耦接所述夾結構包括： 將所述第一夾襯墊連接到所述電子構件的所述構件基底側；以及 將所述第二夾襯墊連接到所述載體； 提供所述囊封物包括： 形成覆蓋所述載體、所述電子構件和所述夾結構的所述囊封物；且 所述方法還包括： 移除所述載體以提供所述囊封物面； 提供耦接到所述構件端口面和所述第一夾面的外部互連件；以及 提供耦接到所述第一夾襯墊的板。
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