TW202146672A - 半導體裝置用接合線 - Google Patents

半導體裝置用接合線 Download PDF

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Publication number
TW202146672A
TW202146672A TW110110358A TW110110358A TW202146672A TW 202146672 A TW202146672 A TW 202146672A TW 110110358 A TW110110358 A TW 110110358A TW 110110358 A TW110110358 A TW 110110358A TW 202146672 A TW202146672 A TW 202146672A
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Taiwan
Prior art keywords
wire
bonding wire
bonding
concentration
core material
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TW110110358A
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English (en)
Inventor
江藤基稀
小田大造
宇野智裕
小山田哲哉
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日商日鐵新材料股份有限公司
日商日鐵化學材料股份有限公司
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Publication of TW202146672A publication Critical patent/TW202146672A/zh

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    • C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22C—ALLOYS
    • C22C9/00—Alloys based on copper
    • C22C9/04—Alloys based on copper with zinc as the next major constituent
    • C—CHEMISTRY; METALLURGY
    • C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22C—ALLOYS
    • C22C9/00—Alloys based on copper
    • C—CHEMISTRY; METALLURGY
    • C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22C—ALLOYS
    • C22C9/00—Alloys based on copper
    • C22C9/06—Alloys based on copper with nickel or cobalt as the next major constituent
    • C—CHEMISTRY; METALLURGY
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    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10—Electroplating with more than one layer of the same or of different metals
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Abstract

本發明提供一種半導體裝置用接合線，其即便於常溫下應用於楔型接合亦呈現出良好之接合性，且接合可靠性亦屬優異。該接合線具有：包含Cu或Cu合金之芯材(以下，稱為「Cu芯材」)、及設置於該Cu芯材之表面的含有貴金屬之被覆，且該線之表面中之Cu濃度為30～80 at%。

Description

半導體裝置用接合線
本發明係關於一種半導體裝置用接合線。進而，本發明係關於使用該接合線之半導體裝置之製造方法及包含該接合線之半導體裝置。
於半導體裝置中，半導體元件上所形成之電極與引線框架或基板上之電極之間係藉由接合線連接。作為直徑未達100 μm之楔型接合用接合線，主要使用於常溫(25±10℃)下能夠進行接合之以鋁(Al)為主要材質之接合線(以下，亦僅稱為「Al線」)(例如專利文獻1)。
另一方面，關於半導體裝置之封裝(密封)技術，先前係利用金屬、玻璃及/或陶瓷進行氣密密封，但出於對成本及量產性之考量，現在正在使用一種使用熱固性環氧樹脂之樹脂密封。 [先前技術文獻] [專利文獻]
[專利文獻1]日本專利特表2016-511529號公報
[發明所欲解決之問題]
隨著半導體裝置之密封技術之變遷，與先前之氣密密封不同，接合線暴露於包含離子性雜質及水分之環境中。於此種環境中，Al線之腐蝕顯著進行，難以維持接合可靠性。又，由於Al線於其物性方面容易再結晶，熱膨脹率亦較大，因此難以應用於高溫用途。
作為球型接合用接合線，已知有經鈀(Pd)被覆之銅(Cu)線(例如日本專利特開2005-167020號公報)，但已確認於將該經Pd被覆之Cu線用於楔型接合之情形時，難以於常溫下進行接合。雖然可於接合時藉由加熱獲得足夠之接合強度，但加熱會引起氧化發生，或加熱、冷卻會導致於各構件產生熱應力，進而加熱亦需要時間，因此用途有限。
又，關於不具有被覆之裸Cu線，雖然於常溫下之楔型接合之接合初期呈現出足夠之接合強度，但是由於電極接合部中之腐蝕之進行而無法獲得良好之接合可靠性。
本發明之課題在於提供一種即便於常溫下應用於楔型接合亦呈現出良好之接合性，且接合可靠性亦屬優異之半導體裝置用接合線。 [解決問題之技術手段]
本發明者等人針對上述問題進行了銳意研究，結果發現可藉由具有下述構成之接合線來解決上述問題，進而基於該見解進一步進行了反覆研究，從而完成了本發明。 即，本發明包含以下內容。 [1]一種半導體裝置用接合線，其具有： 包含Cu或Cu合金之芯材(以下，稱為「Cu芯材」)、及 設置於該Cu芯材之表面的含有貴金屬之被覆(以下，稱為「貴金屬被覆」)，且 該線之表面中之Cu濃度為30～80 at%。 [2]如[1]所記載之接合線，其中表面中之Cu濃度係按照下述＜條件＞藉由歐傑電子能譜法(AES：Auger Electron Spectroscopy)進行測定， ＜條件＞以線之寬度之中心成為測定面之寬度之中心之方式進行定位，且測定面之寬度為線之直徑之10%以上15%以下，測定面之長度為測定面之寬度之5倍。 [3]如[1]或[2]所記載之接合線，其中貴金屬被覆包含Pd。 [4]如[3]所記載之接合線，其中貴金屬被覆進而包含Au。 [5]如[1]至[4]中任一項所記載之接合線，其中貴金屬被覆中之貴金屬之最大濃度為50 at%以上。 [6]如[4]或[5]所記載之接合線，其中貴金屬被覆中之顯示Au之最大濃度之位置較顯示Pd之最大濃度之位置更位於表面側。 [7]如[5]或[6]所記載之接合線，其中貴金屬被覆中之貴金屬之最大濃度係根據深度方向之濃度分佈而求出，該深度方向之濃度分佈係一面藉由Ar濺鍍沿深度方向自線之表面向下挖掘，一面按照下述＜條件＞藉由歐傑電子能譜法(AES)測定而獲得， ＜條件＞以線之寬度之中心成為測定面之寬度之中心之方式進行定位，且測定面之寬度為線之直徑之10%以上15%以下，測定面之長度為測定面之寬度之5倍。 [8]如[1]至[7]中任一項所記載之接合線，其中Cu芯材包含Cu及不可避免之雜質。 [9]如[1]至[8]中任一項所記載之接合線，其中貴金屬被覆包含貴金屬及不可避免之雜質。 [10]如[1]至[7]中任一項所記載之接合線，其包含選自由Ni、Zn、Rh、In、Ir及Pt所組成之群中之1種以上之元素(以下，稱為「第1添加元素」)，第1添加元素相對於線整體之濃度總計為0.1～1.5質量%。 [11]如[1]至[7]、[10]中任一項所記載之接合線，其包含選自由P、B、Be、Fe、Mg、Ti、Zn、Ag及Si所組成之群中之1種以上之元素(以下，稱為「第2添加元素」)，第2添加元素相對於線整體之濃度總計為0.1～200質量ppm。 [12]如[10]或[11]所記載之接合線，其中Cu芯材包含Cu、選自第1添加元素及第2添加元素之1種以上之元素、及不可避免之雜質。 [13]如[10]至[12]中任一項所記載之接合線，其中貴金屬被覆包含貴金屬、選自第1添加元素及第2添加元素之1種以上之元素、及不可避免之雜質。 [14]如[1]至[13]中任一項所記載之接合線，其中垂直於線軸之方向之Cu芯材剖面中之平均結晶粒徑為1.4～3.2 μm。 [15]如[1]至[14]中任一項所記載之接合線，其用於楔-楔接合。 [16]一種半導體裝置之製造方法，其包括利用如請求項1至15中任一項之接合線將半導體元件上之第1電極與引線框架或電路基板上之第2電極連接之步驟，且 藉由楔型接合而實施第1電極與接合線之第1連接及第2電極與接合線之第2連接之兩者。 [17]如[16]所記載之方法，其中第1連接與第2連接係於常溫下實施。 [18]一種半導體裝置，其包含[1]至[15]中任一項所記載之接合線。 [發明之效果]
根據本發明，能夠提供一種即便於常溫下應用於楔型接合亦呈現出良好之接合性，且接合可靠性亦屬優異之接合線。
以下，根據本發明之較佳之實施方式詳細說明本發明。
[半導體裝置用接合線] 本發明之半導體裝置用接合線之特徵在於，具有： 包含Cu或Cu合金之芯材(以下，亦稱為「Cu芯材」)、及 設置於該Cu芯材之表面的含有貴金屬之被覆(以下，亦稱為「貴金屬被覆」)，且 該線之表面中之Cu濃度為30～80 at%。
如上所述，作為球型接合用接合線，已知有經Pd被覆之Cu線，但已確認於將該經Pd被覆之Cu線用於楔型接合之情形時，難以於常溫下進行接合。用於球型接合之經Pd被覆之Cu線中，為了抑制球形成過程中之氧化，而於線表面具有高濃度之Pd被覆。另一方面，於使用Cu線之接合中，藉由Cu與電極金屬之擴散接合而實現足夠之接合強度。若於常溫(25±10℃)下將用於球型接合之經Pd被覆之Cu線用於楔型接合，則推測由於線之表面存在之高濃度之Pd被覆抑制了Cu與電極金屬之擴散接合，因此無法獲得足夠之接合。雖然可於接合時藉由加熱獲得足夠之接合強度，但加熱會引起氧化發生，或加熱、冷卻會導致於各構件產生熱應力，進而加熱亦需要時間，因此用途有限。亦可考慮應用Al線或不具有被覆之裸Cu線，但如上所述，該等線存在難以獲得良好之接合可靠性之問題。
本發明者等人在為了提供一種即便於常溫下應用於楔型接合亦呈現出良好之接合性，且接合可靠性亦屬優異之接合線而進行銳意研究之過程中，發現藉由提高具有貴金屬被覆之Cu線之表面之Cu濃度，即便於常溫下應用於楔型接合亦呈現出良好之接合性。不僅如此，亦發現即便於藉由樹脂密封製造半導體裝置之情形時，具有貴金屬被覆且表面之Cu濃度處於特定範圍內之Cu線亦能夠實現良好之接合可靠性。據推測，藉由具有貴金屬被覆，於接合界面存在貴金屬以一定濃度存在之區域，藉由該含有貴金屬之區域明顯地抑制了電極接合部中之腐蝕之進行。進而，即便應用於溫度隨著功率半導體裝置等裝置之作動週期顯著變化之用途中，由於Cu為主要材料，因此Al線所存在之由熱應力所導致之連接部界面及其附近之裂紋(黏結裂紋或跟部裂紋)之產生亦明顯得到抑制。如此，本發明明顯有助於實現亦以常溫接合為對象之楔型接合用途中之Cu系線之實用化，並且有助於實現廉價且高性能之半導體裝置。
就即便於常溫下應用於楔型接合亦能夠實現良好之接合性之觀點而言，於本發明之半導體裝置用接合線(以下，亦僅稱為「本發明之線」、「線」)中，表面中之Cu濃度之下限為30 at%以上，較佳為35 at%以上，更佳為40 at%以上，42 at%以上，44 at%以上或45 at%以上。本發明者等人已確認若表面中之Cu濃度處於該範圍內，則即便於應用於高溫用途之情形時亦能夠取得諸如可抑制電化學腐蝕之進行之優異之效果。
本發明者等人發現：尤其是若表面中之Cu濃度為45 at%以上，則於常溫下應用於楔型接合之情形時能夠實現格外優異之接合性。表面中之Cu濃度進而較佳為46 at%以上，48 at%以上，50 at%以上或超過50 at%。
就即便於藉由樹脂密封製造半導體裝置之情形時亦實現良好之接合可靠性之觀點而言，尤其是就即便於高溫高濕環境下亦實現良好之接合可靠性之觀點而言，表面中之Cu濃度之上限為80 at%以下，較佳為75 at%以下，更佳為70 at%以下，65 at%以下或60 at%以下。
於本發明中，表面中之Cu濃度可以線之表面為測定面，藉由歐傑電子能譜法(AES)測定而求得。詳細而言，藉由歐傑電子能譜法(AES)進行線之表面之組成分析。此處，於求出表面中之Cu濃度時，不考慮碳(C)、硫(S)、氧(O)、氮(N)等氣體成分及非金屬元素等。
於藉由歐傑電子能譜法(AES)進行線之表面之組成分析時，測定面之位置及尺寸係以如下方式決定。再者，以下，測定面之寬度係指垂直於線軸之方向(線之厚度方向)之測定面之尺寸，測定面之長度係指線軸之方向(線之長度方向)之測定面之尺寸。
首先，將供於測定之線以直線狀固定於試樣架。繼而，以使垂直於線軸之方向之線之寬度之中心成為測定面之寬度之中心之方式定位，並且以測定面之寬度成為線之直徑之10%以上15%以下之方式決定測定面。測定面之長度係以成為測定面之寬度之5倍之方式設定。藉由以如上方式決定測定面之位置及尺寸，可精確地測定表面中之Cu濃度，該Cu濃度係對於即便於常溫下應用於楔型接合亦實現良好之接合性而言所必需。又，較佳為對於線軸方向上相互間隔1 mm以上之複數個位置(n≧3)之測定面實施測定，並採用其平均值。
上述表面中之Cu濃度係基於按照後述[利用歐傑電子能譜法(AES)進行之線之表面之組成分析]欄所記載之條件進行測定而獲得之結果。
-Cu芯材- 本發明之線包括包含Cu或Cu合金之芯材，即Cu芯材。
Cu芯材並無特別限定，只要包含Cu或Cu合金即可，可使用構成作為球型接合用接合線而被熟知之先前之經Pd被覆之Cu線的公知之Cu芯材。
Cu芯材例如亦可含有選自後述第1添加元素及第2添加元素之1種以上之摻雜劑。該等摻雜劑之較佳之含量如後所述。
於較佳之一實施方式中，Cu芯材包含Cu及不可避免之雜質。於其他較佳之一實施方式中，Cu芯材包含Cu、後述選自第1添加元素及第2添加元素之1種以上之元素、及不可避免之雜質。再者，關於Cu芯材所使用之用語「不可避免之雜質」中亦包含構成後述貴金屬被覆之元素。
Cu於包含於其他金屬中之情形時，具有於高溫下容易擴散之性質。於製造具有Cu芯材、及設置於該Cu芯材之表面之貴金屬被覆之本發明之線時，若對其進行熱處理，則Cu芯材中之Cu可於貴金屬被覆中擴散，到達線之表面。本發明之線之特徵在於表面中之Cu濃度處於特定範圍內，但線之表面之Cu亦可為藉由該擴散而到達表面之Cu。於本發明之線中，表面之Cu之狀態並無特別限定，可一部分發生氧化，或者一部分固溶於貴金屬被覆中之貴金屬中。
於本發明之線中，就即便將本發明之線於常溫下應用於楔型接合之情形時(進而，即便於減少了接合時之負載或超音波條件之情形時)亦能夠實現格外良好之接合性之觀點而言，垂直於線軸之方向之Cu芯材剖面(Cu芯材C剖面)中之平均結晶粒徑較佳為1.4 μm以上，更佳為1.5 μm以上，1.6 μm以上，1.8 μm以上或2 μm以上。就實現良好之線弧形狀穩定性之觀點而言，該平均結晶粒徑之上限較佳為3.2 μm以下，更佳為3.1 μm以下或3 μm以下。因此，於較佳之一實施方式中，Cu芯材C剖面中之平均結晶粒徑為1.4～3.2 μm。平均結晶粒徑係使用背向散射電子繞射(EBSD：Electron Back Scatter Diffraction)法等測定方法求出各結晶粒之面積，設為將各結晶粒之面積視為圓時之直徑之平均值。Cu芯材C剖面之平均結晶粒徑可藉由後述[Cu芯材C剖面之平均結晶粒徑之測定]所記載之方法進行測定。
-貴金屬被覆- 本發明之線包含設置於Cu芯材之表面之含有貴金屬之被覆，即貴金屬被覆。
貴金屬被覆中所含有之貴金屬並無特別限定，只要不損害本發明之效果即可，就即便於藉由樹脂密封製造半導體裝置之情形時亦能夠實現格外良好之接合可靠性之觀點而言，較佳為包含鈀(Pd)或金(Au)。更佳為鈀(Pd)。
於將貴金屬被覆所包含之貴金屬之合計設為100質量%時，Pd之含量較佳為50質量%以上，更佳為60質量%以上，70質量%以上，80質量%以上或90質量%以上。該含量之上限並無特別限定，可為100質量%，例如可為99質量%以下、98質量%以下、97質量%以下等。
貴金屬被覆例如可進而含有選自後述第1添加元素及第2添加元素之1種以上之摻雜劑。該等摻雜劑之較佳之含量如後所述。
於較佳之一實施方式中，貴金屬被覆包含貴金屬及不可避免之雜質。於其他較佳之一實施方式中，貴金屬被覆包含貴金屬、選自後述第1添加元素及第2添加元素之1種以上之元素、及不可避免之雜質。再者，關於貴金屬被覆所使用之用語「不可避免之雜質」中亦包含構成Cu芯材之元素。
就即便於藉由樹脂密封製造半導體裝置之情形時亦能夠實現良好之接合可靠性之觀點而言，尤其是就即便於高溫高濕環境下亦能夠實現良好之接合可靠性之觀點而言，貴金屬被覆中之貴金屬之最大濃度較佳為50 at%以上。就即便於高溫高濕環境下亦能夠實現格外良好之接合可靠性之觀點而言，該最大濃度更佳為60 at%以上，70 at%以上，75 at%以上或80 at%以上。該最大濃度之上限並無特別限定，可為100 at%，例如可為99.5 at%以下、99 at%以下、98 at%以下等。其中，若貴金屬被覆滿足該最大濃度之較佳之條件，並且其厚度(算出方法見後述)為20 nm以上，則即便於高溫高濕環境下亦能夠實現格外優異之接合可靠性，因此較佳。貴金屬被覆之厚度更佳為25 nm以上，進而較佳為30 nm以上，35 nm以上，40 nm以上，45 nm以上或50 nm以上。貴金屬被覆之厚度之上限並無特別限定，較佳為0.5 μm以下，更佳為0.4 μm以下，0.3 μm以下，0.2 μm以下，0.15 μm以下或0.1 μm以下。
於本發明中，貴金屬被覆中之貴金屬之最大濃度可以如下方式求出，即，一面藉由Ar濺鍍沿深度方向自線之表面向下挖掘，一面藉由歐傑電子能譜法(AES)進行組成分析。詳細而言，可藉由重複1)利用Ar進行之濺鍍處理、及2)濺鍍處理後之表面組成分析以獲得深度方向之濃度分佈，並根據該濃度分佈求出。
2)濺鍍處理後之表面組成分析可於與求出表面中之Cu濃度時利用歐傑電子能譜法(AES)進行之組成分析相同之條件下實施。即，於藉由歐傑電子能譜法(AES)對濺鍍處理後之表面進行組成分析時，測定面之位置及尺寸以如下方式決定。
以使垂直於線軸之方向之線之寬度之中心成為測定面之寬度之中心之方式定位，並且以測定面之寬度成為線之直徑之10%以上15%以下之方式決定測定面。測定面之長度係以成為測定面之寬度之5倍之方式設定。藉由以如上方式決定測定面之位置及尺寸，可精確地測定貴金屬被覆中之貴金屬之最大濃度，該濃度對於即便於藉由樹脂密封製造半導體裝置之情形時亦實現良好之接合可靠性而言較適宜。又，較佳為對於線軸方向上相互間隔1 mm以上之複數個位置(n≧3)之測定面實施測定，並採用其平均值。
以下對所求出之一實施方式之本發明之線之深度方向的濃度分佈之傾向進行說明。自線之表面至一定深度之位置，有Cu濃度下降且貴金屬之濃度上升之傾向。進而若深度更深，則有以某一深度位置(d)為分界，貴金屬之濃度下降且Cu濃度上升之傾向。於此種濃度分佈中，著眼於貴金屬之濃度之增減，可自貴金屬之濃度達到最大之位置(於上述實施方式中，為深度位置d)求出貴金屬之最大濃度。於貴金屬被覆包含複數種貴金屬之情形時，於求出「貴金屬之最大濃度」時，著眼於該等複數種貴金屬之合計濃度之增減即可。例如於貴金屬被覆單獨包含Pd之情形時，著眼於Pd之濃度之增減即可，於貴金屬被覆包含Pd與Au之組合之情形時，著眼於Pd與Au之合計濃度之增減即可。
上述貴金屬被覆中之貴金屬之最大濃度之較佳範圍係基於按照後述[利用歐傑電子能譜法(AES)獲得深度方向之濃度分佈]欄所記載之條件進行測定而獲得之結果。
於本發明之線中，貴金屬被覆除Pd以外亦可包含金(Au)。藉由使貴金屬被覆除Pd以外進而包含Au，可實現於常溫下應用於楔型接合時呈現出格外良好之接合性，並且接合可靠性亦格外優異之接合線。
於貴金屬被覆包含Au之情形時，於將貴金屬被覆中所包含之貴金屬之合計設為100質量%時，Au之含量較佳為0.5質量%以上，更佳為1質量%以上，1.5質量%以上或2質量%以上。就避免成本過度增加之觀點而言，該含量之上限例如可為10質量%以下、7質量%以下、5質量%以下、或3質量%以下等。
於貴金屬被覆除Pd以外進而包含Au之情形時，就能夠進一步享有本發明之效果之觀點而言，較佳為貴金屬被覆中之顯示Au之最大濃度之位置較顯示Pd之最大濃度之位置更位於表面側。於此情形時，於上述所獲得之深度方向之濃度分佈中，分別獨立地著眼於Au之濃度之增減與Pd之濃度之增減即可。
於本發明之線中，Cu芯材與貴金屬被覆之邊界係以貴金屬之合計濃度為基準而判定。以貴金屬之合計濃度為20 at%之位置為邊界，將貴金屬之合計濃度為20 at%以上之區域判定為貴金屬被覆，將未達20 at%之區域判定為Cu芯材。再者，即便貴金屬之合計濃度未達20 at%，亦將基於上述判定而較貴金屬被覆更存在於線之表面側之相(層)判定為貴金屬被覆。
貴金屬被覆之厚度係以如下方式求出，即，於藉由歐傑電子能譜法(AES)獲得之深度方向之濃度分佈中，自線軸向線之表面確認濃度分佈，作為自貴金屬之合計濃度首次達到20 at%之深度位置至線之表面位置之距離而求出。上述貴金屬被覆之厚度係基於如下結果，即，基於藉由歐傑電子能譜法(AES)獲得之深度方向之濃度分佈，將深度之單位換算為SiO2 而獲得之結果。
本發明之線可進而含有選自由Ni、Zn、Rh、In、Ir及Pt所組成之群中之1種以上之元素(「第1添加元素」)。第1添加元素相對於線整體之濃度總計較佳為0.1質量%以上。藉此，能夠實現即便應用於高溫用途之情形時亦可進一步抑制電化學腐蝕之進行，並且接合可靠性格外優異之接合線。第1添加元素相對於線整體之濃度總計更佳為0.3質量%以上，進而較佳為0.5質量%以上。就抑制線之硬質化而於常溫下應用於楔型接合之情形時容易地實現良好之接合性之觀點而言，第1添加元素之總計濃度之上限較佳為1.5質量%以下，更佳為1.4質量%以下，1.3質量%以下或1.2質量%以下。因此，於較佳之一實施方式中，本發明之線包含第1添加元素，第1添加元素相對於線整體之濃度總計為0.1～1.5質量%。或者，又，關於第1添加元素，Ni相對於線整體之濃度可未達0.1質量%，例如可為0.09質量%以下、0.08質量%以下等。
本發明之線可進而含有選自由P、B、Be、Fe、Mg、Ti、Zn、Ag、Si所組成之群中之1種以上之元素(以下，亦稱為「第2添加元素」)。第2添加元素相對於線整體之濃度總計較佳為0.1質量ppm以上。藉此，能夠實現線弧形狀穩定性更優異之線。第2添加元素相對於線整體之濃度總計更佳為1質量ppm以上，進而較佳為2質量ppm以上，3質量ppm以上，5質量ppm以上，8質量ppm以上，10質量ppm以上，20質量ppm以上，30質量ppm以上或40質量%以上，進而更佳為50質量ppm以上或55質量ppm以上。就抑制線之硬質化而於常溫下應用於楔型接合之情形時容易地實現良好之接合性之觀點而言，第2添加元素之總計濃度之上限較佳為200質量ppm以下，進而較佳為190質量ppm以下，180質量ppm以下，170質量ppm以下，160質量ppm以下或150質量ppm以下。
線中之第1添加元素或第2添加元素之含量可藉由後述[元素含量之測定]所記載之方法進行測定。
本發明之線之直徑並無特別限定，可根據具體之目的適當調整，較佳可為15 μm以上、18 μm以上或20 μm以上等。該直徑之上限並無特別限定，例如可為200 μm以下、150 μm以下或100 μm以下等。
＜線之製造方法＞ 對本發明之半導體裝置用接合線之製造方法之一例進行說明。
首先，藉由連續鑄造將高純度(4N～6N；99.99～99.9999質量%以上)之原料銅加工成大直徑(直徑約3～6 mm)，獲得錠。
於添加上述第1添加元素或第2添加元素等摻雜劑之情形時，作為其添加方法，例如可列舉：使其包含於Cu芯材中之方法、使其包含於貴金屬被覆中之方法、使其覆著於Cu芯材之表面之方法、及使其覆著於貴金屬被覆之表面之方法，亦可將複數種該等方法加以組合。無論採用哪種添加方法，均能發揮本發明之效果。於使摻雜劑包含於Cu芯材中之方法中，可使用含有所需之濃度之摻雜劑之銅合金作為原料製造Cu芯材。於將摻雜劑添加至作為原材料之Cu而獲得該銅合金之情形時，可將高純度之摻雜劑成分直接添加至Cu中，亦可利用含有1%左右之摻雜劑成分之母合金。於使摻雜劑包含於貴金屬被覆中之方法中，可於形成貴金屬被覆時，使摻雜劑包含於貴金屬鍍浴(濕式鍍覆之情形)或靶材(乾式鍍覆之情形)中。於使摻雜劑覆著於Cu芯材之表面之方法及使摻雜劑覆著於貴金屬被覆之表面之方法中，可將Cu芯材之表面或貴金屬被覆之表面作為覆著面，實施選自(1)水溶液之塗佈⇒乾燥⇒熱處理、(2)鍍覆法(濕式)、(3)蒸鍍法(乾式)之1種以上之覆著處理。
對大直徑之錠進行鍛造、壓延、拉線而製作直徑約為0.9～1.2 mm之包含Cu或Cu合金之線(以下，亦稱為「中間線」)。
作為於Cu芯材之表面形成貴金屬被覆之方法，可利用電鍍、無電解鍍覆、蒸鍍法等，但於工業上較佳為利用可穩定地控制膜厚之電鍍。例如於形成包含Pd與Au之組合之貴金屬被覆之情形時，可於中間線之表面形成Pd被覆後，於該Pd被覆之表面形成Au被覆。又，亦可於大直徑之錠之階段覆著Pd被覆、Au被覆，或者可對中間線進行拉線，進而使其變細後(例如，於拉至最終之Cu芯材之直徑後)，於該Cu芯材表面形成Pd被覆、Au被覆。
拉線加工可使用能夠安裝複數個經金剛石塗覆之模具之連續拉線裝置而實施。視需要，亦可於拉線加工之中途階段實施熱處理。亦可藉由熱處理使Pd與Au彼此擴散，形成包含Au與Pd之合金之貴金屬被覆。作為其方法，較佳為於電爐中於一定之爐內溫度下，以一定之速度連續掃線從而促進合金化之方法，原因在於該方法能夠確實地控制合金之組成及厚度。
於拉線加工後，進行表面改質熱處理。關於表面改質熱處理，就容易地實現表面中之Cu濃度處於特定範圍內之接合線之觀點而言，較佳為於高溫下長時間實施。雖然表面改質熱處理之溫度取決於貴金屬被覆之厚度及所需之表面Cu濃度等，但於將銅之熔點設為Tm(K)時，較佳為於0.6 Tm～0.8 Tm之範圍內決定。由於銅之熔點Tm為1358 K(＝1085℃)，因此表面改質熱處理之溫度較佳為540℃～820℃之範圍。又，表面改質熱處理之時間較佳為5秒以上，更佳為7秒以上或10秒以上。該熱處理時間之上限例如可為20秒以下。
作為表面改質熱處理之氛圍氣體，較佳為含有氫之惰性氣體，例如可列舉含有氫之氦氣、含有氫之氮氣、含有氫之氬氣。含有氫之惰性氣體中之氫之濃度例如可設為1～20%之範圍。於較佳之一實施方式中，表面改質熱處理之氛圍氣體為組成氣體(5%H2 -N2 )。或者，又，於嚴格管理熱處理時之溫度、時間之情況下，亦可使用氮氣、氬氣等惰性氣體作為氛圍氣體。
本發明之線可於半導體裝置之製造中用於連接半導體元件上之第1電極與引線框架或電路基板上之第2電極。與半導體元件上之第1電極之第1連接(第1接合)及與引線框架或電路基板上之第2電極之第2連接(第2接合)均可為楔型接合。具有貴金屬被覆且表面之Cu濃度處於特定範圍內之本發明之線即便於常溫下進行楔型接合之情形時亦能夠實現良好之接合性。因此，本發明之線適宜用於楔型接合(具體而言，用於楔-楔接合)，亦適宜用於常溫楔型接合(具體而言，用於常溫楔-楔接合)。
[半導體裝置之製造方法] 可藉由使用本發明之半導體裝置用接合線連接半導體元件上之電極與引線框架或電路基板上之電極以製造半導體裝置。
於一實施方式中，本發明之半導體裝置之製造方法(以下，亦僅稱為「本發明之方法」)之特徵在於：包含藉由本發明之線連接半導體元件上之第1電極與引線框架或電路基板上之第2電極之步驟，且藉由楔型接合而實施第1電極與本發明之線之第1連接及第2電極與本發明之線之第2連接之兩者。
於楔型接合中，藉由施加超音波、壓力而將線部壓合於電極上而不形成球型。具有貴金屬被覆且表面之Cu濃度處於特定範圍內之本發明之線即便於常溫下進行楔型接合亦能夠實現良好之接合性。因此，於較佳之一實施方式中，本發明之方法中，於常溫下實施第1連接與第2連接。
具有貴金屬被覆且表面之Cu濃度處於特定範圍內之本發明之線即便於藉由樹脂密封製造半導體裝置之情形時亦能夠實現良好之接合可靠性。因此，於較佳之一實施方式中，本發明之方法進而包含於楔型接合後進行樹脂密封之步驟。作為用於樹脂密封之樹脂，可使用於製造半導體裝置時可用於樹脂密封之公知之熱固性樹脂組合物(例如環氧樹脂組合物)。藉由使用本發明之線，無論熱固性樹脂組合物之規格如何，均可有利地實現良好之接合可靠性。
[半導體裝置] 可藉由使用本發明之半導體裝置用接合線連接半導體元件上之電極及引線框架或電路基板上之電極以製造半導體裝置。
於一實施方式中，本發明之半導體裝置之特徵在於：包含電路基板、半導體元件、及用於使電路基板與半導體元件導通之接合線，且該接合線為本發明之線。
於本發明之半導體裝置中，電路基板及半導體元件並無特別限定，可使用可用於構成半導體裝置之公知之電路基板及半導體元件。或者，又，亦可使用引線框架代替電路基板。例如，如日本專利特開2002-246542號公報所記載之半導體裝置般，可採用包含引線框架及安裝於該引線框架之半導體元件之半導體裝置之構成。
作為半導體裝置，可列舉供於電氣製品(例如電腦、行動電話、數位相機、電視、空調、太陽光發電系統等)及交通工具(例如機車、汽車、電車、船舶及飛機等)等之各種半導體裝置。 [實施例]
以下，示出實施例對本發明進行具體說明。但是，本發明並不限於以下所示之實施例。
(樣品) 首先，對樣品之製作方法進行說明。使用純度為99.99質量%以上(4N)且剩餘部分由不可避免之雜質構成之Cu作為Cu芯材之原材料。又，於添加第1添加元素或第2添加元素時，使用純度為99質量%以上且剩餘部分由不可避免之雜質構成者，或使用於Cu中調配有高濃度之該等添加元素之母合金。
芯材之Cu合金係藉由如下方式製造而成，即，將原料裝入碳坩堝中，使用高頻爐於真空中或者N2 或Ar氣體等惰性氛圍中加熱至1090～1500℃，待其熔解後，藉由連續鑄造加工成大直徑，繼而藉由拉線加工使其變細直至加工成最終線徑。對所獲得之ϕ3～6 mm之銅或銅合金之芯材進行拉拔加工，將其加工成ϕ0.9～1.2 mm後，使用模具連續地進行拉線加工等，從而進一步縮小線之直徑。於進行拉線加工時，使用市售之潤滑液，拉線速度設為20～150 m/分。為了去除線之表面之氧化膜，利用鹽酸進行酸洗處理後，以覆蓋芯材之Cu合金之整個表面之方式形成Pd被覆。進而，一部分線(實施例No.1～6、9～14、17～28，比較例No.1～4)於Pd被覆上形成有Au被覆。使用電解電鍍法形成Pd被覆、Au被覆。使用市售之鍍覆液作為Pd鍍覆液及Au鍍覆液。
然後，進一步進行拉線加工等，直至加工成最終線徑ϕ35 μm。視需要，於拉線加工之中途，於300～700℃下進行2～15秒之熱處理0～2次。於加工成最終線徑後，進行表面改質熱處理。表面改質熱處理之熱處理溫度設為500～750℃，線之進給速度設為30～100 m/分，熱處理時間設為2～15秒。中間熱處理及表面改質熱處理之熱處理方法係藉由一面連續掃線一面使Ar氣體流動之方式進行。
(試驗及評估方法) 以下，對試驗及評估方法進行說明。
[利用歐傑電子能譜法(AES)進行之線之表面之組成分析] 線之表面中之Cu濃度係以線之表面為測定面，藉由歐傑電子能譜法(AES)以如下方式測定而求得。 首先，將供於測定之接合線以直線狀固定於試樣架。繼而，以使垂直於線之長軸之方向的線之寬度之中心成為測定面之寬度之中心之方式定位，並且以測定面之寬度為線之直徑之10%以上15%以下之方式決定測定面。測定面之長度係設為測定面之寬度之5倍。然後，使用AES裝置(ULVAC-PHI製造之PHI-700)，於加速電壓10 kV之條件下進行線之表面之組成分析，求出表面Cu濃度(at%)。 再者，利用AES對於線之長度方向上相互間隔1 mm以上之3處測定面進行組成分析，採用其平均值。於求出表面中之Cu濃度時，不考慮碳(C)、硫(S)、氧(O)、氮(N)等氣體成分及非金屬元素等。
[利用歐傑電子能譜法(AES)獲得深度方向之濃度分佈] 線之深度方向之濃度分佈係藉由如下方式求出，即，於利用AES進行線之表面之組成分析後，一面藉由Ar濺鍍沿深度方向自線之表面向下挖掘，一面藉由AES進行組成分析。 具體而言，於利用AES進行線之表面之組成分析後，藉由重複1)利用Ar進行之濺鍍處理、及2)濺鍍處理後之表面組成分析以獲得深度方向之濃度分佈。1)之濺鍍處理係於Ar＋ 離子，加速電壓1 kV下進行。又，於2)之表面組成分析中，測定面之尺寸及利用AES進行之組成分析之條件與上述[利用歐傑電子能譜法(AES)進行之線之表面之組成分析]欄所說明者相同。 再者，對於線之長度方向上相互間隔1 mm以上之3處測定面進行測定以獲得深度方向之濃度分佈。
-貴金屬被覆中之貴金屬之最大濃度- 於所獲得之深度方向之濃度分佈中，著眼於貴金屬之濃度之增減，自貴金屬之濃度達到最大之位置求出貴金屬之最大濃度。採用藉由對3處測定面進行測定所獲得之數值之平均值作為貴金屬之最大濃度。 再者，關於貴金屬被覆包含Pd與Au之實施例及比較例之線，已確認顯示Au之最大濃度之位置較顯示Pd之最大濃度之位置更位於表面側。
-貴金屬被覆之厚度- 於所獲得之深度方向之濃度分佈中，自線軸向線之表面確認濃度分佈，作為自貴金屬之合計濃度首次達到20 at%之深度位置至線之表面位置之距離而求出貴金屬被覆之厚度。採用藉由對3處測定面進行測定所獲得之數值之平均值作為貴金屬被覆之厚度。 再者，貴金屬被覆之厚度係基於深度方向之濃度分佈，將深度之單位換算為SiO2 而求出。
[元素含量之測定] 線中之第1添加元素、第2添加元素之含量係使用ICP(Inductively Coupled Plasma，感應耦合電漿)發光分光分析裝置、ICP質量分析裝置，作為線整體中所包含之元素之濃度進行分析。作為分析裝置，使用ICP-OES(Hitachi High-Tech Science(股)製造之「PS3520UVDDII」)或ICP-MS(安捷倫科技(股)製造之「Agilent 7700x ICP-MS」)。
[Cu芯材C剖面之平均結晶粒徑之測定] Cu芯材C剖面之平均結晶粒徑之測定係使用背向散射電子繞射(EBSD：Electron Back scatter Diffraction)法(測定裝置：牛津儀器股份有限公司製造之EBSD分析系統「AZtec HKL」)進行測定。詳細而言，針對Cu芯材C剖面之整體，求出各結晶粒之面積，將各結晶粒之面積換算成圓之面積，算出其直徑之平均值，採用其作為平均結晶粒徑。再者，各結晶粒之面積係藉由將相鄰測定點間之方位差為15度以上之位置定義為晶界而求出。
[常溫楔型接合性] 對於矽基板上使厚度為3.0 μm且含有0.5質量%之Al之Cu合金成膜而設置之電極，於常溫(25℃)下進行楔型接合。針對隨機選擇之20處接合部，藉由剪切試驗測定接合強度，採用其平均值作為楔型接合部之接合強度。然後，根據以下基準進行評估。
評估基準： ◎：100 gf以上 ○：75 gf以上且未達100 gf △：50 gf以上且未達75 gf ×：未達50 gf
[接合可靠性] 接合可靠性係藉由高溫高濕試驗(HAST；Highly Accelerated Temperature and Humidity Stress Test)及高溫存儲試驗(HTSL：High Temperature Storage Life Test)進行評估。
-HAST- 利用市售之熱固性環氧樹脂對樣品進行密封，該樣品係於常溫下對於矽基板上使厚度為3.0 μm且含有0.5質量%之Al之Cu合金成膜而設置之電極進行楔型接合所得，以製作用於接合可靠性試驗之樣品。使用不飽和型壓力鍋試驗機，將所製作之用於接合可靠性評估之樣品暴露於溫度130℃、相對濕度85%之高溫高濕環境中，施加7 V之偏壓。每48小時進行一次楔型接合部之剪切試驗，剪切強度之值變成初期所獲得之剪切強度之1/2之時間即為楔型接合部之接合壽命。使用隨機選擇之楔型接合部之50處之測定值之平均值作為剪切強度之值。剪切試驗係於藉由酸處理去除樹脂，使楔型接合部露出之後進行。然後，根據以下基準進行評估。
評估基準： ◎：接合壽命為384小時以上 ○：接合壽命為240小時以上且未達384小時 ×：接合壽命未達240小時
-HTSL- 使用高溫恆溫機將藉由以與上述相同之順序製作之用於接合可靠性評估之樣品暴露於溫度175℃之環境中。每500小時進行一次楔型接合部之拉力試驗，拉力強度之值變成初期所獲得之拉力強度之1/2時間即為楔型接合部之接合壽命。使用隨機選擇之楔型接合部之50處之測定值之平均值作為拉力強度之值。高溫存儲試驗後之拉力試驗係於藉由酸處理去除樹脂，使楔型接合部露出之後進行。然後，根據以下基準進行評估。
評估基準： ◎：接合壽命為2000小時以上 ○：接合壽命為1000小時以上且未達2000小時 ×：接合壽命未達1000小時
[線弧形狀穩定性] 線弧形狀穩定性(線弧輪廓之再現性)係以線弧長度為2 mm，線弧高度為300 μm之方式將梯形線弧100條連接，根據最大線弧高度之標凖偏差進行評估。使用光學顯微鏡進行高度測定，並根據以下基準進行評估。
評估基準： ◎：3σ未達20 μm ○：3σ為20 μm以上且未達25 μm ×：3σ為25 μm以上
將實施例及比較例之評估結果示於表1。
[表1]
(表1)  
   No. 表面Cu濃度 第1添加元素 (質量%) 第2添加元素 (質量ppm) 貴金屬被覆 Cu芯材    常溫楔型接合性 接合可靠性 線弧形狀穩定性
貴金屬最大濃度 厚度 結晶粒徑 HAST 130℃/85%RH/7V HTSL 175℃
at% Ni Zn Rh In Ir Pt P B Be Fe Mg Ti Zn Ag Si at% nm μm
實施例 1 53                   1                         78 65 2 ◎ 〇 〇 〇
2 51 0.5                   30                      73 67 2.2 ◎ 〇 ◎ 〇
3 57    0.3                   50                   67 73 2.5 ◎ 〇 〇 ◎
4 55       0.5                   100                79 66 2 ◎ 〇 ◎ ◎
5 53          1                   3             66 78 2.6 ◎ 〇 ◎ 〇
6 60             1.4                   75          65 79 2.6 ◎ 〇 ◎ ◎
7 52                0.2                   62       73 69 2.1 ◎ 〇 〇 ◎
8 55 0.8                                     150    68 74 2.5 ◎ 〇 ◎ ◎
9 32                                        25    90 51 1.5 〇 ◎ 〇 〇
10 47                0.8 55                         80 69 2.6 ◎ ◎ ◎ ◎
11 38    1.1                0.5                      81 65 2.2 〇 ◎ ◎ 〇
12 37       0.6                12                   83 64 2.3 〇 ◎ ◎ 〇
13 41          0.2                21                82 60 2.4 〇 ◎ 〇 〇
14 45             0.8                75             81 58 2.5 ◎ ◎ ◎ ◎
15 34                0.9                28          91 52 1.5 〇 ◎ ◎ 〇
16 35                                           15 90 53 1.6 〇 ◎ 〇 〇
17 78 0.6                150                         51 92 3.1 ◎ 〇 ◎ ◎
18 72    0.8                21                      65 85 2.8 ◎ 〇 ◎ 〇
19 79       1.4                50                   61 81 2.7 ◎ 〇 ◎ ◎
20 69          1.1                33                54 79 2.6 ◎ 〇 ◎ 〇
21 68             0.6                46             57 80 2.8 ◎ 〇 ◎ 〇
22 66                0.3                24          59 81 2.9 ◎ 〇 〇 〇
23 72 1.2                                  3       60 82 3 ◎ 〇 ◎ 〇
24 75                                           5 53 90 3.1 ◎ 〇 〇 〇
[表2]
(表2)
   No. 表面Cu濃度 第1添加元素 (質量%) 第2添加元素 (質量ppm) 貴金屬被覆 Cu芯材 常溫楔型接合性 接合可靠性 線弧形狀穩定性
貴金屬最大濃度 厚度 結晶粒徑 HAST 130℃/85%RH/7V HTSL 175℃
at% Ni Zn Rh In Ir Pt P B Be Fe Mg Ti Zn Ag Si at% nm μm
實施例 25 52                                              79 66 2.1 ◎ 〇 〇 〇
26 51                                              73 68 2.1 ◎ 〇 〇 〇
27 39                                              80 69 2.6 〇 ◎ 〇 〇
28 45                                              81 69 2.5 ◎ ◎ 〇 〇
29 71                                              66 80 2.9 ◎ 〇 〇 〇
30 78                                              52 82 3 ◎ 〇 〇 〇
31 60       0.2    0.2                               67 70 2.6 ◎ 〇 ◎ 〇
32 79    0.7    0.5                                  88 53 2.2 ◎ 〇 ◎ 〇
33 75                   150       20                53 90 2.4 〇 〇 〇 ◎
34 49                   210                         84 52 2.1 △ ◎ 〇 ◎
35 77    1.2                150       60             52 90 2.7 △ 〇 ◎ ◎
36 60                0.08                            66 70 2.4 ◎ 〇 〇 〇
37 63       1.6             30                      65 77 2.3 △ 〇 ◎ ◎
比較例 1 12                                              96 43 1.4 × ◎ × 〇
2 28                                              95 44 1.3 × ◎ × 〇
3 82                                              40 101 3.3 ◎ × 〇 ×
4 85                                              38 99 3.2 ◎ × 〇 ×
已確認：實施例No.1～37均具有設置於Cu芯材之表面之貴金屬被覆，表面中之Cu濃度處於本發明之範圍內，於常溫下之楔型接合中呈現出良好之接合性，且接合可靠性亦屬優異。 另外，已確認：總計含有0.1質量%以上之第1添加元素之實施例No.2～8、10～15、17～23、31、32、35及37(尤其是第1添加元素之含量為0.5質量%以上之實施例No.2、4～6、8、10～12、14、15、17～21、23、31、32、35及37)可進一步抑制高溫環境中之電化學腐蝕之進行，接合可靠性(HTSL)格外優異。 已確認：總計含有0.1質量ppm以上之第2添加元素之實施例No.1～24、33～35及37(尤其是第2添加元素之含量為50質量ppm以上之實施例No.3、4、6～8、10、14、17、19、33～35及37)實現了格外優異之線弧形狀穩定性。 另一方面，已確認：雖然比較例No.1～4具有設置於Cu芯材之表面之貴金屬被覆，但是表面中之Cu濃度處於本發明之範圍外，於常溫下應用於楔型接合時產生接合不良，或接合可靠性亦不良。

Claims (18)

  1. 一種半導體裝置用接合線，其具有： 包含Cu或Cu合金之芯材(以下，稱為「Cu芯材」)、及 設置於該Cu芯材之表面的含有貴金屬之被覆(以下，稱為「貴金屬被覆」)，且 該線之表面中之Cu濃度為30～80 at%。
  2. 如請求項1之接合線，其中表面中之Cu濃度係按照下述＜條件＞藉由歐傑電子能譜法(AES：Auger Electron Spectroscopy)進行測定， ＜條件＞以線之寬度之中心成為測定面之寬度之中心之方式進行定位，且測定面之寬度為線之直徑之10%以上15%以下，測定面之長度為測定面之寬度之5倍。
  3. 如請求項1之接合線，其中貴金屬被覆包含Pd。
  4. 如請求項3之接合線，其中貴金屬被覆進而包含Au。
  5. 如請求項1之接合線，其中貴金屬被覆中之貴金屬之最大濃度為50 at%以上。
  6. 如請求項4之接合線，其中貴金屬被覆中之顯示Au之最大濃度之位置較顯示Pd之最大濃度之位置更位於表面側。
  7. 如請求項5之接合線，其中貴金屬被覆中之貴金屬之最大濃度係根據深度方向之濃度分佈而求出，該深度方向之濃度分佈係一面藉由Ar濺鍍沿深度方向自線之表面向下挖掘，一面按照下述＜條件＞藉由歐傑電子能譜法(AES)測定而獲得， ＜條件＞以線之寬度之中心成為測定面之寬度之中心之方式進行定位，且測定面之寬度為線之直徑之10%以上15%以下，測定面之長度為測定面之寬度之5倍。
  8. 如請求項1之接合線，其中Cu芯材包含Cu及不可避免之雜質。
  9. 如請求項1之接合線，其中貴金屬被覆包含貴金屬及不可避免之雜質。
  10. 如請求項1之接合線，其包含選自由Ni、Zn、Rh、In、Ir及Pt所組成之群中之1種以上之元素(以下，稱為「第1添加元素」)，第1添加元素相對於線整體之濃度總計為0.1～1.5質量%。
  11. 如請求項1之接合線，其包含選自由P、B、Be、Fe、Mg、Ti、Zn、Ag及Si所組成之群中之1種以上之元素(以下，稱為「第2添加元素」)，第2添加元素相對於線整體之濃度總計為0.1～200質量ppm。
  12. 如請求項10之接合線，其中Cu芯材包含Cu、選自第1添加元素及第2添加元素之1種以上之元素、及不可避免之雜質。
  13. 如請求項10之接合線，其中貴金屬被覆包含貴金屬、選自第1添加元素及第2添加元素之1種以上之元素、及不可避免之雜質。
  14. 如請求項1之接合線，其中垂直於線軸之方向之Cu芯材剖面中之平均結晶粒徑為1.4～3.2 μm。
  15. 如請求項1之接合線，其用於楔-楔接合。
  16. 一種半導體裝置之製造方法，其包括利用如請求項1至15中任一項之接合線將半導體元件上之第1電極與引線框架或電路基板上之第2電極連接之步驟，且 藉由楔型接合而實施第1電極與接合線之第1連接及第2電極與接合線之第2連接之兩者。
  17. 如請求項16之方法，其中第1連接與第2連接係於常溫下實施。
  18. 一種半導體裝置，其包含如請求項1至15中任一項之接合線。
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