TW202141608A - Substrate processing method and substrate processing apparatus - Google Patents

Abstract

In order to supply a processing liquid to a layered structure and efficiently etch a thin film, said processing liquid being for selectively etching and removing the thin film, and said layered structure including the thin film in a condition in which only at least one section of a side surface thereof is exposed, in the present invention, an alternating current electric field is applied to the layered structure by applying an alternating current voltage to a pair of electrodes, in parallel with an etching step in which the processing liquid, which includes an etchant that selectively etches the thin film, is supplied to the layered structure to etch the thin film from the exposed region of the thin film, said electrodes having been positioned so as to sandwich the layered structure while the same is being wetted by the processing liquid.

Description

Substrate processing method and substrate processing device

The present invention relates to a substrate processing method and a substrate processing apparatus in which a thin film contained in a laminated structure is wet-etched from the side.

The following descriptions of the Japanese application, drawings, and the disclosure of the scope of the patent application are incorporated into this specification as a reference:

Japanese invention patent application 2020-052159 (filed on March 24, 2020).

In the manufacturing steps of electronic parts such as semiconductor devices or liquid crystal display devices, an etching step of partially etching and removing a substrate to form a desired pattern is included. For example, in the manufacture of semiconductor devices, when the silicon oxide film (SiO2) formed on the silicon substrate is _{etched, a treatment solution containing an etchant such as HF 2} ^-is used (for example, Japanese Patent Laid-Open No. 9-22891, Special Kaiping Bulletin No. 9-115875).

There are various shapes of patterns that are attempted to be formed by etching. Especially with the miniaturization of patterns or the three-dimensional structuring of electronic parts, in the etching step, there is a situation in which it is required not only to form recesses of the previous size with a relatively wide opening, but also to form a narrow and deep opening. The shape of the elongated concave part. For example, there is the following narrow part etching process, namely: a substrate formed by repeatedly laminating two kinds of thin films with different compositions on the surface of the base material (equivalent to an example of the "layered structure" of the present invention) The processing liquid is supplied to etch only one type of film (hereinafter referred to as "etched film"). Here, in the initial stage of etching, the treatment liquid is in contact with the exposed part of the film to be etched, that is, the side surface to be etched and removed. Thereby, a concave portion with a small opening having the same size as the film thickness of the etched film is formed. Then, it is necessary to advance the above-mentioned etching depth along the film to be etched, that is, in a direction orthogonal to the stacking direction of the film, to form a desired elongated recess.

However, if the film thickness of the etched film is 10 nm or less, the above-mentioned narrow part etching process will be greatly affected by the electric double layer generated inside the recess as will be described in detail later. More specifically, the electric double layer prevents the etchant contained in the treatment solution from attempting to move into the recesses with small openings. If the treatment solution is only supplied to the above-mentioned multilayer structure, it is difficult to efficiently perform the etchant treatment. Etching and removal of thin films. As a result, there is a problem that the etching rate at the recesses of the elongated size is significantly lower than the etching rate at the recesses of the previous size, and the desired structure cannot be obtained.

The present invention was made in view of the above-mentioned problems, and its object is to provide a layered structure including a thin film in a state where at least a part of the side surface is exposed, by supplying a treatment solution for selectively etching and removing the thin film, thereby efficiently reducing the thin film Ground etching substrate processing method and substrate processing device.

One aspect of the present invention is a substrate processing method characterized by comprising: an etching step of supplying a layered structure including a thin film in a state where at least a part of the side surface is exposed, containing an etchant for selectively etching the thin film The treatment liquid, and the film is etched from the exposed part of the film; and the electric field application step, which is parallel to the etching step, applies an alternating voltage to one of the electrodes which is arranged in contact with the treatment liquid to sandwich the laminated structure between them , And an AC electric field is applied to the laminated structure.

Still another aspect of the present invention is a substrate processing apparatus characterized by etching a laminated structure including a thin film in a state where at least a part of the side surface is exposed, and including: a holding mechanism that holds the substrate horizontally; A supply nozzle that supplies a processing liquid containing an etchant for selectively etching thin films to a horizontally held substrate; an AC voltage supply mechanism that applies an AC voltage to the substrate while the processing liquid is being supplied to the substrate; open circuit The voltage measuring mechanism measures the open circuit voltage of the substrate; and the control mechanism changes the value of the AC voltage applied to the substrate according to the value of the open circuit voltage measured by the open circuit voltage measuring mechanism.

According to the invention with such a structure, the effect of the electric double layer on the etching of the thin film can be suppressed by applying an alternating electric field to the laminated structure, and the etchant can be efficiently moved in the thin film to efficiently etch the thin film.

The above-mentioned plural constituent elements of the various aspects of the present invention are not all essential. In order to solve part or all of the above-mentioned problems, or to achieve part or all of the effects described in the specification, it may be appropriate to A part of a plurality of constituent elements shall be changed, deleted, replaced with other new constituent elements, and a part of restricted content shall be deleted. In addition, in order to solve part or all of the above-mentioned problems, or to achieve part or all of the effects described in the specification, part or all of the technical features included in one aspect of the present invention described above may also be combined with the above-mentioned ones. Part or all of the technical features contained in another aspect of the present invention are combined to form an independent aspect of the present invention.

1 is a schematic diagram showing an example of a substrate processing apparatus for etching and removing a thin film contained in a multilayer structure using an embodiment of the substrate processing method of the present invention, which corresponds to an embodiment of the substrate processing apparatus of the present invention. In addition, FIG. 2 is a diagram showing the cross-sectional structure of the substrate processing apparatus shown in FIG. 1. Here, the thin film 12 to be etched and removed is a silicon oxide film with a thickness of 10 nm or less formed on the surface of the silicon substrate 11. Furthermore, on the thin film 12, the polysilicon layer 13 is laminated in the laminating direction Z. In the polysilicon layer 13, a plurality of through holes 131 with an inner diameter of 60 nm, for example, are provided. In this way, in this embodiment, the substrate 1 formed by laminating the silicon substrate 11, the thin film 12, and the polysilicon layer 13 having different compositions in this order corresponds to an example of the "layered structure" of the present invention.

The substrate 1 is supported by the electrode 21 from below. In addition, a hollow structure frame 3 is placed on the surface of the substrate 1 supported by the electrode 21, that is, on the center portion of the surface of the polysilicon layer 13. Therefore, a box-shaped space 5 is formed by the surface of the substrate 1 and the inner wall surface of the frame 3. In the space 5, a treatment solution for selectively etching and removing the thin film 12 can be stored. In this embodiment, it is thin. Hydrofluoric acid (dHF: Diluted Hydrofluoric acid)4.

When dilute hydrofluoric acid is supplied to the reservoir 4 and the above-mentioned space 5, the supply part 131 via a through hole formed in the polysilicon layer 13 to the membrane 12, contained by an etchant of dilute hydrofluoric acid (HF ₂ ^-) The area of the film 12 facing the through hole 131 is etched. As a result, the exposed part of the side surface of the film 12 exposed to the through hole 131 comes into contact with the processing liquid supplied through the through hole 131. Therefore, as further time elapses, the treatment liquid penetrates the fine area 14 sandwiched between the silicon substrate 11 and the polysilicon layer 13 through the opening (ie the gap between the silicon substrate 11 and the polysilicon layer 13), that is, the self-contained film 12 The openings of the same size as the film thickness invade the area extending in the direction orthogonal to the layering direction Z. In this way, the thin film 12 is etched.

However, since the film thickness of the thin film 12 is 10 nm or less, an electric double layer is formed in the fine area 14 filled with the treatment liquid. That is, as shown in FIG. 3 below, an electric double layer is formed near the interface between the fine region 14 (FIG. 3) and the silicon substrate 11 and near the interface between the fine region 14 (FIG. 3) and the polysilicon layer 13. In particular, when the distance between the silicon substrate 11 and the polysilicon layer 13 (that is, the thickness of the thin film 12) is relatively wide, for example, about 50 nm, the two electric double layers are sufficiently separated, and the ions can be freely between them. move. However, the industry has informed that when the above-mentioned interval is about 10 nm, the two electric double layers are close to each other and overlap (refer to A. Okuyama, et al., Solid State Phenomena, 2015, 219, 115). The present inventors investigated the incident application due to the influence of the electric double layer ions move is restricted, while suppressing an etchant (HF ₂ ^-) toward the fine area of 14 invasive.

Therefore, in this embodiment, the influence of the electric double layer is suppressed by applying the AC electric field Eac to _{the fine region 14 and the penetration of the etchant (HF 2} ⁻ ) into the fine region 14 is increased. In more detail, as shown in FIGS. 1 and 2, the front end of the electrode 22 made of platinum is immersed in the dilute hydrofluoric acid 4 stored in the space 5. In addition, the electrodes 21 and 22 are connected to the AC power source 6. In addition, in parallel with the etching step performed by the dilute hydrofluoric acid 4, an AC voltage is applied between the electrodes 21 and 22 from the AC power source 6 in response to an instruction from the control unit 100 that controls the entire device.

Figure 3 is a model diagram schematically showing the change of the electric double layer corresponding to the voltage applied to a pair of electrodes. The column (b) shows the state of the electric double layer when DC voltage is applied. The figure in the circle marked with a symbol + Text the symbol represents a cation (H ^+), denoted by a circle symbol in there - the text symbol represents an anion (HF ₂ ^-). Here, first, a case where no voltage is applied between the electrodes 21 and 22 will be explained. Next, a case where a DC power source is connected between a pair of electrodes 21 and 22 and a DC voltage in which a voltage V1 is superimposed on an open circuit voltage (Open Circuit Potential; OCP) is applied to the electrodes 21 and 22. Then, an AC voltage oscillating with a voltage ±V2 centered on OCP is applied between the counter electrodes 21 and 22 to the pair of electrodes 21 and 22.

In the prior art where no voltage is applied to the electrodes 21 and 22, cations are arranged near the surfaces of the silicon substrate 11 and the polysilicon layer 13. The plane that becomes the distribution center of the cations is called the Outer Helmholtz plane (OHP), which is represented by a dashed line in FIG. 3. As shown in the figure, the Helmholtz surface near the silicon substrate 11 and the Helmholtz surface near the polysilicon layer 13 in the fine region 14 follow the distance between the silicon substrate 11 and the polysilicon layer 13, namely The film thicknesses of the thin films 12 become smaller and approach each other. When the film thickness of the film 12 is below 10 nm, the anion can invade between the two outer Helmholtz plane, i.e., the film etchant (HF ₂ ^-) 12 of the small number of, and the minute areas of concentration of the etchant 14 Maintain a low state. Therefore, it is considered that it is difficult to efficiently etch the thin film 12 with the prior art.

Here, as shown in the column (a) of FIG. 3, by applying a DC voltage between the electrodes 21 and 22, a DC electric field Edc is generated in the fine region 14 parallel to the layering direction Z. Thereby, in the vicinity of the surfaces of the silicon substrate 11 and the polysilicon layer 13, the cations are shifted toward one side of the silicon substrate 11 and the polysilicon layer 13 (in this figure, the polysilicon layer 13 side), and the shift state is when the voltage is applied The process is also maintained. That is, the two outer Helmholtz surfaces (the solid lines marked in the fine area 14 in FIG. 3) are shifted toward the side of the polysilicon layer 13 while maintaining these intervals (see column (a) in FIG. 3). Arrow in the middle). Therefore, even when a DC voltage is applied, but still leave without change impact of the electric double layer, can invade the etchant (HF ₂ ^-) between the two outer surfaces of the Helmholtz number of still smaller. Therefore, it is considered that it is difficult to improve the etching efficiency by applying the DC electric field Edc. In addition, as described in Comparative Example 2 below, an increase in the etching amount was not confirmed by the application of a direct current voltage (V1=OCP+0.1 V).

On the other hand, as shown in the column (b) of FIG. 3, when an AC voltage (OCP±V2) is applied between the electrodes 21 and 22, an AC electric field Eac is generated in the fine area 14 parallel to the layering direction Z. Thereby, in the vicinity of the surfaces of the silicon substrate 11 and the polysilicon layer 13, cations alternately move toward the silicon substrate 11 and the polysilicon layer 13 in response to changes in the direction of the AC electric field Eac. That is, the two outer Helmholtz surfaces (solid lines marked in the fine area 14 in FIG. 3) vibrate in the fine area 14 as time passes (refer to the hollow arrow in the column (b) of FIG. 3). In this way, in this embodiment, the application of the alternating electric field Eac in parallel with the etching step, which is an example of the "electric field application step" of the present invention, is performed to electrically vibrate the fine area 14. Whereby the influence of the electric double layer considerations suppressed, but it may promote an etchant (HF ₂ ^-) 14 toward the invasion of minute areas, thereby improving the etching efficiency. This point will also be confirmed in the examples which will be described later.

Furthermore, during the etching step, the OCP value of the substrate changes. As shown in the embodiments described later, in the etching step, it is desirable to adjust the AC electric field Eac according to the variation of the OCP value of the substrate.

As described above, according to the present embodiment, the influence of the electric double layer on the etching of the thin film 12 can be suppressed by applying the AC electric field Eac to the substrate 1 as an example of the "layered structure" of the present invention. As a result, The etchant can be efficiently moved in the fine region 14 to efficiently etch the thin film 12. In this embodiment, the polysilicon layer 13 corresponds to an example of the "first film" of the present invention.

In addition, the present invention is not limited to the above-mentioned embodiment, and various changes can be made in addition to the above-mentioned embodiment without departing from the scope of the gist. For example, in the above-mentioned embodiment, the substrate (layer structure) 1 in which the silicon substrate 11, the thin film (silicon oxide film) 12, and the polysilicon layer 13 are laminated is supplied with dilute hydrofluoric acid 4 as the treatment liquid of the present invention. While the thin film 12 is etched, the structure of the laminated structure, the type of the treatment liquid, and the like are not limited to the above-mentioned embodiment. For example, in the manufacturing process of a three-dimensional NAND-type non-volatile semiconductor device, a narrow part etching process is included, that is, a substrate having a multilayer film formed by repeatedly laminating two kinds of thin films having mutually different compositions ( The layered structure) is supplied with a treatment solution, and only one type of film is etched away from the side of the film. The present invention can also be applied to the etching process of the narrow part.

In addition, in the above-mentioned embodiment, the present invention is applied to a substrate processing apparatus that stores dilute hydrofluoric acid 4 in the space 5 formed by placing the frame 3 on the surface of the substrate 1 and performs substrate processing. The present invention is applied to substrate processing apparatuses having other configurations. For example, as shown in FIG. 5, for a substrate processing apparatus that etches the surface of the substrate 1 by supplying dilute hydrofluoric acid 4 to the surface of the substrate 1 while holding the peripheral portion of the substrate 1 in a horizontal posture by the conductive chuck 23, The present invention can also be applied.

FIG. 5 is a cross-sectional structure diagram schematically showing another embodiment of the substrate processing apparatus of the present invention. The major difference between this substrate processing apparatus and the apparatus shown in FIG. 1 and FIG. 2 is the supply state of dilute hydrofluoric acid 4. That is, in this embodiment, as shown in FIG. 5, a supply nozzle is arranged at the upper position of the substrate 1 held in a horizontal posture by the conductive chuck 23 that functions as the "electrode" of the present invention. twenty four. A processing liquid supply unit 25 is connected to the supply nozzle 24. Furthermore, in accordance with a supply command from the control unit 100 that controls the entire device, the processing liquid supply unit 25 pressure-feeds the dilute hydrofluoric acid 4 as the processing liquid toward the supply nozzle 24, and the dilute hydrofluoric acid 4 is discharged from the discharge port 241 of the supply nozzle 24. The hydrofluoric acid 4 is sprayed toward the surface of the substrate 1. Thereby, a liquid film 41 of diluted hydrofluoric acid 4 is formed on the surface of the substrate 1, and the etching step is performed on the entire surface of the substrate 1.

Moreover, as shown in FIG. 5, the electrode 22 made of platinum is arrange|positioned in the vicinity of the discharge port 241 of the supply nozzle 24 as mentioned above. An AC power source 6 is connected between the electrode 22 and the conductive chuck 23. Furthermore, by giving a voltage application command from the control unit 100 to the AC power source 6, an AC voltage is applied to the electrodes 22 and the conductive chuck 23 from the AC power source 6 in parallel with the etching step performed with the diluted hydrofluoric acid 4 between. Thereby, an AC electric field is applied to the substrate 1 to suppress the influence of the electric double layer, and the thin film 12 (refer to FIG. 2) of the substrate 1 can be etched efficiently.

Moreover, as shown in FIG. 5, the AC electric field Eac is adjusted in accordance with the variation of the OCP value of the substrate during the etching step. That is, the voltage stabilizer P has: a working electrode (Working Electrode) WE, a counter electrode CE (Counter Electrode), and a reference electrode (Reference Electrode) RE, the reference electrode RE and the diluted hydrofluoric acid 4 formed on the surface of the substrate 1 Liquid film contact. In addition, the voltage stabilizer P detects the value of the voltage generated between the reference electrode RE and the working electrode WE, that is, the OCP of the substrate 1 etched by dilute hydrofluoric acid 4, and provides the detection result to the control unit 100. On the other hand, the control unit 100 controls the AC power source 6 to change the AC voltage in accordance with the variation of the OCP value of the substrate 1. Since the AC electric field is adjusted in this way, the thin film 12 (refer to FIG. 2) of the substrate 1 can be etched more efficiently and stably.

As in the embodiment shown in FIG. 5, the AC power source 6 corresponds to an example of the "AC voltage supply mechanism" of the present invention. In addition, the conductive chuck 23 corresponds to an example of the "holding mechanism" of the present invention. In addition, the voltage stabilizer P corresponds to an example of the "open circuit voltage measuring mechanism" of the present invention. Furthermore, the control unit 100 corresponds to an example of the "control mechanism" of the present invention.

[Example] Hereinafter, the preferred aspects of the present invention will be described in more detail with reference to the embodiments. However, the present invention is of course not limited by the following embodiments. Therefore, of course, it can be implemented with appropriate changes within the scope that conforms to the main points of the context, and these are also included in the technical scope of the present invention.

Here, a substrate 1 is prepared. The substrate 1 is formed by laminating a silicon base 11, a thin film (silicon oxide film) 12, and a polysilicon layer 13 as shown in the partially enlarged view of FIG. 2. As the film thickness of the thin film 12, two types of 5 nm and 10 nm are prepared. In addition, dilute hydrofluoric acid 4 prepared by mixing HF (46 to 48%) and DIW (deionized water) at a ratio of 1:50 is prepared as the "treatment liquid" of the present invention. Here, the so-called "HF (46 to 48%)" means hydrofluoric acid with a concentration of 46 to 48%.

Also, as shown in Table 1, the etching step was performed separately (Comparative Example 1), and DC voltage was applied to the electrodes 21 and 22 in parallel with the etching step (Comparative Example 2), and the oscillation and frequency were increased in parallel with the etching step. The alternating voltage applied to the electrodes 21 and 22 was changed step by step (Example 1 to Example 6). Then, verify the voltage following, the etching amount of the film 12 with a film thickness of 5 nm (symbol EM in FIG. 2), the etching amount of the film 12 with a film thickness of 10 nm (symbol EM in FIG. 2), and the ratio ( "5 nm/10 nm" in Table 1), and summarize the results in Table 1. Here, the OCP is obtained in advance according to the following operation. [Table 1] Treatment liquid Voltage application Frequency (kHz) Time (sec) Voltage following Etching amount under 5 nm thickness (nm) Etching amount under 10 nm thickness (nm) 5 nm/10 nm Comparative example 1 HF:DIW=1:50 none 600 21.43 44.45 0.48 Comparative example 2 HF:DIW=1:50 OCP+0.1 V 600 ○ 20.64 47.63 0.43 Example 1 HF:DIW=1:50 OCP+0.05 V±0.05 V 1 600 20.90 43.26 0.48 Example 2 HF:DIW=1:50 OCP+0.05 V±0.05 V 0.1 600 33.50 50.40 0.66 Example 3 HF:DIW=1:50 OCP+0.05 V±0.05 V 1 600 ○ 75.41 88.50 0.85 Example 4 HF:DIW=1 :50 OCP+0.05 V±0.05 V 0.1 600 ○ 33.14 39.39 0.84 Example 5 HF:DIW=1 :50 OCP±0.1 V 1 600 ○ 20.88 41.37 0.50 Example 6 HF:DIW=1 :50 OCP±0.1 V 0.1 600 ○ 44.55 55.66 0.80

The measurement of OCP is performed by an electrical chemical measurement device such as a voltage stabilizer or a galvanostat immediately before the etching step. Here, the method of measuring OCP using a voltage stabilizer will be explained.

The voltage stabilizer P shown in FIG. 2 has: a working electrode WE, a counter electrode CE, and a reference electrode RE. The working electrode WE is connected to a wiring 6b extending from the electrode 21 which is in electrical communication with the substrate 1. The counter electrode CE is connected to the wiring 6 a extending from the electrode 22 arranged above the substrate 1. The reference electrode RE is in contact with the dilute hydrofluoric acid 4 stored in the space 5. The voltage stabilizer P displays the value of the voltage generated between the reference electrode RE and the working electrode WE. This value is the OCP of the substrate 1 etched by dilute hydrofluoric acid 4.

In addition, the "voltage following" in Table 1 means that when the OCP changes during the etching step, the value of the applied voltage is changed so that the difference between the applied voltage and the OCP becomes constant. Here, the so-called applied voltage means the voltage value between the electrode 22 and the electrode 21 in the device of FIG. 2. In the substrate processing apparatus of FIG. 2, the control unit 100 changes the value of the applied voltage in a manner that corresponds to the value of the OCP measured by the voltage stabilizer P to offset the change of the value of the OCP. Furthermore, in the etching process performed on the substrate 1, the time change of the OCP can be experimentally obtained in advance, and the pre-measured data is used as the OCP value for reference, instead of measuring the OCP during the etching process. This point is the same in the embodiment shown in FIG. 5.

As shown in Table 1, in Comparative Example 2 where the DC electric field Edc is applied in parallel with the etching step, there is no major change from the prior art (Comparative Example 1). Even if the DC electric field Edc is applied, the etching efficiency cannot be expected to improve.

In contrast, in the second embodiment, by applying the AC electric field Eac in parallel with the etching step, the etching efficiency is improved. This is consistent with the assumption that the penetration of the _{etchant (HF 2} ⁻ ) into the fine region 14 is promoted by vibrating the Helmholtz surface. In order to allow the Helmholtz surface to an etchant (HF ₂ ^-) and oscillation frequency of invasion as the vibration region 14 toward fine, only by applying an AC voltage not enough, it is necessary to apply an alternating voltage with the voltage value of the etching conditions Adjust to an appropriate value.

In Examples 1 to 6, the etching efficiency under various conditions was investigated.

In Examples 2, 3, 4, and 6 of Examples 1 to 6, the ratio of the etching amount at a thickness of 15 nm to the etching amount at a thickness of 10 nm increased.

In Example 3, the etching amount under the thickness of 5 nm and the etching amount under the thickness of 10 nm both increase. In Example 6, the etching amount under the thickness of 5 nm is increased.

In Example 3, the ratios of the etching amount at a thickness of 5 nm, the etching amount at a thickness of 10 nm, and the etching amount at a thickness of 15 nm to the etching amount at a thickness of 10 nm all increased. In this way, as can be seen from Example 6, in addition to applying the AC voltage in parallel with the etching step, by performing voltage tracking, and then adjusting the applied voltage and AC frequency to appropriate values, the etching efficiency can be improved while suppressing Film thickness dependence of etching.

Furthermore, although it is not shown in Table 1, even when the electric field application step is performed in parallel with the etching step, if the voltage is not applied under the OCP standard, as shown in FIG. 4, the silicon substrate 11 is damaged 11a. The situation. That is, it is desirable to set the AC voltage under the OCP reference in the electric field application step.

The present invention has been described above based on specific embodiments, but this description is not intended to be interpreted in a limited sense. If referring to the description of the present invention, as with the other embodiments of the present invention, those skilled in the art should clearly understand the various modifications of the disclosed embodiments. Therefore, it can be considered that the scope of the appended patent application includes the modification or embodiment without departing from the true scope of the present invention.

The present invention can be applied to all substrate processing methods and substrate processing apparatuses that wet-etch the thin film contained in the laminated structure from the side surface.

1: Substrate (multilayer structure) 3: Frame 4: Dilute hydrofluoric acid (treatment liquid) 5: space 6: AC power supply (AC voltage supply mechanism) 6a, 6b: Wiring 11: Silicon substrate 11a: Damage 12: Thin film (silicon oxide film) 13: Polysilicon layer (first film) 14: Subtle areas 21, 22: (a pair) electrode 23: Conductive chuck (electrode, holding mechanism) 24: Supply nozzle 25: Treatment liquid supply part 41: (dilute hydrofluoric acid) liquid film 100: Control Department (Control Organization) 131: Through hole 241: Ejector CE: Opposite electrode Eac: AC electric field Edc: DC electric field EM: Etching amount of thin film OCP: open circuit voltage P: Voltage stabilizer (open circuit voltage measuring mechanism) RE: Reference electrode V1, V2: Voltage WE: working electrode Z: stacking direction

FIG. 1 is a schematic diagram showing an example of a substrate processing apparatus that etches and removes a thin film contained in a multilayer structure using an embodiment of the substrate processing method of the present invention. FIG. 2 is a diagram showing a cross-sectional structure of the substrate processing apparatus shown in FIG. 1. FIG. Fig. 3 (a) and (b) are model diagrams schematically showing the change of the electric double layer corresponding to the voltage application to a pair of electrodes. FIG. 4 is a diagram schematically showing the damage to the silicon substrate when the voltage is not set under the OCP reference. FIG. 5 is a cross-sectional structure diagram schematically showing another embodiment of the substrate processing apparatus of the present invention.

11: Silicon substrate

13: Polysilicon layer (first film)

14: Subtle areas

131: Through hole

Eac: AC electric field

Edc: DC electric field

OCP: open circuit voltage

V1, V2: Voltage

Z: stacking direction

Claims (6)

A substrate processing method, characterized by comprising: an etching step of supplying a processing solution containing an etchant for selectively etching the thin film to a multilayer structure including a thin film in a state where at least a part of the side surface is exposed, and The exposed part of the film will etch the aforementioned film; and An electric field application step, in parallel with the etching step, applies an alternating voltage to one of the electrodes placed in contact with the processing liquid so that the laminated structure is sandwiched therebetween, and an alternating electric field is applied to the laminated structure. Such as the substrate processing method of claim 1, wherein The aforementioned laminated structure system is formed by laminating a substrate with a different composition from the aforementioned film, the aforementioned film, and a first film with a different composition from the aforementioned film, In the electric field applying step, the pair of electrodes are arranged so as to sandwich the layered structure in the layering direction of the substrate, the thin film, and the first film, and the AC electric field is applied parallel to the layering direction. Such as the substrate processing method of claim 1, wherein The aforementioned laminated structure has a multilayer film formed by alternately laminating a first film having a composition different from the aforementioned film and the aforementioned thin film, In the electric field applying step, the pair of electrodes are arranged so as to sandwich the layered structure in the layering direction of the first film and the thin film, and the AC electric field is applied parallel to the layering direction. Such as the substrate processing method of claim 2 or 3, where In the electric field applying step, the AC voltage that oscillates around the open circuit voltage between the pair of electrodes is applied to the pair of electrodes. Such as the substrate processing method of any one of claims 1 to 3, which has: Steps to measure the open circuit voltage of the aforementioned substrate, and Follow the measured change in the open circuit voltage to change the AC voltage. A substrate processing apparatus characterized by etching a multilayer structure including a thin film in a state where only at least a part of the side surface is exposed, and including: A holding mechanism, which holds the aforementioned substrate horizontally; A supply nozzle that supplies a processing liquid containing an etchant that selectively etches the aforementioned thin film to the aforementioned horizontally held substrate; An AC voltage supply mechanism, which applies an AC voltage to the substrate in a state where the processing liquid is supplied to the substrate; Open circuit voltage measuring mechanism, which measures the open circuit voltage of the aforementioned substrate; and The control mechanism changes the value of the AC voltage applied to the substrate in accordance with the value of the open circuit voltage measured by the open circuit voltage measuring mechanism.

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