TW202103175A - Overclocking test module of memory chip and method thereof enhance efficiency and reduce misjudgment through automatic equipment and add pre-testing two-stage screening - Google Patents

Overclocking test module of memory chip and method thereof enhance efficiency and reduce misjudgment through automatic equipment and add pre-testing two-stage screening Download PDF

Info

Publication number
TW202103175A
TW202103175A TW108123869A TW108123869A TW202103175A TW 202103175 A TW202103175 A TW 202103175A TW 108123869 A TW108123869 A TW 108123869A TW 108123869 A TW108123869 A TW 108123869A TW 202103175 A TW202103175 A TW 202103175A
Authority
TW
Taiwan
Prior art keywords
test
memory
memory chip
disk
stage
Prior art date
Application number
TW108123869A
Other languages
Chinese (zh)
Other versions
TWI708252B (en
Inventor
洪康寧
Original Assignee
全何科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 全何科技股份有限公司 filed Critical 全何科技股份有限公司
Priority to TW108123869A priority Critical patent/TWI708252B/en
Priority to KR1020190179096A priority patent/KR102248671B1/en
Application granted granted Critical
Publication of TWI708252B publication Critical patent/TWI708252B/en
Publication of TW202103175A publication Critical patent/TW202103175A/en

Links

Images

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/12015Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details comprising clock generation or timing circuitry
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing
    • G06F11/273Tester hardware, i.e. output processing circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/006Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation at wafer scale level, i.e. wafer scale integration [WSI]
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/14Implementation of control logic, e.g. test mode decoders
    • G11C29/16Implementation of control logic, e.g. test mode decoders using microprogrammed units, e.g. state machines

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

The invention is an overclocking test module of memory chip and its method. It is applied in a two-stage memory chip testing process to screen the memory chips at different speeds, including a test panel area, a positioning temporary storage panel, at least one pre-testing machine, plural testing machines, and a robot arm. The robot arm is electrically connected to the test panel area, the positioning temporary storage panel, the pre-testing machine, and the testing machine. The pre-testing machine is set in the middle of the positioning temporary storage panel and the testing machine to test and screen the memory in the first stage. The memory that has passed and screened by the pre-testing machine in the first stage will undergo a complete memory chip test on the testing machine, thereby improving the efficiency, accuracy, and reducing the misjudgments.

Description

記憶體晶片超頻測試模組及其方法Memory chip overclocking test module and method thereof

本發明係有關於一種記憶體晶片超頻測試模組及其方法,尤其是透過預測試機台對記憶體晶片做初步篩檢,達到多速度分類的工程。The present invention relates to a memory chip overclocking test module and a method thereof, in particular to a project that performs preliminary screening of the memory chip through a pre-testing machine to achieve multi-speed classification.

目前 隨著科技日新月異,各種記憶體也以不同形式應用於日常生活中,以使各種電子設備具備更多功能和操作性。例如個人電腦(PC)內常用的隨機存取記憶體(Random Access Memory,RAM),具備隨時讀寫及高速度的特性,故常被做為作業系統或其他正在執行中的程式的臨時資料之儲存媒介。又可細分為,動態隨機存取記憶體(Dynamic Random Access Memory,DRAM)以及靜態隨機存取記憶體(Static Random Access Memory,SRAM)。At present, with the rapid development of science and technology, various memories are also used in daily life in different forms, so that various electronic devices have more functions and operability. For example, the random access memory (RAM) commonly used in personal computers (PCs) has the characteristics of reading and writing at any time and high speed, so it is often used as a storage for temporary data of the operating system or other running programs medium. It can be further subdivided into dynamic random access memory (Dynamic Random Access Memory, DRAM) and static random access memory (Static Random Access Memory, SRAM).

且在電競產業近年來成長速度之快,其首要配備就是利用高階電子設備,如:主機板、記憶體…等,作為獲勝的標準配備,再搭配選手的智力、技巧的展現,而電競選手在硬體配備選擇上首重記憶體速度,因此,為製造出高速度記憶體,其需要提高對製程上的需求,也就是從顆粒測試著手,因為顆粒即為製造記憶體的重要原物料之一。In addition, the e-sports industry has grown rapidly in recent years. Its primary equipment is to use high-end electronic equipment, such as motherboards, memory, etc., as standard equipment for winning, and match the intelligence and skills of the players. Competitors prioritize memory speed in the choice of hardware equipment. Therefore, in order to produce high-speed memory, it needs to increase the demand for manufacturing process, which is to start with particle testing, because particles are important raw materials for manufacturing memory. one.

在傳統上,記憶體製程及測試的方法,採用大量的人力進行顆粒的速度分類,且必須由低速開始篩檢,若要檢測出超頻的記憶體,為了避免機台故障而造成的後續維修成本,採用大量人力的同時也代表耗費大量時間以及管理成本,而且人員的眼力及體力所造成的疲勞及誤判也隨之提升,都是需要突破及改進的地方。Traditionally, the memory system process and testing method used a lot of manpower to classify the speed of particles, and the screening must be started from low speed. To detect overclocked memory, in order to avoid subsequent maintenance costs caused by machine failures , The use of a large amount of manpower also means a lot of time and management costs, and the fatigue and misjudgment caused by the eyesight and physical strength of the personnel will also increase, which is where breakthroughs and improvements are needed.

由於上述的問題,對於檢測出超頻記憶體,本發明之主要目的在於提供一種記憶體晶片超頻測試模組,應用於篩檢不同速度的記憶體晶片,記憶體晶片超頻測試模組包含測試盤區、定位暫存盤、至少一預測試機台、多個測試機台以及機械手臂,機械手臂電性連接測試盤區、定位暫存盤、預測試機台以及測試機台。Due to the above-mentioned problems, the main purpose of the present invention for detecting overclocked memory is to provide a memory chip overclocking test module, which is used to screen memory chips of different speeds. The memory chip overclocking test module includes a test panel. , Positioning temporary storage disk, at least one pre-testing machine, multiple testing machines, and robotic arms. The robotic arm is electrically connected to the test panel, positioning temporary storage disk, pre-testing machines and testing machines.

較佳而言,測試盤區可以細分為三種,分別放置不同記憶體,放置待測試記憶體的第一測試盤,放置等待二次測試記憶體的第二測試盤,以及放置欲淘汰記憶體的第三測試盤。Preferably, the test disk area can be subdivided into three types: different memory is placed, the first test disk of the memory to be tested is placed, the second test disk of the memory to be tested is placed, and the memory that is to be eliminated is placed. The third test disc.

較佳而言,定位暫存盤可以分為兩個區域,一部分為定位區,另一部分為暫存區,定位區設置的目的在於確保每一個被抓取的待測試記憶體排列整齊,透過定位區的特殊設計,使機械手臂再次抓取記憶體時可以準確定位在記憶體中間,而暫存區則用以存放準備進行下一階段測試的記憶體。Preferably, the positioning temporary storage disk can be divided into two areas, one is the positioning area, and the other is the temporary storage area. The purpose of the positioning area is to ensure that each memory to be tested is arranged neatly through the positioning area. The special design of the robot arm can be accurately positioned in the middle of the memory when it grabs the memory again, and the temporary storage area is used to store the memory ready for the next stage of testing.

預測試機台設置在定位暫存盤及測試機台的中間,對記憶體做第一階段的測試及篩選,預測試機台內包含一微處理器(CPU),直接控制預測試機台對記憶體做直流參數測試和交流參數測試,經過第一階段預測試機台篩選通過的記憶體,將在測試機台進行完整的記憶體晶片測試。The pre-test machine is set in the middle of the positioning temporary storage disk and the test machine, and the memory is tested and screened in the first stage. The pre-test machine contains a microprocessor (CPU), which directly controls the memory of the pre-test machine DC parameter test and AC parameter test are performed on the body, and the memory that has passed the first stage of pre-testing machine screening will undergo a complete memory chip test on the test machine.

本發明之另一目的在於提供一種記憶體晶片超頻測試方法,應用在兩階段的記憶體晶片測試製程中,在進行第一次測試(第一次篩選)之前,待測試的記憶體放置在第一測試盤,並且設定預測試機台的第一階段測試(預測試)參數。Another object of the present invention is to provide a memory chip overclocking test method, which is applied in a two-stage memory chip test process. Before the first test (first screening), the memory to be tested is placed in the first test. A test disk, and set the first stage test (pre-test) parameters of the pre-test machine.

將記憶體晶片移動到預測試機台,在此預測試機台僅是做簡易的通電測試,第一階段測試(預測試)結束後,通過測試的記憶體亦即速度高於參數的記憶體將移動到測試機台,未通過的記憶體則分為兩類,其中屬於等待二次測試(降階再測試)的記憶體,移往第二測試盤,屬於短路欲淘汰的記憶體移往第三測試盤,藉此分類及篩選出特定速度的記憶體。Move the memory chip to the pre-test machine, where the pre-test machine is only for simple power-on test. After the first stage of the test (pre-test), the memory that passes the test is the memory whose speed is higher than the parameter. When moving to the test machine, the memory that fails is divided into two categories. Among them, the memory that is waiting for the second test (downgrade and retesting) is moved to the second test disk, and the memory that is short-circuited to be eliminated is moved to The third test disk is used to classify and filter out the memory of a specific speed.

本發明藉由改善傳統製程帶來的高人力成本及時間成本,取而代之的是透過自動化設備提高效率及減少誤判,同時創新加入預測試的兩階段篩檢,達到一次性分類多種速度的功效,甚至有別於傳統的進行反向測試。The present invention improves the high labor cost and time cost brought about by the traditional manufacturing process, instead of improving efficiency and reducing misjudgment through automated equipment. At the same time, the two-stage screening of pre-test is innovatively added to achieve the effect of one-time classification and multiple speeds, even Different from the traditional reverse test.

以下配合圖示及元件符號對本發明之實施方式做更詳細的說明,俾使熟習該項技藝者在研讀本說明書後能據以實施。The following is a more detailed description of the implementation of the present invention in conjunction with the diagrams and component symbols, so that those who are familiar with the art can implement it after studying this specification.

本發明為一種記憶體晶片超頻測試模組及其方法,其中,記憶體晶片超頻測試模組較佳實施例請參閱圖1,圖1為本發明記憶體晶片超頻測試模組的示意圖,包含測試盤區10、定位暫存盤20、至少一預測試機台30、多個測試機台40以及機械手臂50,主要是用於測試記憶體速度以進行篩選及分類。The present invention is a memory chip overclocking test module and method thereof. For a preferred embodiment of the memory chip overclocking test module, please refer to FIG. 1. FIG. 1 is a schematic diagram of the memory chip overclocking test module of the present invention, including testing. The panel area 10, the positioning temporary storage disk 20, at least one pre-testing machine 30, a plurality of testing machines 40, and the robot arm 50 are mainly used to test the memory speed for screening and classification.

進一步而言,測試盤區10上放置多個記憶體,記憶體透過機械手臂50的抓取在測試盤區10、定位暫存盤20、預測試機台30以及測試機台40之間移動,本發明的測試盤區10可以細分為三種,分別放置不同記憶體,請參閱圖2,圖2中顯示的測試盤區10僅為說明並不是加以限定其上記憶體的排列方式,測試盤區10分為放置待測試記憶體的第一測試盤11,放置等待二次測試記憶體的第二測試盤12,以及放置欲淘汰記憶體的第三測試盤13。Furthermore, a plurality of memories are placed on the test panel 10, and the memories are moved between the test panel 10, the positioning temporary storage disk 20, the pre-test machine 30, and the test machine 40 through the grabbing of the robot arm 50. The test panel 10 of the invention can be subdivided into three types, and different memories are placed respectively. Please refer to Fig. 2. The test panel 10 shown in Fig. 2 is only for illustration and does not limit the arrangement of the memory on it. The test panel 10 It is divided into a first test disk 11 where the memory to be tested is placed, a second test disk 12 where the memory to be tested is placed a second time, and a third test disk 13 where the memory to be eliminated is placed.

定位暫存盤20可以分為兩個區域,如圖3所示,一部分為定位區21,另一部分為暫存區22,同樣地,圖3中顯示的定位暫存盤20僅為說明並不是加以限定其上記憶體的排列方式,機械手臂50將記憶體從測試盤區10中的第一測試盤11抓取並放置在定位暫存盤20的定位區21,定位區21設置的目的在於確保每一個被抓取的待測試記憶體排列整齊,因為機械手臂50從測試盤區10抓取記憶體的位置並不一定每一個都是在記憶體中間,因此需透過定位區21的特殊設計,使放在定位區21上的記憶體可以整齊排列,使機械手臂50再次抓取時可以準確定位在記憶體中間,而暫存區22則用以存放準備進行下一階段測試的記憶體。The location temporary storage disk 20 can be divided into two areas, as shown in FIG. 3, one part is the positioning area 21, and the other part is the temporary storage area 22. Similarly, the positioning temporary storage disk 20 shown in FIG. 3 is only for illustration and is not limited. According to the arrangement of the memory, the robotic arm 50 grabs the memory from the first test disk 11 in the test panel 10 and places it in the positioning area 21 of the positioning temporary storage disk 20. The purpose of setting the positioning area 21 is to ensure that each The captured memory to be tested is arranged neatly, because the position where the robotic arm 50 grabs the memory from the test panel 10 is not necessarily in the middle of the memory, so the special design of the positioning area 21 is required to make the The memory on the positioning area 21 can be arranged neatly, so that the robotic arm 50 can be accurately positioned in the middle of the memory when it is grasped again, and the temporary storage area 22 is used to store the memory for the next stage of testing.

預測試機台30設置在定位暫存盤20及測試機台40的中間,對記憶體做第一階段的測試及篩選,預測試機台30內包含一微處理器(CPU),直接控制預測試機台對記憶體做快速直流參數測試和交流參數測試,因是由CPU控制所以不需要開機,能縮短預測試的時間,經過第一階段預測試機台30篩選通過的記憶體,將在測試機台40進行完整的記憶體晶片測試。The pre-test machine 30 is set between the positioning temporary storage disk 20 and the test machine 40, and performs the first stage of testing and screening of the memory. The pre-test machine 30 contains a microprocessor (CPU), which directly controls the pre-test The machine performs fast DC parameter test and AC parameter test on the memory. Because it is controlled by the CPU, it does not need to be turned on, which can shorten the pre-test time. The memory that has passed the first stage pre-test machine 30 will be tested. The machine 40 performs a complete memory chip test.

具體而言,待測試的記憶體被放置在第一測試盤11,透過機械手臂50抓取第一測試盤11上的其中一排記憶體,並放置在定位暫存盤20上的定位區21,使記憶體的排列更整齊一致,再經由機械手臂50移動到預測試機台30進行第一階段的測試,在此第一階段的測試主要是測記憶體的速度以及開路/短路測試,第一階段測試後將通過測試(篩選)的記憶體藉由機械手臂50移往測試機台40,未通過的記憶體則分為兩類,其中屬於等待二次測試(降階再測試)的記憶體,移往第二測試盤12,屬於短路欲淘汰的記憶體移往第三測試盤13。Specifically, the memory to be tested is placed on the first test disk 11, and one row of the memory on the first test disk 11 is grabbed by the robotic arm 50 and placed in the positioning area 21 on the positioning temporary storage disk 20. Make the memory arrangement more orderly and consistent, and then move to the pre-test machine 30 via the robotic arm 50 for the first stage of testing. The first stage of testing here mainly measures the speed of the memory and the open/short circuit test. After the stage test, the memory that has passed the test (screening) is moved to the testing machine 40 by the robotic arm 50. The memory that has not passed is divided into two categories, among which is the memory that is waiting for the second test (downgrade and retest) , Move to the second test disk 12, and move the memory that is short-circuited to be eliminated to the third test disk 13.

本發明其中一實施例可以參考圖4所示,記憶體測試模組包含測試盤區10、一個定位暫存盤20、一個預測試機台30、多個測試機台40以及機械手臂50,定位暫存盤20與預測試機台30並非限定在數量,此實施例僅是說明多種情形之一,其中,測試盤區10可以包含第一測試盤11、第二測試盤12以及第三測試盤13,測試盤區10內第一測試盤11、第二測試盤12以及第三測試盤13的數量同樣未加以限定,而定位暫存盤20包含定位區21以及暫存區22。One of the embodiments of the present invention can be referred to as shown in FIG. 4, the memory test module includes a test panel 10, a positioning temporary storage disk 20, a pre-testing machine 30, a plurality of testing machines 40, and a robotic arm 50. The positioning temporary The number of saving 20 and pre-testing machines 30 is not limited. This embodiment only illustrates one of many situations. Among them, the test panel area 10 may include a first test disk 11, a second test disk 12, and a third test disk 13. The number of the first test disk 11, the second test disk 12, and the third test disk 13 in the test disk area 10 is also not limited, and the positioning temporary storage disk 20 includes a positioning area 21 and a temporary storage area 22.

在進行第一次測試(第一次篩選)之前,待測試的記憶體放置在第一測試盤11,並且設定預測試機台30的第一階段測試(預測試)參數,此參數可以依照欲篩選出多少速度的記憶體而決定,假設欲篩選出速度高於3200MHz的記憶體,則設定的參數需比欲篩選出的速度高一些,例如3333MHz,藉以篩選出特定速度的記憶體,提升效率。Before the first test (first screening), the memory to be tested is placed on the first test disk 11, and the first stage test (pre-test) parameters of the pre-test machine 30 are set. The speed of the memory is determined by filtering out. If you want to filter out the memory with a speed higher than 3200MHz, the parameters need to be set higher than the speed you want to filter out, for example, 3333MHz, so as to filter out the memory with a specific speed to improve efficiency .

機械手臂50與測試盤區10、定位暫存盤20、預測試機台30以及測試機台40電性連接,其中機械手臂50較佳而言是設置在測試盤區10、定位暫存盤20、預測試機台30以及測試機台40的上方,除了節省空間外也增加移動靈活性。The robotic arm 50 is electrically connected to the test panel 10, the positioning temporary storage disk 20, the pre-testing machine 30, and the testing machine 40. The robotic arm 50 is preferably arranged in the testing panel 10, the positioning temporary storage disk 20, and the pre-testing machine. The test machine 30 and the upper part of the test machine 40 not only save space but also increase mobility.

第一階段測試(預測試)參數設定完成後,機械手臂50抓取第一測試盤11中的一排待測試的記憶體到定位區21,調整排列後移動到預測試機台30,預測試機台30內包含一微處理器(CPU),直接控制預測試機台對記憶體做快速直流參數測試和交流參數測試,因直接由CPU控制,不需要開機,所以只需大約8-10秒即可完成,第一階段測試(預測試)結束後,通過測試的記憶體亦即速度高於參數的記憶體將移動到測試機台40,進行第二階段測試亦即完整的記憶體晶片測試,也就是所謂的Burn in test燒機測試,此第二階段測試需費時較長時間,而未通過測試的記憶體可能包含速度未達設定的參數或晶片開路/短路,分別移動至第二測試盤12及第三測試盤13。After the parameter setting of the first stage test (pre-test) is completed, the robotic arm 50 grabs a row of the memory to be tested in the first test disk 11 to the positioning area 21, adjusts the arrangement and moves to the pre-test machine 30 for pre-test The machine 30 contains a microprocessor (CPU), which directly controls the pre-test machine to perform fast DC parameter test and AC parameter test on the memory. Because it is directly controlled by the CPU and does not need to be turned on, it only takes about 8-10 seconds. It can be completed. After the first stage of the test (pre-test) is over, the memory that passes the test, that is, the memory with a speed higher than the parameter, will be moved to the testing machine 40, and the second stage of testing, that is, a complete memory chip test , Which is the so-called Burn in test. This second stage test takes a long time, and the memory that fails the test may include parameters that have not reached the set speed or chip open/short, and move to the second test respectively. Disk 12 and the third test disk 13.

其中記憶體晶片是否通過預測試機台30的篩檢,可以透過通訊裝置的介面,讓機械手臂50分辨記憶體晶片是否通過預測試的篩檢。Among them, whether the memory chip passes the screening of the pre-testing machine 30, the robot arm 50 can distinguish whether the memory chip passes the screening of the pre-test through the interface of the communication device.

經過測試機台40完整的記憶體晶片測試後,遂可對記憶體的速度做分類,篩選出特定速度的記憶體,在所有第一測試盤11的記憶體都完成後,接著可以重新設定預測試參數,且第二測試盤12的記憶體會移動到第一測試盤11,再進行一次兩階段測試,藉此分類及篩選出特定速度的記憶體。After the complete memory chip test of the test machine 40, the memory speed can be classified, and the memory of a specific speed can be screened out. After all the memory of the first test disk 11 is completed, the preset can be reset. Test parameters, and the memory of the second test disk 12 will be moved to the first test disk 11, and then perform a two-stage test to classify and filter the memory of a specific speed.

本發明記憶體晶片超頻測試方法請配合參閱圖5,圖5為本發明的方法流程示意圖,有別於傳統測試方法只能從低速開始篩檢,本發明一次完整的篩選分為兩階段測試,能依照使用者目的篩選出特定速度的記憶體。Please refer to FIG. 5 for the overclocking test method of the memory chip of the present invention. FIG. 5 is a schematic diagram of the method flow of the present invention. Unlike the traditional test method, which can only start screening at a low speed, a complete screening of the present invention is divided into two stages of testing. Can filter out the memory of a specific speed according to the user's purpose.

首先對預測試機台30決定並設定預測試參數,將所有待測試的記憶體晶片放置在測試盤區10中的第一測試盤11上,例如設定預測試參數為3333MHz,隨後機械手臂50將第一測試盤11上之其中一排記憶體晶片抓取且移動至定位暫存盤20的定位區21,進行定位亦即調整記憶體晶片的排列,使記憶體晶片排列一致且整齊,使得機械手臂50抓取位置更精確。First determine and set the pre-test parameters for the pre-test machine 30, place all the memory chips to be tested on the first test disk 11 in the test panel 10, for example, set the pre-test parameters to 3333MHz, and then the robot arm 50 will One row of memory chips on the first test disk 11 is grabbed and moved to the positioning area 21 of the positioning temporary storage disk 20, and the positioning is performed, that is, the arrangement of the memory chips is adjusted, so that the memory chips are arranged uniformly and neatly, so that the robot arm 50 grasping position is more accurate.

接著機械手臂50將待測試的記憶體晶片移動至預測試機台30,對記憶體做簡單的通電測試,包含記憶體開路/短路測試,此階段的預測試為第一階段測試也可以視為第一階段的篩選,預測試機台30內包含一微處理器(CPU),直接控制預測試機台對記憶體做快速直流參數測試和交流參數測試,記憶體晶片在預測試機台30測試大約需花費8-10秒時間。Then the robotic arm 50 moves the memory chip to be tested to the pre-testing machine 30, and performs a simple power-on test on the memory, including memory open/short test. The pre-test at this stage is the first stage test and can also be regarded as In the first stage of screening, the pre-test machine 30 contains a microprocessor (CPU), which directly controls the pre-test machine to perform fast DC parameter test and AC parameter test on the memory, and the memory chip is tested in the pre-test machine 30 It takes about 8-10 seconds.

接著,機械手臂50將視記憶體晶片預測試的結果,將記憶體晶片移往不同地方,若記憶體晶片通過預測試機台30的預測試,則將記憶體晶片抓取到測試機台40進行第二階段測試(完整的晶片測試),也就是所謂的燒機測試,若記憶體晶片未通過預測試機台30的預測試,則將記憶體晶片抓取到第二測試盤12(等待降階再測試)或第三測試盤13(淘汰),然而,因為測試機台40進行第二階段測試需費時較長的時間,因此當所有的測試機台40都正在執行第二階段測試時,機械手臂50便會將通過預測試的記憶體晶片先移放至定位暫存盤20中的暫存區22等待。Next, the robot arm 50 will move the memory chip to different places depending on the result of the pre-test of the memory chip. If the memory chip passes the pre-test of the pre-testing machine 30, it will grab the memory chip to the testing machine 40. Perform the second stage test (complete chip test), which is the so-called burn-in test. If the memory chip fails the pre-test of the pre-testing machine 30, the memory chip is grabbed to the second test disk 12 (waiting Decrease retest) or the third test disk 13 (eliminated), however, because the test machine 40 takes a long time to perform the second phase test, so when all the test machines 40 are performing the second phase test , The robot arm 50 will first move the memory chips that have passed the pre-test to the temporary storage area 22 in the positioning temporary storage disk 20 for waiting.

未通過預測試的記憶體晶片將先放置在測試盤區10中之第二測試盤12,等待所有第一測試盤11中的記憶體晶片都完成第一次的篩選後,重新對預測試機台30設定新的預測試參數,例如將參數調降為2888MHz,進行降階再測試也就是所謂的第二次篩選,同樣重複前述的步驟流程,完成第二次篩選及分類,直到所有的記憶體晶片完成篩選及分類後結束。The memory chips that fail the pre-test will be placed on the second test disk 12 in the test disk area 10. After all the memory chips in the first test disk 11 have been screened for the first time, the pre-test machine will be tested again. The station 30 sets new pre-test parameters, for example, reduces the parameters to 2888MHz, and performs a step-down retest, which is the so-called second screening. Repeat the aforementioned steps to complete the second screening and classification until all memory is stored. The bulk wafer is finished after screening and sorting.

本發明的主要功效在於,改善傳統的晶片測試製程需採用大量的人力進行速度的分類,而本發明利用自動化的設備及機械手臂縮減人員管理的成本,以及減少人員眼力、體力疲勞所產生的誤判,提高準確度及效率。The main effect of the present invention is that to improve the traditional wafer testing process requires a lot of manpower to classify the speed, and the present invention uses automated equipment and robotic arms to reduce the cost of personnel management, and reduce the misjudgment caused by the eyesight and physical fatigue of personnel. , Improve accuracy and efficiency.

本發明另一功效在於,改善傳統晶片測試製程必須從低速開始篩檢耗費大量時間,本發明利用新的兩階段測試分類篩選方式,達到一次性分類多種速度,並且還可指定特定速度進行篩檢,或有別於傳統從高速開始反向測試,同時也確保測試機台的穩定性。Another effect of the present invention is that to improve the traditional wafer testing process, it takes a lot of time to start screening at a low speed. The present invention uses a new two-stage test classification and screening method to achieve multiple speeds for one-time classification, and it can also specify a specific speed for screening. , Or different from the traditional reverse test from high speed, but also to ensure the stability of the test machine.

以上所述者僅為用以解釋本發明之較佳實施例,並非企圖據以對本發明做任何形式上之限制,是以,凡有在相同之發明精神下所作有關本發明之任何修飾或變更,皆仍應包括在本發明意圖保護之範疇。The above descriptions are only used to explain the preferred embodiments of the present invention, and are not intended to restrict the present invention in any form. Therefore, any modification or change related to the present invention is made under the same spirit of the invention. , Should still be included in the scope of the present invention's intention to protect.

10:測試盤區 11:第一測試盤 12:第二測試盤 13:第三測試盤 20:定位暫存盤 21:定位區 22:暫存區 30:預測試機台 40:測試機台 50:機械手臂10: Test panel 11: The first test disk 12: The second test disc 13: The third test disc 20: locate temporary storage disk 21: Positioning area 22: Temporary storage area 30: Pre-test machine 40: Test machine 50: Robotic arm

圖1為本發明記憶體晶片超頻測試模組的示意圖; 圖2為本發明測試盤區的詳細示意圖; 圖3為本發明定位暫存盤的詳細示意圖; 圖4為本發明記憶體晶片超頻測試模組的實施例示意圖;以及 圖5為本發明記憶體晶片超頻測試方法的流程示意圖。FIG. 1 is a schematic diagram of the memory chip overclocking test module of the present invention; Figure 2 is a detailed schematic diagram of the test panel of the present invention; Figure 3 is a detailed schematic diagram of the positioning temporary storage disk of the present invention; 4 is a schematic diagram of an embodiment of the memory chip overclocking test module of the present invention; and FIG. 5 is a schematic flowchart of the overclocking test method of the memory chip of the present invention.

10:測試盤區 10: Test panel

20:定位暫存盤 20: locate temporary storage disk

30:預測試機台 30: Pre-test machine

40:測試機台 40: Test machine

50:機械手臂 50: Robotic arm

Claims (10)

一種記憶體晶片超頻測試模組,應用在篩檢不同速度的記憶體晶片,包含: 一測試盤區,放置待測試的記憶體晶片; 一定位暫存盤,該定位暫存盤分為一定位區以及一暫存區,該定位區用以調整記憶體晶片之排列; 至少一預測試機台,且該預測試機台內設定有一預測試參數; 多個測試機台;以及 一機械手臂,該機械手臂用以抓取記憶體晶片,且該機械手臂電性連接該測試盤區、該定位暫存盤、該至少一預測試機台以及該等測試機台; 其中該機械手臂從該測試盤區抓取記憶體晶片至該定位暫存盤的該定位區,使記憶體晶片排列一致,再次抓取記憶體晶片移動至該至少一預測試機台,藉由該至少一預測試機台依據該預測試參數對記憶體晶片進行第一階段篩檢,通過第一階段篩檢的記憶體晶片由該機械手臂移動到該測試機台,對記憶體晶片進行完整晶片測試,該暫存區用以存放等待進行完整晶片測試之記憶體晶片,未通過測試的記憶體晶片則由該機械手臂移回該測試盤區。A memory chip overclocking test module, which is used to screen memory chips of different speeds, including: A test panel, where the memory chip to be tested is placed; A positioning temporary storage disk, the positioning temporary storage disk is divided into a positioning area and a temporary storage area, the positioning area is used to adjust the arrangement of memory chips; At least one pre-test machine, and a pre-test parameter is set in the pre-test machine; Multiple test machines; and A robotic arm for grabbing memory chips, and the robotic arm is electrically connected to the test panel, the positioning temporary storage disk, the at least one pre-test machine, and the test machines; The robot arm grabs the memory chip from the test panel to the positioning area of the positioning temporary storage disk, so that the memory chip is aligned uniformly, and then grabs the memory chip again and moves to the at least one pre-testing machine. At least one pre-testing machine performs a first-stage screening of memory chips according to the pre-testing parameters, and the memory chips that pass the first-stage screening are moved by the robotic arm to the testing machine to perform complete chip testing on the memory chips. For testing, the temporary storage area is used to store memory chips waiting for a complete chip test, and the memory chips that fail the test are moved back to the test panel by the robotic arm. 依據申請專利範圍第1項所述之記憶體晶片超頻測試模組,其中該測試盤區進一步包含至少一第一測試盤、至少一第二測試盤以及至少一第三測試盤,該至少一第一測試盤放置準備進行第一次篩選的記憶體晶片,該至少一第二測試盤放置等待降階再測試的記憶體晶片,該至少一第三測試盤放置待淘汰的記憶體晶片。According to the memory chip overclocking test module described in claim 1, wherein the test panel further includes at least one first test panel, at least one second test panel, and at least one third test panel, the at least one second test panel A test disk is placed with memory chips to be screened for the first time, the at least one second test disk is placed with memory chips waiting to be retested after downgrading, and the at least one third test disk is placed with memory chips to be eliminated. 依據申請專利範圍第1項所述之記憶體晶片超頻測試模組,其中該預測試參數,依據使用者欲篩選出特定速度的記憶體晶片做設定,該預測試需比欲篩選出的特定速度高。According to the memory chip overclocking test module described in item 1 of the scope of patent application, the pre-test parameters are set according to the memory chip that the user wants to filter out a specific speed, and the pre-test needs to be higher than the specific speed to be filtered out high. 依據申請專利範圍第1項所述之記憶體晶片超頻測試模組,其中記憶體晶片是否通過該預測試機台的篩檢,係透過一通訊裝置的介面,讓該機械手臂分辨記憶體晶片是否通過預測試的篩檢。According to the memory chip overclocking test module described in item 1 of the scope of patent application, whether the memory chip passes the screening of the pre-testing machine is through the interface of a communication device, allowing the robotic arm to distinguish whether the memory chip is Pass the pre-test screening. 依據申請專利範圍第1項所述之記憶體晶片超頻測試模組,其中該預測試機台進行的第一階段篩檢進一步包含直流參數測試和交流參數測試。According to the memory chip overclocking test module described in item 1 of the scope of patent application, the first stage screening performed by the pre-testing machine further includes a DC parameter test and an AC parameter test. 一種記憶體晶片超頻測試方法,應用在兩階段的記憶體晶片測試製程中,包含: 決定並設定一預測試參數且儲存於一預測試機台中,將所有待進行第一次篩選得記憶體晶片放置在一測試盤區上,一機械手臂將該測試盤區上之其中一排記憶體晶片抓取且移動至一定位暫存盤中的一定位區,進行定位亦即調整記憶體晶片的排列; 該機械手臂將記憶體晶片移動至該預測試機台,該預測試機台對記憶體晶片通電測試,此階段的預測試視為第一階段測試; 完成第一階段測試後,該機械手臂將視記憶體晶片預測試的結果,將記憶體晶片移往不同地方,若記憶體晶片通過該預測試機台的預測試,則將記憶體晶片抓取到一測試機台進行第二階段測試,此第二階段測試為完整的晶片測試,若記憶體晶片未通過該預測試機台的預測試,則該機械手臂將記憶體晶片抓取回該測試盤區,等待降階再測試,當所有的該測試機台都正在執行第二階段測試時,該機械手臂便會將通過預測試的記憶體晶片先移放至該定位暫存盤中的一暫存區; 經過完整晶片測試的第二階段測試之記憶體晶片,即確定記憶體晶片的速度,得以完成記憶體晶片的分類; 未通過預測試的記憶體晶片,在等待所有記憶體晶片都完成第一次篩選後,重新對該預測試機台設定新的預測試參數,重複上述的步驟流程進行降階再測試; 直到所有記憶體晶片完成篩選及分類後結束。A memory chip overclocking test method, which is applied in a two-stage memory chip test process, including: Determine and set a pre-test parameter and store it in a pre-test machine. Place all memory chips to be screened for the first time on a test panel, and a robotic arm will store one row of memory on the test panel The bulk chip is grasped and moved to a positioning area in a positioning temporary storage disk, and the positioning is performed, that is, the arrangement of the memory chip is adjusted; The robotic arm moves the memory chip to the pre-testing machine, and the pre-testing machine energizes the memory chip to test. The pre-test at this stage is regarded as the first-stage test; After completing the first stage of testing, the robotic arm will move the memory chip to different places based on the results of the pre-test of the memory chip. If the memory chip passes the pre-test of the pre-testing machine, it will grab the memory chip Go to a test machine for the second stage test. This second stage test is a complete chip test. If the memory chip fails the pre-test of the pre-test machine, the robotic arm will grab the memory chip back for the test When all the test machines are performing the second stage test, the robotic arm will first move the memory chips that pass the pre-test to a temporary location in the temporary storage disk. Storage area The memory chip that has passed the second stage of the complete chip test, that is, the speed of the memory chip is determined, and the classification of the memory chip can be completed; For memory chips that fail the pre-test, after waiting for all memory chips to complete the first screening, re-set new pre-test parameters for the pre-test machine, and repeat the above steps to perform downgrading and re-test; It will end after all memory chips have been screened and classified. 依據申請專利範圍第6項所述之記憶體晶片超頻測試方法,其中該測試盤區進一步包含至少一第一測試盤、至少一第二測試盤以及至少一第三測試盤,該至少一第一測試盤放置準備進行第一次篩選的記憶體晶片,該至少一第二測試盤放置等待降階再測試的記憶體晶片,該至少一第三測試盤放置待淘汰的記憶體晶片。According to the memory chip overclocking test method described in the scope of patent application, the test panel further includes at least one first test disk, at least one second test disk, and at least one third test disk, the at least one first test disk The test disk is placed with memory chips to be screened for the first time, the at least one second test disk is placed with memory chips to be retested after downgrading, and the at least one third test disk is placed with memory chips to be eliminated. 依據申請專利範圍第6項所述之記憶體晶片超頻測試方法,其中該預測試參數,依據使用者欲篩選出特定速度的記憶體晶片做設定,該預測試需比欲篩選出的特定速度高。According to the memory chip overclocking test method described in item 6 of the scope of patent application, the pre-test parameters are set according to the memory chip that the user wants to screen out a specific speed, and the pre-test needs to be higher than the specific speed to be screened out . 依據申請專利範圍第6項所述之記憶體晶片超頻測試方法,其中記憶體晶片是否通過該預測試機台的第一階段測試,係透過一通訊裝置的介面,讓該機械手臂分辨記憶體晶片是否通過預測試的篩檢。According to the memory chip overclocking test method described in item 6 of the scope of patent application, whether the memory chip passes the first stage test of the pre-testing machine is through the interface of a communication device, allowing the robotic arm to distinguish the memory chip Whether to pass the pre-test screening. 依據申請專利範圍第6項所述之記憶體晶片超頻測試方法,其中該預測試機台進行的第一階段篩檢進一步包含直流參數測試和交流參數測試。According to the memory chip overclocking test method described in item 6 of the scope of patent application, the first stage screening performed by the pre-testing machine further includes a DC parameter test and an AC parameter test.
TW108123869A 2019-07-05 2019-07-05 Memory chip overclocking test module and method thereof TWI708252B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW108123869A TWI708252B (en) 2019-07-05 2019-07-05 Memory chip overclocking test module and method thereof
KR1020190179096A KR102248671B1 (en) 2019-07-05 2019-12-31 Module and method of memory chip overclocking test

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW108123869A TWI708252B (en) 2019-07-05 2019-07-05 Memory chip overclocking test module and method thereof

Publications (2)

Publication Number Publication Date
TWI708252B TWI708252B (en) 2020-10-21
TW202103175A true TW202103175A (en) 2021-01-16

Family

ID=74091844

Family Applications (1)

Application Number Title Priority Date Filing Date
TW108123869A TWI708252B (en) 2019-07-05 2019-07-05 Memory chip overclocking test module and method thereof

Country Status (2)

Country Link
KR (1) KR102248671B1 (en)
TW (1) TWI708252B (en)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050055466A (en) * 2003-12-08 2005-06-13 매그나칩 반도체 유한회사 Method for reducing test time of semiconductor device
US7619432B2 (en) * 2004-01-29 2009-11-17 Howard Roberts Tandem handler system and method for reduced index time
US7473568B2 (en) * 2006-05-17 2009-01-06 Kingston Technology Corp. Memory-module manufacturing method with memory-chip burn-in and full functional testing delayed until module burn-in
KR20090115615A (en) * 2008-05-02 2009-11-05 프롬써어티 주식회사 Memory test system having fail judgment apparatus and method for judging fail of devices in memory test system
KR20100002357A (en) * 2008-06-30 2010-01-07 삼성전자주식회사 Methode for managing multi burn-in test
TWM385789U (en) * 2010-03-22 2010-08-01 Golden Emperor Internat Ltd Integrated circuit chip detection equipment
CN102737724B (en) * 2011-04-07 2016-04-06 北京大家玩科技有限公司 Nonvolatile random access memory method of testing

Also Published As

Publication number Publication date
KR20210005505A (en) 2021-01-14
KR102248671B1 (en) 2021-05-06
TWI708252B (en) 2020-10-21

Similar Documents

Publication Publication Date Title
US10622090B2 (en) Arbitration for memory diagnostics
TW201518743A (en) Semiconductor chip retesting system and retesting method thereof
US11009544B2 (en) Inspection system, wafer map display, wafer map display method, and computer program
CN101561474B (en) Testing method with dynamically changed test procedure
EP1443339A1 (en) Method and apparatus for performing simultaneous testing of integrated circuits
CN109710472A (en) Memory automatic test and stage division
TWI686810B (en) Memory chip overclocking test method
TWI708252B (en) Memory chip overclocking test module and method thereof
CN103345944B (en) Storage device and method for testing storage device through test machine
CN101154468A (en) Test method for embedded memory chip
JPH0658925B2 (en) Integrated circuit test equipment
CN112309492A (en) Memory chip over-frequency test module and method thereof
CN209000871U (en) A kind of wafer test system
TWM585963U (en) Memory chip overclocking test module
TWM585964U (en) Memory chip overclocking test device
TW201508284A (en) Automatic retest method for system level IC test machine and the test machine
CN210253175U (en) Over-frequency testing device for memory chip
CN209947446U (en) Memory chip over-frequency test module
US20100100786A1 (en) Serial test mode of an integrated circuit (ic)
CN112317352B (en) Over-frequency testing method for memory chip
JP2004333499A (en) Test method of semiconductor device
KR100630701B1 (en) Test board of semiconductor tester having modified I/O printed circuit pattern and method for testing thereof
TW200536033A (en) Auto recovery wafer testing apparatus and wafer testing method
US20120242362A1 (en) Test apparatus
KR100780849B1 (en) Method for testing wafer per shot