TW202038323A - Manufacturing method of laminated device wafer including polishing a front surface of a first wafer with a polishing pad and slurry after dividing step of the first wafer - Google Patents
Manufacturing method of laminated device wafer including polishing a front surface of a first wafer with a polishing pad and slurry after dividing step of the first wafer Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 31
- 239000002002 slurry Substances 0.000 title abstract description 17
- 235000012431 wafers Nutrition 0.000 claims abstract description 231
- 238000005406 washing Methods 0.000 claims description 27
- 238000002360 preparation method Methods 0.000 claims description 23
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
- H01L21/02065—Cleaning during device manufacture during, before or after processing of insulating layers the processing being a planarization of insulating layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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Abstract
Description
本發明是有關於一種積層器件晶片之製造方法。The present invention relates to a method for manufacturing a laminated device wafer.
以往,在製造包含複數層器件之積層器件晶片時,是如專利文獻1及專利文獻2所示,藉由使用了切割刀片的切割加工來分割重疊的二片晶圓、或者藉由以雷射光線的照射所進行之燒蝕加工來進行分割。Conventionally, when manufacturing multilayer device wafers containing multiple layers of devices, as shown in
又,為了提升積層器件晶片的生產性,在專利文獻3揭示的技術中,是將已分割的器件晶片貼合於形成在其他晶圓上的器件。之後,藉由分割此晶圓,來製造積層器件晶片。
先行技術文獻
專利文獻In addition, in order to improve the productivity of the multilayer device wafer, in the technique disclosed in
專利文獻1 特開2015-191961號公報
專利文獻2 特開2016-178162號公報
專利文獻3 特開2015-233049號公報
發明欲解決之課題Problems to be solved by the invention
但是,在專利文獻3的技術中,會有下述情況:欲貼合到其他晶圓的器件之已分割的器件晶片的貼合面上,附著有在分割加工中所產生的加工屑(切割屑或碎屑)。此時,容易使器件晶片對其他晶圓的器件的貼合變得不完全。However, in the technique of
又,也可考慮以下作法:藉由噴附高壓洗淨水來將器件晶片的貼合面變乾淨。但是,若洗淨水的壓力變高時,會有將器件晶片從黏著膠帶吹跑的可能性。又,在器件晶片的貼合面熔接有加工屑的情況下,欲藉由高壓的洗淨水去除加工屑是困難的。In addition, the following method can also be considered: spraying high-pressure cleaning water to clean the bonding surface of the device wafer. However, if the pressure of the washing water becomes higher, there is a possibility that the device wafer will be blown off the adhesive tape. In addition, when processing debris is welded to the bonding surface of the device wafer, it is difficult to remove the processing debris with high-pressure washing water.
本發明之目的在於:可在製造積層器件晶片時,從器件晶片的貼合面良好地去除加工屑。 用以解決課題之手段The object of the present invention is to allow good removal of processing debris from the bonding surface of the device wafer when manufacturing a multilayer device wafer. Means to solve the problem
本發明的積層器件晶片之製造方法(本製造方法)是製造積層器件晶片的積層器件晶片之製造方法,用以製造包含第1器件與第2器件的前述積層器件晶片,前述第1器件是形成在以複數條分割預定線所區劃出的第1晶圓的正面的各區域,前述第2器件是形成在以複數條分割預定線所區劃出的第2晶圓的正面的各區域,前述積層器件晶片之製造方法包含以下步驟: 第1晶圓分割步驟,藉由將包含環形框架、黏著膠帶與該第1晶圓之工件組的該第1晶圓沿著該分割預定線分割而形成複數個第1晶片,前述黏著膠帶是貼附於該環形框架以堵塞該環形框架的開口,前述第1晶圓是將背面貼附於該黏著膠帶; 研磨步驟,該第1晶圓分割步驟後,藉由以研磨墊研磨包含複數個成為該第1晶片中的貼合面的該第1器件之第1正面,而從該第1正面去除加工屑; 洗淨步驟,該研磨步驟後,藉由對該第1晶片的該第1正面側供給洗淨水來洗淨該第1晶片; 拾取步驟,該洗淨步驟後,使該第1晶片從該黏著膠帶離開; 準備步驟,實施用於將該第1晶片的該第1正面與該第2晶圓中的該第2器件的貼合面即第2正面設成可相貼合的準備; 貼合步驟,使該第1晶片的該第1正面面對該第2器件的該第2正面,並將該第2正面與該第1正面相貼合;及 積層器件晶片製造步驟,該貼合步驟後,藉由沿著該第2晶圓的該分割預定線分割該第2晶圓,而製造一個個的積層器件晶片。The manufacturing method of the multilayer device wafer of the present invention (this manufacturing method) is a method of manufacturing a multilayer device wafer for manufacturing a multilayer device wafer, for manufacturing the multilayer device wafer including the first device and the second device, and the first device is formed In each area on the front surface of the first wafer divided by a plurality of planned dividing lines, the second device is formed in each area on the front surface of the second wafer divided by a plurality of planned dividing lines. The manufacturing method of the device wafer includes the following steps: In the first wafer dividing step, a plurality of first wafers are formed by dividing the first wafer including a ring frame, an adhesive tape, and a workpiece set of the first wafer along the planned dividing line, and the adhesive tape is Attaching to the ring frame to block the opening of the ring frame, and attaching the back side of the first wafer to the adhesive tape; In the polishing step, after the first wafer dividing step, the first front surface of the first device including a plurality of bonding surfaces in the first wafer is polished with a polishing pad to remove processing debris from the first front surface ; A washing step, after the grinding step, washing the first wafer by supplying washing water to the first front side of the first wafer; A picking step, after the cleaning step, the first chip is separated from the adhesive tape; The preparation step is to implement preparations for making the first front surface of the first wafer and the bonding surface of the second device in the second wafer, that is, the second front surface capable of bonding; In the bonding step, the first front surface of the first chip faces the second front surface of the second device, and the second front surface is bonded to the first front surface; and In the step of manufacturing a multilayer device wafer, after the bonding step, the second wafer is divided along the planned dividing line of the second wafer to manufacture individual multilayer device wafers.
又,在本製造方法中,亦可為:該準備步驟包含: 第1準備步驟,藉由對該第1晶片的該第1正面照射大氣壓電漿而使該第1正面活性化;及 第2準備步驟,藉由對該第2晶圓的該第2器件的該第2正面照射大氣壓電漿而使該第2正面活性化。 發明效果In addition, in this manufacturing method, it may also be that the preparation step includes: In the first preparation step, the first front surface of the first chip is activated by irradiating the first front surface of the first wafer with atmospheric pressure; and In a second preparation step, the second front surface of the second device of the second wafer is activated by irradiating the second front surface of the second device with atmospheric pressure. Invention effect
在本製造方法中,是在第1晶圓分割步驟中分割第1晶圓而得到第1晶片後,在研磨步驟中研磨第1晶片的第1正面。藉此,可以良好地去除已附著或熔接於第1晶片的第1正面的加工屑。因此,變得可在之後的貼合步驟中,良好地將第1晶片的第1正面與第2器件的第2正面相貼合。其結果,可以提高有關於積層器件晶片之製造的良率。In this manufacturing method, after dividing the first wafer in the first wafer dividing step to obtain the first wafer, the first front surface of the first wafer is polished in the polishing step. With this, it is possible to well remove the processing chips that have adhered or welded to the first surface of the first wafer. Therefore, it becomes possible to bond the first front surface of the first wafer and the second front surface of the second device well in the subsequent bonding step. As a result, it is possible to improve the yield rate related to the manufacture of multilayer device wafers.
又,在本製造方法中,亦可在準備步驟中,藉由對第1晶圓的第1正面照射大氣壓電漿而使第1正面活性化,並且藉由對第2器件的第2正面照射大氣壓電漿而使第2正面活性化。藉此,在貼合步驟中,可藉由混合接合(hybrid bonding)來將第1正面與第2正面相貼合。藉此,可以不需要用於貼合的接著劑。In addition, in the present manufacturing method, in the preparation step, the first front surface of the first wafer may be activated by irradiating atmospheric pressure piezoelectric paste, and the second surface of the second device may be irradiated Atmospheric pressure activates the second front surface. Thereby, in the bonding step, the first front surface and the second front surface can be bonded by hybrid bonding. This eliminates the need for an adhesive for bonding.
用以實施發明之形態The form used to implement the invention
在本實施形態之積層器件晶片之製造方法中,所使用的是第1晶圓與第2晶圓之2片晶圓。
如圖1所示,第1晶圓W1是圓板狀的矽基板,前述矽基板具有作為正面之第1正面2a、及作為背面之第1背面2b。在第1晶圓W1的第1正面2a,在藉由格子狀的複數條分割預定線3所區劃出的區域的每一個中形成有第1器件4。In the manufacturing method of the multilayer device wafer of this embodiment, two wafers of the first wafer and the second wafer are used.
As shown in FIG. 1, the first wafer W1 is a disc-shaped silicon substrate, and the silicon substrate has a
另一方面,第2晶圓W2也具有與第1晶圓W1同樣之圖1所示的構成。亦即,第2晶圓W2是具有第2正面12a及第2背面12b之圓板狀的矽基板,且在第2正面12a中的藉由分割預定線13所區劃出的區域的每一個中形成有第2器件14。On the other hand, the second wafer W2 also has the same configuration shown in FIG. 1 as the first wafer W1. That is, the second wafer W2 is a disc-shaped silicon substrate having a
再者,第1器件4及第2器件14各自形成在第1晶圓W1的第1正面2a及第2晶圓W2的第2正面12a。因此,第1正面2a及第2正面12a也各自為第1器件4及第2器件14的正面。又,第1正面2a也可為藉由分割第1晶圓W1而得到的第1晶片的正面。
因此,在以下,有時也會使用如「第1器件4的第1正面2a」、「第2器件14的第2正面12a」及「第1晶片的第1正面2a」的表現。Furthermore, the
接著,說明本實施形態的各步驟。Next, each step of this embodiment will be described.
[磨削步驟]
在此步驟中,如圖2所示,是將第1晶圓W1設置在具備有第1工作夾台21及磨削部23的磨削裝置20。
此時,將第1晶圓W1中的形成有第1器件4的第1正面2a藉由作為保護構件的正面保護膠帶10來覆蓋。[Grinding step]
In this step, as shown in FIG. 2, the first wafer W1 is set in the
第1工作夾台21具備有可連通於未圖示的吸引源之由多孔材等所構成的第1保持面22。
並且,如圖2所示,將第1晶圓W1的正面保護膠帶10側吸引保持在第1保持面22。藉此,第1晶圓W1是以其第1背面2b向上露出的狀態被固定於第1工作夾台21。The
磨削裝置20的磨削部23具備有第1主軸24、及可和第1主軸24一起旋轉的磨削輪25。在磨削輪25的底面將複數個磨削磨石26配設成環狀。The
並且,在磨削步驟中,第1工作夾台21朝例如箭頭A方向旋轉。進一步地使磨削部23的磨削輪25一邊朝箭頭A方向旋轉一邊下降。然後,磨削磨石26對第1晶圓W1的第1背面2b一邊按壓一邊磨削。藉此,可將第1晶圓W1薄化。In addition, in the grinding step, the first work chuck 21 rotates in the arrow A direction, for example. Furthermore, the
[裝設步驟] 在此步驟中,如圖3所示,是使用已在磨削步驟中薄化之第1晶圓W1、與環形框架F及切割膠帶T而形成工件組WS。[Installation steps] In this step, as shown in FIG. 3, the first wafer W1, which has been thinned in the grinding step, the ring frame F and the dicing tape T are used to form the workpiece group WS.
亦即,首先,使具有開口Fa之環狀的環形框架F的中心與第1晶圓W1的中心一致,來使第1晶圓W1配置在開口Fa內。接著,將圓形狀的切割膠帶T貼附到環形框架F與第1晶圓W1的第1背面2b。
藉此,可形成工件組WS。That is, first, the center of the ring-shaped ring frame F having the opening Fa is aligned with the center of the first wafer W1 to arrange the first wafer W1 in the opening Fa. Next, the circular dicing tape T is attached to the ring frame F and the
之後,將正面保護膠帶10從已透過切割膠帶T被支撐在環形框架F之第1晶圓W1的第1正面2a剝離。藉此,如圖4所示,可在工件組WS上露出第1晶圓W1的第1正面2a。After that, the front
[第1晶圓分割步驟]
在此步驟中,是藉由沿著分割預定線3分割工件組WS的第1晶圓W1,而形成包含第1器件4的複數個第1晶片。
在此步驟中,是如圖5所示,將包含第1晶圓W1之工件組WS設置在具備有第2工作夾台31及切割部33的切割裝置30。
第2工作夾台31具備有可連通於未圖示的吸引源之由多孔材等所構成的第2保持面32。[First Wafer Dividing Step]
In this step, by dividing the first wafer W1 of the workpiece group WS along the planned dividing
在分割步驟中,是如圖5所示,將第1晶圓W1的第1背面2b隔著切割膠帶T吸引保持在第2保持面32。又,環形框架F是被未圖示之夾持夾具所保持。藉此,第1晶圓W1是以其第1正面2a向上露出的狀態被固定於第2工作夾台31。In the dividing step, as shown in FIG. 5, the
切割裝置30的切割部33具備有具有水平方向之旋轉軸的第2主軸34、以及可和第2主軸34一起旋轉的切割刀片35。
然後,在切割步驟中,是一邊使第2主軸34朝箭頭B方向旋轉一邊使切割部33下降。此外,使保持有第1晶圓W1的第2工作夾台31在水平面內朝與第2主軸34的旋轉軸正交的方向移動。The
藉此,切割刀片35沿著設置在第1晶圓W1的第1正面2a中的第1器件4之間的分割預定線3來切斷第1晶圓W1。Thereby, the
其結果,將第1晶圓W1分割成複數個第1晶片C1,第1晶圓W1的第1正面2a成為第1晶片C1的第1正面2a。再者,第1晶片C1是在其第1正面2a,具有一個個第1器件4。此第1正面2a成為第1晶片C1的貼合面。As a result, the first wafer W1 is divided into a plurality of first wafers C1, and the
[研磨步驟]
在此步驟中,是藉由以研磨墊研磨包含複數個成為第1晶片C1中的貼合面的第1器件4之第1正面2a,而從第1正面2a去除加工屑。[Grinding step]
In this step, the first
在此步驟中,是如圖6所示,將已分割成複數個第1晶片C1的第1晶圓W1,直接以和環形框架F以及切割膠帶T為一體之工件組WS的形態,從切割裝置30取下並設置到研磨裝置40。In this step, as shown in FIG. 6, the first wafer W1, which has been divided into a plurality of first wafers C1, is directly in the form of the workpiece group WS integrated with the ring frame F and the dicing tape T from the dicing The
研磨裝置40具備有第3工作夾台41及研磨部43。第3工作夾台41具備有可連通於未圖示的吸引源之由多孔材等所構成的第3保持面42。The polishing
在研磨步驟中,是如圖6所示,與分割步驟同樣地將第1晶圓W1的第1背面2b隔著切割膠帶T吸引保持於第3保持面42。又,環形框架F是被未圖示之夾持夾具所保持。藉此,第1晶圓W1是以其第1正面2a向上露出的狀態被固定於第3工作夾台41。In the polishing step, as shown in FIG. 6, the
研磨裝置40的研磨部43具備有第3主軸44、及可和第3主軸44一起旋轉的研磨板45。研磨板45的底面配設有平板狀的研磨墊46。The polishing
並且,在研磨步驟中,第3工作夾台41是例如朝箭頭C方向旋轉。此外,研磨部43之研磨板45一邊朝箭頭C方向旋轉一邊下降。並且,研磨墊46一邊按壓第1晶圓W1的第1正面2a(亦即第1晶片C1的第1正面2a)一邊進行研磨。In addition, in the polishing step, the
又,可在由研磨墊46進行的研磨時,透過第3主軸44內的研磨漿料供給路44a將研磨漿料供給至第1晶片C1的第1正面2a與研磨墊46之間。
因此,形成有貫通於研磨板45與研磨墊46之中心的貫通孔,且已通過研磨漿料供給路44a的研磨漿料是通過貫通孔而供給到第1晶片C1的第1正面2a與研磨墊46之間。
又,亦可將研磨漿料供給到未被研磨墊46覆蓋的第1晶圓W1的第1正面2a。又,亦可將研磨漿料供給到接觸於第1晶圓W1的第1正面2a之研磨墊46未接觸於第1正面2a的研磨面。
又,亦可進行成將所供給之研磨漿料滯留在第1晶圓W1的外周與環形框架F的內周之間的切割膠帶T上,來對研磨面供給所滯留的研磨漿料。In addition, during polishing by the
藉由這樣的研磨,可從第1晶片C1的第1正面2a去除在先前的步驟中已附著或已熔接之磨削屑、切割屑以及碎屑等之加工屑。再者,研磨去除量為例如3nm~5nm之範圍。By such polishing, machining chips such as grinding chips, dicing chips, and chips that have adhered or welded in the previous step can be removed from the first
[洗淨步驟]
在此步驟中,是藉由將洗淨水供給至第1晶片C1的第1正面2a側,而洗淨第1晶片C1。
在這個步驟中,是如圖7所示,在第1正面2a之研磨後,將包含複數個第1晶片C1的第1晶圓W1直接以和環形框架F及切割膠帶T為一體之工件組WS的形態,從研磨裝置40取下並設置到旋轉洗淨裝置50。[Washing steps]
In this step, the first wafer C1 is cleaned by supplying washing water to the first
旋轉洗淨裝置50具備有旋轉工作台51及旋轉洗淨部53。旋轉工作台51具備有可連通於未圖未的吸引源之由多孔材等所構成的第4保持面52。The
在洗淨步驟中,是如圖7所示,與研磨步驟等同樣地將第1晶圓W1的第1背面2b隔著切割膠帶T吸引保持於第4保持面52。又,環形框架F是被未圖示之夾持夾具所保持。藉此,第1晶圓W1是以其第1正面2a向上露出的狀態被固定於旋轉工作台51。In the cleaning step, as shown in FIG. 7, the
旋轉洗淨裝置50的旋轉洗淨部53具備有洗淨噴嘴54、及用於使洗淨噴嘴54在水平方向上移動的水平移動機構55。The
水平移動機構55具有在水平方向上延伸之軸桿56、及支撐洗淨噴嘴54之支撐構件57。支撐構件57可以直接以已支撐(保持)有洗淨噴嘴54的狀態,沿著軸桿56在水平方向上移動。又,對洗淨噴嘴54連接有水供給源58及空氣供給源59。The
並且,在洗淨步驟中,旋轉工作台51是例如朝箭頭D方向旋轉。此外,藉由支撐構件57,可讓已配置於第1晶圓W1的上方之洗淨噴嘴54如箭頭E所示地在水平方向上移動。In addition, in the washing step, the rotating table 51 is rotated in the arrow D direction, for example. In addition, with the
此時,可將從水供給源58所供給的水與從空氣供給源59所供給的空氣之混合物即雙流體洗淨水,從洗淨噴嘴54噴射出。
如此進行,可將雙流體洗淨水噴射於第1晶圓W1中的大致所有的第1晶片C1的第1正面2a,而洗淨第1晶片C1。
再者,在洗淨步驟中,在上述雙流體洗淨中有以下情形:於第1晶片C1較小時致使第1晶片C1飛離切割膠帶T。又,有以下情形:要從第1晶圓W1的第1正面2a去除研磨漿料時,會耗費許多時間。作為其對策,亦可使洗淨構件接觸於第1晶圓W1來將第1晶圓W1的第1正面2a洗淨。作為洗淨構件,可使用刷子(brush) 、SOFROUS®海棉。再者,刷子宜使用擦洗刷(scrub brush)。At this time, two-fluid washing water, which is a mixture of water supplied from the
[拾取步驟] 在此步驟中,是使第1晶片C1從切割膠帶T離開。亦即,從切割膠帶T拾取第1晶片C1。[Pickup Step] In this step, the first wafer C1 is separated from the dicing tape T. That is, the first wafer C1 is picked up from the dicing tape T.
在此步驟中,首先,是於第1晶片C1的洗淨後選擇應被拾取(亦即良品的)第1晶片C1。在此選擇中,是例如藉由測定器等探針來檢查各第1晶片C1的適當與否(完成品質)。然後,將已檢查合格者選擇作為應拾取之第1晶片C1。In this step, first, after the first wafer C1 is cleaned, the first wafer C1 to be picked up (that is, a good product) is selected. In this selection, the suitability (finished quality) of each first wafer C1 is checked by, for example, a probe such as a measuring instrument. Then, the one that has passed the inspection is selected as the first wafer C1 to be picked up.
之後,如圖8所示,將包含複數個第1晶片C1之第1晶圓W1,直接以和環形框架F及切割膠帶T為一體之工件組WS的形態,從旋轉洗淨裝置50取下並設置到拾取裝置60。After that, as shown in FIG. 8, the first wafer W1 including a plurality of first wafers C1 is directly removed from the
拾取裝置60具備有筒狀的支撐台61。支撐台61是支撐工件組WS中的環形框架F之支撐台,並具備有用於支撐環形框架F之複數個夾持夾具62。The
在拾取步驟中,是如圖8所示,藉由以具備有夾持夾具62的支撐台61支撐環形框架F,而將第1晶圓W1在其第1正面2a向上露出的狀態下固定。In the pickup step, as shown in FIG. 8, the ring frame F is supported by the support table 61 provided with the clamping
又,拾取裝置60在支撐台61的內部的第1晶圓W1的下方具備有頂推構件66。頂推構件66具有可在上下方向上移動的頂推銷67。
此外,拾取裝置60具備有配置於第1晶圓W1的上方,且可連通於吸引源65的第1吸引構件63。In addition, the
並且,在拾取步驟中,是頂推構件66從下方藉由頂推銷67將應拾取的第1晶片C1朝上方頂推。此外,將已被頂推的第1晶片C1藉由第1吸引構件63吸引保持,而從切割膠帶T拾取。第1吸引構件63是將所拾取的第1晶片C1搬送到預定的保管場所。
如此進行而將第1晶片C1中的所有的良品的第1晶片C1搬送到保管場所。In addition, in the picking step, the pushing
[準備步驟]
在此步驟中,是實施用於將第1晶片C1的第1正面2a與第2晶圓W2中的第2器件14的貼合面即第2正面12a設成可相貼合的準備。[Preparation steps]
In this step, preparation is performed for making the first
在此步驟中,首先,是藉由使圖1所示的第2晶圓W2和環形框架F及切割膠帶T一體化,而形成和圖4所示之第1晶圓W1之構成同樣的工件組WS。
之後,如圖9所示,將第2晶圓W2的工件組WS設置在貼合裝置70。In this step, first, the second wafer W2 shown in FIG. 1 is integrated with the ring frame F and the dicing tape T to form a workpiece with the same configuration as the first wafer W1 shown in FIG. 4 Group WS.
After that, as shown in FIG. 9, the work group WS of the second wafer W2 is set in the
貼合裝置70具備有保持第2晶圓W2的工作夾台71、保持第1晶片C1的第2吸引構件72、以及產生大氣壓電漿的電漿產生器75。
工作夾台71是構成為藉由使吸引源連通於保持面而吸引保持第2晶圓W2。The
並且,如圖9所示,將第2晶圓W2的第2背面12b隔著切割膠帶T吸引保持在工作夾台71上。又,環形框架F是被未圖示之夾持夾具所保持。藉此,第2晶圓W2是以其第2正面12a向上露出的狀態被固定於工作夾台71。And, as shown in FIG. 9, the
接著,選擇應使用的(亦即良品的)第2器件14。在此選擇中,是例如藉由測定器等的探針來檢查各第2器件14的適當與否(完成品質)。然後,將已檢查合格者選擇作為應使用的第2器件14。例如,可對不合格的(亦即不良品的)第2器件14施行標記。Next, select the
第2吸引構件72已接地,並且構成為可連通於吸引源73。在準備步驟中,第2吸引構件72是將已在拾取步驟中被搬送到預定的保管場所之良品的第1晶片C1從其第1背面2b側吸引保持。亦即,第1晶片C1是以已將貼合面即第1正面2a露出的狀態被第2吸引構件72所吸引保持。
並且,第2吸引構件72是將已吸引保持的第1晶片C1配置在1個應使用的第2器件14的上方。The
電漿產生器75是連接於例如供給氬氣或氦氣等稀有氣體的電漿氣體供給源76、及高頻電源77。The plasma generator 75 is connected to a plasma gas supply source 76 that supplies a rare gas such as argon or helium, and a high-
並且,在準備步驟中,是將電漿產生器75的前端配置在已保持於第2吸引構件72的第1晶圓W1的第1正面2a、與其下方的第2器件14的第2正面12a之間。
此外,電漿產生器75是使用稀有氣體及高頻電力來生成大氣壓電漿,且從其前端朝上下方向照射大氣壓電漿。In the preparation step, the tip of the plasma generator 75 is arranged on the first
藉此,可對第1晶片C1的第1正面2a照射大氣壓電漿,而將第1正面2a活性化(第1準備步驟)。同樣地,可對第2器件14的第2正面12a照射大氣壓電漿,而將第2正面12a活性化(第2準備步驟)。Thereby, the first
在此,第1器件4之第1正面2a及第2器件14之第2正面12a露出有矽(Si)及銅(電極材料)。並且,藉由上述之活性化,可在第1正面2a及第2正面12a形成SiON及SiN等的氮化膜、以及SiO2
等的氧化膜。Here, silicon (Si) and copper (electrode material) are exposed on the first
[貼合步驟]
在此步驟中,是使第1晶片C1的第1正面2a與第2晶圓W2中的第2器件14的第2正面12a相面對,而將第2正面12a與第1正面2a相貼合。[Fitting steps]
In this step, the first
亦即,在此步驟中,是如圖10所示,讓保持有第1晶片C1的第2吸引構件72如箭頭G所示地下降,其中前述第1晶片C1具有已在準備步驟中被活性化的第1正面2a。That is, in this step, as shown in FIG. 10, the second attracting
藉此,可將第1晶片C1的第1正面2a朝位於其下方之第2器件14的經活性化的第2正面12a按壓。藉此,可將第1正面2a與第2正面12a進行混合接合。Thereby, the first
亦即,如上述,因為對第1正面2a及第2正面12a,已將其等活性化,所以除了銅之外,還形成有SiON及SiN等的氮化膜、以及SiO2
等的氧化膜。從而,可藉由按壓第1正面2a與第2正面12a而產生氧化膜(或氮化膜)彼此的結合,並藉由這些來接合第1正面2a與第2正面12a。
其結果,可容易地接合1個良品的第1晶片C1、與1個良品的第2器件14。That is, as described above, since the first
之後,可將第2吸引構件72連接於圖10所示之空氣供給源74。藉此,可使第2吸引構件72從第1晶片C1分開。After that, the
並且,可藉由重複上述之準備步驟及貼合步驟,而對應使用之全部的良品的第2器件14的每一個接合良品的第1晶片C1。Furthermore, by repeating the above-mentioned preparation step and bonding step, the first chip C1 of the good product can be bonded to each of the
[積層器件晶片製造步驟]
在此步驟中,是在貼合步驟之後,藉由沿著第2晶圓W2的分割預定線13來分割第2晶圓W2,而製造一個個的積層器件晶片。[Multilayer device wafer manufacturing steps]
In this step, after the bonding step, the second wafer W2 is divided along the
在此步驟中,是如圖11所示,將第1晶圓W1已接合於第2器件14之狀態的第2晶圓W2設置到圖5所示之切割裝置30。亦即,將第2晶圓W2以第2器件14及第1晶片C1露出的狀態,固定在切割裝置30的第2工作夾台31。In this step, as shown in FIG. 11, the second wafer W2 in a state where the first wafer W1 has been bonded to the
然後,在積層器件晶片製造步驟中,是一邊使第2主軸34朝箭頭B方向旋轉一邊使切割部33下降。此外,使保持有第2晶圓W2的第2工作夾台31在水平面內在與第2主軸34的旋轉軸正交的方向上移動。Then, in the step of manufacturing the multilayer device wafer, the cutting
藉此,切割刀片35沿著設置在第2晶圓W2的第2器件14之間的分割預定線13切斷第2晶圓W2。
其結果,可以將第2晶圓W2分割,而得到包含每個各1個第1晶片C1的第1器件4及第2器件14之積層器件晶片SC。Thereby, the
再者,在圖11中,藉由箭頭M所示之第2晶圓W2的部分是顯示為檢查不合格的不良品的第2器件14。In addition, in FIG. 11, the part of the second wafer W2 indicated by the arrow M is the
如以上,在本實施形態中,是在第1晶圓分割步驟中分割第1晶圓W1而得到第1晶片C1後,在研磨步驟中研磨第1晶片C1的第1正面2a。藉此,能夠良好地去除附著或熔接於第1晶片C1的第1正面2a的加工屑。從而,變得可在之後的貼合步驟中,將第1晶片C1的第1正面2a與第2器件14的第2正面12a良好地貼合。其結果,可以提高有關於積層器件晶片SC之製造的良率。As described above, in this embodiment, after the first wafer W1 is divided in the first wafer dividing step to obtain the first wafer C1, the first
又,在本實施形態中,是在研磨步驟中對第1晶片C1的第1正面2a實施有使用了研磨漿料之CMP(化學機械研磨,Chemical Mechanical Polishing)研磨。像這樣的CMP研磨,是在第1晶圓W1的製造時對第1器件4的正面(亦即第1正面2a)所實施的研磨。因此,可以在研磨步驟中抑制第1正面2a劣化之情形。In addition, in this embodiment, CMP (Chemical Mechanical Polishing) polishing using a polishing slurry is performed on the first
又,在本實施形態中,是在準備步驟中,藉由對第1晶圓W1的第1正面2a照射大氣壓電漿而使第1正面2a活性化,並且藉由對第2器件14的第2正面12a照射大氣壓電漿而使第2正面12a活性化。藉此,可以在貼合步驟中,藉由混合接合來將第1正面2a與第2正面12a相貼合。藉此,可以不需要用於貼合的接著劑。In addition, in the present embodiment, in the preparation step, the first
又,在本實施形態中,是在已分割第1晶圓W1之後將良品的第1晶片C1拾取並貼合到第2晶圓W2中的良品的第2器件14,之後分割第2晶圓W2而得到積層器件晶片SC。藉此,可提高有關於積層器件晶片SC之製造的良率。Also, in this embodiment, after the first wafer W1 has been divided, the good first wafer C1 is picked up and bonded to the good
亦即,若在將第1晶片C1貼合至第2晶圓W2後進行分割,會有將不良品的第1晶片C1貼合到良品的第2器件14、或將良品的第1晶片C1貼合到不良品的第2器件14之情形,而導致不良品的積層器件晶片SC增加且使良率惡化。That is, if the first chip C1 is bonded to the second wafer W2 and then divided, there will be a defective first chip C1 bonded to a good
再者,在本實施形態中,是在研磨步驟中,透過第3主軸44內的研磨漿料供給路44a,將研磨漿料供給至第1晶片C1的第1正面2a與研磨墊46之間。亦可取代於此而將水供給至第1正面2a與研磨墊46之間。Furthermore, in this embodiment, in the polishing step, the polishing slurry is supplied between the first
又,在本實施形態中,是在準備步驟中,藉由大氣壓電漿將第1晶片C1的第1正面2a及第2器件14的第2正面12a活性化。亦可取代於此或除此之外,在準備步驟中,對第1正面2a及第2正面12a塗佈接著劑。
在此情況下,可在貼合步驟中,藉由接著劑來接合第1正面2a與第2正面12a。In addition, in the present embodiment, in the preparation step, the first
2a:第1正面 2b:第1背面 3,13:分割預定線 4:第1器件 10:正面保護膠帶 12a:第2正面 12b:第2背面 14:第2器件 20:磨削裝置 21:第1工作夾台 22:第1保持面 23:磨削部 24:第1主軸 25:磨削輪 26:磨削磨石 30:切割裝置 31:第2工作夾台 32:第2保持面 33:切割部 34:第2主軸 35:切割刀片 40:研磨裝置 41:第3工作夾台 42:第3保持面 43:研磨部 44:第3主軸 44a:研磨漿料供給路 45:研磨板 46:研磨墊 50:旋轉洗淨裝置 51:旋轉工作台 52:第4保持面 53:旋轉洗淨部 54:洗淨噴嘴 55:水平移動機構 56:軸桿 57:支撐構件 58:水供給源 59,74:空氣供給源 60:拾取裝置 61:支撐台 62:夾持夾具 63:第1吸引構件 65,73:吸引源 66:頂推構件 67:頂推銷 70:貼合裝置 71:工作夾台 72:第2吸引構件 75:電漿產生器 76:電漿氣體供給源 77:高頻電源 A,B,C,D,E,G,M:箭頭 C1:第1晶片 F:環形框架 Fa:開口 T:切割膠帶 SC:積層器件晶片 W1:第1晶圓 W2:第2晶圓 WS:工件組2a: First front 2b: 1st back 3,13: Divide the planned line 4: The first device 10: Front protection tape 12a: 2nd front 12b: second back 14: 2nd device 20: Grinding device 21: The first work clamp 22: The first holding surface 23: Grinding Department 24: 1st spindle 25: Grinding wheel 26: Grinding grindstone 30: Cutting device 31: The second work clamp 32: The second holding surface 33: Cutting part 34: 2nd spindle 35: cutting blade 40: Grinding device 41: No. 3 working clamp 42: 3rd holding surface 43: Grinding Department 44: 3rd spindle 44a: Grinding slurry supply path 45: Grinding board 46: polishing pad 50: Rotary washing device 51: Rotating table 52: 4th holding surface 53: Rotating washing part 54: Wash the nozzle 55: Horizontal movement mechanism 56: shaft 57: Supporting member 58: Water supply source 59, 74: Air supply source 60: Pickup device 61: support table 62: Clamping fixture 63: The first suction member 65, 73: Attraction source 66: Pushing member 67: Top Selling 70: Fitting device 71: work clamp 72: The second suction member 75: Plasma Generator 76: Plasma gas supply source 77: high frequency power supply A, B, C, D, E, G, M: arrow C1: The first chip F: ring frame Fa: opening T: Cutting tape SC: Multilayer device wafer W1: Wafer 1 W2: 2nd wafer WS: Workpiece group
圖1是顯示晶圓的立體圖。 圖2是顯示磨削步驟的截面圖。 圖3是顯示裝設步驟的說明圖。 圖4是顯示包含第1晶圓的工件組的說明圖。 圖5是顯示第1晶圓分割步驟的截面圖。 圖6是顯示研磨步驟的截面圖。 圖7是顯示洗淨步驟的截面圖。 圖8是顯示拾取步驟的截面圖。 圖9是顯示準備步驟的截面圖。 圖10是顯示貼合步驟的截面圖。 圖11是顯示積層器件晶片製造步驟的截面圖。Fig. 1 is a perspective view showing a wafer. Fig. 2 is a cross-sectional view showing a grinding step. Fig. 3 is an explanatory diagram showing the installation procedure. Fig. 4 is an explanatory diagram showing a work group including a first wafer. Fig. 5 is a cross-sectional view showing the first wafer dividing step. Fig. 6 is a cross-sectional view showing a grinding step. Fig. 7 is a cross-sectional view showing a washing step. Fig. 8 is a cross-sectional view showing the pickup step. Fig. 9 is a cross-sectional view showing a preparation step. Fig. 10 is a cross-sectional view showing the bonding step. Fig. 11 is a cross-sectional view showing a manufacturing step of a laminated device wafer.
2a:第1正面 2a: First front
2b:第1背面 2b: 1st back
40:研磨裝置 40: Grinding device
41:第3工作夾台 41: No. 3 working clamp
42:第3保持面 42: 3rd holding surface
43:研磨部 43: Grinding Department
44:第3主軸 44: 3rd spindle
44a:研磨漿料供給路 44a: Grinding slurry supply path
45:研磨板 45: Grinding board
46:研磨墊 46: polishing pad
C:箭頭 C: Arrow
C1:第1晶片 C1: The first chip
F:環形框架 F: ring frame
W1:第1晶圓
W1:
WS:工件組 WS: Workpiece group
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