TWI822984B - Manufacturing method of multilayer device wafer - Google Patents

Manufacturing method of multilayer device wafer Download PDF

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TWI822984B
TWI822984B TW109110691A TW109110691A TWI822984B TW I822984 B TWI822984 B TW I822984B TW 109110691 A TW109110691 A TW 109110691A TW 109110691 A TW109110691 A TW 109110691A TW I822984 B TWI822984 B TW I822984B
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wafer
front surface
bonding
polishing
manufacturing
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TW202038323A (en
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井上雄貴
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日商迪思科股份有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
    • H01L21/02065—Cleaning during device manufacture during, before or after processing of insulating layers the processing being a planarization of insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Dicing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
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Abstract

[課題]從器件晶片的貼合面良好地去除加工屑。 [解決手段]在本實施形態中，是在第1晶圓分割步驟中分割第1晶圓而得到第1晶片後，在研磨步驟中，藉由使用了研磨墊及研磨漿料的CMP研磨來研磨第1晶片的第1正面。藉此，能夠良好地去除附著或熔接於第1晶片的第1正面的加工屑。從而，變得可在之後的貼合步驟中，將第1晶片的第1正面與第2器件的第2正面良好地貼合。其結果，可以提高有關於積層器件晶片之製造的良率。[Issue] Favorably remove processing chips from the bonding surface of device wafers. [Solution] In this embodiment, after the first wafer is divided in the first wafer dividing step to obtain the first wafer, CMP polishing using a polishing pad and polishing slurry is performed in the polishing step. The first front surface of the first wafer is ground. Thereby, the processing debris adhering to or welding to the first front surface of the first wafer can be effectively removed. Therefore, in the subsequent bonding step, the first front surface of the first wafer and the second front surface of the second device can be bonded satisfactorily. As a result, the yield regarding the manufacturing of multilayer device wafers can be improved.

Description

積層器件晶片之製造方法Manufacturing method of multilayer device wafer

本發明是有關於一種積層器件晶片之製造方法。 The present invention relates to a method for manufacturing a laminated device wafer.

以往，在製造包含複數層器件之積層器件晶片時，是如專利文獻1及專利文獻2所示，藉由使用了切割刀片的切割加工來分割重疊的二片晶圓、或者藉由以雷射光線的照射所進行之燒蝕加工來進行分割。 Conventionally, when manufacturing a multilayer device wafer including a plurality of layers of devices, as shown in Patent Document 1 and Patent Document 2, two overlapping wafers are divided by dicing using a dicing blade, or by using a laser. Segmentation is performed by ablation processing using light irradiation.

又，為了提升積層器件晶片的生產性，在專利文獻3揭示的技術中，是將已分割的器件晶片貼合於形成在其他晶圓上的器件。之後，藉由分割此晶圓，來製造積層器件晶片。 Furthermore, in order to improve the productivity of stacked device wafers, in the technology disclosed in Patent Document 3, divided device wafers are bonded to devices formed on other wafers. Thereafter, the wafer is divided to produce stacked device wafers.

先行技術文獻 Advanced technical documents 專利文獻 patent documents

專利文獻1 特開2015-191961號公報 Patent document 1 Japanese Patent Application Publication No. 2015-191961

專利文獻2 特開2016-178162號公報 Patent Document 2 Japanese Patent Application Publication No. 2016-178162

專利文獻3 特開2015-233049號公報 Patent document 3 Japanese Patent Application Publication No. 2015-233049

但是，在專利文獻3的技術中，會有下述情況：欲貼合到其他晶圓的器件之已分割的器件晶片的貼合面上，附著有在分割加工中所產生的加工屑(切割屑或碎屑)。此時，容易使器件晶片對其他晶圓的器件的貼合變得不完全。 However, in the technology of Patent Document 3, there may be cases where processing chips (dicing chips) generated during the dividing process adhere to the bonding surface of the divided device wafer to be bonded to other wafers. crumbs or crumbs). At this time, the bonding of the device wafer to the devices of other wafers may easily become incomplete.

又，也可考慮以下作法：藉由噴附高壓洗淨水來將器件晶片的貼合面變乾淨。但是，若洗淨水的壓力變高時，會有將器件晶片從黏著膠帶吹跑 的可能性。又，在器件晶片的貼合面熔接有加工屑的情況下，欲藉由高壓的洗淨水去除加工屑是困難的。 In addition, the following method can also be considered: cleaning the bonding surface of the device wafer by spraying high-pressure cleaning water. However, if the pressure of the cleaning water becomes high, the device wafer may be blown away from the adhesive tape. possibility. In addition, when processing chips are welded to the bonding surface of the device wafer, it is difficult to remove the processing chips using high-pressure cleaning water.

本發明之目的在於：可在製造積層器件晶片時，從器件晶片的貼合面良好地去除加工屑。 An object of the present invention is to efficiently remove processing debris from the bonding surface of the device wafer when manufacturing a multilayer device wafer.

本發明的積層器件晶片之製造方法(本製造方法)是製造積層器件晶片的積層器件晶片之製造方法，用以製造包含第1器件與第2器件的前述積層器件晶片，前述第1器件是形成在以複數條分割預定線所區劃出的第1晶圓的正面的各區域，前述第2器件是形成在以複數條分割預定線所區劃出的第2晶圓的正面的各區域，前述積層器件晶片之製造方法包含以下步驟：第1晶圓分割步驟，藉由將包含環形框架、黏著膠帶與該第1晶圓之工件組的該第1晶圓沿著該分割預定線分割而形成複數個第1晶片，前述黏著膠帶是貼附於該環形框架以堵塞該環形框架的開口，前述第1晶圓是將背面貼附於該黏著膠帶；研磨步驟，該第1晶圓分割步驟後，藉由以研磨墊研磨第1正面，而從該第1正面去除加工屑，前述第1正面是在複數個該第1晶片中成為貼合面的面，且包含該第1器件；洗淨步驟，該研磨步驟後，藉由對該第1晶片的該第1正面側供給洗淨水來洗淨該第1晶片；拾取步驟，該洗淨步驟後，使該第1晶片從該黏著膠帶離開；準備步驟，實施用於將該第1晶片的該第1正面與該第2晶圓中的該第2器件的貼合面即第2正面設成可相貼合的準備；貼合步驟，使該第1晶片的該第1正面面對該第2器件的該第2正面，並將該第2正面與該第1正面相貼合；及 積層器件晶片製造步驟，該貼合步驟後，藉由沿著該第2晶圓的該分割預定線分割該第2晶圓，而製造一個個的積層器件晶片。 The manufacturing method of a multilayer device wafer of the present invention (this manufacturing method) is a manufacturing method of a multilayer device wafer for manufacturing the multilayer device wafer including a first device and a second device, the first device being formed The second device is formed in each area of the front surface of the second wafer divided by the plurality of planned division lines in each area of the front surface of the first wafer divided by the plurality of planned division lines, and the aforementioned build-up layer The manufacturing method of the device wafer includes the following steps: a first wafer dividing step, by dividing the first wafer including the annular frame, the adhesive tape and the workpiece group of the first wafer along the planned dividing line to form a plurality of The first wafer, the aforementioned adhesive tape is attached to the annular frame to block the opening of the annular frame, the back side of the aforementioned first wafer is attached to the adhesive tape; the grinding step, after the first wafer dividing step, Processing debris is removed from the first front surface by polishing the first front surface with a polishing pad. The first front surface is the surface that becomes the bonding surface among the plurality of first wafers and includes the first device; the cleaning step After the polishing step, the first wafer is cleaned by supplying cleaning water to the first front side of the first wafer; in the picking up step, after the cleaning step, the first wafer is separated from the adhesive tape ; Preparation step, carrying out preparations for making the first front surface of the first wafer and the bonding surface of the second device in the second wafer, that is, the second front surface, capable of being bonded together; the bonding step, Make the first front side of the first chip face the second front side of the second device, and attach the second front side to the first front side; and In the laminated device wafer manufacturing step, after the bonding step, the second wafer is divided along the planned division line of the second wafer to manufacture individual laminated device wafers.

又，在本製造方法中，亦可為：該準備步驟包含：第1準備步驟，藉由對該第1晶片的該第1正面照射大氣壓電漿而使該第1正面活性化；及第2準備步驟，藉由對該第2晶圓的該第2器件的該第2正面照射大氣壓電漿而使該第2正面活性化。 Furthermore, in this manufacturing method, the preparation step may include: a first preparation step of activating the first front side of the first wafer by irradiating the first front side with atmospheric pressure plasma; and a second preparation step. In the preparation step, the second front surface of the second device of the second wafer is activated by irradiating the second front surface with atmospheric pressure plasma.

在本製造方法中，是在第1晶圓分割步驟中分割第1晶圓而得到第1晶片後，在研磨步驟中研磨第1晶片的第1正面。藉此，可以良好地去除已附著或熔接於第1晶片的第1正面的加工屑。因此，變得可在之後的貼合步驟中，良好地將第1晶片的第1正面與第2器件的第2正面相貼合。其結果，可以提高有關於積層器件晶片之製造的良率。 In this manufacturing method, after the first wafer is divided in the first wafer dividing step to obtain the first wafer, the first front surface of the first wafer is ground in the polishing step. Thereby, the processing debris that has adhered or been welded to the first front surface of the first wafer can be effectively removed. Therefore, it becomes possible to bond the first front surface of the first wafer and the second front surface of the second device favorably in the subsequent bonding step. As a result, the yield regarding the manufacturing of multilayer device wafers can be improved.

又，在本製造方法中，亦可在準備步驟中，藉由對第1晶圓的第1正面照射大氣壓電漿而使第1正面活性化，並且藉由對第2器件的第2正面照射大氣壓電漿而使第2正面活性化。藉此，在貼合步驟中，可藉由混合接合(hybrid bonding)來將第1正面與第2正面相貼合。藉此，可以不需要用於貼合的接著劑。 Furthermore, in this manufacturing method, in the preparation step, the first front surface of the first wafer may be activated by irradiating atmospheric pressure plasma, and the second front surface of the second device may be activated by irradiating the second front surface of the first wafer with atmospheric pressure plasma. Atmospheric pressure plasma is used to activate the second front surface. Thereby, in the bonding step, the first front surface and the second front surface can be bonded together through hybrid bonding. This eliminates the need for adhesive for bonding.

2a:第1正面 2a: 1st front

2b:第1背面 2b: 1st back

3,13:分割預定線 3,13: Split scheduled line

4:第1器件 4: 1st device

10:正面保護膠帶 10: Front protective tape

12a:第2正面 12a: 2nd front

12b:第2背面 12b: 2nd back

14:第2器件 14: 2nd device

20:磨削裝置 20:Grinding device

21:第1工作夾台 21: No. 1 work clamping table

22:第1保持面 22: 1st retaining surface

23:磨削部 23:Grinding Department

24:第1主軸 24: 1st spindle

25:磨削輪 25:Grinder wheel

26:磨削磨石 26:Grinding stone

30:切割裝置 30: Cutting device

31:第2工作夾台 31:Second work clamping table

32:第2保持面 32: 2nd holding surface

33:切割部 33: Cutting Department

34:第2主軸 34: 2nd spindle

35:切割刀片 35:Cutting blade

40:研磨裝置 40:Grinding device

41:第3工作夾台 41:The third work clamping table

42:第3保持面 42: 3rd holding surface

43:研磨部 43:Grinding Department

44:第3主軸 44: 3rd spindle

44a:研磨漿料供給路 44a: Grinding slurry supply path

45:研磨板 45:Grinding plate

46:研磨墊 46: Polishing pad

50:旋轉洗淨裝置 50: Rotating cleaning device

51:旋轉工作台 51: Rotary table

52:第4保持面 52: 4th holding surface

53:旋轉洗淨部 53: Rotary cleaning department

54:洗淨噴嘴 54: Clean the nozzle

55:水平移動機構 55: Horizontal moving mechanism

56:軸桿 56:Shaft

57:支撐構件 57:Supporting members

58:水供給源 58:Water supply source

59,74:空氣供給源 59,74:Air supply source

60:拾取裝置 60: Pickup device

61:支撐台 61: Support platform

62:夾持夾具 62: Clamping fixture

63:第1吸引構件 63: The first attraction component

65,73:吸引源 65,73: Source of attraction

66:頂推構件 66: Pushing member

67:頂推銷 67: Top promotion

70:貼合裝置 70: Fitting device

71:工作夾台 71:Work clamp table

72:第2吸引構件 72: 2nd attracting member

75:電漿產生器 75:Plasma generator

76:電漿氣體供給源 76: Plasma gas supply source

77:高頻電源 77:High frequency power supply

A,B,C,D,E,G,M:箭頭 A,B,C,D,E,G,M: Arrow

C1:第1晶片 C1: 1st chip

F:環形框架 F: ring frame

Fa:開口 Fa: Open your mouth

T:切割膠帶 T: cutting tape

SC:積層器件晶片 SC: stacked device wafer

W1:第1晶圓 W1: 1st wafer

W2:第2晶圓 W2: 2nd wafer

WS:工件組 WS: workpiece group

圖1是顯示晶圓的立體圖。 Figure 1 is a perspective view showing a wafer.

圖2是顯示磨削步驟的截面圖。 Figure 2 is a cross-sectional view showing the grinding step.

圖3是顯示裝設步驟的說明圖。 Fig. 3 is an explanatory diagram showing installation steps.

圖4是顯示包含第1晶圓的工件組的說明圖。 FIG. 4 is an explanatory diagram showing a workpiece group including a first wafer.

圖5是顯示第1晶圓分割步驟的截面圖。 FIG. 5 is a cross-sectional view showing the first wafer dividing step.

圖6是顯示研磨步驟的截面圖。 Figure 6 is a cross-sectional view showing the grinding step.

圖7是顯示洗淨步驟的截面圖。 Fig. 7 is a cross-sectional view showing the cleaning step.

圖8是顯示拾取步驟的截面圖。 Fig. 8 is a cross-sectional view showing the picking step.

圖9是顯示準備步驟的截面圖。 Fig. 9 is a cross-sectional view showing preparation steps.

圖10是顯示貼合步驟的截面圖。 Fig. 10 is a cross-sectional view showing the bonding step.

圖11是顯示積層器件晶片製造步驟的截面圖。 FIG. 11 is a cross-sectional view showing the manufacturing steps of a laminated device wafer.

用以實施發明之形態 Form used to implement the invention

在本實施形態之積層器件晶片之製造方法中，所使用的是第1晶圓與第2晶圓之2片晶圓。 In the method of manufacturing a multilayer device wafer according to this embodiment, two wafers, a first wafer and a second wafer, are used.

如圖1所示，第1晶圓W1是圓板狀的矽基板，前述矽基板具有作為正面之第1正面2a、及作為背面之第1背面2b。在第1晶圓W1的第1正面2a，在藉由格子狀的複數條分割預定線3所區劃出的區域的每一個中形成有第1器件4。 As shown in FIG. 1 , the first wafer W1 is a disc-shaped silicon substrate having a first front surface 2 a as a front surface and a first back surface 2 b as a back surface. On the first front surface 2 a of the first wafer W1 , the first device 4 is formed in each area divided by a plurality of grid-like planned dividing lines 3 .

另一方面，第2晶圓W2也具有與第1晶圓W1同樣之圖1所示的構成。亦即，第2晶圓W2是具有第2正面12a及第2背面12b之圓板狀的矽基板，且在第2正面12a中的藉由分割預定線13所區劃出的區域的每一個中形成有第2器件14。 On the other hand, the second wafer W2 also has the same structure as the first wafer W1 as shown in FIG. 1 . That is, the second wafer W2 is a disc-shaped silicon substrate having the second front surface 12 a and the second back surface 12 b, and in each of the areas defined by the planned division lines 13 in the second front surface 12 a The second device 14 is formed.

再者，第1器件4及第2器件14各自形成在第1晶圓W1的第1正面2a及第2晶圓W2的第2正面12a。因此，第1正面2a及第2正面12a也各自為第1器件4及第2器件14的正面。又，第1正面2a也可為藉由分割第1晶圓W1而得到的第1晶片的正面。 Furthermore, the first device 4 and the second device 14 are respectively formed on the first front surface 2a of the first wafer W1 and the second front surface 12a of the second wafer W2. Therefore, the first front surface 2a and the second front surface 12a are also the front surfaces of the first device 4 and the second device 14, respectively. In addition, the first front surface 2a may be the front surface of the first wafer obtained by dividing the first wafer W1.

因此，在以下，有時也會使用如「第1器件4的第1正面2a」、「第2器件14的第2正面12a」及「第1晶片的第1正面2a」的表現。 Therefore, in the following, expressions such as "the first front surface 2a of the first device 4", "the second front surface 12a of the second device 14", and "the first front surface 2a of the first wafer" are sometimes used.

接著，說明本實施形態的各步驟。 Next, each step of this embodiment will be described.

[磨削步驟] [Grinding steps]

在此步驟中，如圖2所示，是將第1晶圓W1設置在具備有第1工作夾台21及磨削部23的磨削裝置20。 In this step, as shown in FIG. 2 , the first wafer W1 is placed in the grinding device 20 including the first chuck 21 and the grinding part 23 .

此時，將第1晶圓W1中的形成有第1器件4的第1正面2a藉由作為保護構件的正面保護膠帶10來覆蓋。 At this time, the first front surface 2 a of the first wafer W1 on which the first device 4 is formed is covered with the front surface protective tape 10 as a protective member.

第1工作夾台21具備有可連通於未圖示的吸引源之由多孔材等所構成的第1保持面22。 The first work chuck 21 is provided with a first holding surface 22 made of a porous material or the like that can communicate with a suction source (not shown).

並且，如圖2所示，將第1晶圓W1的正面保護膠帶10側吸引保持在第1保持面22。藉此，第1晶圓W1是以其第1背面2b向上露出的狀態被固定於第1工作夾台21。 Then, as shown in FIG. 2 , the front protective tape 10 side of the first wafer W1 is attracted and held on the first holding surface 22 . Thereby, the first wafer W1 is fixed to the first chuck 21 with the first back surface 2 b exposed upward.

磨削裝置20的磨削部23具備有第1主軸24、及可和第1主軸24一起旋轉的磨削輪25。在磨削輪25的底面將複數個磨削磨石26配設成環狀。 The grinding unit 23 of the grinding device 20 includes a first spindle 24 and a grinding wheel 25 that can rotate together with the first spindle 24 . A plurality of grinding stones 26 are arranged annularly on the bottom surface of the grinding wheel 25 .

並且，在磨削步驟中，第1工作夾台21朝例如箭頭A方向旋轉。進一步地使磨削部23的磨削輪25一邊朝箭頭A方向旋轉一邊下降。然後，磨削磨石26對第1晶圓W1的第1背面2b一邊按壓一邊磨削。藉此，可將第1晶圓W1薄化。 Furthermore, in the grinding step, the first work chuck 21 rotates in the direction of arrow A, for example. Furthermore, the grinding wheel 25 of the grinding part 23 is lowered while rotating in the direction of arrow A. Then, the grinding stone 26 grinds while pressing the first back surface 2b of the first wafer W1. Thereby, the first wafer W1 can be thinned.

[裝設步驟] [Installation steps]

在此步驟中，如圖3所示，是使用已在磨削步驟中薄化之第1晶圓W1、與環形框架F及切割膠帶T而形成工件組WS。 In this step, as shown in FIG. 3 , the first wafer W1 that has been thinned in the grinding step, the annular frame F, and the dicing tape T are used to form the workpiece set WS.

亦即，首先，使具有開口Fa之環狀的環形框架F的中心與第1晶圓W1的中心一致，來使第1晶圓W1配置在開口Fa內。接著，將圓形狀的切割膠帶T貼附到環形框架F與第1晶圓W1的第1背面2b。 That is, first, the center of the ring-shaped annular frame F having the opening Fa is aligned with the center of the first wafer W1, so that the first wafer W1 is arranged in the opening Fa. Next, the circular dicing tape T is attached to the ring frame F and the first back surface 2b of the first wafer W1.

藉此，可形成工件組WS。 Thereby, the workpiece group WS can be formed.

之後，將正面保護膠帶10從已透過切割膠帶T被支撐在環形框架F之第1晶圓W1的第1正面2a剝離。藉此，如圖4所示，可在工件組WS上露出第1晶圓W1的第1正面2a。 Thereafter, the front protective tape 10 is peeled off from the first front surface 2 a of the first wafer W1 supported on the ring frame F through the dicing tape T. Thereby, as shown in FIG. 4 , the first front surface 2 a of the first wafer W1 can be exposed on the workpiece group WS.

[第1晶圓分割步驟] [First wafer dividing step]

在此步驟中，是藉由沿著分割預定線3分割工件組WS的第1晶圓W1，而形成包含第1器件4的複數個第1晶片。 In this step, the first wafer W1 of the workpiece group WS is divided along the planned division line 3 to form a plurality of first wafers including the first device 4 .

在此步驟中，是如圖5所示，將包含第1晶圓W1之工件組WS設置在具備有第2工作夾台31及切割部33的切割裝置30。 In this step, as shown in FIG. 5 , the workpiece group WS including the first wafer W1 is placed on the cutting device 30 including the second work chuck 31 and the cutting part 33 .

第2工作夾台31具備有可連通於未圖示的吸引源之由多孔材等所構成的第2保持面32。 The second work chuck 31 is provided with a second holding surface 32 made of a porous material or the like that can communicate with a suction source (not shown).

在分割步驟中，是如圖5所示，將第1晶圓W1的第1背面2b隔著切割膠帶T吸引保持在第2保持面32。又，環形框架F是被未圖示之夾持夾具所保持。藉此，第1晶圓W1是以其第1正面2a向上露出的狀態被固定於第2工作夾台31。 In the dividing step, as shown in FIG. 5 , the first back surface 2 b of the first wafer W1 is sucked and held on the second holding surface 32 via the dicing tape T. In addition, the ring frame F is held by a holding jig (not shown). Thereby, the first wafer W1 is fixed to the second chuck 31 with the first front surface 2 a exposed upward.

切割裝置30的切割部33具備有具有水平方向之旋轉軸的第2主軸34、以及可和第2主軸34一起旋轉的切割刀片35。 The cutting part 33 of the cutting device 30 includes a second main shaft 34 having a horizontal rotation axis, and a cutting blade 35 that can rotate together with the second main shaft 34 .

然後，在切割步驟中，是一邊使第2主軸34朝箭頭B方向旋轉一邊使切割部33下降。此外，使保持有第1晶圓W1的第2工作夾台31在水平面內朝與第2主軸34的旋轉軸正交的方向移動。 Then, in the cutting step, the cutting part 33 is lowered while rotating the second spindle 34 in the direction of arrow B. Furthermore, the second chuck 31 holding the first wafer W1 is moved in a horizontal plane in a direction orthogonal to the rotation axis of the second spindle 34 .

藉此，切割刀片35沿著設置在第1晶圓W1的第1正面2a中的第1器件4之間的分割預定線3來切斷第1晶圓W1。 Thereby, the dicing blade 35 cuts the first wafer W1 along the planned division line 3 between the first devices 4 provided in the first front surface 2 a of the first wafer W1 .

其結果，將第1晶圓W1分割成複數個第1晶片C1，第1晶圓W1的第1正面2a成為第1晶片C1的第1正面2a。再者，第1晶片C1是在其第1正面2a，具有一個個第1器件4。此第1正面2a成為第1晶片C1的貼合面。 As a result, the first wafer W1 is divided into a plurality of first wafers C1, and the first front surface 2a of the first wafer W1 becomes the first front surface 2a of the first wafer C1. Furthermore, the first wafer C1 has the first devices 4 on its first front surface 2a. This first front surface 2a becomes the bonding surface of the first wafer C1.

[研磨步驟] [Grinding steps]

在此步驟中，是藉由以研磨墊研磨第1正面2a，而從第1正面2a去除加工屑，前述第1正面2a是在複數個第1晶片C1中成為貼合面的面，且包含第1器件4。 In this step, processing chips are removed from the first front surface 2a by polishing the first front surface 2a with a polishing pad. The first front surface 2a is a surface that becomes the bonding surface among the plurality of first wafers C1 and includes 1st device 4.

在此步驟中，是如圖6所示，將已分割成複數個第1晶片C1的第1 晶圓W1，直接以和環形框架F以及切割膠帶T為一體之工件組WS的形態，從切割裝置30取下並設置到研磨裝置40。 In this step, as shown in Figure 6, the first wafer C1 that has been divided into a plurality of first wafers C1 is The wafer W1 is directly removed from the dicing device 30 and placed in the polishing device 40 in the form of a workpiece set WS integrated with the annular frame F and the dicing tape T.

研磨裝置40具備有第3工作夾台41及研磨部43。第3工作夾台41具備有可連通於未圖示的吸引源之由多孔材等所構成的第3保持面42。 The polishing device 40 includes a third work chuck 41 and a polishing part 43 . The third work chuck 41 is provided with a third holding surface 42 made of a porous material or the like that can communicate with a suction source (not shown).

在研磨步驟中，是如圖6所示，與分割步驟同樣地將第1晶圓W1的第1背面2b隔著切割膠帶T吸引保持於第3保持面42。又，環形框架F是被未圖示之夾持夾具所保持。藉此，第1晶圓W1是以其第1正面2a向上露出的狀態被固定於第3工作夾台41。 In the polishing step, as shown in FIG. 6 , the first back surface 2 b of the first wafer W1 is sucked and held on the third holding surface 42 via the dicing tape T in the same manner as in the dividing step. In addition, the ring frame F is held by a holding jig (not shown). Thereby, the first wafer W1 is fixed to the third chuck 41 with the first front surface 2 a exposed upward.

研磨裝置40的研磨部43具備有第3主軸44、及可和第3主軸44一起旋轉的研磨板45。研磨板45的底面配設有平板狀的研磨墊46。 The polishing part 43 of the polishing device 40 is provided with a third spindle 44 and a polishing plate 45 that can rotate together with the third spindle 44 . A flat polishing pad 46 is arranged on the bottom surface of the polishing plate 45 .

並且，在研磨步驟中，第3工作夾台41是例如朝箭頭C方向旋轉。此外，研磨部43之研磨板45一邊朝箭頭C方向旋轉一邊下降。並且，研磨墊46一邊按壓第1晶圓W1的第1正面2a(亦即第1晶片C1的第1正面2a)一邊進行研磨。 Furthermore, in the polishing step, the third work chuck 41 rotates in the direction of arrow C, for example. In addition, the polishing plate 45 of the polishing part 43 descends while rotating in the direction of arrow C. Furthermore, the polishing pad 46 performs polishing while pressing the first front surface 2a of the first wafer W1 (that is, the first front surface 2a of the first wafer C1).

又，可在由研磨墊46進行的研磨時，透過第3主軸44內的研磨漿料供給路44a將研磨漿料供給至第1晶片C1的第1正面2a與研磨墊46之間。 In addition, during polishing by the polishing pad 46 , the polishing slurry can be supplied between the first front surface 2 a of the first wafer C1 and the polishing pad 46 through the polishing slurry supply path 44 a in the third spindle 44 .

因此，形成有貫通於研磨板45與研磨墊46之中心的貫通孔，且已通過研磨漿料供給路44a的研磨漿料是通過貫通孔而供給到第1晶片C1的第1正面2a與研磨墊46之間。 Therefore, a through hole is formed that penetrates the center of the polishing plate 45 and the polishing pad 46, and the polishing slurry that has passed through the polishing slurry supply path 44a is supplied to the first front surface 2a and polishing surface of the first wafer C1 through the through hole. between pads 46.

又，亦可將研磨漿料供給到未被研磨墊46覆蓋的第1晶圓W1的第1正面2a。又，亦可將研磨漿料供給到接觸於第1晶圓W1的第1正面2a之研磨墊46未接觸於第1正面2a的研磨面。 Alternatively, the polishing slurry may be supplied to the first front surface 2 a of the first wafer W1 that is not covered by the polishing pad 46 . Alternatively, the polishing slurry may be supplied to the polishing surface of the polishing pad 46 that is in contact with the first front surface 2a of the first wafer W1 and is not in contact with the first front surface 2a.

又，亦可進行成將所供給之研磨漿料滯留在第1晶圓W1的外周與環形框架F的內周之間的切割膠帶T上，來對研磨面供給所滯留的研磨漿料。 Alternatively, the supplied polishing slurry may be retained on the dicing tape T between the outer circumference of the first wafer W1 and the inner circumference of the annular frame F, and the retained polishing slurry may be supplied to the polishing surface.

藉由這樣的研磨，可從第1晶片C1的第1正面2a去除在先前的步驟 中已附著或已熔接之磨削屑、切割屑以及碎屑等之加工屑。再者，研磨去除量為例如3nm~5nm之範圍。 Through such polishing, the first surface 2a of the first wafer C1 can be removed from the first surface 2a of the first wafer C1 in the previous step. Processing chips such as grinding chips, cutting chips, chips, etc. that have been attached or welded. Furthermore, the polishing removal amount is, for example, in the range of 3 nm to 5 nm.

[洗淨步驟] [Cleaning steps]

在此步驟中，是藉由將洗淨水供給至第1晶片C1的第1正面2a側，而洗淨第1晶片C1。 In this step, the first wafer C1 is cleaned by supplying the cleaning water to the first front surface 2a side of the first wafer C1.

在這個步驟中，是如圖7所示，在第1正面2a之研磨後，將包含複數個第1晶片C1的第1晶圓W1直接以和環形框架F及切割膠帶T為一體之工件組WS的形態，從研磨裝置40取下並設置到旋轉洗淨裝置50。 In this step, as shown in Figure 7, after the first front surface 2a is polished, the first wafer W1 including a plurality of first wafers C1 is directly assembled into a workpiece integrated with the annular frame F and the dicing tape T. The form of WS is removed from the grinding device 40 and placed in the rotating cleaning device 50 .

旋轉洗淨裝置50具備有旋轉工作台51及旋轉洗淨部53。旋轉工作台51具備有可連通於未圖未的吸引源之由多孔材等所構成的第4保持面52。 The rotary washing device 50 includes a rotary table 51 and a rotary washing part 53 . The rotary table 51 is provided with a fourth holding surface 52 made of a porous material or the like that can be connected to a suction source (not shown).

在洗淨步驟中，是如圖7所示，與研磨步驟等同樣地將第1晶圓W1的第1背面2b隔著切割膠帶T吸引保持於第4保持面52。又，環形框架F是被未圖示之夾持夾具所保持。藉此，第1晶圓W1是以其第1正面2a向上露出的狀態被固定於旋轉工作台51。 In the cleaning step, as shown in FIG. 7 , the first back surface 2 b of the first wafer W1 is attracted and held on the fourth holding surface 52 via the dicing tape T in the same manner as in the polishing step. In addition, the ring frame F is held by a holding jig (not shown). Thereby, the first wafer W1 is fixed to the rotary table 51 with the first front surface 2 a exposed upward.

旋轉洗淨裝置50的旋轉洗淨部53具備有洗淨噴嘴54、及用於使洗淨噴嘴54在水平方向上移動的水平移動機構55。 The spin cleaning part 53 of the spin cleaning device 50 is equipped with a cleaning nozzle 54 and a horizontal movement mechanism 55 for moving the cleaning nozzle 54 in the horizontal direction.

水平移動機構55具有在水平方向上延伸之軸桿56、及支撐洗淨噴嘴54之支撐構件57。支撐構件57可以直接以已支撐(保持)有洗淨噴嘴54的狀態，沿著軸桿56在水平方向上移動。又，對洗淨噴嘴54連接有水供給源58及空氣供給源59。 The horizontal movement mechanism 55 has a shaft 56 extending in the horizontal direction, and a support member 57 that supports the cleaning nozzle 54 . The support member 57 may move in the horizontal direction along the shaft 56 as it is, with the cleaning nozzle 54 being supported (held). Furthermore, a water supply source 58 and an air supply source 59 are connected to the washing nozzle 54 .

並且，在洗淨步驟中，旋轉工作台51是例如朝箭頭D方向旋轉。此外，藉由支撐構件57，可讓已配置於第1晶圓W1的上方之洗淨噴嘴54如箭頭E所示地在水平方向上移動。 Furthermore, in the washing step, the rotating table 51 rotates in the direction of arrow D, for example. In addition, the support member 57 allows the cleaning nozzle 54 arranged above the first wafer W1 to move in the horizontal direction as indicated by the arrow E.

此時，可將從水供給源58所供給的水與從空氣供給源59所供給的 空氣之混合物即雙流體洗淨水，從洗淨噴嘴54噴射出。 At this time, the water supplied from the water supply source 58 and the air supplied from the air supply source 59 can be The mixture of air, that is, the two-fluid cleaning water, is sprayed from the cleaning nozzle 54 .

如此進行，可將雙流體洗淨水噴射於第1晶圓W1中的大致所有的第1晶片C1的第1正面2a，而洗淨第1晶片C1。 In this manner, the two-fluid cleaning water can be sprayed onto the first front surfaces 2a of substantially all the first wafers C1 in the first wafer W1, thereby cleaning the first wafers C1.

再者，在洗淨步驟中，在上述雙流體洗淨中有以下情形：於第1晶片C1較小時致使第1晶片C1飛離切割膠帶T。又，有以下情形：要從第1晶圓W1的第1正面2a去除研磨漿料時，會耗費許多時間。作為其對策，亦可使洗淨構件接觸於第1晶圓W1來將第1晶圓W1的第1正面2a洗淨。作為洗淨構件，可使用刷子(brush)、SOFROUS®海棉。再者，刷子宜使用擦洗刷(scrub brush)。 Furthermore, in the cleaning step, in the above-mentioned two-fluid cleaning, there may be a case where the first wafer C1 flies away from the dicing tape T when the first wafer C1 is small. Furthermore, it may take a lot of time to remove the polishing slurry from the first front surface 2 a of the first wafer W1 . As a countermeasure, the cleaning member may be brought into contact with the first wafer W1 to clean the first front surface 2a of the first wafer W1. As a cleaning member, a brush or SOFROUS® sponge can be used. Furthermore, the brush should be a scrub brush.

[拾取步驟] [Pickup steps]

在此步驟中，是使第1晶片C1從切割膠帶T離開。亦即，從切割膠帶T拾取第1晶片C1。 In this step, the first wafer C1 is separated from the dicing tape T. That is, the first wafer C1 is picked up from the dicing tape T.

在此步驟中，首先，是於第1晶片C1的洗淨後選擇應被拾取(亦即良品的)第1晶片C1。在此選擇中，是例如藉由測定器等探針來檢查各第1晶片C1的適當與否(完成品質)。然後，將已檢查合格者選擇作為應拾取之第1晶片C1。 In this step, first, after the first wafer C1 is cleaned, the first wafer C1 that should be picked up (that is, a good product) is selected. In this selection, the adequacy (finished quality) of each first wafer C1 is inspected, for example, using a probe such as a measuring device. Then, the one that has passed the inspection is selected as the first wafer C1 to be picked up.

之後，如圖8所示，將包含複數個第1晶片C1之第1晶圓W1，直接以和環形框架F及切割膠帶T為一體之工件組WS的形態，從旋轉洗淨裝置50取下並設置到拾取裝置60。 After that, as shown in FIG. 8 , the first wafer W1 including the plurality of first wafers C1 is directly removed from the rotary cleaning device 50 in the form of a workpiece set WS integrated with the ring frame F and the dicing tape T. and set to the pickup device 60.

拾取裝置60具備有筒狀的支撐台61。支撐台61是支撐工件組WS中的環形框架F之支撐台，並具備有用於支撐環形框架F之複數個夾持夾具62。 The pickup device 60 is provided with a cylindrical support base 61 . The support table 61 is a support table that supports the ring frame F in the workpiece group WS, and is provided with a plurality of clamping jigs 62 for supporting the ring frame F.

在拾取步驟中，是如圖8所示，藉由以具備有夾持夾具62的支撐台61支撐環形框架F，而將第1晶圓W1在其第1正面2a向上露出的狀態下固定。 In the pickup step, as shown in FIG. 8 , the first wafer W1 is fixed in a state in which the first front surface 2 a is exposed upward by supporting the ring frame F with the support table 61 provided with the clamping jig 62 .

又，拾取裝置60在支撐台61的內部的第1晶圓W1的下方具備有頂推構件66。頂推構件66具有可在上下方向上移動的頂推銷67。 Furthermore, the pickup device 60 is provided with a pushing member 66 below the first wafer W1 inside the support table 61 . The push member 66 has a push pin 67 that is movable in the up and down direction.

此外，拾取裝置60具備有配置於第1晶圓W1的上方，且可連通於吸引源65 的第1吸引構件63。 In addition, the pickup device 60 is disposed above the first wafer W1 and can be connected to the suction source 65 The first attracting member 63.

並且，在拾取步驟中，是頂推構件66從下方藉由頂推銷67將應拾取的第1晶片C1朝上方頂推。此外，將已被頂推的第1晶片C1藉由第1吸引構件63吸引保持，而從切割膠帶T拾取。第1吸引構件63是將所拾取的第1晶片C1搬送到預定的保管場所。 Furthermore, in the picking step, the pushing member 66 pushes the first wafer C1 to be picked up from below through the pushing pin 67 . In addition, the pushed first wafer C1 is sucked and held by the first suction member 63 and picked up from the dicing tape T. The first suction member 63 transports the picked up first wafer C1 to a predetermined storage place.

如此進行而將第1晶片C1中的所有的良品的第1晶片C1搬送到保管場所。 In this manner, all the good first wafers C1 among the first wafers C1 are transported to the storage location.

[準備步驟] [Preparatory steps]

在此步驟中，是實施用於將第1晶片C1的第1正面2a與第2晶圓W2中的第2器件14的貼合面即第2正面12a設成可相貼合的準備。 In this step, preparations are carried out so that the first front surface 2a of the first wafer C1 and the second front surface 12a, which is the bonding surface of the second device 14 in the second wafer W2, can be bonded together.

在此步驟中，首先，是藉由使圖1所示的第2晶圓W2和環形框架F及切割膠帶T一體化，而形成和圖4所示之第1晶圓W1之構成同樣的工件組WS。 In this step, first, the second wafer W2 shown in FIG. 1 is integrated with the ring frame F and the dicing tape T to form a workpiece having the same structure as the first wafer W1 shown in FIG. 4 Group WS.

之後，如圖9所示，將第2晶圓W2的工件組WS設置在貼合裝置70。 Thereafter, as shown in FIG. 9 , the workpiece group WS of the second wafer W2 is set in the bonding device 70 .

貼合裝置70具備有保持第2晶圓W2的工作夾台71、保持第1晶片C1的第2吸引構件72、以及產生大氣壓電漿的電漿產生器75。 The bonding device 70 includes a chuck 71 holding the second wafer W2, a second suction member 72 holding the first wafer C1, and a plasma generator 75 that generates atmospheric pressure plasma.

工作夾台71是構成為藉由使吸引源連通於保持面而吸引保持第2晶圓W2。 The work chuck 71 is configured to attract and hold the second wafer W2 by connecting the attraction source to the holding surface.

並且，如圖9所示，將第2晶圓W2的第2背面12b隔著切割膠帶T吸引保持在工作夾台71上。又，環形框架F是被未圖示之夾持夾具所保持。藉此，第2晶圓W2是以其第2正面12a向上露出的狀態被固定於工作夾台71。 Then, as shown in FIG. 9 , the second back surface 12 b of the second wafer W2 is suctioned and held on the chuck 71 via the dicing tape T. In addition, the ring frame F is held by a holding jig (not shown). Thereby, the second wafer W2 is fixed to the work chuck 71 in a state where the second front surface 12 a is exposed upward.

接著，選擇應使用的(亦即良品的)第2器件14。在此選擇中，是例如藉由測定器等的探針來檢查各第2器件14的適當與否(完成品質)。然後，將已檢查合格者選擇作為應使用的第2器件14。例如，可對不合格的(亦即不良品的)第2器件14施行標記。 Next, the second device 14 to be used (that is, a good product) is selected. In this selection, the suitability (finished quality) of each second device 14 is inspected, for example, using a probe such as a measuring device. Then, the one that has passed the inspection is selected as the second device 14 to be used. For example, the second device 14 that is defective (that is, a defective product) may be marked.

第2吸引構件72已接地，並且構成為可連通於吸引源73。在準備步驟中，第2吸引構件72是將已在拾取步驟中被搬送到預定的保管場所之良品的第 1晶片C1從其第1背面2b側吸引保持。亦即，第1晶片C1是以已將貼合面即第1正面2a露出的狀態被第2吸引構件72所吸引保持。 The second attraction member 72 is grounded and configured to be communicated with the attraction source 73 . In the preparation step, the second suction member 72 is used to transport the defective products that have been transported to a predetermined storage place in the picking step. The wafer C1 is sucked and held from its first back surface 2b side. That is, the first wafer C1 is attracted and held by the second attraction member 72 in a state where the first front surface 2 a which is the bonding surface is exposed.

並且，第2吸引構件72是將已吸引保持的第1晶片C1配置在1個應使用的第2器件14的上方。 Furthermore, the second suction member 72 arranges the first wafer C1 that has been suctioned and held above a second device 14 to be used.

電漿產生器75是連接於例如供給氬氣或氦氣等稀有氣體的電漿氣體供給源76、及高頻電源77。 The plasma generator 75 is connected to a plasma gas supply source 76 that supplies a rare gas such as argon gas or helium gas, and a high-frequency power supply 77 .

並且，在準備步驟中，是將電漿產生器75的前端配置在已保持於第2吸引構件72的第1晶圓W1的第1正面2a、與其下方的第2器件14的第2正面12a之間。 Furthermore, in the preparation step, the front end of the plasma generator 75 is arranged on the first front surface 2a of the first wafer W1 held by the second suction member 72 and the second front surface 12a of the second device 14 below it. between.

此外，電漿產生器75是使用稀有氣體及高頻電力來生成大氣壓電漿，且從其前端朝上下方向照射大氣壓電漿。 In addition, the plasma generator 75 generates atmospheric pressure plasma using rare gas and high-frequency power, and irradiates the atmospheric pressure plasma in the up and down direction from its front end.

藉此，可對第1晶片C1的第1正面2a照射大氣壓電漿，而將第1正面2a活性化(第1準備步驟)。同樣地，可對第2器件14的第2正面12a照射大氣壓電漿，而將第2正面12a活性化(第2準備步驟)。 Thereby, the first front surface 2a of the first wafer C1 can be irradiated with atmospheric pressure plasma to activate the first front surface 2a (first preparation step). Similarly, the second front surface 12a of the second device 14 can be irradiated with atmospheric pressure plasma to activate the second front surface 12a (second preparation step).

在此，第1器件4之第1正面2a及第2器件14之第2正面12a露出有矽(Si)及銅(電極材料)。並且，藉由上述之活性化，可在第1正面2a及第2正面12a形成SiON及SiN等的氮化膜、以及SiO2等的氧化膜。 Here, silicon (Si) and copper (electrode material) are exposed on the first front surface 2a of the first device 4 and the second front surface 12a of the second device 14. Furthermore, through the above-mentioned activation, a nitride film such as SiON and SiN, and an oxide film such as SiO 2 can be formed on the first front surface 2a and the second front surface 12a.

[貼合步驟] [Fitting steps]

在此步驟中，是使第1晶片C1的第1正面2a與第2晶圓W2中的第2器件14的第2正面12a相面對，而將第2正面12a與第1正面2a相貼合。 In this step, the first front surface 2a of the first wafer C1 is made to face the second front surface 12a of the second device 14 in the second wafer W2, and the second front surface 12a is attached to the first front surface 2a. combine.

亦即，在此步驟中，是如圖10所示，讓保持有第1晶片C1的第2吸引構件72如箭頭G所示地下降，其中前述第1晶片C1具有已在準備步驟中被活性化的第1正面2a。 That is, in this step, as shown in FIG. 10 , the second suction member 72 holding the first wafer C1 is lowered as shown by the arrow G, wherein the first wafer C1 has been activated in the preparation step. of the first front 2a.

藉此，可將第1晶片C1的第1正面2a朝位於其下方之第2器件14的經 活性化的第2正面12a按壓。藉此，可將第1正面2a與第2正面12a進行混合接合。 Thereby, the first front surface 2a of the first wafer C1 can be directed toward the center of the second device 14 located below it. The activated second front surface 12a is pressed. Thereby, the first front surface 2a and the second front surface 12a can be hybridly joined.

亦即，如上述，因為對第1正面2a及第2正面12a，已將其等活性化，所以除了銅之外，還形成有SiON及SiN等的氮化膜、以及SiO2等的氧化膜。從而，可藉由按壓第1正面2a與第2正面12a而產生氧化膜(或氮化膜)彼此的結合，並藉由這些來接合第1正面2a與第2正面12a。 That is, as described above, since the first front surface 2a and the second front surface 12a have been activated, in addition to copper, nitride films such as SiON and SiN, and oxide films such as SiO 2 are also formed. . Therefore, by pressing the first front surface 2a and the second front surface 12a, the oxide films (or nitride films) are bonded to each other, and the first front surface 2a and the second front surface 12a can be bonded by these.

其結果，可容易地接合1個良品的第1晶片C1、與1個良品的第2器件14。 As a result, a good first wafer C1 and a good second device 14 can be easily bonded.

之後，可將第2吸引構件72連接於圖10所示之空氣供給源74。藉此，可使第2吸引構件72從第1晶片C1分開。 Thereafter, the second suction member 72 can be connected to the air supply source 74 shown in FIG. 10 . Thereby, the second suction member 72 can be separated from the first wafer C1.

並且，可藉由重複上述之準備步驟及貼合步驟，而對應使用之全部的良品的第2器件14的每一個接合良品的第1晶片C1。 Furthermore, by repeating the above-described preparation steps and bonding steps, the good first wafer C1 can be bonded corresponding to each of the used second devices 14 of good quality.

[積層器件晶片製造步驟] [Multilayer device wafer manufacturing steps]

在此步驟中，是在貼合步驟之後，藉由沿著第2晶圓W2的分割預定線13來分割第2晶圓W2，而製造一個個的積層器件晶片。 In this step, after the bonding step, the second wafer W2 is divided along the planned dividing line 13 of the second wafer W2, thereby manufacturing individual laminated device wafers.

在此步驟中，是如圖11所示，將第1晶圓W1已接合於第2器件14之狀態的第2晶圓W2設置到圖5所示之切割裝置30。亦即，將第2晶圓W2以第2器件14及第1晶片C1露出的狀態，固定在切割裝置30的第2工作夾台31。 In this step, as shown in FIG. 11 , the second wafer W2 in which the first wafer W1 has been bonded to the second device 14 is placed in the cutting device 30 shown in FIG. 5 . That is, the second wafer W2 is fixed to the second chuck 31 of the dicing device 30 in a state where the second device 14 and the first wafer C1 are exposed.

然後，在積層器件晶片製造步驟中，是一邊使第2主軸34朝箭頭B方向旋轉一邊使切割部33下降。此外，使保持有第2晶圓W2的第2工作夾台31在水平面內在與第2主軸34的旋轉軸正交的方向上移動。 Then, in the multilayer device wafer manufacturing step, the cutting part 33 is lowered while rotating the second spindle 34 in the direction of arrow B. Furthermore, the second chuck 31 holding the second wafer W2 is moved in a horizontal plane in a direction orthogonal to the rotation axis of the second spindle 34 .

藉此，切割刀片35沿著設置在第2晶圓W2的第2器件14之間的分割預定線13切斷第2晶圓W2。 Thereby, the dicing blade 35 cuts the second wafer W2 along the planned division line 13 provided between the second devices 14 of the second wafer W2.

其結果，可以將第2晶圓W2分割，而得到包含每個各1個第1晶片C1的第1器件4及第2器件14之積層器件晶片SC。 As a result, the second wafer W2 can be divided, and a stacked device wafer SC including the first device 4 and the second device 14 of the first wafer C1 can be obtained.

再者，在圖11中，藉由箭頭M所示之第2晶圓W2的部分是顯示為 檢查不合格的不良品的第2器件14。 Furthermore, in FIG. 11 , the portion of the second wafer W2 indicated by the arrow M is shown as The second device 14 of the unqualified defective product is inspected.

如以上，在本實施形態中，是在第1晶圓分割步驟中分割第1晶圓W1而得到第1晶片C1後，在研磨步驟中研磨第1晶片C1的第1正面2a。藉此，能夠良好地去除附著或熔接於第1晶片C1的第1正面2a的加工屑。從而，變得可在之後的貼合步驟中，將第1晶片C1的第1正面2a與第2器件14的第2正面12a良好地貼合。其結果，可以提高有關於積層器件晶片SC之製造的良率。 As described above, in this embodiment, after the first wafer W1 is divided in the first wafer dividing step to obtain the first wafer C1, the first front surface 2a of the first wafer C1 is polished in the polishing step. Thereby, the processing debris adhering to or welding to the first front surface 2a of the first wafer C1 can be effectively removed. Therefore, in the subsequent bonding step, the first front surface 2a of the first wafer C1 and the second front surface 12a of the second device 14 can be bonded satisfactorily. As a result, the yield regarding the manufacturing of the multilayer device wafer SC can be improved.

又，在本實施形態中，是在研磨步驟中對第1晶片C1的第1正面2a實施有使用了研磨漿料之CMP(化學機械研磨，Chemical Mechanical Polishing)研磨。像這樣的CMP研磨，是在第1晶圓W1的製造時對第1器件4的正面(亦即第1正面2a)所實施的研磨。因此，可以在研磨步驟中抑制第1正面2a劣化之情形。 In addition, in this embodiment, CMP (Chemical Mechanical Polishing) polishing using a polishing slurry is performed on the first front surface 2 a of the first wafer C1 in the polishing step. Such CMP polishing is performed on the front surface of the first device 4 (that is, the first front surface 2 a ) during the manufacturing of the first wafer W1 . Therefore, deterioration of the first front surface 2a can be suppressed during the polishing step.

又，在本實施形態中，是在準備步驟中，藉由對第1晶圓W1的第1正面2a照射大氣壓電漿而使第1正面2a活性化，並且藉由對第2器件14的第2正面12a照射大氣壓電漿而使第2正面12a活性化。藉此，可以在貼合步驟中，藉由混合接合來將第1正面2a與第2正面12a相貼合。藉此，可以不需要用於貼合的接著劑。 In addition, in this embodiment, in the preparation step, the first front surface 2 a of the first wafer W1 is activated by irradiating atmospheric pressure plasma, and the first front surface 2 a of the second device 14 is activated. The second front surface 12a is irradiated with atmospheric pressure plasma to activate the second front surface 12a. Thereby, the first front surface 2a and the second front surface 12a can be bonded together by hybrid bonding in the bonding step. This eliminates the need for adhesive for bonding.

又，在本實施形態中，是在已分割第1晶圓W1之後將良品的第1晶片C1拾取並貼合到第2晶圓W2中的良品的第2器件14，之後分割第2晶圓W2而得到積層器件晶片SC。藉此，可提高有關於積層器件晶片SC之製造的良率。 Furthermore, in this embodiment, after the first wafer W1 has been divided, the good first wafer C1 is picked up and bonded to the good second device 14 in the second wafer W2, and then the second wafer is divided. W2 to obtain a laminated device wafer SC. Thereby, the yield regarding the manufacturing of the laminated device wafer SC can be improved.

亦即，若在將第1晶片C1貼合至第2晶圓W2後進行分割，會有將不良品的第1晶片C1貼合到良品的第2器件14、或將良品的第1晶片C1貼合到不良品的第2器件14之情形，而導致不良品的積層器件晶片SC增加且使良率惡化。 That is, if the first wafer C1 is bonded to the second wafer W2 and then divided, the defective first wafer C1 may be bonded to the good second device 14 or the good first wafer C1 may be bonded to the good second device 14 . When the defective second device 14 is bonded, the number of defective multilayer device wafers SC increases and the yield rate deteriorates.

再者，在本實施形態中，是在研磨步驟中，透過第3主軸44內的研磨漿料供給路44a，將研磨漿料供給至第1晶片C1的第1正面2a與研磨墊46之間。亦可取代於此而將水供給至第1正面2a與研磨墊46之間。 Furthermore, in this embodiment, in the polishing step, the polishing slurry is supplied between the first front surface 2a of the first wafer C1 and the polishing pad 46 through the polishing slurry supply path 44a in the third spindle 44. . Instead of this, water may be supplied between the first front surface 2a and the polishing pad 46.

又，在本實施形態中，是在準備步驟中，藉由大氣壓電漿將第1晶片C1的第1正面2a及第2器件14的第2正面12a活性化。亦可取代於此或除此之外，在準備步驟中，對第1正面2a及第2正面12a塗佈接著劑。 In addition, in this embodiment, in the preparation step, the first front surface 2a of the first wafer C1 and the second front surface 12a of the second device 14 are activated by atmospheric pressure plasma. Alternatively or in addition to this, in the preparation step, an adhesive may be applied to the first front surface 2a and the second front surface 12a.

在此情況下，可在貼合步驟中，藉由接著劑來接合第1正面2a與第2正面12a。 In this case, the first front surface 2a and the second front surface 12a may be bonded with an adhesive in the bonding step.

2a:第1正面 2a: 1st front

2b:第1背面 2b: 1st back

40:研磨裝置 40:Grinding device

41:第3工作夾台 41:The third work clamping table

42:第3保持面 42: 3rd holding surface

43:研磨部 43:Grinding Department

44:第3主軸 44: 3rd spindle

44a:研磨漿料供給路 44a: Grinding slurry supply path

45:研磨板 45:Grinding plate

46:研磨墊 46: Polishing pad

C:箭頭 C:arrow

C1:第1晶片 C1: 1st chip

F:環形框架 F: ring frame

W1:第1晶圓 W1: 1st wafer

WS:工件組 WS: workpiece group

Claims (2)

一種積層器件晶片之製造方法，用以製造包含第1器件與第2器件的前述積層器件晶片，前述第1器件是形成在以複數條分割預定線所區劃出的第1晶圓的正面的各區域，前述第2器件是形成在以複數條分割預定線所區劃出的第2晶圓的正面的各區域，前述積層器件晶片之製造方法包含以下步驟：第1晶圓分割步驟，藉由將包含環形框架、黏著膠帶與該第1晶圓之工件組的該第1晶圓沿著該分割預定線分割而形成複數個第1晶片，前述黏著膠帶是貼附於該環形框架以堵塞該環形框架的開口，前述第1晶圓是將背面貼附於該黏著膠帶；研磨步驟，該第1晶圓分割步驟後，藉由以研磨墊研磨第1正面，而從該第1正面除去加工屑，前述第1正面是在複數個該第1晶片中成為貼合面的面，且包含該第1器件；洗淨步驟，該研磨步驟後，藉由對該第1晶片的該第1正面側供給洗淨水來洗淨該第1晶片；拾取步驟，該洗淨步驟後，使該第1晶片從該黏著膠帶離開；準備步驟，實施用於將該第1晶片的該第1正面與該第2晶圓中的該第2器件的貼合面即第2正面設成可相貼合的準備；貼合步驟，使該第1晶片的該第1正面面對該第2器件的該第2正面，並將該第2正面與該第1正面相貼合；及積層器件晶片製造步驟，該貼合步驟後，藉由沿著該第2晶圓的該分割預定線分割該第2晶圓，而製造一個個的積層器件晶片。 A method for manufacturing a laminated device wafer, which is used to manufacture the laminated device wafer including a first device and a second device. The first device is formed on each of the front surfaces of the first wafer divided by a plurality of planned dividing lines. The aforementioned second device is formed in each region on the front surface of the second wafer divided by a plurality of planned dividing lines. The manufacturing method of the aforementioned multilayer device wafer includes the following steps: a first wafer dividing step, by The first wafer including the workpiece set of the annular frame, the adhesive tape and the first wafer is divided along the planned division line to form a plurality of first wafers. The aforementioned adhesive tape is attached to the annular frame to block the annular shape. In the opening of the frame, the back side of the first wafer is attached to the adhesive tape; in the polishing step, after the first wafer dividing step, the first front face is polished with a polishing pad to remove processing chips from the first front face , the aforementioned first front surface is the surface that becomes the bonding surface among the plurality of first wafers, and includes the first device; after the cleaning step and the grinding step, by the first front side of the first wafer Supplying cleaning water to clean the first wafer; a picking step to separate the first wafer from the adhesive tape after the cleaning step; and a preparation step to connect the first front surface of the first wafer to the adhesive tape. The bonding surface of the second device in the second wafer, that is, the second front surface, is prepared for bonding; in the bonding step, the first front surface of the first wafer faces the second front surface of the second device. 2 front surfaces, and bonding the second front surface to the first front surface; and a laminated device wafer manufacturing step, after the bonding step, by dividing the second wafer along the planned dividing line of the second wafer circle to manufacture laminated device wafers one by one. 如請求項1之積層器件晶片之製造方法，其中該準備步驟包含：第1準備步驟，藉由對該第1晶片的該第1正面照射大氣壓電漿而使該第1正 面活性化；及第2準備步驟，藉由對該第2晶圓的該第2器件的該第2正面照射大氣壓電漿而使該第2正面活性化。 As claimed in claim 1, the manufacturing method of a multilayer device wafer, wherein the preparation step includes: a first preparation step, by irradiating the first front side of the first wafer with atmospheric pressure plasma to cause the first front side to Surface activation; and a second preparation step of activating the second front surface of the second device of the second wafer by irradiating the second front surface with atmospheric pressure plasma.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200807532A (en) * 2006-04-25 2008-02-01 Disco Corp Method of dividing an adhesive film bonded to a wafer
TW201318082A (en) * 2011-09-02 2013-05-01 Lg Innotek Co Ltd Method of manufacturing substrate for chip packages and method of manufacturing chip package
TW201543561A (en) * 2014-03-31 2015-11-16 Nitto Denko Corp Die-dicing bonding film, die-dicing bonding film with dicing sheet, semiconductor device, and semiconductor device manufacturing method
JP2015233049A (en) * 2014-06-09 2015-12-24 株式会社ディスコ Laminated device manufacturing method

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003318217A (en) * 2001-06-20 2003-11-07 Toray Eng Co Ltd Method and device for mounting
JP5681377B2 (en) * 2010-04-20 2015-03-04 日東電工株式会社 Manufacturing method of semiconductor device and flip chip type semiconductor device
JP2013251405A (en) * 2012-05-31 2013-12-12 Tadatomo Suga Bonding method of substrate having metal region
JP6349121B2 (en) 2014-03-27 2018-06-27 株式会社ディスコ Manufacturing method of laminated device
JP6429388B2 (en) 2015-03-19 2018-11-28 株式会社ディスコ Manufacturing method of laminated device
CN118737997A (en) * 2017-03-02 2024-10-01 Ev 集团 E·索尔纳有限责任公司 Method and apparatus for bonding chips
US10515837B2 (en) * 2017-04-13 2019-12-24 Raytheon Company Method of wafer bonding of dissimilar thickness die

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200807532A (en) * 2006-04-25 2008-02-01 Disco Corp Method of dividing an adhesive film bonded to a wafer
TW201318082A (en) * 2011-09-02 2013-05-01 Lg Innotek Co Ltd Method of manufacturing substrate for chip packages and method of manufacturing chip package
TW201543561A (en) * 2014-03-31 2015-11-16 Nitto Denko Corp Die-dicing bonding film, die-dicing bonding film with dicing sheet, semiconductor device, and semiconductor device manufacturing method
JP2015233049A (en) * 2014-06-09 2015-12-24 株式会社ディスコ Laminated device manufacturing method

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