TW202029528A - 發光二極體照明配置 - Google Patents
發光二極體照明配置 Download PDFInfo
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Abstract
本發明描述一種LED照明配置(10),其包括:一單層載體(3),其包括一安裝表面(30)、一金屬核心(32)及在該安裝表面(30)與該金屬核心(32)之間之一介電層(31);至少一個LED串(S1、S2、S3、S4),其等包括安裝於該安裝表面(30)上之複數個串聯連接之LED晶粒封裝(2),其中一串(S1、S2、S3、S4)之該等LED晶粒封裝(2)配置成包括至少兩個列之二維陣列(1);及至少一個微孔(33),其等延伸穿過該單層載體(3)之該介電層(31)且經配置以將一LED串(S1、S2、S3、S4)之最後陰極(22)電連接至該單層載體(3)之該金屬核心(32)。本發明進一步描述一種照明單元(5);及一種製造一LED照明配置(10)之方法。
Description
本發明描述一種LED照明配置;一種LED照明單元;及一種製造一LED照明配置之方法。
高功率發光二極體(LED)陣列愈來愈廣泛地用於諸如相機閃光燈、汽車外部照明等之應用中。雖然可製造包括可個別定址LED之一陣列晶粒封裝,但較佳可組裝個別晶粒封裝之一陣列,因為此方法提供更多可能性。此一陣列或矩陣之LED可以包括一共同陽極及一共同陰極之一並聯組態連接。替代地,LED可串聯連接。為個別地定址陣列之各LED,可將各LED並聯連接至一旁路開關,使得可視情況個別地開啟或關閉LED。此一實現可用於一汽車前照明單元或後照明單元之一適應性遠光燈(adaptive driving beam) (ADB)應用中。在此等高功率應用中,可實現電流超過200 mA之LED。
在一先前技術LED晶粒封裝矩陣中,可藉由將電路軌道配置於一載體或基板(諸如一多層印刷電路板(PCB)或一絕緣金屬基板(IMS))之兩個或更多個佈線層中使得並非所有軌道皆需要佈線在晶粒之間,而使陣列大小保持相對緊湊。然而,LED在操作期間變得非常熱,且有效率之熱輸送係必要的。先前技術配置之一缺點係必須將任何散熱片(heat spreader)、散熱器(heat sink)或導熱塊(thermal block)配置於PCB下方,但分離PCB之任何兩個佈線層級之介電層亦為絕熱的。對於IMS板,此一介電層之厚度一般為約50 μm至100 μm,因為其必須在佈線層級之間提供可靠的電絕緣。因此,來自LED之熱無法有效率地輸送至散熱片,使得LED可達到不利之高溫且LED之壽命可縮短。無法有效率地輸送來自安裝於一多層PCB上之非常密集配置之LED封裝之熱。因此,經配置朝向陣列之中心之任何LED可具有一明顯較短之壽命,此係因為此等LED亦被任何較熱相鄰LED加熱,使得此等配置在中心之LED可因熱損壞而甚至更快地發生故障。因此等原因,此等矩陣陣列之LED晶粒封裝一般間隔開一顯著距離以容許熱自LED消散。
因此,矩陣中之個別光源將有效地分離一明顯距離,使得矩陣相對較大且陣列結構將清楚可見,除非使用一適合集束或準直光學元件來將來自個別LED晶粒之光整形為一單一「虛擬」光源。例如,在諸如汽車照明之應用中,一矩陣LED照明配置可包括一LED陣列或矩陣、將個別貢獻「集束」成一單一光束之一準直元件,及以所要方式操縱光束(例如,以遵循適用規則)之一成像透鏡。由於相對較大之矩陣大小,任何此準直元件之大小或任何此透鏡之大小亦將相應地較大,從而增加應用之總重量及成本。
因此,本發明之一目的係提供一種經改良之可定址LED矩陣配置。
本發明之目的係藉由以下各者達成:技術方案1之LED照明配置;技術方案12之照明單元;及技術方案14之製造一LED照明配置之方法。
根據本發明,該LED照明配置包括:一單層載體,其包括一安裝表面、一金屬核心及在該安裝表面與該金屬核心之間之一介電層;至少一個LED串,其等包括安裝於該安裝表面上之複數個串聯連接之LED晶粒封裝,其中一串之該等LED晶粒封裝配置成包括至少兩個列之二維陣列;及至少一個微孔,其等延伸穿過該單層載體之該介電層且經配置以將一LED串之最後陰極電連接至該單層載體之該金屬核心。
一微孔大體為一非常小之圓柱形襯有金屬之貫穿開口,其延伸至一多層基板(諸如一印刷電路板)中。通常,一微孔用於將在該基板之一個層級處之一導電軌道連接至嵌入於該基板內之另一層級處之一導電軌道。在本發明之內容背景中,可假定該基板或載體係一單層基板,其具有僅由沈積於其安裝表面上之一金屬層形成之軌道,且應瞭解,任何微孔自該基板之該安裝表面(前表面或頂表面)延伸穿過而至嵌入於該基板中之該金屬核心。因此,該微孔係一「盲」孔,此係因為其開始於該安裝表面處且終止於該基板之主體內部,即,其未延伸至該基板之相對表面。該單層基板應被理解為不包括具有導電軌道之任何嵌入層。該單層基板應被理解為包括介電材料之一單一薄層,其用於電隔離上金屬層(自其蝕刻導電軌道)與該金屬核心或金屬基底層(其提供結構強度且亦用於消散熱)。此一PCB一般被稱為一單層絕緣金屬基板(IMS)或一單層金屬核心PCB (MCPCB)。
二維LED陣列之最後LED之陰極必須連接至電接地。從已知設計來看,此接地軌道將必須被放置至二維LED陣列之該等最後LED之側。由於一基板上之一印刷軌道之寬度可為60 μm至500 μm寬,故需要提供此一軌道意謂必須在一第一二維LED陣列與一第二相鄰LED陣列之該等最後LED之間提供一對應間隙。此問題藉由本發明LED照明配置克服,此係因為一第一LED串之最後陰極透過該基板中之一微孔電連接至接地散熱塊。因此,不需要提供自此最後LED沿著該安裝表面且至一接地端子之一導電軌道。因此,一第二相鄰LED陣列之LED可放置成非常靠近該第一串或二維陣列之該等最後LED。以此方式,可達成一更緊湊之配置,即,LED晶粒封裝可更密集地堆積。運用本發明LED照明配置,鄰近LED可配置成緊靠在一起,且可藉由小於100 µm之一間隙分離。鄰近LED可甚至藉由小至40 µm之一間隙分離。此意謂本發明LED照明配置容許使用具有非常薄之側塗層(例如,具有小於100 μm之一厚度之側塗層)之高功率LED晶粒。運用此等薄側塗層,緊密堆積之LED晶粒封裝陣列不需要一集束光學元件以形成一均質光束,使得本發明LED照明配置可用於一直接投影系統中,即,用於不包含LED與一成像透鏡之間之一集束光學元件的一照明單元中。LED晶粒之串可配置成一矩陣以給出可個別定址LED之一非常有效率的且緊湊的陣列。可使用其中封裝大小係與發射表面之大小相同之大小或僅略大於發射表面之大小的LED晶粒。
根據本發明,該照明單元包括:本發明LED照明配置之一實施例;用於將串聯連接LED晶粒封裝串之LED連接至一控制器之一介面;及一成像透鏡。
由於藉由在基板中提供一微孔以將一串之最後LED連接至單層基板之金屬核心而獲得之空間緊密配置(如上文描述),因而甚至在沒有準直光學元件之情況下,仍將無法在離開該照明單元之光束中識別個別陣列。代替性地,來自LED及LED陣列之光將有利地看似源於一單一光源。因此,本發明LED照明配置可實現為一直接投影系統,即,不需要一準直光學元件之一照明單元。一可比較先前技術照明單元需要一準直或集束光學元件來校正相鄰之兩個二維LED陣列之間之間隙,且遭受一對應效率降低。
根據本發明,製造一LED照明配置之方法包括下列步驟:提供一單層載體,其包括一安裝表面、一金屬核心及在該安裝表面與該金屬核心之間之一介電層;針對若干串聯連接LED晶粒封裝串在該載體上形成軌道,使得一串之LED晶粒封裝被配置成二維陣列;判定一LED串之一最後陰極之位置;在各經判定位置處形成延伸穿過該單層載體之該介電層之一微孔;及將該等LED晶粒封裝安裝至該載體上之其等指定位置處。
本發明方法提供如何達成一單層基板上之非常緊密間隔且可個別定址之發射器之一陣列的技術挑戰之一解決方案,即,如何僅使用一單一佈線層達成LED晶粒封裝之多個列之電佈線。在諸如ADB或「矩陣光」應用之應用中可期望可個別定址之LED晶粒封裝之此等密集堆積陣列,此係因為LED晶粒封裝之緊密堆積意謂應用不需要預準直器光學元件,且因此可以一更緊湊且經濟之方式實現。
附屬技術方案及下列描述揭示本發明之尤其有利的實施例及特徵。該等實施例之特徵可視情況組合。在一個技術方案範疇之內容背景中描述之特徵可同樣應用於另一技術方案範疇。
在本發明之一尤其較佳實施例中,一LED晶粒封裝係在其下表面(即,與發射表面相對之側)上具有陽極及陰極焊料接點之一表面安裝式晶圓級封裝。在下文中,在不以任何方式限制本發明之情況下,術語「LED晶粒封裝」、「發射器」及「LED」可互換地使用。較佳地,一LED晶粒封裝包括一高功率LED,即,具有500 mA/mm2
至1500 mA/mm2
之一電流密度之一LED。
一晶圓級LED晶粒封裝之側壁一般塗佈有諸如二氧化鈦(TiO2
)之一材料,以改良來自晶粒之光輸出,且亦氣密密封該晶粒之側表面。一LED晶粒之封裝大小係由圍繞該晶粒之四個側之任何側塗層之厚度判定。當前可用之LED晶粒可具有在200 μm左右或更大之TiO2
側塗層厚度。在本發明之另一較佳實施例中,該側塗層包括一薄膜反射塗層,其可實現為10 μm或更小之一厚度。
在本發明LED照明配置之一較佳實施例中,一側塗層可在組裝之後(即,在將LED以緊密堆積之二維陣列安裝於基板上之後)施覆至LED。此可藉由用含有反射性TiO2
粒子之流體聚矽氧材料填充鄰近LED之間之間隙而達成。該流體聚矽氧將因毛細管作用而被汲取至該等間隙中,且接著容許固化。
運用此一薄側塗層,且假定滿足熱需求,可使晶粒之發射表面可緊靠在一起且僅分離一小距離。例如,使用一適合之薄側塗層,鄰近LED較佳地分離達至多100 μm,更佳達至多50 μm。在其中一串之LED以一交錯方式配置之一陣列中,表達「鄰近LED」應被理解為與一LED相鄰之陣列,此係因為一鄰近LED不一定為與一LED相鄰之串。
如上文指示,串聯連接之LED晶粒封裝之一串之LED較佳為可個別定址的。為此,本發明LED照明配置較佳地包括用於各LED之一開關。一開關可為一適合電晶體(較佳地,一MOSFET),且較佳藉由來源於一控制器之一適合信號控制。任何此等開關亦可安裝於與LED陣列相同之該基板上。較佳地,該等開關以一積體電路組件之形式提供。類似地,一控制器可以一積體電路組件之形式提供。
本發明LED照明配置較佳地包括串聯連接之LED晶粒封裝之至少兩個串,更佳地,串聯連接之LED晶粒封裝之至少四個串,其中一串包括至少兩個串聯連接之LED晶粒封裝,更佳地,至少六個串聯連接之LED晶粒封裝,最佳地,至少十二個串聯連接之LED晶粒封裝。在本發明之一例示性較佳實施例中,該LED照明配置包括十二個串聯連接之LED晶粒封裝之四個串,且各串之最後陰極電連接至一微孔,該微孔繼而電連接至該單層基板之該金屬核心。在此例示性較佳實施例中,該二維陣列係藉由以一交錯之2 x 6陣列組態配置各12-LED串之晶粒而形成之4 x 12陣列。本發明LED照明配置之一有利旁效應係各串之該最後陰極亦熱連接至該單層基板之該金屬核心。
該單層基板或載體可包括任何適合基板,諸如一PCB或一陶瓷載體。在本發明之一尤其較佳實施例中,該基板係在其上表面上具有一單一介電層及一單一佈線層之一絕緣金屬基板(IMS)。一IMS包括一薄介電層(諸如施覆至一金屬核心或底板(諸如銅或鋁)上之FR-4環氧樹脂)及施覆至該介電層之外表面上之一金屬層(通常為銅)。用於LED之導電軌道之圖案係自此金屬層蝕刻。該金屬核心或底板可使用緊固件及/或一熱黏著劑熱連接至一散熱片。一IMS提供與一多層級PCB相比優越之熱消散,且確保至該散熱片之最佳熱連接。
較佳地,一微孔包括一襯有金屬之貫穿開口,其自基板之安裝表面延伸穿過該基板而至該單層載體之該金屬核心。針對最佳熱傳導,微孔金屬較佳為銅。一微孔之直徑較佳為約50 μm至200 μm。該微孔可由金屬完全填充,或其之側壁可用金屬內襯至小於該微孔之半徑之一厚度。
自結合隨附圖式之下列詳細描述將明白本發明之其他目的及特徵。然而,應瞭解,圖式僅出於繪示之目的設計且不作為對本發明之範圍之一定義。
圖1展示本發明LED照明配置10之一實施例之一電路圖。LED照明配置10包括一LED晶粒陣列1。LED晶粒陣列1包括表面安裝式晶圓級封裝LED晶粒2之四個串聯連接之串S1、S2、S3、S4,其中各串中有十二個LED。第一串S1包括標記為D1至D12之LED;第二串S2包括標記為D13至D24之LED;第三串S3包括標記為D25至D36之LED;及第四串S4包括標記為D37至D48之LED。在此例示性實施例中,LED照明配置10進一步包括一控制器11,其經實現以個別地定址各LED 2。各串S1、S2、S3、S4藉由一對應電流源C1、C2、C3、C4驅動。各LED串S1、S2、S3、S4之終止陰極連接至一共同接地。此係藉由藉助一微孔將各串S1、S2、S3、S4之最後LED 2連接至一單層載體(諸如IMS或MCPCB)之金屬核心而達成。各LED 2可藉由一適合開關元件(諸如一電晶體T)旁通。為清楚起見,僅展示第一串S1之少數開關元件T,但可假定各串S1、S2、S3、S4之各LED 2具備一對應開關元件T。如熟習此項技術者將知道,串S1至S4之開關T可包括MOSFET或其他適合電晶體,且可以一積體電路組件之形式提供。控制器11經實現以藉由適當控制對應開關元件T而個別地切換各LED 2。以此方式,LED陣列1可用於例如一汽車前照明單元之一主動動態光束(ADB)應用中。LED陣列1及控制器11可提供於一共同封裝中,或例如,LED晶粒陣列1可安裝於一基板上且具備一控制介面110 (諸如一扁平電纜或插座)用於連接至一控制器11。
圖2展示具有用於接納上文圖1之十二個串聯連接之LED 2之四個串之導電軌道30之一圖案的一單層PCB 3之部分。LED將安裝於四個列R1至R4中。藉由矩形指示未來LED,在圖式中標記一些未來LED。各組十二個LED將以一之字形(zig-zag)方式配置於兩個列上方,其中連續LED在不同列中。因此,圖1之LED陣列將呈現為一4 x 12陣列,該陣列繼而包括四個2 x 6子陣列。例如,一個12 LED串可開始於最上列R1之左上角。該串中之後六個LED將放置於標記為D7、D8、D9、D10、D11、D12 (按該順序)之位置處。一導電軌道將一串之第一LED之陽極連接至一電流源(未展示)。一進一步軌道段將第一LED之陰極連接至該串之第二LED之陽極,且該第二LED之陰極連接至第三LED之陽極,等。串聯連接以此方式繼續,直至到達該串之最後LED (在列R2中之位置D12處)。為清楚起見,僅展示少數此等軌道:軌道30(9, 10)將位置D9處之一LED之陰極連接至位置D10處之一LED之陽極;軌道30(10, 11)將位置D10處之一LED之陰極連接至位置D11處之一LED之陽極;軌道30(11, 12)將位置D11處之一LED之陰極連接至位置D12處之一LED之陽極。第一串之最後LED之陰極(在位置D12處)將電連接至一盲微孔33之金屬,盲微孔33已形成為直接在標記為D12之位置處之LED之陰極接點下方。以一類似方式,一盲微孔33被展示為直接在標記為D36之位置處之第三串之最後LED之陰極接點下方。為繪示之目的,較小之矩形對(在指示未來LED位置之矩形內)對應於將安裝於位置D10、D12、D32、D34、D36處之LED晶粒封裝之陽極及陰極接觸墊之位置。各串之最後LED晶粒封裝之陰極接點將直接在一盲微孔33上方。
圖展示自LED位置之陣列向外延伸以將LED連接至如上文在圖1中描述之一開關模組之開關的軌道30。開關將容許定址各LED,即,視情況開啟/關閉。藉由將LED安裝至一薄的單層MCPCB 3上,且藉由藉助盲微孔33將各串之最後陰極電連接至薄單層PCB 3之金屬核心,可甚至在應用一非常緊密堆積密度時滿足熱需求。分離LED之間隙G可小至50 μm至100 μm。LED晶粒封裝之側可被供應一薄膜反射塗層,該塗層具有小於10 μm之一厚度。發射表面之間之間隙G之寬度可包括兩個側塗層厚度及其等中間之空的空間。替代地,代替鄰近之經塗佈LED之側之間之空的空間或空氣,可用一適合絕緣材料(諸如聚矽氧)填充該空間。如上文描述,LED側塗層可藉由在LED晶粒安裝至載體上之後將聚矽氧(含有TiO2
粒子)傾倒至該等LED晶粒之間之間隙中而形成。由於透過單層PCB 3之有效率熱傳遞,表面安裝式晶圓級封裝LED晶粒可配置成緊靠在一起。在具有至多10 μm之一薄側塗層及僅50 μm至100 μm之一間隙G,且不需要自一串之最後LED至一外部接地端子之一導電軌道之情況下,當用於諸如一汽車前照明之一應用中時,不再需要一LED矩陣1之一集束或準直光學元件。
圖3展示當安裝於圖2之單層PCB 3上時,穿過圖1之陣列1之一列之一部分之一橫截面。在此較佳實施例中,PCB 3實現為一單層金屬核心印刷電路板(MCPCB)或一絕緣金屬基板(IMS)。圖展示單層載體3之介電層31及金屬核心32或基底層32。展示穿過標記為D8至D18 (第二列R2中之第一串S1之LED D8、D10、D12及第二列R2中之第二串S2之LED D14、D16、D18)之六個LED 2之一橫截面。各LED 2在結構上相同,且所有LED 2以相同方向配置,其中一陽極21在左側且一陰極22在右側。各LED 2之陽極21及陰極22焊接至單層PCB 3之表面上之軌道30,單層PCB 3安裝於一散熱器4上。圖展示藉由一盲微孔33電連接至基板3之金屬核心32之第一串S1之最後LED (標記為D12)之陰極22。此在圖之放大部分中更詳細展示。陽極接點21藉由一焊料互連件34電連接至一導電軌道30。陰極接點22藉由一焊料互連件34電連接至一盲微孔33之上端。盲微孔33之金屬壁電(且熱)連接至PCB 3之金屬核心32。此電連接不需要為一串之最後陰極與一接地端子之間之一導電軌道保留空間。一非常緊密之封裝可藉由給予晶粒2以小於50 μm (較佳10 μm或更小)之一非常薄之側塗層23以容許至多50 μm至100 μm之一非常窄之間隙G而達成。如上文描述,側塗層可在組裝照明配置之前施覆至個別LED 2,或可在LED安裝至載體之後集體施覆至此等LED。單層PCB 3之金屬核心32可使用一適合材料40 (諸如一熱黏著劑)熱接合至散熱器4。在一項實施例中,金屬核心32及散熱器可電連接且熱連接,且散熱器4用作電接地。在一替代實現方案中,金屬核心32與散熱器4之間之介面可包括一電隔離材料,諸如一介電質。
圖4展示本發明LED照明單元5之一實施例。圖展示照明單元5之相關組件,即,本發明LED照明配置10之一實施例、用於將串聯連接LED晶粒封裝串之LED連接至控制電路之一介面110,及配置於藉由串聯連接LED晶粒封裝串之LED發射之光之路徑中的一成像透鏡50。LED安裝於附接至一散熱片之一MCPCB上。因為LED安裝為緊靠在一起,且因為鄰近LED陣列亦安裝為緊靠在一起,所以本發明LED照明單元5不需要任何準直光學元件,原本將需要該等準直光學元件來操縱LED及LED陣列之個別貢獻以獲得接著可藉由一成像透鏡成像之一光束。一例示性實施例可包括12個LED之4個串,其等安裝於一MCPCB上而具有僅50 μm或更小之中介間隙G且覆蓋30 mm2
之一總面積。藉由本發明LED照明配置實現之緊湊放置可容許一更緊湊之LED照明單元5及/或可容許部署更大量之LED。
圖5展示一先前技術LED照明單元7之一實施例。亦在此處,圖僅展示相關組件,即,包括數個串聯連接LED晶粒封裝串之一先前技術LED照明配置70及用於將LED連接至控制電路之一介面110。因為先前技術LED照明配置70之LED歸因於熱需求間隔開,且因為鄰近LED陣列間隔開以容納一串之最後LED之一軌道,所以先前技術LED照明單元7需要一準直光學元件71以操縱LED及LED陣列之個別貢獻,以獲得接著可藉由一成像透鏡72成像之一光束。一例示性實施例可包括安裝於一MCPCB上之12個LED之4個串。在具有200 µm之一側塗層厚度及1.2 mm之一LED節距或間隙G7
之情況下,此一配置覆蓋70 mm2
之一面積。此相對較大之面積起因於需要在鄰近LED與鄰近LED陣列之間提供足夠大之間隙,且可導致一對應較大之LED照明單元7及/或可對可部署之LED之總數設置一上限。
儘管已經以較佳實施例及其等之變體之形式揭示本發明,然將瞭解,在不脫離本發明之範疇之情況下,可對該等實施例及其等變體作出許多額外修改及變動。
為清楚起見,應瞭解,在整個本申請案各處使用「一(a或an)」不排除複數個,且「包括」不排除其他步驟或元件。提及一「單元」或一「模組」不排除使用一個以上單元或模組。
1:二維陣列/LED晶粒陣列/LED陣列
2:LED晶粒封裝/LED晶粒/LED
3:單層載體/單層PCB/單層MCPCB/基板
4:散熱器/散熱塊
5:LED照明單元
7:先前技術LED照明單元
10:LED照明配置
11:控制器
21:陽極/陽極接點
22:陰極/陰極接點
23:側塗層
24:發射表面
30:安裝表面/導電軌道
31:介電層
32:金屬核心
33:微孔/盲微孔
34:焊料互連件/焊料
40:材料
50:成像透鏡
70:先前技術LED照明配置
71:準直光學元件
72:成像透鏡
110:控制介面
C1至C4:電流源
D1至D36:LED
D37至D48:LED
G:間隙
G7:間隙
R1至R4:列
S1至S4:LED串/串聯連接串
T:電晶體/開關元件/開關
圖1展示本發明LED照明配置之一實施例之一電路圖;
圖2展示經圖案化以接納圖1之LED照明配置之LED的一單層基板;
圖3展示穿過圖1之LED照明配置之陣列之一橫截面;
圖4展示本發明LED照明單元之一實施例;
圖5展示一先前技術LED照明單元。
在圖式中,各處之相同元件符號指代相同物件。圖中之物件不一定按比例繪製。
3:單層載體/單層PCB/單層MCPCB/基板
30:安裝表面/導電軌道
33:微孔/盲微孔
G:間隙
R1至R4:列
D1至D36:LED
D37至D38:LED
Claims (15)
- 一種LED照明配置(10),其包括 一單層載體(3),其包括一安裝表面(30)、一金屬核心(32)及在該安裝表面(30)與該金屬核心(32)之間之一介電層(31); 複數個LED串(S1、S2、S3、S4),一LED串(S1、S2、S3、S4)包括安裝於該安裝表面(30)上之複數個串聯連接之LED晶粒封裝(2),其中一串(S1、S2、S3、S4)之該等LED晶粒封裝(2)配置成包括至少兩個列之二維陣列(1);及 其中該LED照明配置之特徵在於 至少一個微孔(33),其等延伸穿過該單層載體(3)之該介電層(31)且經配置以將一LED串(S1、S2、S3、S4)之最後陰極(22)電連接至該單層載體(3)之該金屬核心(32)。
- 如請求項1之LED照明配置,其中一LED晶粒封裝(2)係具有陽極接點(21)及陰極接點(22)之一表面安裝式晶圓級封裝。
- 如請求項1或請求項2之LED照明配置,其中一LED晶粒封裝(2)包括具有至少500 mA/mm2 、更佳至少1500 mA/mm2 之一額定電流密度之一LED。
- 如請求項1或請求項2之LED照明配置,其中一LED晶粒封裝(2)包括具有至多100 μm、更佳至多20 μm之一厚度之一側塗層(23)。
- 如請求項1或請求項2之LED照明配置,其中一LED晶粒封裝(2)之一側塗層(23)係反射性的。
- 如請求項1或請求項2之LED照明配置,其中鄰近LED晶粒封裝(2)分離達至多200 μm、更佳至多100 μm、最佳至多50 μm之一間隙(G)。
- 如請求項1或請求項2之LED照明配置,其包括用於串聯連接之LED晶粒封裝(2)之一串(S1、S2、S3、S4)之各LED的一開關(T)。
- 如請求項1或請求項2之LED照明配置,其中該單層載體(3)係一絕緣金屬基板或一金屬核心印刷電路板之任一者。
- 如請求項1或請求項2之LED照明配置,其中一微孔(33)包括一襯有銅之孔(33)。
- 如請求項1或請求項2之LED照明配置,其中一微孔(33)包括介於50 μm至200 μm之間之一直徑。
- 如請求項1或請求項2之LED照明配置,其包括串聯連接之LED晶粒封裝(2)之至少兩個串,更佳串聯連接之LED晶粒封裝(2)之至少四個串,其中一串(S1、S2、S3、S4)包括至少十個串聯連接之LED晶粒封裝(2),更佳地,至少十二個串聯連接之LED晶粒封裝(2)。
- 一種LED照明單元(5),其包括 如請求項1至11中任一項之LED照明配置(10), 一控制介面(110),其用於將該等串聯連接LED晶粒封裝串(S1、S2、S3、S4)之LED (2)連接至一控制器(11);及 一成像透鏡(50),其直接配置於由該等串聯連接LED晶粒封裝串(S1、S2、S3、S4)之該等LED (2)發射之光之路徑中。
- 如請求項12之LED照明單元,其包括十二個串聯連接之LED晶粒封裝(2)之四個串(S1、S2、S3、S4),且其中該二維陣列(1)係藉由以2 x 6陣列組態配置各LED晶粒封裝串(S1、S2、S3、S4)而形成之4 x 12陣列(1)。
- 一種製造一LED照明配置(10)之方法,其包括以下步驟 提供一單層載體(3),其包括一安裝表面(30)、一金屬核心(32)及在該安裝表面(30)與該金屬核心(32)之間之一介電層(31); 針對若干串聯連接LED晶粒封裝串(S1、S2、S3、S4)在該載體(3)上形成軌道(30),使得將一串(S1、S2、S3、S4)之LED晶粒封裝(2)配置成二維陣列(1); 判定一LED串(S1、S2、S3、S4)之一最後陰極(22)之位置; 在各經判定位置處形成延伸穿過該單層載體(3)之該介電層(31)之一微孔(33);及 將該等LED晶粒封裝(2)安裝至該載體(3)上之其等指定位置處。
- 如請求項14之方法,其包括提供一散熱塊(4)及將該單層載體(3)之該金屬核心(32)熱連接至該散熱塊(4)之一步驟。
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