TW202027226A - Method of manufacturing complementary metal oxide semiconductor micro-electrical mechanical system microphone prevents doped polysilicon layer and metal back plate from occurring short circuit - Google Patents

Abstract

The present invention discloses a method of manufacturing complementary metal oxide semiconductor micro-electrical mechanical system microphone, comprising the steps of firstly providing a complementary metal oxide semiconductor device containing a semiconductor substrate, a first oxide insulating layer, a doped polysilicon layer, a second oxide insulating layer, a pattern polysilicon layer, and a metal wiring layer sequentially disposed upward. The metal wiring layer is disposed on the second oxide insulating layer. The pattern polysilicon layer comprises the un-doped polysilicon. Next, a portion of metal wiring layer is removed to form a metal back plate, and a cavity penetrating through the semiconductor substrate is opened to expose the first oxide insulating layer in order to further form a micro-electrical mechanical system microphone. The present invention utilizes un-doped polysilicon of the pattern polysilicon layer to avoid the doped polysilicon layer and the metal back plate from occurring short circuit.

Description

Manufacturing method of complementary metal oxide semi-microelectromechanical microphone

The present invention relates to a method for manufacturing a microphone, and more particularly to a method for manufacturing a complementary metal oxide semi-microelectromechanical microphone.

In the past three decades, complementary metal oxide semiconductor (CMOS) has been widely used in the manufacture of integrated circuits (IC). Due to a large amount of research manpower and investment, the development and innovation of integrated circuits have made rapid progress, significantly improving their reliability and output, and at the same time, greatly reducing production costs. At present, this technology has reached a mature and stable level. For the continuous development of semiconductors, in addition to keeping up with the current technology development trend, breakthroughs must be achieved, special production processes, and system integration enhanced.

In this regard, micro-electromechanical systems (MEMS) is a new processing technology that is completely different from traditional technologies. It mainly uses semiconductor technology to produce MEMS structures; at the same time, it can manufacture products with electronic and mechanical functions. Therefore, it has the advantages of batch processing, miniaturization and high performance, and is very suitable for production industries that require mass production at reduced costs. Therefore, for this stable and evolving CMOS technology, the integration of MEMS and circuits can be a better way to achieve system integration. In the conventional technology, as shown in FIG. 1, a MEMS microphone usually has a back plate 10, a diaphragm 12, and a semiconductor substrate 14. There is a gap between the back plate 10 and the diaphragm 12, the semiconductor substrate 14 has a cavity 16, and the cavity 16 is located under the diaphragm 12. When sound pressure is transmitted to the diaphragm 12 through air vibration, the diaphragm 12 vibrates. If there is an error in the manufacturing process, the voltage applied by the back plate 10 and the diaphragm 12 will cause a short circuit between the back plate 10 and the diaphragm 12. For example, European patent EP2536168A2 and US patent US9758370 both disclose the structure of the microphone. There is no barrier between the back plate and the diaphragm. Therefore, when the diaphragm vibrates, the back plate and the diaphragm are prone to short-circuit. In addition, although US patent US7666698 uses an etch stop layer to form a cavity above the MEMS device, the material of the etch stop layer is silicon nitride (SiN), which is not polysilicon used in standard manufacturing processes. (Polysilicon). The US patent 20070218661A1 patterned and etched a pure polysilicon layer to form a gate electrode doped with ions, regardless of the microphone structure.

Therefore, the present invention aims at solving the above-mentioned problems and proposes a method for manufacturing a complementary metal-oxygen semi-microelectromechanical microphone to solve the conventional problems.

The main purpose of the present invention is to provide a method for manufacturing a complementary metal oxide semi-microelectromechanical microphone, which uses the undoped polysilicon of the patterned polysilicon layer to isolate the doped polysilicon layer and the metal back plate to avoid doped polysilicon The layer and the metal back plate are short-circuited, and at the same time, the doped polysilicon layer is prevented from being etched.

To achieve the above objective, the present invention provides a method of manufacturing a complementary metal oxide semi-microelectromechanical microphone. First, a complementary metal oxide semi-device is provided, which includes a semiconductor substrate and a first semiconductor substrate arranged from bottom to top in sequence. An oxide insulating layer, a doped polysilicon layer, a second oxide insulating layer, a patterned polysilicon layer and a metal wiring layer, the metal wiring layer is provided on the second oxide insulating layer, and the patterned polysilicon layer includes undoped polysilicon . Then, remove part of the metal wiring layer to form a metal back plate located above the undoped polysilicon to isolate the metal back plate from the doped polysilicon layer by using the undoped polysilicon, and open the semiconductor substrate through itself A cavity (Chamber), with the exposed doped polysilicon layer as a vibration diaphragm (Diaphragm), thereby forming a MEMS microphone.

In an embodiment of the present invention, a part of the metal wiring layer is first removed to form a metal backplane, and then a cavity is opened in the semiconductor substrate to expose the first insulating oxide layer.

In one embodiment of the present invention, a cavity is first opened in the semiconductor substrate to expose the first insulating oxide layer, and then part of the metal wiring layer is removed to form a metal backplane.

In an embodiment of the present invention, the metal wiring layer further includes an oxide insulating structure, a first metal layer, a second metal layer, a first metal via, a second metal via, and a third metal layer , The oxide insulating structure is disposed on the second oxide insulating layer and the patterned polysilicon layer, and the first metal layer, the second metal layer, the first metal via, the second metal via and the third metal layer are embedded in the oxide insulating structure, The first metal layer, the second metal layer, and the third metal layer are separated from each other and arranged sequentially from bottom to top. The first metal layer is separated from the patterned polysilicon layer. The first metal via is located between the second metal layer and the third metal layer. Between the metal layers, the second metal layer and the third metal layer are electrically connected, and the second metal through hole connects at least one of the second insulating oxide layer and the undoped polysilicon to the third metal layer.

In an embodiment of the present invention, the material of the oxide insulating structure is silicon dioxide.

In an embodiment of the present invention, the metal wiring layer further includes a silicon nitride (SiN) layer, which is disposed on the oxide insulating structure and the third metal layer.

In one embodiment of the present invention, first remove part of the oxidized insulating structure to expose part of the patterned polysilicon layer, and then remove the remaining oxidized insulating structure, the first metal layer and part of the second metal layer to use The first metal via, the third metal layer and the remaining second metal layers form a metal backplane.

In an embodiment of the present invention, the method for removing part of the oxide insulating structure is dry etching, and the method for removing the remaining oxide insulating structure, the first metal layer and part of the second metal layer is wet etching.

In an embodiment of the present invention, the method for opening the cavity is a deep ion etching (DRIE) method.

In an embodiment of the present invention, the patterned polysilicon layer further includes doped polysilicon.

In an embodiment of the present invention, the semiconductor substrate is a silicon substrate, and the first insulating oxide layer and the second insulating oxide layer are silicon dioxide layers.

In order to make your reviewer have a better understanding and understanding of the structural features of the present invention and the achieved effects, a preferred embodiment diagram and detailed description are provided. The description is as follows:

The embodiments of the present invention will be further explained by following relevant drawings. As far as possible, in the drawings and description, the same reference numerals represent the same or similar components. In the drawings, the shape and thickness may be exaggerated for simplicity and convenience. It can be understood that the elements not particularly shown in the drawings or described in the specification are in the form known to those skilled in the art. Those skilled in the art can make various changes and modifications based on the content of the present invention.

Generally speaking, the polysilicon (polysilicon) in the complementary metal-oxide-semiconductor (CMOS) process is doped with N-type or P-type ions as a conductive material, usually as a gate, resistor or polysilicon (PIP, poly interconnect poly) Capacitor, but the present invention does not dope any ions in the polysilicon. Even if pure polysilicon is used, it can not only serve as an etching barrier in the manufacture of MEMS microphones, but also prevent short-circuit events in the microphone.

Please refer to FIG. 2(a) to FIG. 2(d) below to introduce the first embodiment of the manufacturing method of the complementary metal oxide semi-microelectromechanical microphone of the present invention. First, as shown in Figure 2(a), a complementary metal oxide semiconductor device 18 is provided, which includes a semiconductor substrate 20, a first insulating oxide layer 22, and a doped The polysilicon layer 24, a second insulating oxide layer 26, a patterned polysilicon layer 28 and a metal wiring layer 30. The metal wiring layer 30 is provided on the second insulating oxide layer 26. The patterned polysilicon layer 28 includes undoped polysilicon or Contains both undoped polysilicon and doped polysilicon. If the patterned polysilicon layer 28 only includes undoped polysilicon, the material of all regions of the patterned polysilicon layer 28 is undoped polysilicon. In the first embodiment, the patterned polysilicon layer 28 includes both undoped polysilicon 281 and doped polysilicon 282 as an example. In other words, the material of a part of the patterned polysilicon layer 28 is undoped polysilicon 281, and the material of the rest of the patterned polysilicon layer 28 is doped polysilicon 282, and the area of the undoped polysilicon 281 is shown by cross-sections. The area of doped polysilicon 282 is shown as blank. The doped polysilicon 282 used in the present invention can be doped with P-type ions or N-type ions, and is more conductive than the undoped polysilicon 281. In addition, the undoped polysilicon 281 used in the present invention is pure polysilicon. According to the EFFECT OF GRAIN STRUCTURE AND DOPING ON THE MECHANICAL PROPERTIES OF POLYSILICON THIN FILMS FOR MEMS by NAGA SIVAKUMAR YAGNAMURTHY in 2013, the resistivity of undoped polysilicon As infinite, the resistivity of doped phosphosilicate glass (PSG) is lower than that of doped polysilicon. Therefore, the undoped polysilicon used in the present invention can be regarded as an insulator and used to prevent short circuits between two conductors. In order to describe in detail the manufacturing method of the complementary metal oxide semi-microelectromechanical microphone of the present invention, in the first embodiment, the structure of the complementary metal oxide semi-microphone 18 is specifically described, but the present invention is not limited to this.

In the complementary metal oxide semiconductor device 18, the semiconductor substrate 20 is a silicon substrate, and the first insulating oxide layer 22 and the second insulating oxide layer 26 are silicon dioxide layers. The metal wiring layer 30 further includes an oxide insulating structure 32, a first metal layer 34, a second metal layer 36, a first metal via 38, a second metal via 40, and a second metal via 40. Three metal layers 42 and a silicon nitride (SiN) layer 44. The material of the oxide insulating structure 32 can be silicon dioxide. The first metal layer 34, the second metal layer 36, the first metal via 38, the second metal via Both the hole 40 and the third metal layer 42 are made of conductive material. The oxide insulating structure 32 is provided on the second oxide insulating layer 26 and the patterned polysilicon layer 28, the first metal layer 34, the second metal layer 36, the first metal via 38, the second metal via 40 and the third metal layer 42 is embedded in the oxide insulating structure 32. The first metal layer 34, the second metal layer 36 and the third metal layer 42 are separated from each other and arranged from bottom to top in sequence. The first metal layer 34 is separated from the patterned polysilicon layer 28. The first metal via 38 is located between the second metal layer 36 and the third metal layer 42 to electrically connect the second metal layer 36 and the third metal layer 42, and the second metal via 40 connects to the second insulating oxide layer 26 And at least one of the undoped polysilicon 281 of the patterned polysilicon layer 28 and the third metal layer 42. In the first embodiment, the second metal via 40 simultaneously connects the second insulating oxide layer 26, the undoped polysilicon 281 of the patterned polysilicon layer 28, and the third metal layer 42.

Then, as shown in FIG. 2(b), part of the oxide insulating structure 32 is removed by dry etching to expose part of the patterned polysilicon layer 28. Then, as shown in FIG. 2(c), the remaining oxide insulating structure 32, the first metal layer 34, and part of the second metal layer 36 are removed by wet etching to use the first metal via 38, the third The metal layer 42 and the remaining second metal layer 36 form a metal back plate 46 and form a cavity 47 between the metal back plate 46 and the patterned polysilicon layer 28. In the steps of Fig. 2(b) and Fig. 2(c), since the undoped polysilicon 281 of the patterned polysilicon layer 28 isolates the doped polysilicon layer 24 and the oxide insulating structure 32, it is possible to avoid the doped etching Polysilicon layer 24. In addition, because the undoped polysilicon 281 of the patterned polysilicon layer 28 is located between the doped polysilicon layer 24 and the metal back plate 46, the metal back plate 46 is located above the undoped polysilicon 281 of the patterned polysilicon layer 28 to The undoped polysilicon 281 is used to isolate the doped polysilicon layer 24 and the metal back plate 46. Therefore, when the doped polysilicon layer 24 is used as a diaphragm to vibrate, and voltage is applied to the doped polysilicon layer 24 and the metal back plate 46, it can avoid The doped polysilicon layer 24 and the metal back plate 46 are short-circuited. Finally, as shown in Figure 2(d), in order to transmit the sound pressure energy to the diaphragm, a cavity 48 is opened in the semiconductor substrate 20 through deep reactive-ion etching (DRIE) to expose the first The insulating layer 22 is oxidized to form a MEMS microphone.

The steps in Figure 2(b), Figure 2(c), and Figure 2(d) can be performed in sequence or simultaneously. That is, in one step, a part of the metal wiring layer 30 is removed by etching to form a metal back plate 46 above the undoped polysilicon 281, so as to isolate the metal back plate 46 from the doped polysilicon 281. The polysilicon layer 24 has a cavity 48 penetrating the semiconductor substrate 20 to expose the first insulating oxide layer 22 to form a microelectromechanical microphone.

Please refer to FIG. 3(a) to FIG. 3(d) below to introduce the second embodiment of the manufacturing method of the complementary metal oxide semi-microelectromechanical microphone of the present invention. First, as shown in Figure 3(a), a complementary metal oxide half device 18 is provided, and its structure is the same as that of the complementary metal oxide half device 18 in Figure 2(a), and will not be repeated here. Next, as shown in FIG. 3(b), a cavity 48 that penetrates through itself is opened in the semiconductor substrate 20 by a deep ion etching (DRIE) method to expose the first insulating oxide layer 22. Then, as shown in FIG. 3(c), part of the oxide insulating structure 32 is removed by dry etching to expose part of the patterned polysilicon layer 28. Finally, as shown in FIG. 3(d), the remaining oxide insulating structure 32, the first metal layer 34, and part of the second metal layer 36 are removed by wet etching to use the first metal via 38, the third The metal layer 42 and the remaining second metal layer 36 form a metal back plate 46 and form a cavity 47 between the metal back plate 46 and the patterned polysilicon layer 28 to form a microelectromechanical microphone. In the steps of Figure 3(c) and Figure 3(d), since the undoped polysilicon 281 of the patterned polysilicon layer 28 isolates the doped polysilicon layer 24 and the oxide insulating structure 32, it is possible to avoid etching doped Polysilicon layer 24. In addition, because the undoped polysilicon 281 of the patterned polysilicon layer 28 is located between the doped polysilicon layer 24 and the metal back plate 46, the metal back plate 46 is located above the undoped polysilicon 281 of the patterned polysilicon layer 28 to The undoped polysilicon 281 is used to isolate the doped polysilicon layer 24 and the metal back plate 46, so when the doped polysilicon layer 24 is used as a diaphragm to receive sound pressure and vibrate through the cavity 48, and the doped polysilicon layer 24 and the metal back plate When a voltage is applied to 46, the short circuit between the doped polysilicon layer 24 and the metal back plate 46 can be avoided.

The following describes the manufacturing process of the complementary metal-oxygen half device 18 of the present invention, but the present invention is not limited to this. First, as shown in FIG. 4(a), the first insulating oxide layer 22 is formed on the semiconductor substrate 20 by thermal oxidation. Then, with ion implantation, a doped polysilicon layer 24 is formed on the first insulating oxide layer 22. Then, a second insulating oxide layer 26 is formed on the doped polysilicon layer 24 by a thermal oxidation method. After the formation is completed, a patterned polysilicon layer 28 is formed on the second insulating oxide layer 26 in combination with a patterning and etching process and an ion implantation method. Finally, as shown in FIG. 4(b), a metal wiring layer 30 is formed on the patterned polysilicon layer 28 and the second insulating oxide layer 26 by combining the thermal oxidation method, the patterning and etching process, and the metal deposition method.

In summary, the present invention uses the undoped polysilicon of the patterned polysilicon layer to isolate the doped polysilicon layer from the metal backplane, so as to avoid the short circuit between the doped polysilicon layer and the metal backplane, and at the same time prevent the doped polysilicon layer from being Etching.

The above is only a preferred embodiment of the present invention, and is not used to limit the scope of implementation of the present invention. Therefore, all the shapes, structures, features and spirits described in the scope of the patent application of the present invention are equally changed and modified. , Should be included in the scope of patent application of the present invention.

10: Backplane 12: Diaphragm 14: Semiconductor substrate 16: Cavity 18: Complementary metal oxide half device 20: Semiconductor substrate 22: First insulating oxide layer 24: Doped polysilicon layer 26: Second insulating oxide layer 28: Patterned polysilicon layer 281: undoped polysilicon 282: doped polysilicon 30: metal wiring layer 32: oxide insulating structure 34: first metal layer 36: second metal layer 38: first metal via 40: second metal Via 42: third metal layer 44: silicon nitride layer 46: metal back plate 47: cavity 48: cavity

Figure 1 is a cross-sectional view of the structure of a prior art MEMS microphone. Fig. 2(a) to Fig. 2(d) are cross-sectional views of the structure of each step of the first embodiment of manufacturing a complementary metal oxide semi-microelectromechanical microphone according to the present invention. Figures 3(a) to 3(d) are cross-sectional views of the structure of each step of the second embodiment of manufacturing a complementary metal oxide semi-microelectromechanical microphone according to the present invention. Figures 4(a) to 4(b) are cross-sectional views of the structure of each step of an embodiment of the complementary metal-oxygen half-fabricating device of the present invention.

18: Complementary metal oxygen half device

20: Semiconductor substrate

22: first oxide insulating layer

24: Doped polysilicon layer

26: second oxide insulating layer

28: Patterned polysilicon layer

281: undoped polysilicon

282: doped polysilicon

30: Metal wiring layer

32: Oxidation insulation structure

34: The first metal layer

36: second metal layer

38: The first metal via

40: second metal via

42: third metal layer

44: silicon nitride layer

Claims (11)

A method for manufacturing a complementary metal oxide semi-microelectromechanical microphone includes: providing a complementary metal oxide semi-device, which includes a semiconductor substrate, a first insulating oxide layer, and a doped semiconductor substrate arranged sequentially from bottom to top A polysilicon layer, a second insulating oxide layer, a patterned polysilicon layer, and a metal wiring layer, the metal wiring layer is disposed on the second insulating oxide layer, the patterned polysilicon layer includes undoped polysilicon; and the removed part The metal wiring layer forms a metal back plate located above the undoped polysilicon to isolate the metal back plate and the doped polysilicon layer by the undoped polysilicon, and penetrates the semiconductor substrate through itself A cavity (chamber) to expose the doped polysilicon layer to form a MEMS microphone. The method for manufacturing a complementary metal oxide semi-microelectromechanical microphone according to claim 1, wherein the part of the metal wiring layer is removed to form the metal back plate, and the cavity is opened in the semiconductor substrate to expose In the step of the first insulating oxide layer, the part of the metal wiring layer is first removed to form the metal back plate, and then the cavity is opened in the semiconductor substrate to expose the first insulating oxide layer. The method for manufacturing a complementary metal oxide semi-microelectromechanical microphone according to claim 1, wherein the part of the metal wiring layer is removed to form the metal back plate, and the cavity is opened in the semiconductor substrate to expose In the step of the first insulating oxide layer, the cavity is firstly opened in the semiconductor substrate to expose the first insulating oxide layer, and then the part of the metal wiring layer is removed to form the metal backplane. The method for manufacturing a complementary metal oxide semi-microelectromechanical microphone according to claim 1, wherein the metal wiring layer further comprises an oxide insulating structure, a first metal layer, a second metal layer, a first metal via, A second metal through hole and a third metal layer, the oxide insulating structure is disposed on the second oxide insulating layer and the patterned polysilicon layer, the first metal layer, the second metal layer, and the first metal The hole, the second metal through hole, and the third metal layer are embedded in the oxide insulating structure, the first metal layer, the second metal layer, and the third metal layer are separated from each other and arranged from bottom to top in sequence, The first metal layer is separated from the patterned polysilicon layer, and the first metal through hole is located between the second metal layer and the third metal layer to electrically connect the second metal layer and the third metal layer, The second metal through hole connects at least one of the second insulating oxide layer and the undoped polysilicon to the third metal layer. The manufacturing method of the complementary metal oxide semi-microelectromechanical microphone according to claim 4, wherein the material of the oxide insulating structure is silicon dioxide. The method for manufacturing a complementary metal oxide semi-microelectromechanical microphone according to claim 5, wherein the metal wiring layer further comprises a silicon nitride (SiN) layer, which is disposed on the oxide insulating structure and the third metal layer . The method for manufacturing a complementary metal oxide semi-microelectromechanical microphone according to claim 4, wherein in the step of removing the part of the metal wiring layer to form the metal back plate, first removing part of the oxide insulating structure , To expose part of the patterned polysilicon layer, and then remove the rest of the oxide insulating structure, the first metal layer and part of the second metal layer to use the first metal via, the third metal layer and The remaining second metal layer forms the metal backplane. The method for manufacturing a complementary metal oxide semi-microelectromechanical microphone according to claim 7, wherein the method for removing the oxide insulating structure of the part is dry etching, and the remaining oxide insulating structure, the first metal layer and The method for removing the second metal layer of the part is a wet etching method. The manufacturing method of the complementary metal-oxygen semi-microelectromechanical microphone according to claim 1, wherein the opening method of the cavity is a deep ion etching (DRIE) method. The method for manufacturing a complementary metal oxide semi-microelectromechanical microphone according to claim 1, wherein the patterned polysilicon layer further includes doped polysilicon. The manufacturing method of the complementary metal oxide semi-microelectromechanical microphone according to claim 1, wherein the semiconductor substrate is a silicon substrate, and the first insulating oxide layer and the second insulating oxide layer are silicon dioxide layers.

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