TW202018794A - Substrate processing system and substrate processing method - Google Patents
Substrate processing system and substrate processing method Download PDFInfo
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- TW202018794A TW202018794A TW108133316A TW108133316A TW202018794A TW 202018794 A TW202018794 A TW 202018794A TW 108133316 A TW108133316 A TW 108133316A TW 108133316 A TW108133316 A TW 108133316A TW 202018794 A TW202018794 A TW 202018794A
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/50—Working by transmitting the laser beam through or within the workpiece
- B23K26/53—Working by transmitting the laser beam through or within the workpiece for modifying or reforming the material inside the workpiece, e.g. for producing break initiation cracks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
Abstract
Description
本揭示係有關於基板處理系統及基板處理方法。The present disclosure relates to a substrate processing system and a substrate processing method.
專利文獻1揭示有一種複數之元件形成於表面側之晶圓的處理方法。在此處理方法,對晶圓之表面側與背面側之間照射雷射光而形成變質層後,分離成比該變質層靠背面側之背面側晶圓與比該變質層靠表面側之表面側晶圓。進一步,回收利用背面側晶圓。
[先前技術文獻]
[專利文獻]
[專利文獻1]日本專利公開公報2010-21398號[Patent Document 1] Japanese Patent Publication No. 2010-21398
[發明欲解決之問題][Problems to be solved by invention]
本揭示之技術在將基板分離而使其薄化,進一步再利用分離之基板時,以良好效率進行此分離與再生。 [解決問題之手段]The technique of the present disclosure separates and thins the substrate and further reuses the separated substrate to perform the separation and regeneration with good efficiency. [Means to solve the problem]
本揭示之一態樣係用以處理基板之基板處理系統,包含分離部、加工部、搬送機構及翻轉機構,該分離部以形成於基板之內部的面方向之內部面改質層為起點,將該基板分離成第1分離基板與第2分離基板;該加工部分別研磨該第1分離基板之分離面與該第2分離基板之分離面;該搬送機構至少對該分離部或該加工部搬送該基板;該翻轉機構使該第2分離基板之表面背面翻轉。 [發明之效果]One aspect of the present disclosure is a substrate processing system for processing a substrate, which includes a separating part, a processing part, a conveying mechanism, and a reversing mechanism. Separating the substrate into a first separation substrate and a second separation substrate; the processing section respectively grinds the separation surface of the first separation substrate and the separation surface of the second separation substrate; the transport mechanism at least treats the separation section or the processing section The substrate is transported; the inversion mechanism inverts the front and back surfaces of the second separated substrate. [Effect of invention]
根據本揭示,在將基板分離而使其薄化,進一步再利用分離之基板時,可以良好效率進行此分離與再生。According to the present disclosure, when the substrate is separated and thinned, and the separated substrate is further reused, this separation and regeneration can be performed with good efficiency.
[用以實施發明之形態][Form for carrying out the invention]
在半導體元件之製造製程中,對表面形成有複數之元件的半導體晶圓(以下稱為晶圓)進行使該晶圓薄化之製程。晶圓之薄化方法有各種,例如有研磨加工晶圓之背面的方法、如專利文獻1所揭示分離晶圓之方法等。特別是在揭示於專利文獻1之方法,可將構成分離之表面側晶圓的元件製品化,且可回收利用背面側晶圓。In the manufacturing process of a semiconductor element, a process of thinning the wafer is performed on a semiconductor wafer (hereinafter referred to as a wafer) having a plurality of elements formed on the surface. There are various methods for thinning the wafer, for example, there are methods for grinding and processing the back surface of the wafer, and methods for separating the wafer as disclosed in
在此,於分離之背面側晶圓的表面殘存變質層(改質層),而無法直接以此狀態回收利用(再利用)。然而,關於如何處理此背面側晶圓的改質層,專利文獻1並無任何揭示也無建議。連以良好效率再利用背面側晶圓之方法更是完全未考慮。因而,在將晶圓分離使其薄化,進一步再利用分離之晶圓時,習知之晶圓處理有改善之餘地。Here, a modified layer (modified layer) remains on the surface of the separated back-side wafer, and cannot be directly recycled (recycled) in this state. However, regarding how to handle the modified layer of the backside wafer,
本揭示之技術係以良好效率進行晶圓之分離與分離之晶圓的再利用。以下,就作為本實施形態之基板處理系統的晶圓處理系統、及作為基板處理方法之晶圓處理方法,一面參照圖式,一面說明。此外,在本說明書及圖式中,藉在具有實質上相同之功能結構的要件附上同一符號而省略重複說明。The disclosed technique is to separate the wafers and reuse the separated wafers with good efficiency. Hereinafter, the wafer processing system as the substrate processing system of the present embodiment and the wafer processing method as the substrate processing method will be described with reference to the drawings. In addition, in this specification and the drawings, the same symbols are attached to the elements having substantially the same functional structure, and repeated description is omitted.
首先,就本實施形態之晶圓處理系統的結構作說明。圖1係示意顯示晶圓處理系統1的結構之概略的平面圖。First, the structure of the wafer processing system of this embodiment will be described. FIG. 1 is a schematic plan view schematically showing the structure of the
在晶圓處理系統1,如圖2及圖3所示,對作為基板之被處理晶圓W與支撐晶圓S接合的疊合晶圓T進行預定處理,將被處理晶圓W分離而使其薄化。以下,在被處理晶圓W,將接合於支撐晶圓S之面稱為表面Wa,將表面Wa之反面側的面稱為背面Wb。同樣地,在支撐晶圓S,將接合於被處理晶圓W之面稱為表面Sa,將表面Sa之反面側的面稱為背面Sb。In the
被處理晶圓W係例如矽晶圓等半導體晶圓,於表面Wa形成有包含複數之元件的元件層D。又,於元件層D更形成有氧化膜Fw、例如SiO2 膜(TEOS膜)。此外,被處理晶圓W之周緣部進行了去角加工,周緣部之截面往其前端,厚度變小。The wafer W to be processed is a semiconductor wafer such as a silicon wafer, and an element layer D including a plurality of elements is formed on the surface Wa. In addition, an oxide film Fw, for example, a SiO 2 film (TEOS film) is further formed on the element layer D. In addition, the peripheral portion of the wafer W to be processed is chamfered, and the thickness of the peripheral portion decreases toward the front end.
支撐晶圓S係支撐被處理晶圓W之晶圓,例如矽晶圓。於支撐晶圓S之表面Sa形成氧化膜Fs、例如SiO2 膜(TEOS膜)。又,支撐晶圓S具有保護被處理晶圓W之表面Wa的元件之保護材的功能。此外,當於支撐晶圓S之表面Sa形成有複數之元件時,與被處理晶圓W同樣地,於表面Sa形成元件層(圖中未示)。The supporting wafer S is a wafer supporting the processed wafer W, for example, a silicon wafer. An oxide film Fs, for example, a SiO 2 film (TEOS film) is formed on the surface Sa of the support wafer S. In addition, the support wafer S has a function of protecting the elements of the surface Wa of the wafer W to be processed. In addition, when a plurality of elements are formed on the surface Sa of the support wafer S, an element layer (not shown) is formed on the surface Sa in the same manner as the wafer W to be processed.
此外,在圖2中,為避免圖示之繁複,而省略元件層D與氧化膜Fw、Fs之圖示。又,在以下之說明使用的其他圖式中,亦同樣地有省略該等元件層D與氧化膜Fw、Fs之圖示的情形。In addition, in FIG. 2, in order to avoid the complexity of the illustration, the illustration of the element layer D and the oxide films Fw and Fs is omitted. In addition, in the other drawings used in the following description, the illustration of the element layer D and the oxide films Fw and Fs may be omitted.
又,在本實施形態之晶圓處理系統1,分離疊合晶圓T之被處理晶圓W。在以下之說明中,將分離之表面Wa側的被處理晶圓W稱為作為第1分離基板之第1分離晶圓W1,將分離之背面Wb側的被處理晶圓W稱為作為第2分離基板之第2分離晶圓W2。第1分離晶圓W1具有元件層D而可製品化。第2分離晶圓W2可再利用。此外,第1分離晶圓W1係指在支撐於支撐晶圓S之狀態的被處理晶圓W,有連同支撐晶圓S在內稱為第1分離晶圓W1之情形。又,將在第1分離晶圓W1中分離之面稱為分離面W1a,將在第2分離晶圓W2中分離之面稱為分離面W2a。Furthermore, in the
如圖1所示,晶圓處理系統1具有搬入搬出站2與處理站3連接成一體之結構。搬入搬出站2與處理站3從X軸正方向側往負方向側排列配置。搬入搬出站2在與例如外部之間分別將分別可收容複數之疊合晶圓T、複數之第1分離晶圓W1、複數之第2分離晶圓W2的晶匣Ct、Cw1、Cw2搬入搬出。處理站3具有對疊合晶圓T、分離晶圓W1、W2施行預定處理之各種處理裝置。As shown in FIG. 1, the
於搬入搬出站2設有晶匣載置台10。在圖示之例中,在晶匣載置台10,複數個、例如三個晶匣Ct、Cw1、Cw2於Y軸方向自由載置成一列。此外,載置於晶匣載置台10之晶匣Ct、Cw1、Cw2的個數不限本實施形態,可任意決定。A cassette mounting table 10 is provided at the loading-in/out
於搬入搬出站2,在晶匣載置台10之X軸負方向側,晶圓搬送區域20與該晶匣載置台10相鄰而設。於晶圓搬送區域20設有在於Y軸方向延伸之搬送路徑21上移動自如的晶圓搬送裝置22。晶圓搬送裝置22具有將疊合晶圓T、分離晶圓W1、W2保持搬送之二個搬送臂23、23。各搬送臂23構造成於水平方向(X軸方向及Y軸方向)、鉛直方向、繞水平軸及繞鉛直軸移動自如。此外,搬送臂23之結構不限本實施形態,可採用任何結構。At the carrying-in/
於處理站3設有例如三個處理區塊G1~G3及晶圓搬送區域30。第1處理區塊G1、第2處理區塊G2、及第3處理區塊G3從X軸負方向側(搬入搬出站2側)往正方向側依序排列配置。第1處理區塊G1配置於晶圓搬送區域30之X軸正方向側,第2處理區塊G2與第3處理區塊G3分別配置於晶圓搬送區域30之Y軸正方向側。The
於晶圓搬送區域30設有在於X軸方向延伸之搬送路徑31上移動自如的具有搬送機構之功能的晶圓搬送裝置32。晶圓搬送裝置32構造成可對處理區塊G1~G3之各處理裝置搬送疊合晶圓T、分離晶圓W1、W2。又,晶圓搬送裝置32具有將疊合晶圓T、分離晶圓W1、W2保持搬送之二個搬送臂33、33。一例係第1搬送臂33從下方保持疊合晶圓T、分離晶圓W1、W2,第2搬送臂33從上方保持疊合晶圓T、分離晶圓W1、W2。各搬送臂33支撐於多關節臂構件34,並構造成於水平方向、鉛直方向、繞水平軸及繞鉛直軸移動自如。此外,搬送臂33之結構不限本實施形態,可採用任何結構。The
於第1處理區塊G1設有二個濕蝕刻裝置40、41、校準裝置50、及二個清洗裝置51、52。濕蝕刻裝置40、41在Y軸正方向側從上方依序積層配置。校準裝置50、二個清洗裝置51、52在Y軸負方向側從上方依序積層配置。The first processing block G1 is provided with two
在第2處理區塊G2,翻轉裝置60與改質分離裝置61從上方依序積層設置。此外,翻轉裝置60構成本揭示之翻轉機構。又,改質分離裝置61兼作本揭示之分離部與內部面改質部而構成。In the second processing block G2, the reversing
於第3處理區塊G3設有作為加工部之加工裝置70。此外,加工裝置70之數量及配置不限本實施形態,亦可任意配置複數之加工裝置70。又,設複數之加工裝置70時,亦可於晶圓搬送區域30設複數之晶圓搬送裝置32。A
濕蝕刻裝置40、41分別將經加工裝置70研磨之分離晶圓W1、W2各自的分離面W1a、W2a進行蝕刻處理。舉例而言,對分離晶圓W1、W2各自之分離面W1a、W2a供給藥液(蝕刻液)。此外,藥液可使用例如HF、HNO3
、H3
PO4
、TMAH、Choline、KOH等。The
校準裝置50調節處理前之疊合晶圓T的水平方向之方位。舉例而言,藉一面使保持於吸盤(圖中未示)之疊合晶圓T旋轉,一面以檢測部(圖中未示)檢測被處理晶圓W之缺口部的位置,調節該缺口部之位置,而調節疊合晶圓T之水平方向的方位。The calibration device 50 adjusts the horizontal orientation of the stacked wafer T before processing. For example, by rotating the stacked wafer T held on the chuck (not shown), the position of the notch of the wafer W to be processed is detected by a detection part (not shown), and the notch is adjusted Position of the stacked wafer T in the horizontal direction.
清洗裝置51、52分別清洗經加工裝置70研磨之分離晶圓W1、W2各自的分離面W1a、W2a。舉例而言,使刷子抵接分離面W1a、W2a,擦刷清洗該分離面W1a、W2a。此外,分離面W1a、W2a亦可使用加壓之清洗液。The cleaning devices 51 and 52 respectively clean the separation surfaces W1 a and W2 a of the separated wafers W1 and W2 polished by the
翻轉裝置60使經改質分離裝置61分離之第2分離晶圓W2的表面背面翻轉。此外,翻轉裝置60之結構任意。The reversing
改質分離裝置61對被處理晶圓W之內部照射雷射光,而形成後述之內部面改質層,進一步以該內部面改質層為起點,將被處理晶圓W分離成第1分離晶圓W1與第2分離晶圓W2。The reforming
如圖4所示,改質分離裝置61具有以被處理晶圓W在上側且支撐晶圓S配置於下側之狀態,保持疊合晶圓T之吸盤80。吸盤80藉移動部81構造成可於X軸方向及Y軸方向移動。移動部81以一般之精密XY滑台構成。又,吸盤80藉旋轉部82構造成可繞鉛直軸旋轉。As shown in FIG. 4, the reforming
於吸盤80之上方設有對被處理晶圓W之內部照射雷射光的作為內部面改質部之雷射頭90。雷射頭90將從雷射光振盪器(圖中未示)振盪之高頻脈衝狀雷射光且對被處理晶圓W具透過性之波長的雷射光聚集照射至被處理晶圓W之內部的預定位置。藉此,在被處理晶圓W之內部,雷射光聚集之部分改質,而形成內部面改質層。又,雷射頭90將來自雷射光振盪器之雷射光以例如透鏡等分成複數同時照射。此時,從雷射頭90照射複數之雷射光,而於被處理晶圓W之內部同時形成複數之內部面改質層。雷射頭90藉移動部91構造成可於X軸方向及Y軸方向移動。移動部91以一般之精密XY滑台構成。又,雷射頭90藉升降部92構造成可於Z軸方向移動。Above the
又,於吸盤80之上方設有吸附保持被處理晶圓W之背面Wb的吸附墊100。吸附墊100藉旋轉部101構造成可繞鉛直軸旋轉。又,吸附墊100藉升降部102構造成可於Z軸方向移動。Further, above the
如圖1所示,加工裝置70分別研磨第1分離晶圓W1之分離面W1a與第2分離晶圓W2之分離面W2a。加工裝置70具有旋轉台110、第1研磨單元120、及第2研磨單元130。As shown in FIG. 1, the
旋轉台110藉旋轉機構(圖中未示)構造成以鉛直之旋軸中心線111為中心旋轉自如。於旋轉台110上設有四個吸附保持分離晶圓W1、W2之作為保持部的吸盤112。吸盤112於與旋轉台110相同之圓周上均等地、即每隔90度配置。四個吸盤112藉旋轉台110旋轉,可移動至交接位置A1、A2及加工位置B1、B2。此外,吸盤112保持於吸盤基座(圖中未示),並藉旋轉機構(圖中未示)構造成可旋轉。The rotating table 110 is configured to rotate freely about the
在本實施形態中,第1交接位置A1係在旋轉台110之X軸負方向側且在Y軸負方向側的位置,可進行第1分離晶圓W1之交接。第2交接位置A2係在旋轉台110之X軸正方向側且在Y軸負方向側的位置,可進行第2分離晶圓W2之交接。第1加工位置B1係在旋轉台110之X軸正方向側且在Y軸正方向側之位置,可配置第1研磨單元120。第2加工位置B2係在旋轉台110之X軸負方向側且在Y軸負方向側之位置,可配置第2研磨單元130。In this embodiment, the first delivery position A1 is on the X-axis negative direction side and the Y-axis negative direction side of the
在第1研磨單元120,研磨第1分離晶圓W1之分離面W1a。第1研磨單元120具有具環狀且旋轉自如之磨石(圖中未示)的第1研磨部121。又,第1研磨部121構造成可沿著支柱122於鉛直方向移動。再者,藉在使保持於吸盤112之第1分離晶圓W1的分離面W1a抵接磨石之狀態下,使吸盤112與磨石分別旋轉,進一步使磨石下降,而研磨第1分離晶圓W1之分離面W1a。藉此,去除殘留於該第1分離晶圓W1之分離面W1a的內部面改質層。In the
在第2研磨單元130,研磨第2分離晶圓W2之分離面W2a。第2研磨單元130具有具環狀且旋轉自如之磨石(圖中未示)的第2研磨部131。又,第2研磨部131構造成可沿著支柱132於鉛直方向移動。再者,藉在使保持於吸盤112之第2分離晶圓W2的分離面W2a抵接磨石之狀態下,使吸盤112與磨石分別旋轉,進一步使磨石下降,而研磨第2分離晶圓W2之分離面W2a。藉此,去除殘留於該第2分離晶圓W2之分離面W2a的內部面改質層。In the
於以上之晶圓處理系統1設有控制裝置140。控制裝置140為例如電腦,具有程式儲存部(圖中未示)。於程式儲存部儲存有控制晶圓處理系統1之疊合晶圓T的處理之程式。又,於程式儲存部亦儲存有用以控制上述各種處理裝置及搬送裝置等之驅動系統的動作而使晶圓處理系統1之後述基板處理實現的程式。此外,上述程式可記錄於可為電腦讀取之記憶媒體H,亦可從該記憶媒體H安裝於控制裝置140。The above
接著,就使用如以上構成之晶圓處理系統1來進行的晶圓處理作說明。圖5係顯示晶圓處理之主要製程的流程圖。此外,在本實施形態,在晶圓處理系統1之外部的接合裝置(圖中未示),藉凡得瓦力及氫鍵(分子間力)接合被處理晶圓W與支撐晶圓S,而預先形成了疊合晶圓T。Next, the wafer processing performed using the
首先,將收納有複數之圖6(a)所示的疊合晶圓T之晶匣Ct載置於搬入搬出站2之晶匣台10。First, the cassette Ct in which the plural stacked wafers T shown in FIG. 6( a) are stored is placed on the
接著,以晶圓搬送裝置22取出晶匣Ct內之疊合晶圓T,將之搬送至校準裝置50。在校準裝置50,調節疊合晶圓T(被處理晶圓W)之水平方向的方位(圖5之步驟P1)。Next, the stacked wafer T in the wafer cassette Ct is taken out by the
然後,以晶圓搬送裝置32將疊合晶圓T搬送至改質分離裝置61。在改質分離裝置61,如圖6(b)所示,於被處理晶圓W之內部形成內部面改質層M1(圖5之步驟P2)。Then, the stacked wafer T is transferred to the reforming and separating
如圖7所示,從雷射頭90對被處理晶圓W之內部照射雷射光L,而形成內部面改質層M1。內部面改質層M1於面方向延伸而具有橫長的縱橫比。內部面改質層M1之下端位於研磨後之被處理晶圓W的目標表面(圖7中之虛線)之略為上方。即,內部面改質層M1之下端與被處理晶圓W的表面Wa之間的距離H1稍大於研磨後之被處理晶圓W的目標厚度H2。此外,內部面改質層M1亦可具有縱長之縱橫比,而縮小複數之內部面改質層M1的間距來配置。又,裂縫C1從內部面改質層M1往面方向發展。再者,當內部面改質層M1之間距小時,亦可無裂縫C1。As shown in FIG. 7, the inside of the wafer W to be processed is irradiated with laser light L from the
又,如圖7及圖8所示,使雷射頭90與疊合晶圓T相對地於水平方向移動,而於被處理晶圓W之內部形成複數之內部面改質層M1。具體而言,首先,使雷射頭90於X軸方向移動,而形成一列內部面改質層M1。之後,使雷射頭90往Y軸方向挪動,再使該雷射頭90於X軸方向移動,而形成另一列內部面改質層M1。該等複數之內部面改質層M1形成於相同之高度。如此一來,於被處理晶圓W之內部面整面形成內部面改質層M1。As shown in FIGS. 7 and 8, the
此外,在改質分離裝置61,亦可從雷射頭90同時照射複數之雷射光L。此時,可以更短之時間形成內部面改質層M1,而可使晶圓處理之生產量提高。又,在改質分離裝置61,亦可一面使吸盤80旋轉,一面使雷射頭90於水平方向移動。此時,內部面改質層M1俯視時形成螺旋狀。又,亦可於被處理晶圓W之同心圓方向及徑方向改變複數之內部面改質層M1的間距。In addition, in the modification and
接著,在相同之改質分離裝置61,如圖6(c)所示,以內部面改質層M1為基點,將被處理晶圓W分離成第1分離晶圓W1與第2分離晶圓W2(圖5之步驟P3)。Next, in the same reforming
如圖9(a)所示,以吸附墊100吸附保持被處理晶圓W之背面Wb。接著,使吸附墊100旋轉,以內部面改質層M1為交界,將第1分離晶圓W1與第2分離晶圓W2分開。之後,如圖9(b)所示,在吸附墊100吸附保持第2分離晶圓W2之狀態下,使該吸附墊100上升而將第2分離晶圓W2從第1分離晶圓W1分離。此外,於第1分離晶圓W1之分離面W1a與第2分離晶圓W2之分離面W2a分別殘存內部面改質層M1。As shown in FIG. 9( a ), the back surface Wb of the wafer W to be processed is sucked and held by the
此外,分離被處理晶圓W之方法不限本實施形態。如圖9(b)所示,僅使吸附墊100上升便可分離第2分離晶圓W2時,亦可省略圖9(b)所示之吸附墊100的旋轉。又,例如亦可使用帶(圖中未示)取代吸附墊100,以該帶將被處理晶圓W保持後分離。再者,以吸附墊100吸附保持被處理晶圓W前,亦可對例如被處理晶圓W之至少內部面改質層M1施予超音波,或者亦可加熱內部面改質層M1。此時,以內部面改質層M1為基點,易將被處理晶圓W分離。In addition, the method of separating the wafer W to be processed is not limited to this embodiment. As shown in FIG. 9(b), when the second separation wafer W2 can be separated only by raising the
然後,以晶圓搬送裝置32將第2分離晶圓W2搬送至翻轉裝置60。在翻轉裝置60,將第2分離晶圓W2之表面背面翻轉(圖5之步驟P4)。之後,以晶圓搬送裝置32將第2分離晶圓W2搬送至加工裝置70,如圖10(a)所示,交接至第2交接位置A2之吸盤112。Then, the second separation wafer W2 is transferred to the reversing
與此步驟P4同時地以晶圓搬送裝置32將第1分離晶圓W1搬送至加工裝置70,如圖10(a)所示,交接至第1交接位置A1之吸盤112。Simultaneously with this step P4, the
接著,如圖10(b)所示,使旋轉台110逆時鐘旋轉180∘,而使第1分離晶圓W1移動至第1加工位置B1,使第2分離晶圓W2移動至第2加工位置B2。Next, as shown in FIG. 10(b), the
之後,在第1加工位置B1,如圖6(d)所示,研磨第1分離晶圓W1之分離面W1a,去除殘留於該分離面W1a之內部面改質層M1。同時,在第2加工位置B2,如圖6(e)所示,研磨第2分離晶圓W2之分離面W2a,去除殘留於該分離面W2a之內部面改質層M1(圖5之步驟P5)。Thereafter, at the first processing position B1, as shown in FIG. 6(d), the separation surface W1a of the first separation wafer W1 is polished to remove the internal surface modification layer M1 remaining on the separation surface W1a. At the same time, at the second processing position B2, as shown in FIG. 6(e), the separation surface W2a of the second separation wafer W2 is polished to remove the internal surface modification layer M1 remaining on the separation surface W2a (step P5 in FIG. 5) ).
接著,使旋轉台110逆時鐘旋轉180∘,而呈圖10(a)所示之狀態,即,使第1分離晶圓W1移動至第1交接位置A1,使第2分離晶圓W2移動至第2交接位置A2。此外,亦可在第1交接位置A1,使用清洗液噴嘴(圖中未示),以清洗液清洗第1分離晶圓W1之分離面W1a。又,亦可也在第2交接位置A2使用清洗液噴嘴(圖中未示),以清洗液清洗第2分離晶圓W2之分離面W2a。Next, the
之後,以晶圓搬送裝置32將第1分離晶圓W1搬送至清洗裝置51,以晶圓搬送裝置32將第2分離晶圓W2搬送至清洗裝置52。在清洗裝置51,擦刷清洗第1分離晶圓W1之分離面W1a,在清洗裝置52,擦刷清洗第2分離晶圓W2之分離面W2a(圖5之步驟P6)。Thereafter, the first split wafer W1 is transferred to the cleaning device 51 by the
然後,以晶圓搬送裝置22將第1分離晶圓W1搬送至濕蝕刻裝置40,以晶圓搬送裝置22將第2分離晶圓W2搬送至濕蝕刻裝置41。在濕蝕刻裝置40,以藥液將第1分離晶圓W1之分離面W1a濕蝕刻,在濕蝕刻裝置41以藥液將第2分離晶圓W2之分離面W2a濕蝕刻(圖5之步驟P7)。有於經上述加工裝置70研磨之分離面W1a、W2a分別形成研磨痕之情形。在本步驟P7,藉濕蝕刻,可去除研磨痕,而可使分離面W1a、W2a平滑化。Then, the first separated wafer W1 is transferred to the
之後,以晶圓搬送裝置22將已施行了所有處理之第1分離晶圓W1與第2分離晶圓W2分別搬送至晶匣載置台10之晶匣Cw1、Cw2。如此進行,晶圓處理系統1之一連串晶圓處理結束。After that, the first separation wafer W1 and the second separation wafer W2 that have undergone all the processes are transferred to the cassettes Cw1 and Cw2 of the cassette mounting table 10 by the
根據以上之實施形態,可進行步驟P1~P7,分離被處理晶圓W,將分離晶圓W1、W2之分離面W1a、W2a分別研磨、濕蝕刻等而適當地處理。因此,可將具有元件層D之第1分離晶圓W1製品化,並且可將第2分離晶圓W2再利用。而且由於以一個晶圓處理系統1進行該等步驟P1~P7,故可以良好效率進行晶圓處理。According to the above embodiment, steps P1 to P7 can be performed to separate the wafer W to be processed, and the separation surfaces W1a, W2a of the separated wafers W1, W2 can be appropriately processed by grinding, wet etching, etc., respectively. Therefore, the first separated wafer W1 having the element layer D can be manufactured, and the second separated wafer W2 can be reused. Moreover, since these steps P1 to P7 are performed by one
又,由於本實施形態之加工裝置70具有旋轉台110、第1研磨單元120、及第2研磨單元130,故在步驟P5可同時進行第1分離晶圓W1之分離面W1a的研磨與第2分離晶圓W2之分離面W2a的研磨。因而,可使晶圓處理之生產量提高。In addition, since the
此外,於本實施形態之加工裝置70對應旋轉台110之四個吸盤112,設有交接位置A1、A2及加工位置B1、B2。如此一來,如圖11所示,可同時進行第1加工位置B1之分離面W1a的研磨與第1交接位置A1之第1分離晶圓W1的交接。同樣地,亦可同時進行第2加工位置B2之分離面W2a的研磨與第2交接位置A2之第2分離晶圓W2的交接。因而,可使晶圓處理之生產量提高。In addition, the
又,由於在本實施形態之加工裝置70設有交接位置A1、A2及加工位置B1、B2,故相較於例如使用二個設一個交接位置與一個加工位置之旋轉台的情形,旋轉台之使用數少。結果,可減低加工裝置70之佔有面積(佔地面積),進而亦可減低晶圓處理系統1之佔有面積。Furthermore, since the
又,在本實施形態中,在使被處理晶圓W薄化時,在步驟P2於被處理晶圓W之內部形成內部面改質層M1後,在步驟P3以內部面改質層M1為基點分離了被處理晶圓W。舉例而言如習知般研磨被處理晶圓W之背面Wb使其薄化時,由於磨石磨損且使用研磨液,故亦需要廢液處理。相對於此,在本實施形態中,由於雷射頭90自身隨著時間惡化之程度小,消耗品少,故可減低維修頻率。又,由於為使用雷射之乾式製程,故不需研磨液及廢水處理。因此,可使運轉成本低廉化。再者,由於研磨液不繞進支撐晶圓S側,故可抑制支撐晶圓S受到污染。Furthermore, in this embodiment, when the wafer W to be processed is thinned, after the internal surface modification layer M1 is formed in the wafer W to be processed in step P2, the internal surface modification layer M1 is used in step P3 as The base point separates the wafer W to be processed. For example, when grinding the back surface Wb of the wafer W to be thinned as is conventional, the grinding stone wears and the polishing liquid is used, so waste liquid treatment is also required. On the other hand, in this embodiment, since the
又,在本實施形態中,在步驟P5進行了分離面W1a之研磨,此研磨只要去除內部面改質層M1即可,其研磨量少至數十μm左右。相對於此,如習知般為使被處理晶圓W薄化而研磨背面Wb時,其研磨量多至例如700μm以上,磨石之磨損程度大。因此,在本實施形態中,果然可減低維修頻率。In addition, in the present embodiment, the separation surface W1a is polished in step P5. This polishing only needs to remove the inner surface modification layer M1, and the amount of polishing is as small as several tens of μm. On the other hand, when the back surface Wb is polished to thin the wafer W to be processed as is conventional, the amount of polishing is, for example, 700 μm or more, and the degree of wear of the grindstone is large. Therefore, in this embodiment, the frequency of maintenance can be reduced.
此外,在本實施形態之晶圓處理系統1設有複數之加工裝置70時,亦可以一個加工裝置70研磨第1分離晶圓W1之分離面W1a,以另一加工裝置70研磨第2分離晶圓W2之分離面W2a。In addition, when the
接著,就晶圓處理系統之另一實施形態作說明。Next, another embodiment of the wafer processing system will be described.
圖12係示意顯示另一實施形態之晶圓處理系統200的結構之概略的平面圖。晶圓處理系統200以不同之裝置進行上述實施形態之晶圓處理系統1的改質分離裝置61之內部面改質層M1的形成與被處理晶圓W之分離。即,晶圓處理系統200具有分離翻轉裝置201與改質裝置202取代晶圓處理系統1之翻轉裝置60與改質分離裝置61。分離翻轉裝置201與改質裝置202在第2處理區塊G2從上方依序積層設置。FIG. 12 is a schematic plan view schematically showing the structure of a
改質裝置202於被處理晶圓W之內部形成內部面改質層M1。改質裝置202具有例如用以在改質分離裝置61之結構中形成內部面改質層M1之構件(雷射頭90等)。分離翻轉裝置201以內部面改質層M1為基點分離被處理晶圓W,並且使分離之第2分離晶圓W2的表面背面翻轉。分離翻轉裝置201除了具有例如用以在改質分離裝置61之結構中分離被處理晶圓W之構件(吸附墊100等)外,還具有翻轉裝置60之結構。The
本實施形態之晶圓處理系統200亦可進行上述實施形態之步驟P1~P7,而可享有與該實施形態相同之效果。The
圖13係示意顯示另一實施形態之晶圓處理系統300的結構之概略的平面圖。晶圓處理系統300在加工裝置70之內部進行上述實施形態之晶圓處理系統1的改質分離裝置61之被處理晶圓W的分離與翻轉裝置60之第2分離晶圓W2的表面背面之翻轉。即,晶圓處理系統300具有改質裝置301與分離翻轉單元302取代晶圓處理系統1之翻轉裝置60與改質分離裝置61。13 is a schematic plan view schematically showing the structure of a
改質裝置301設於第2處理區塊G2。改質裝置301於被處理晶圓W之內部形成內部面改質層M1。改質裝置301具有例如用以在改質分離裝置61之結構中形成內部面改質層M1的構件(雷射頭90等)。The
分離翻轉單元302在加工裝置70之第2交接位置A2,設於旋轉台110及吸盤112之上方。分離翻轉單元302具有以內部面改質層M1為基點分離被處理晶圓W之分離機構303、使分離之第2分離晶圓W2的表面背面翻轉之翻轉機構304。The separation and
如圖14所示,分離機構303具有對保持於吸盤112之疊合晶圓T吸附保持被處理晶圓W之背面Wb的吸附墊310。吸附墊310藉旋轉部311構造成可繞鉛直軸旋轉。又,吸附墊310藉升降部312構造成可於Z軸方向移動。再者,在分離機構303,首先,在以吸附墊310吸附保持被處理晶圓W之背面Wb的狀態下,使該吸附墊310旋轉,以內部面改質層M1為交界,將第1分離晶圓W1與第2分離晶圓W2分開。之後,在吸附墊310吸附保持第2分離晶圓W2之狀態下,使該吸附墊100上升,而將第2分離晶圓W2從第1分離晶圓W1分離。As shown in FIG. 14, the
翻轉機構304具有保持第2分離晶圓W2之保持部320。保持部320之第2分離晶圓W2的保持方法並未特別限定,例如為吸附保持。保持部320藉旋轉部321構造成可繞水平軸旋轉。又,保持部320藉升降部322構造成可於Z軸方向移動。又,在翻轉機構304,在以保持部320保持第2分離晶圓W2之狀態下,使該保持部320繞水平軸旋轉,而使第2分離晶圓W2之表面背面翻轉。The reversing
此時,在步驟P2,在改質裝置301中,於被處理晶圓W之內部形成內部面改質層M1。之後,被處理晶圓W以支撐於支撐晶圓S之狀態,即,以疊合晶圓T之狀態,以晶圓搬送裝置32搬送至加工裝置70。在加工裝置70,將疊合晶圓T交接至第2交接位置A2之吸盤112。At this time, in step P2, in the reforming
然後,在步驟P3,在疊合晶圓T保持於吸盤112之狀態下,以分離機構303將被處理晶圓W分離成分離晶圓W1、W2。之後,在步驟P4,將分離之第2分離晶圓W2交接至翻轉機構304之保持部320,使該保持部320繞水平軸旋轉,而將第2分離晶圓W2之表面背面翻轉。接著,將第1分離晶圓W1搬送至第1交接位置A1之吸盤112,將第2分離晶圓W2仍然保持於第2交接位置A2之吸盤112。此外,第1分離晶圓W1之搬送亦可以晶圓搬送裝置32進行。或者,亦可在以翻轉機構304翻轉第2分離晶圓W2之表面背面的期間,使旋轉台110旋轉,而將第1分離晶圓W1從第2交接位置A2搬送至第1交接位置A1。Then, in step P3, the wafer W to be processed is separated into the separated wafers W1 and W2 by the
此外,其他之步驟P1、P5~P7與上述實施形態相同。本實施形態之晶圓處理系統300亦可享有與上述實施形態相同之效果。In addition, the other steps P1, P5 to P7 are the same as the above-mentioned embodiment. The
以上之實施形態的晶圓處理系統1、200、300亦可具有CMP裝置(CMP:Chemical Mechanical Polishing、化學機械研磨)取代濕蝕刻裝置40、41。此CMP裝置具有與濕蝕刻裝置40、41相同之功能。即,在CMP裝置,將經加工裝置70研磨之分離面W1a、W2a進行研磨處理。接著,以加工裝置70去除形成於分離面W1a、W2a之研磨痕,而使該分離面W1a、W2a平滑化。此外,晶圓處理系統1、200、300亦可具有濕蝕刻裝置40、41與CMP裝置兩者,而對分離面W1a、W2a進行濕蝕刻與CMP兩者。The
以上之實施形態的晶圓處理系統1、200、300分別在翻轉裝置60、分離翻轉裝置201、分離翻轉單元302,翻轉了第2分離晶圓W2之表面背面,例如亦可在晶圓搬送裝置32之搬送臂33翻轉第2分離晶圓W2之表面背面。此時,如圖15所示,支撐於臂構件34之搬送臂33繞水平軸旋轉,而使第2分離晶圓W2之表面背面翻轉。In the
又,晶圓搬送裝置32具有二個搬送臂33,如圖16所示,亦可由一個搬送臂400保持搬送二片分離晶圓W1、W2。於搬送臂400之一面設有吸附保持第1分離晶圓W1之吸附墊401,於另一面設有吸附保持第2分離晶圓W2之吸附墊402。搬送臂400支撐於臂構件34,並構造成繞水平軸旋轉自如。In addition, the
以上之實施形態的晶圓處理系統1、200、300,係分別在改質分離裝置61、改質裝置202、301,於被處理晶圓W之內部形成了內部面改質層M1,但是亦可在晶圓處理系統1、200、300之外部進行。於此情況下,係在搬送至晶圓處理系統1、200、300之被處理晶圓W的內部預先形成有內部面改質層M1。In the
在此,通常被處理晶圓W之周緣部進行了去角加工,如習知般將被處理晶圓W之背面Wb研磨而使其薄化時,被處理晶圓W之周緣部形成尖銳之形狀(所謂之刀鋒形狀)。如此一來,有在被處理晶圓W之周緣部產生碎屑,被處理晶圓W受到損傷之虞。是故,進行於研磨處理前預先去除被處理晶圓W之周緣部的所謂整緣。Here, usually, the peripheral portion of the processed wafer W is subjected to beveling, and when the back surface Wb of the processed wafer W is polished and thinned, the peripheral portion of the processed wafer W is sharp. Shape (so-called blade shape). As a result, debris is generated in the peripheral portion of the wafer W to be processed, and the wafer W to be processed may be damaged. Therefore, the so-called whole edge of the peripheral portion of the wafer W to be processed is removed before the polishing process.
是故,在以上之實施形態的晶圓處理系統1、200、300,亦可進行整緣。在以下之說明中,就在晶圓處理系統1進行整緣之情形作說明。Therefore, the
在晶圓處理系統1,整緣在改質分離裝置61進行。即,在改質分離裝置61,沿著被處理晶圓W之周緣部與中央部的交界,於厚度方向形成周緣改質層,以該周緣改質層為基點,去除被處理晶圓W之周緣部。在本實施形態之改質分離裝置61,雷射頭90具有周緣改質部之功能,而於被處理晶圓W之內部形成周緣改質層。In the
接著,就使用晶圓處理系統1進行之另一實施形態的晶圓處理作說明。圖17係顯示晶圓之主要製程的流程圖。此外,在本實施形態中,關於與圖5所示之實施形態相同之處理,省略詳細之說明。Next, the wafer processing of another embodiment performed using the
首先,如圖18(a)所示,將收納有複數之疊合晶圓T的晶匣Ct載置於搬入搬出站2之晶匣載置台10。First, as shown in FIG. 18( a ), the cassette Ct storing a plurality of stacked wafers T is placed on the cassette mounting table 10 of the carry-in/out
接著,以晶圓搬送裝置22取出晶匣Ct內之疊合晶圓T,將之搬送至校準裝置50。在校準裝置50,調節疊合晶圓T(被處理晶圓W)之水平方向的方位(圖17之步驟Q1)。Next, the stacked wafer T in the wafer cassette Ct is taken out by the
然後,以晶圓搬送裝置32將疊合晶圓T搬送至改質分離裝置61。在改質分離裝置61,如圖18(b)所示,於被處理晶圓W之內部形成周緣改質層M2(圖17之步驟Q2)。Then, the stacked wafer T is transferred to the reforming and separating
在改質分離裝置61,如圖19所示,使雷射頭90移動至被處理晶圓W之上方且在該晶圓W之周緣部We與中央部Wc的交界。之後,一面以旋轉部82使吸盤80旋轉,一面從雷射頭90對被處理晶圓W之內部照射雷射光L。然後,沿著周緣部We與中央部Wc之交界,形成環狀周緣改質層M2。In the reforming and separating
周緣改質層M2作為在整緣去除周緣部We之際的基點,沿著被處理晶圓W之去除對象的周緣部We與中央部Wc之交界,形成環狀。此外,周緣部We為例如從被處理晶圓W之外端部往徑方向1mm~5mm之範圍,包含去角部。The peripheral modified layer M2 serves as a base point when removing the peripheral edge portion We over the entire edge, and forms a ring shape along the boundary between the peripheral edge portion We and the central portion Wc of the wafer W to be processed. In addition, the peripheral edge portion We is, for example, in the range of 1 mm to 5 mm in the radial direction from the outer end of the wafer W to be processed, and includes a chamfered portion.
又,周緣改質層M2往厚度方向延伸而具有縱長之縱橫比。周緣改質層M2之下端位於研磨後之被處理晶圓W的目標表面(圖19中之虛線)之上方。即,周緣改質層M2之下端與被處理晶圓W的表面Wa之間的距離H3大於研磨後之被處理晶圓W的目標厚度H2。此時,研磨後之被處理晶圓W不殘留周緣改質層M2。In addition, the peripheral modified layer M2 extends in the thickness direction and has a longitudinal aspect ratio. The lower end of the peripheral modified layer M2 is located above the target surface (dashed line in FIG. 19) of the processed wafer W after polishing. That is, the distance H3 between the lower end of the peripheral modified layer M2 and the surface Wa of the wafer W to be processed is greater than the target thickness H2 of the wafer W to be processed after polishing. At this time, the wafer W to be processed after polishing does not leave the peripheral modified layer M2.
再者,在被處理晶圓W之內部,裂縫C2從周緣改質層M2發展,到達表面Wa。惟,裂縫C2未到達背面Wb。Furthermore, inside the wafer W to be processed, the crack C2 develops from the peripheral modified layer M2 and reaches the surface Wa. However, the crack C2 did not reach the back Wb.
接著,在相同之改質分離裝置61,如圖18(c)所示,於被處理晶圓W之內部形成內部面改質層M3(圖17之步驟Q3)。與圖6所示之內部面改質層M1同樣地,內部面改質層M3於被處理晶圓W之面方向延伸。又,內部面改質層M3形成於與周緣改質層M2相同之高度,該內部面改質層M3之下端位於研磨後之被處理晶圓W的目標表面之上方。再者,於面方向形成複數之內部面改質層M3,該複數之內部面改質層M3於面方向從中心部形成至周緣改質層M2,即,形成於中央部Wc。此外,內部面改質層M3之形成方法與上述步驟P2相同。又,裂縫C3從內部面改質層M3往面方向發展。再者,當內部面改質層M3之間距小時,亦可無裂縫C3。Next, in the same reforming
然後,在相同之改質分離裝置61,如圖18(d)所示,以內部面改質層M3及周緣改質層M2為基點,將被處理晶圓W分離成第1分離晶圓W1與第2分離晶圓W2(圖17之步驟Q4)。此時,由於內部面改質層M3與周緣改質層M2形成於相同之高度,故第2分離晶圓W2與周緣部We一體地分離。此外,被處理晶圓W之分離方法與上述步驟P3相同。Then, in the same reforming and separating
接著,以晶圓搬送裝置32將第2分離晶圓W2搬送至翻轉裝置60。在翻轉裝置60,翻轉第2分離晶圓W2之表面背面(圖17之步驟Q5)。此外,第2分離晶圓W2之翻轉方法與上述步驟P4相同。Next, the second separation wafer W2 is transferred to the reversing
之後,將第1分離晶圓W1與第2分離晶圓W2分別以晶圓搬送裝置32搬送至加工裝置70。在加工裝置70,如圖18(e)所示,研磨第1分離晶圓W1之分離面W1a,而去除殘留於該分離面W1a之周緣改質層M2與內部面改質層M3。同時,如圖18(f)所示,研磨第2分離晶圓W2之分離面W2a,而去除殘留於該分離面W2a之周緣改質層M2與內部面改質層M3(圖17之步驟Q6)。此外,分離面W1a、W2a之研磨方法與上述步驟P5相同。After that, the first separated wafer W1 and the second separated wafer W2 are respectively transferred to the
接著,將第1分離晶圓W1與第2分離晶圓W2分別以晶圓搬送裝置32搬送至清洗裝置51、52。在清洗裝置51、52,分別擦刷清洗分離面W1a、W2a(圖17之步驟Q7)。此外,分離面W1a、W2a之清洗方法與上述步驟P6相同。Next, the first separation wafer W1 and the second separation wafer W2 are transferred to the cleaning devices 51 and 52 by the
然後,將第1分離晶圓W1與第2分離晶圓W2分別以晶圓搬送裝置22搬送至濕蝕刻裝置40、41。在濕蝕刻裝置40、41,分別濕蝕刻分離面W1a、W2a(圖17之步驟Q8)。此外,分離面W1a、W2a之濕蝕刻方法與上述步驟P7相同。Then, the first separation wafer W1 and the second separation wafer W2 are transferred to the
之後,將已施行所有處理之第1分離晶圓W1與第2分離晶圓W2分別以晶圓搬送裝置22搬送至晶匣載置台10之晶匣Cw1、Cw2。如此進行,晶圓處理系統1之一連串晶圓處理結束。After that, the first separated wafer W1 and the second separated wafer W2 that have been subjected to all the processes are transferred to the cassettes Cw1 and Cw2 of the cassette mounting table 10 by the
本實施形態亦可享有與上述實施形態相同之效果。而且,根據本實施形態,在進行整緣時,在步驟Q2,於被處理晶圓W之內部形成周緣改質層M2後,以該周緣改質層M2為基點,去除了周緣部We。舉例而言,在習知之方法,研磨或切削周緣部We,磨石磨損而需要定期之更換。相對於此,在本實施形態中,雷射頭90自身隨著時間惡化之程度小,而可減低維修頻率。This embodiment can also enjoy the same effects as the above-mentioned embodiment. Furthermore, according to the present embodiment, when performing edge rectification, in step Q2, after the peripheral modified layer M2 is formed inside the wafer W to be processed, the peripheral modified portion M2 is used as a base point, and the peripheral portion We is removed. For example, in the conventional method, grinding or cutting the peripheral portion We, the grindstone is worn and needs to be replaced regularly. On the other hand, in this embodiment, the
惟,本揭示並非將以研磨所行之整緣排除在外。However, this disclosure does not exclude the entire edge of grinding.
而且步驟Q1之周緣改質層M2的形成與步驟Q3之內部面改質層M3的形成可在同一改質分離裝置61進行。因而,設備成本亦可低廉化。此外,當然亦可在不同之裝置進行該等周緣改質層M2之形成與內部面改質層M3之形成。舉例而言,對複數之疊合晶圓T連續進行上述晶圓處理時,藉在不同之裝置形成該等周緣改質層M2與內部面改質層M1,可使晶圓處理之生產量提高。In addition, the formation of the peripheral modified layer M2 in step Q1 and the formation of the internal surface modified layer M3 in step Q3 can be performed in the same reforming
又,在以上之改質分離裝置61,雷射頭90形成了周緣改質層M2與內部面改質層M3,該等周緣改質層M2與內部面改質層M3亦可分別使用不同之雷射頭形成。In addition, in the above modification and
在晶圓處理系統1進行整緣之方法不限上述實施形態。接著,就其他實施形態之晶圓處理作說明。本實施形態與圖18所示之實施形態大略相同,在步驟Q3形成之內部面改質層不同。The method of performing edging in the
在步驟Q3,如圖20(c)所示,於被處理晶圓W之內部形成內部面改質層M4。圖18所示之內部面改質層M3形成至周緣改質層M2,相對於此,本實施形態之內部面改質層M4於面方向從中心部延伸形成至外端部。此外,裂縫C4從內部面改質層M4往面方向發展。又,當內部面改質層M4之間距小時,亦可無裂縫C4。In step Q3, as shown in FIG. 20(c), an internal surface modification layer M4 is formed inside the wafer W to be processed. The inner surface modification layer M3 shown in FIG. 18 is formed to the peripheral modification layer M2. In contrast, the inner surface modification layer M4 of the present embodiment extends from the center to the outer end in the plane direction. In addition, the crack C4 progresses from the inner surface modification layer M4 to the surface direction. In addition, when the distance between the inner surface modification layers M4 is small, there is no crack C4.
此時,在步驟Q4,如圖20(d)所示,內部面改質層M4之上方的第2分離晶圓W2與內部面改質層M4之下方的周緣部We各自分離。即,第2分離晶圓W2以內部面改質層M4為基點分離,周緣部We以周緣改質層M2為基點分離。此外,其他之步驟Q1~Q2、Q5~Q8與圖18所示之實施形態相同。At this time, in step Q4, as shown in FIG. 20(d), the second separated wafer W2 above the inner surface modification layer M4 is separated from the peripheral edge portion We below the inner surface modification layer M4. That is, the second separated wafer W2 is separated using the inner surface modified layer M4 as a base point, and the peripheral portion We is separated using the peripheral modified layer M2 as a base point. In addition, the other steps Q1~Q2, Q5~Q8 are the same as the embodiment shown in FIG.
在本實施形態中,亦可享有與上述實施形態相同之效果。In this embodiment, the same effect as the above-mentioned embodiment can also be enjoyed.
在以上之實施形態中,在晶圓處理系統1進行整緣時,於分離被處理晶圓W之際,去除了周緣部We,亦可於去除周緣部We後,分離被處理晶圓W。In the above embodiment, when the
此時,在改質分離裝置61,首先在步驟Q2,如圖21(b)所示,於被處理晶圓W之內部形成周緣改質層M5與分割改質層M6。At this time, in the reforming
如圖22所示,使雷射頭90移動至被處理晶圓W之上方且在該被處理晶圓W之周緣部We與中央部Wc之交界。之後,一面以旋轉部82使吸盤80旋轉,一面從雷射頭90對被處理晶圓W之內部照射雷射光L,而於被處理晶圓W之內部形成周緣改質層M5。As shown in FIG. 22, the
與上述實施形態之周緣改質層M2同樣地,周緣改質層M5於厚度方向延伸,該周緣改質層M5之下端位於研磨後之被處理晶圓W的目標表面(圖22中之虛線)之上方。Similar to the peripheral modified layer M2 of the above embodiment, the peripheral modified layer M5 extends in the thickness direction, and the lower end of the peripheral modified layer M5 is located on the target surface of the polished wafer W to be processed (dotted line in FIG. 22) Above.
再者,在被處理晶圓W之內部,裂縫C5從周緣改質層M5發展,到達表面Wa與背面Wb。此外,亦可於厚度方向形成有複數個周緣改質層M5。Furthermore, inside the wafer W to be processed, the crack C5 develops from the peripheral modified layer M5 and reaches the front surface Wa and the rear surface Wb. In addition, a plurality of peripheral modified layers M5 may be formed in the thickness direction.
接著,在相同之改質分離裝置61,使雷射頭90移動,而在被處理晶圓W之內部且在周緣改質層M5之徑方向外側形成分割改質層M6。分割改質層M6亦與周緣改質層M5同樣地於厚度方向延伸,而具有縱長之縱橫比。又,裂縫C6從分割改質層M6發展,到達表面Wa與背面Wb。此外,分割改質層M6亦可於厚度方向形成有複數個。Next, in the same reforming and separating
再者,藉於徑方向以數μm之間距形成複數之分割改質層M6及裂縫C6,而如圖23所示,形成從周緣改質層M5延伸至徑方向外側之一排分割改質層M6。此外,在圖示之例中,於徑方向延伸之排的分割改質層M6形成於八處,此分割改質層M6之數量任意。分割改質層M6只要至少形成於二處,即可去除周緣部We。此時,在整緣去除周緣部We之際,該周緣部We一面以環狀周緣改質層M5為基點分離,一面以分割改質層M6分割成複數。如此一來,可將要去除之周緣部We小片化,而更易去除。Furthermore, a plurality of split modified layers M6 and cracks C6 are formed at a distance of several μm in the radial direction, and as shown in FIG. 23, a row of split modified layers extending from the peripheral modified layer M5 to the radial outer side is formed M6. In addition, in the example shown in the figure, the divided modified layers M6 in a row extending in the radial direction are formed at eight locations, and the number of the divided modified layers M6 is arbitrary. As long as the split modified layer M6 is formed in at least two places, the peripheral portion We can be removed. At this time, when the peripheral edge portion We is removed from the entire edge, the peripheral edge portion We is separated into the plural by the ring-shaped peripheral modified layer M5 as the base point, and divided by the divided modified layer M6. In this way, the peripheral portion of the peripheral portion to be removed can be made into smaller pieces, which is easier to remove.
接著,在相同之改質分離裝置61,如圖21(c)所示,以周緣改質層M5為基點,去除被處理晶圓W之周緣部We。於本實施形態之改質分離裝置61設圖24所示之帶150,藉擴張(擴展)該帶150,而去除周緣部We。Next, in the same reforming
首先,如圖24(a)所示,將可擴張之帶150貼附於被處理晶圓W之背面Wb。接著,如圖24(b)所示,使帶150往被處理晶圓W之徑方向擴張,以周緣改質層M5為基點,將周緣部We從被處理晶圓W分離。又此時,以分割改質層M6為基點,將周緣部We小片化而分離。之後,如圖24(c)所示,使帶150上升而從被處理晶圓W剝離,去除周緣部We。此外此時,為使此帶150易剝離,亦可進行使帶150之黏著力降低的處理、例如紫外線照射處理等。First, as shown in FIG. 24(a), the
此外,去除周緣部We之方法不限本實施形態。舉例而言,亦可對周緣部We噴氣或噴水,推打該周緣部We而去除。或者,亦可使諸如鑷子之夾具接觸周緣部We,以物理方式去除該周緣部We。In addition, the method of removing the peripheral edge portion We is not limited to this embodiment. For example, the peripheral edge portion We may be jetted or sprayed with water, and the peripheral edge portion We may be pushed and removed. Alternatively, a clamp such as tweezers may be brought into contact with the peripheral edge portion We, and the peripheral edge portion We may be physically removed.
接著,在相同之改質分離裝置61,在步驟Q3中如圖21(d)所示,形成內部面改質層M7,進一步在步驟Q4中,如圖21(e)所示,將被處理晶圓W分離成分離晶圓W1、W2。Next, in the same reforming
然後,在翻轉裝置60,在步驟Q5中將第2分離晶圓W2之表面背面翻轉。之後,以加工裝置70在步驟Q6中如圖21(f)及圖21(g)所示,研磨分離面W1a、W2a。隨後,在清洗裝置51、52,進行步驟Q7,在濕蝕刻裝置40、41進行步驟Q8。如此進行,晶圓處理系統1之一連串晶圓處理結束。Then, in the
在本實施形態,亦可享有與上述實施形態相同之效果。而且根據本實施形態,由於在步驟Q2形成了分割改質層M6,故可將要去除之周緣部We小片化。因而,可更易進行整緣。In this embodiment, the same effect as the above-mentioned embodiment can also be enjoyed. Furthermore, according to the present embodiment, since the division modification layer M6 is formed in step Q2, the peripheral edge portion We to be removed can be made small. Therefore, it is easier to perform the edging.
在以上之實施形態的晶圓處理系統1、200、300,被處理晶圓W與支撐晶圓S之接合以晶圓處理系統1、200、300之外部的接合裝置進行,此接合裝置亦可設於晶圓處理系統1、200、300之內部。In the
此外,接合被處理晶W與支撐晶圓S之際,在周緣部We氧化膜Fw、Fs亦接合時,於接合處理前,亦可對該氧化膜Fw、Fs進行前置處理。前置處理例如可去除周緣部We之氧化膜Fw的表層,或者,亦可使氧化膜Fw突出。抑或亦可將氧化膜Fw之表面破壞而粗化。藉進行此種前置處理,可抑制在周緣部We氧化膜Fw、Fs接合,而可適當地去除周緣部We。In addition, when bonding the wafer W to be processed and the supporting wafer S, when the oxide films Fw and Fs in the peripheral portion We are also bonded, the oxide films Fw and Fs may be pre-processed before the bonding process. The pretreatment may remove the surface layer of the oxide film Fw of the peripheral edge portion We, or may make the oxide film Fw protrude, for example. Or, the surface of the oxide film Fw may be destroyed and roughened. By performing such pre-treatment, it is possible to suppress the bonding of the oxide films Fw and Fs at the peripheral edge portion We, and the peripheral edge portion We can be appropriately removed.
在以上之實施形態中,就直接接合被處理晶圓W與支撐晶圓S之情形作了說明,該等被處理晶圓W與支撐晶圓S亦可藉由接著劑接合。In the above embodiment, the case where the processed wafer W and the support wafer S are directly bonded has been described. The processed wafer W and the support wafer S may also be bonded by an adhesive.
又,在以上之實施形態,就將疊合晶圓T之被處理晶圓W薄化之情形作了說明,於將一片晶圓薄化時,亦可適用上述實施形態。又,將疊合晶圓T剝離成被處理晶圓W與支撐晶圓S時,亦可適用上述實施形態。In addition, in the above embodiment, the case where the wafer W to be processed of the stacked wafer T is thinned has been described, and the above embodiment can also be applied when one wafer is thinned. Moreover, when peeling the laminated wafer T into the wafer W to be processed and the support wafer S, the above-described embodiment can also be applied.
此次揭示之實施形態所有點應視為例示而非限制。上述實施形態在不脫離附加之申請專利範圍及其主旨下,亦可以各種形態省略、置換、變更。All points of the embodiment disclosed this time should be regarded as an example rather than a limitation. The above embodiments can be omitted, replaced, or modified in various forms without departing from the scope of the attached patent application and its gist.
1:晶圓處理系統 2:搬入搬出站 3:處理站 10:晶匣載置台 20:晶圓搬送區域 21:搬送路徑 22:晶圓搬送裝置 23:搬送臂 30:晶圓搬送區域 31:搬送路徑 32:晶圓搬送裝置 33:搬送臂 34:臂構件 40:濕蝕刻裝置 41:濕蝕刻裝置 50:校準裝置 51:清洗裝置 52:清洗裝置 60:翻轉裝置 61:改質分離裝置 70:加工裝置 80:吸盤 81:移動部 82:旋轉部 90:雷射頭 91:移動部 92:升降部 100:吸附墊 101:旋轉部 102:升降部 110:旋轉台 111:旋轉中心線 112:吸盤 120:第1研磨單元 121:第1研磨部 122:支柱 130:第2研磨單元 131:第2研磨部 132:支柱 140:控制裝置 150:帶 200:晶圓處理系統 201:分離翻轉裝置 202:改質裝置 300:晶圓處理系統 301:改質裝置 302:分離翻轉單元 303:分離機構 304:翻轉機構 310:吸附墊 311:旋轉部 312:升降部 320:保持部 321:旋轉部 322:升降部 400:搬送臂 401:吸附墊 402:吸附墊 A1:第1交接位置 A2:第2交接位置 B1:第1加工位置 B2:第2加工位置 Ct:晶匣 Cw1:晶匣 Cw2:晶匣 C1:裂縫 C2:裂縫 C3:裂縫 C4:裂縫 C5:裂縫 C6:裂縫 D:元件層 Fs:氧化膜 Fw:氧化膜 G1:第1處理區塊 G2:第2處理區塊 G3:第3處理區塊 H:記憶媒體 H1:距離 H2:目標厚度 H3:距離 L:雷射光 M1:內部面改質層 M2:周緣改質層 M3:內部面改質層 M4:內部面改質層 M5:周緣改質層 M6:分割改質層 M7:內部面改質層 P1:步驟 P2:步驟 P3:步驟 P4:步驟 P5:步驟 P6:步驟 P7:步驟 Q1:步驟 Q2:步驟 Q3:步驟 Q4:步驟 Q5:步驟 Q6:步驟 Q7:步驟 Q8:步驟 S:支撐晶圓 Sa:表面 Sb:背面 T:疊合晶圓 W:被處理晶圓 Wa:表面 Wb:背面 Wc:中央部 We:周緣部 W1:第1分離晶圓 W1a:分離面 W2:第2分離晶圓 W2a:分離面 X:方向 Y:方向 Z:方向1: Wafer processing system 2: move in and out of the station 3: processing station 10: crystal box mounting table 20: Wafer transfer area 21: Transport path 22: Wafer transfer device 23: Transport arm 30: Wafer transfer area 31: Transport path 32: Wafer transfer device 33: Transport arm 34: arm member 40: Wet etching device 41: Wet etching device 50: Calibration device 51: Cleaning device 52: Cleaning device 60: Flip device 61: Modification and separation device 70: processing device 80: suction cup 81: Mobile Department 82: Rotating part 90: laser head 91: Mobile Department 92: Lifting Department 100: adsorption pad 101: Rotating Department 102: Lifting Department 110: Rotating table 111: rotation centerline 112: suction cup 120: 1st grinding unit 121: The first polishing section 122: Pillar 130: Second grinding unit 131: Second polishing section 132: Pillar 140: control device 150: belt 200: Wafer processing system 201: Separation and overturning device 202: Modification device 300: Wafer processing system 301: Modification device 302: Separate flip unit 303: Separation mechanism 304: Flip mechanism 310: adsorption pad 311: Rotating part 312: Lifting Department 320: Holding Department 321: Rotating part 322: Lifting Department 400: transport arm 401: Adsorption pad 402: Adsorption pad A1: 1st transfer position A2: 2nd transfer position B1: 1st processing position B2: 2nd processing position Ct: crystal box Cw1: crystal box Cw2: crystal box C1: Crack C2: Crack C3: Crack C4: Crack C5: Crack C6: Crack D: component layer Fs: oxide film Fw: oxide film G1: the first processing block G2: 2nd processing block G3: 3rd processing block H: memory media H1: distance H2: target thickness H3: distance L: Laser light M1: internal modification layer M2: Peripheral modification layer M3: internal surface modification layer M4: internal modification layer M5: Peripheral modification layer M6: Split modification layer M7: internal modification layer P1: Step P2: Step P3: Step P4: Step P5: Step P6: Step P7: Step Q1: Step Q2: Step Q3: Step Q4: Step Q5: Step Q6: Step Q7: Step Q8: Step S: Support wafer Sa: surface Sb: back T: stacked wafer W: Wafer being processed Wa: surface Wb: back Wc: Central Department We: Peripheral Department W1: 1st separated wafer W1a: separation surface W2: 2nd separated wafer W2a: separation surface X: direction Y: direction Z: direction
圖1係示意顯示本實施形態之晶圓處理系統的結構之概略的平面圖。 圖2係顯示疊合晶圓之結構的概略之側視圖。 圖3係顯示疊合晶圓之一部分的結構之概略的側視圖。 圖4係顯示改質分離裝置之結構的概略之側視圖。 圖5係顯示本實施形態之晶圓處理的主要製程之流程圖。 圖6(a)~(e)係本實施形態之晶圓處理的主要製程之說明圖。 圖7係顯示在改質分離裝置於被處理晶圓形成內部面改質層之樣態的縱截面圖。 圖8係顯示在改質分離裝置於被處理晶圓形成內部面改質層之樣態的平面圖。 圖9(a)~(b)係顯示在改質分離裝置分離被處理晶圓之樣態的說明圖。 圖10(a)~(b)係顯示在加工裝置研磨分離晶圓之分離面的樣態之說明圖。 圖11係顯示在加工裝置研磨分離晶圓之分離面的樣態之說明圖。 圖12係示意顯示另一實施形態之晶圓處理系統的結構之概略的平面圖。 圖13係示意顯示另一實施形態之晶圓處理系統的結構之概略的平面圖。 圖14係顯示分離翻轉單元之結構的概略之側視圖。 圖15係顯示晶圓搬送裝置之搬送臂的結構之概略的側視圖。 圖16係顯示晶圓搬送裝置之搬送臂的結構之概略的側視圖。 圖17係顯示另一實施形態之晶圓處理的主要製程之流程圖。 圖18(a)~(f)係另一實施形態之晶圓處理的主要製程之說明圖。 圖19係顯示在另一實施形態於被處理晶圓形成周緣改質層之樣態的說明圖。 圖20(a)~(f)係另一實施形態之晶圓處理的主要製程之說明圖。 圖21(a)~(g)係另一實施形態之晶圓處理的主要製程之說明圖。 圖22係顯示在另一實施形態於被處理晶圓形成周緣改質層與分割改質層之樣態的說明圖。 圖23係顯示在另一實施形態於被處理晶圓形成周緣改質層與分割改質層之樣態的說明圖。 圖24(a)~(c)係顯示在另一實施形態去除被處理晶圓之周緣部的樣態之說明圖。FIG. 1 is a schematic plan view schematically showing the structure of a wafer processing system of this embodiment. FIG. 2 is a schematic side view showing the structure of a stacked wafer. FIG. 3 is a schematic side view showing the structure of a part of the stacked wafer. 4 is a schematic side view showing the structure of the reforming and separating device. FIG. 5 is a flowchart showing the main processes of wafer processing in this embodiment. 6(a) to (e) are explanatory diagrams of the main processes of wafer processing in this embodiment. FIG. 7 is a longitudinal cross-sectional view showing how the modified separation device forms a modified layer on the inner surface of a wafer to be processed. FIG. 8 is a plan view showing how the modified separation device forms an inner surface modified layer on a wafer to be processed. 9(a) to (b) are explanatory diagrams showing a state where a processed wafer is separated by a modification separation device. 10(a) to (b) are explanatory diagrams showing a state where the processing device grinds and separates the separation surface of the wafer. FIG. 11 is an explanatory diagram showing a state in which the separation surface of the separation wafer is ground by the processing device. 12 is a schematic plan view schematically showing the structure of a wafer processing system according to another embodiment. 13 is a schematic plan view schematically showing the structure of a wafer processing system according to another embodiment. 14 is a schematic side view showing the structure of the separation and inversion unit. 15 is a schematic side view showing the structure of the transfer arm of the wafer transfer device. 16 is a schematic side view showing the structure of the transfer arm of the wafer transfer device. FIG. 17 is a flowchart showing the main processes of wafer processing in another embodiment. 18(a) to (f) are explanatory diagrams of main processes of wafer processing in another embodiment. FIG. 19 is an explanatory diagram showing the formation of a peripheral modified layer on a wafer to be processed in another embodiment. 20(a) to (f) are explanatory diagrams of main processes of wafer processing in another embodiment. 21(a) to (g) are explanatory views of main processes of wafer processing in another embodiment. FIG. 22 is an explanatory diagram showing the formation of a peripheral modified layer and a divided modified layer on a wafer to be processed in another embodiment. FIG. 23 is an explanatory diagram showing the formation of a peripheral modified layer and a divided modified layer on a wafer to be processed in another embodiment. 24(a) to (c) are explanatory diagrams showing a state in which the peripheral portion of the wafer to be processed is removed in another embodiment.
1:晶圓處理系統 1: Wafer processing system
2:搬入搬出站 2: move in and out of the station
3:處理站 3: processing station
10:晶匣載置台 10: crystal box mounting table
20:晶圓搬送區域 20: Wafer transfer area
21:搬送路徑 21: Transport path
22:晶圓搬送裝置 22: Wafer transfer device
23:搬送臂 23: Transport arm
30:晶圓搬送區域 30: Wafer transfer area
31:搬送路徑 31: Transport path
32:晶圓搬送裝置 32: Wafer transfer device
33:搬送臂 33: Transport arm
34:臂構件 34: arm member
40:濕蝕刻裝置 40: Wet etching device
41:濕蝕刻裝置 41: Wet etching device
50:校準裝置 50: Calibration device
51:清洗裝置 51: Cleaning device
52:清洗裝置 52: Cleaning device
60:翻轉裝置 60: Flip device
61:改質分離裝置 61: Modification and separation device
70:加工裝置 70: processing device
110:旋轉台 110: Rotating table
111:旋轉中心線 111: rotation centerline
112:吸盤 112: suction cup
120:第1研磨單元 120: 1st grinding unit
121:第1研磨部 121: The first polishing section
122:支柱 122: Pillar
130:第2研磨單元 130: Second grinding unit
131:第2研磨部 131: Second polishing section
132:支柱 132: Pillar
140:控制裝置 140: control device
A1:第1交接位置 A1: 1st transfer position
A2:第2交接位置 A2: 2nd transfer position
B1:第1加工位置 B1: 1st processing position
B2:第2加工位置 B2: 2nd processing position
Ct:晶匣 Ct: crystal box
Cw1:晶匣 Cw1: crystal box
Cw2:晶匣 Cw2: crystal box
G1:第1處理區塊 G1: the first processing block
G2:第2處理區塊 G2: 2nd processing block
G3:第3處理區塊 G3: 3rd processing block
H:記憶媒體 H: memory media
T:疊合晶圓 T: stacked wafer
W1:第1分離晶圓 W1: 1st separated wafer
W2:第2分離晶圓 W2: 2nd separated wafer
X:方向 X: direction
Y:方向 Y: direction
Z:方向 Z: direction
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2019
- 2019-09-03 WO PCT/JP2019/034565 patent/WO2020066492A1/en active Application Filing
- 2019-09-03 JP JP2020548272A patent/JP7086201B2/en active Active
- 2019-09-17 TW TW108133316A patent/TW202018794A/en unknown
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Publication number | Publication date |
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JPWO2020066492A1 (en) | 2021-08-30 |
WO2020066492A1 (en) | 2020-04-02 |
JP7086201B2 (en) | 2022-06-17 |
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