TW202006899A - Printed circuit board - Google Patents

Printed circuit board Download PDF

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TW202006899A
TW202006899A TW108104700A TW108104700A TW202006899A TW 202006899 A TW202006899 A TW 202006899A TW 108104700 A TW108104700 A TW 108104700A TW 108104700 A TW108104700 A TW 108104700A TW 202006899 A TW202006899 A TW 202006899A
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Taiwan
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circuit
insulating layer
pad
circuit board
printed circuit
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TW108104700A
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Chinese (zh)
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TWI832839B (en
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朴昌華
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南韓商三星電機股份有限公司
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/101Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by casting or moulding of conductive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Abstract

A printed circuit board in accordance with an aspect of the present disclosure includes: first insulating layer; second insulating layer made of a flexible material and laminated on the first insulating layer; first circuit formed on a lower surface of the first insulating layer and embedded in the first insulating layer; second circuit formed on a lower surface of the second insulating layer and laminated in the first insulating layer; and third circuit formed on an upper surface of the second insulating layer, wherein a pitch of the second circuit is smaller than a pitch of the first circuit.

Description

印刷電路板A printed circuit board

本發明是有關於一種印刷電路板。The invention relates to a printed circuit board.

當要求用於封裝的印刷電路板薄且小時,亦要求該些印刷電路板上形成有精密節距的佈線。可透過無芯法(coreless method)或藉由使用薄的材料來將印刷電路板的厚度控制到最小。此外,可透過經過修改的半加成製程(modified Semi-Additive Process,MSAP)或半加成製程(Semi-Additive Process,SAP)來將佈線的寬度及空間控制成具有精密的節距。When the printed circuit boards used for packaging are required to be thin and small, precise pitch wiring is also required to be formed on these printed circuit boards. The thickness of the printed circuit board can be minimized by coreless method or by using thin materials. In addition, the width and space of the wiring can be controlled to have a precise pitch through a modified semi-additive process (MSAP) or semi-additive process (SAP).

韓國專利第10-1593280號(2016年2月11日)中闡述了相關技術。Related technology is described in Korean Patent No. 10-1593280 (February 11, 2016).

本發明旨在提供一種包括精密節距電路的印刷電路板。The present invention aims to provide a printed circuit board including a precision pitch circuit.

本發明的態樣提供一種印刷電路板,所述印刷電路板包括:第一絕緣層;第二絕緣層,由撓性材料製成且層疊於所述第一絕緣層上;第一電路,形成於所述第一絕緣層的下表面上且嵌入於所述第一絕緣層中;第二電路,形成於所述第二絕緣層的下表面上且層疊於所述第一絕緣層中;以及第三電路,形成於所述第二絕緣層的上表面上,其中所述第二電路的節距小於所述第一電路的節距。An aspect of the present invention provides a printed circuit board including: a first insulating layer; a second insulating layer made of a flexible material and laminated on the first insulating layer; a first circuit formed On the lower surface of the first insulating layer and embedded in the first insulating layer; a second circuit formed on the lower surface of the second insulating layer and stacked in the first insulating layer; and A third circuit is formed on the upper surface of the second insulating layer, wherein the pitch of the second circuit is smaller than the pitch of the first circuit.

提供以下詳細說明以有助於讀者全面地理解本文中所述的方法、設備及/或系統。然而,熟習此項技術者將明瞭本文中所述的方法、設備及/或系統的各種改變、潤飾及等效形式。本文中所述的操作順序僅是實例,並不僅限於本文中所述的實例,而是如熟習此項技術者將明瞭可做出改變,但必須按照特定的次序發生的操作除外。此外,為更清楚且更簡潔起見,可省略對熟習此項技術者所熟知的功能及構造的說明。The following detailed instructions are provided to help the reader fully understand the methods, devices, and/or systems described herein. However, those skilled in the art will understand various changes, retouching, and equivalent forms of the methods, devices, and/or systems described herein. The order of operations described in this article is only an example, and is not limited to the examples described in this document, but as those skilled in the art will understand that changes can be made, except for operations that must occur in a specific order. In addition, for clarity and conciseness, descriptions of functions and structures well known to those skilled in the art may be omitted.

本文中所述的特徵可以不同的形式體現,且不應被理解為僅限於本文中所述的實例。而是,已提供本文中所述的實例,以使得本發明將是透徹且完整的,且將向熟習此項技術者傳達本發明的全部範疇。The features described herein can be embodied in different forms and should not be construed as limited to the examples described herein. Rather, the examples described herein have been provided so that the invention will be thorough and complete, and will convey the full scope of the invention to those skilled in the art.

除非另有界定,否則本文中所使用的包括技術用語及科學用語在內的所有用語皆具有與熟習本發明的相關技術者通常所理解的含義相同的含義。在普通字典中受到定義的任何用語應理解為具有在相關技術的背景中的相同含義,且除非另有明確定義,否則不應將所述用語解釋為具有理想化或太過形式化的含義。Unless otherwise defined, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by those skilled in the art who are familiar with the present invention. Any term defined in an ordinary dictionary should be understood to have the same meaning in the context of the related art, and unless clearly defined otherwise, the term should not be interpreted as having an idealized or overly formal meaning.

無論圖號如何,將賦予相同或對應的元件相同的參考編號,且將不再對相同或對應的元件進行任何贅述。在對本發明的說明通篇,當闡述某一相關傳統技術確定與本發明的觀點無關時,將省略有關的詳細說明。可使用諸如「第一」及「第二」等用語來闡述各種元件,但上述元件不應受限於上述用語。上述用語僅用於對一個元件與另一元件進行區分。在附圖中,一些元件可被放大、省略或簡要地說明,且元件的尺寸不一定反映該些元件的實際尺寸。Regardless of the drawing number, the same or corresponding elements will be given the same reference number, and the same or corresponding elements will not be described any more. Throughout the description of the present invention, when a certain related conventional technology is determined to be irrelevant to the viewpoint of the present invention, the relevant detailed description will be omitted. Terms such as "first" and "second" may be used to describe various elements, but the above elements should not be limited to the above terms. The above terms are only used to distinguish one element from another. In the drawings, some elements may be enlarged, omitted, or briefly explained, and the size of the element does not necessarily reflect the actual size of the element.

在後文中,將參考附圖詳細地闡述本發明的某些實施例。In the following, certain embodiments of the present invention will be explained in detail with reference to the drawings.

圖1示出根據本發明的實施例的印刷電路板。FIG. 1 shows a printed circuit board according to an embodiment of the present invention.

參考圖1,根據本發明的實施例的印刷電路板包括第一絕緣層110、第二絕緣層120、第一電路210、第二電路220及第三電路230。Referring to FIG. 1, a printed circuit board according to an embodiment of the present invention includes a first insulating layer 110, a second insulating layer 120, a first circuit 210, a second circuit 220 and a third circuit 230.

第一絕緣層110是具有絕緣性質且主要由絕緣材料製成的層。第一絕緣層110可由幾乎不具有撓性的剛性材料製成。舉例而言,環氧樹脂、酚醛樹脂或雙馬來醯亞胺三嗪(bismaleimide triazine,BT)樹脂可用作所述剛性材料。環氧樹脂可以是(但並不限於)例如:萘環氧樹脂、雙酚A型環氧樹脂、雙酚F型環氧樹脂、酚醛清漆環氧樹脂、甲酚酚醛清漆環氧樹脂、橡膠改性環氧樹脂、環型脂族環氧樹脂、矽環氧樹脂、氮環氧樹脂或磷環氧樹脂。The first insulating layer 110 is a layer having insulating properties and mainly made of an insulating material. The first insulating layer 110 may be made of a rigid material with little flexibility. For example, epoxy resin, phenol resin or bismaleimide triazine (BT) resin can be used as the rigid material. The epoxy resin may be (but not limited to) for example: naphthalene epoxy resin, bisphenol A epoxy resin, bisphenol F epoxy resin, novolac epoxy resin, cresol novolac epoxy resin, rubber modified Epoxy resin, cycloaliphatic epoxy resin, silicon epoxy resin, nitrogen epoxy resin or phosphorus epoxy resin.

第一絕緣層110可以是含有纖維加強材(諸如,玻璃纖維織物)的預浸體(Prepreg,PPG)。第一絕緣層110可以是填充有無機填充物(諸如,二氧化矽)的積層膜。味之素積層膜(Ajinomoto Build-up Film,ABF)可用作此積層膜。The first insulating layer 110 may be a prepreg (PPG) containing fiber reinforcement such as glass fiber fabric. The first insulating layer 110 may be a laminated film filled with an inorganic filler (such as silicon dioxide). Ajinomoto Build-up Film (ABF) can be used as this laminate film.

第二絕緣層120是具有絕緣性質且主要由絕緣材料製成的層。第二絕緣層120層疊於第一絕緣層110上,在此種情形中第一絕緣層110與第二絕緣層120彼此接合。The second insulating layer 120 is a layer having insulating properties and mainly made of an insulating material. The second insulating layer 120 is stacked on the first insulating layer 110, in which case the first insulating layer 110 and the second insulating layer 120 are bonded to each other.

第二絕緣層120可由具有高撓性的撓性材料製成。聚醯亞胺(polyimide,PI)、液晶聚合物(liquid crystal polymer,LCP)等可用作所述撓性材料。The second insulating layer 120 may be made of a flexible material with high flexibility. Polyimide (PI), liquid crystal polymer (LCP), etc. can be used as the flexible material.

第一電路210、第二電路220及第三電路230用於傳送電訊號,且可由諸如銅(Cu)、鈀(Pd)、鋁(Al)、鎳(Ni)、鈦(Ti)、金(Au)、鉑(Pt)等金屬製成,或者考慮到該些金屬的導電率而由該些金屬中的一些金屬的合金製成。The first circuit 210, the second circuit 220, and the third circuit 230 are used to transmit electrical signals, and may be made of copper (Cu), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold ( Au), platinum (Pt), or other metals, or alloys of some of these metals in consideration of their electrical conductivity.

第一電路210、第二電路220及第三電路230可各自由導電配線製成,所述導電配線可被設置為多個。The first circuit 210, the second circuit 220, and the third circuit 230 may each be made of conductive wiring, and the conductive wiring may be provided in plural.

第一電路210形成於第一絕緣層110的下表面上且嵌入於第一絕緣層110中。由於第一電路210嵌入於第一絕緣層110中,因此第一電路210的除了第一電路210的下表面(亦即,第一電路210的在圖1中放置於下側上的表面)之外的表面皆與第一絕緣層110接觸。與此同時,第一絕緣層110的下表面可位於第一絕緣層100的下表面的更內部。The first circuit 210 is formed on the lower surface of the first insulating layer 110 and embedded in the first insulating layer 110. Since the first circuit 210 is embedded in the first insulating layer 110, the first circuit 210 excluding the lower surface of the first circuit 210 (that is, the surface of the first circuit 210 placed on the lower side in FIG. 1) The outer surfaces are in contact with the first insulating layer 110. At the same time, the lower surface of the first insulating layer 110 may be located further inside the lower surface of the first insulating layer 100.

第二電路220形成於第二絕緣層120的下表面上且嵌入於第一絕緣層110中。第二電路220的上表面(亦即,第二電路220的在圖1中放置於上側上的表面)與第二絕緣層120的下表面接觸,且第二電路220的除了第二電路220的上表面之外的表面皆與第一絕緣層110接觸。The second circuit 220 is formed on the lower surface of the second insulating layer 120 and embedded in the first insulating layer 110. The upper surface of the second circuit 220 (that is, the surface of the second circuit 220 placed on the upper side in FIG. 1) is in contact with the lower surface of the second insulating layer 120, and the second circuit 220 except the second circuit 220 The surfaces other than the upper surface are in contact with the first insulating layer 110.

第三電路230形成於第二絕緣層120的上表面上。第三電路230與第二絕緣層120的上表面接觸且自第二絕緣層120的上表面突出至第二絕緣層120之外。The third circuit 230 is formed on the upper surface of the second insulating layer 120. The third circuit 230 is in contact with the upper surface of the second insulating layer 120 and protrudes from the upper surface of the second insulating layer 120 beyond the second insulating layer 120.

第二電路220的節距小於第一電路210的節距。此外,第二電路220的寬度可小於第一電路210的寬度,且第二電路220的空間可小於第一電路210的空間。The pitch of the second circuit 220 is smaller than the pitch of the first circuit 210. In addition, the width of the second circuit 220 may be smaller than the width of the first circuit 210, and the space of the second circuit 220 may be smaller than the space of the first circuit 210.

在此,電路的「節距」可指代組成所述電路的導線的中心之間的距離。此外,電路的「寬度」可指代組成所述電路的導線的寬度,且電路的「空間」可指代組成所述電路的導線之間的分離距離(例如,各導線的相對內側之間的距離)。Here, the "pitch" of a circuit may refer to the distance between the centers of the wires constituting the circuit. In addition, the "width" of a circuit may refer to the width of the wires that make up the circuit, and the "space" of the circuit may refer to the separation distance between the wires that make up the circuit (eg, between the opposite inner sides of each wire distance).

此外,第三電路230的節距可小於第一電路210的節距。第三電路230的寬度可小於第一電路210的寬度,且第三電路230的空間可小於第一電路210的空間。In addition, the pitch of the third circuit 230 may be smaller than the pitch of the first circuit 210. The width of the third circuit 230 may be smaller than the width of the first circuit 210, and the space of the third circuit 230 may be smaller than the space of the first circuit 210.

舉例而言,第二電路220的節距及第三電路230的節距可各自為約20微米,且第一電路210的節距可大於此節距。For example, the pitch of the second circuit 220 and the pitch of the third circuit 230 may each be about 20 microns, and the pitch of the first circuit 210 may be greater than this pitch.

換言之,第二電路220及第三電路230可形成為較第一電路210密集。此外,第二電路220及第三電路230可形成為較第一電路210精密。In other words, the second circuit 220 and the third circuit 230 may be formed denser than the first circuit 210. In addition, the second circuit 220 and the third circuit 230 may be formed to be more precise than the first circuit 210.

參考圖1,根據本發明的實施例的印刷電路板可更包括第一通路310及第二通路320。Referring to FIG. 1, a printed circuit board according to an embodiment of the present invention may further include a first via 310 and a second via 320.

第一通路310是穿透第一絕緣層110以電性連接第一電路210與第二電路220的導電結構。第二通路320是穿透第二絕緣層120以電性連接第二電路220與第三電路230的導電結構。The first via 310 is a conductive structure penetrating the first insulating layer 110 to electrically connect the first circuit 210 and the second circuit 220. The second via 320 is a conductive structure penetrating the second insulating layer 120 to electrically connect the second circuit 220 and the third circuit 230.

第一通路310的熔點可低於第一電路210的熔點。第一通路310可由導電膏製成。在此,導電膏可以是含有金屬的膏,或是由導電聚合物製成但不含任何金屬的的膏。膏中所含有的金屬可以是銀(Ag)、錫(Sn)、鎳(Ni)及銅(Cu)中的一者或多者。在實例中,第一電路210可主要由銅製成,且第一通路310可主要由錫製成。導電膏的此實例被填充於通孔中且然後透過迴焊製程或加熱/冷卻製程而被金屬化以成為第一通路310。The melting point of the first via 310 may be lower than the melting point of the first circuit 210. The first via 310 may be made of conductive paste. Here, the conductive paste may be a paste containing metal, or a paste made of a conductive polymer but not containing any metal. The metal contained in the paste may be one or more of silver (Ag), tin (Sn), nickel (Ni), and copper (Cu). In an example, the first circuit 210 may be mainly made of copper, and the first via 310 may be mainly made of tin. This example of conductive paste is filled in the through hole and then metallized to become the first via 310 through a reflow process or a heating/cooling process.

第一通路310的橫截面積可自第一絕緣層110的下表面至第一絕緣層110的上表面增大,在此種情形中第一通路310的縱截面可呈倒置梯形形狀。The cross-sectional area of the first via 310 may increase from the lower surface of the first insulating layer 110 to the upper surface of the first insulating layer 110. In this case, the longitudinal section of the first via 310 may have an inverted trapezoidal shape.

第一電路210可包括第一接墊410,第一接墊410可形成於第一絕緣層110的下表面上以嵌入於第一絕緣層110中,這與第一電路210類似。第一接墊410可形成於組成第一電路210的導線的端部部分處。第一接墊410的厚度可與第一電路210的厚度實質上相同,且第一接墊410的寬度可大於第一電路210的寬度,且第一接墊410的橫截面可近乎是圓形的。The first circuit 210 may include a first pad 410, which may be formed on the lower surface of the first insulating layer 110 to be embedded in the first insulating layer 110, which is similar to the first circuit 210. The first pad 410 may be formed at an end portion of the wire constituting the first circuit 210. The thickness of the first pad 410 may be substantially the same as the thickness of the first circuit 210, and the width of the first pad 410 may be greater than the width of the first circuit 210, and the cross section of the first pad 410 may be nearly circular of.

第一通路310可與第一接墊410接觸。具體而言,第一通路310的下表面可與第一接墊410的上表面接觸。The first via 310 may be in contact with the first pad 410. Specifically, the lower surface of the first via 310 may be in contact with the upper surface of the first pad 410.

第二通路320的熔點可高於第一通路310的熔點。舉例而言,第二通路320可主要由銅製成,而第一通路310可主要由錫製成。此外,第二通路320可以是透過鍍覆形成的鍍覆通路。The melting point of the second via 320 may be higher than the melting point of the first via 310. For example, the second via 320 may be mainly made of copper, and the first via 310 may be mainly made of tin. In addition, the second via 320 may be a plated via formed by plating.

第二通路320可自第二絕緣層120的上表面至下表面穿透第二絕緣層120。第二通路320的橫截面積可(但不限於)自第二絕緣層120的上表面朝向下表面首先減小且然後增大。The second via 320 may penetrate the second insulating layer 120 from the upper surface to the lower surface of the second insulating layer 120. The cross-sectional area of the second via 320 may (but is not limited to) first decrease from the upper surface of the second insulating layer 120 toward the lower surface and then increase.

第二電路220可包括第二接墊420,第二接墊420可形成於第二絕緣層120的下表面上以嵌入於第一絕緣層110中,這與第二電路220類似。第二接墊420可形成於組成第二電路220的導線的端部部分處。第二接墊420的厚度可與第二電路220的厚度實質上相同,且第二接墊420的寬度可大於第二電路220的寬度,且第二接墊420的橫截面可近乎是圓形的。The second circuit 220 may include a second pad 420, which may be formed on the lower surface of the second insulating layer 120 to be embedded in the first insulating layer 110, which is similar to the second circuit 220. The second pad 420 may be formed at an end portion of the wire constituting the second circuit 220. The thickness of the second pad 420 may be substantially the same as the thickness of the second circuit 220, and the width of the second pad 420 may be greater than the width of the second circuit 220, and the cross section of the second pad 420 may be nearly circular of.

第一通路310可與第二接墊420接觸。具體而言,第一通路310的上表面可與第二接墊420的下表面接觸。此外,第二通路320可與第二接墊420接觸。具體而言,第二通路320的下表面可與第二接墊420的上表面接觸。The first via 310 may be in contact with the second pad 420. Specifically, the upper surface of the first via 310 may be in contact with the lower surface of the second pad 420. In addition, the second via 320 may be in contact with the second pad 420. Specifically, the lower surface of the second via 320 may be in contact with the upper surface of the second pad 420.

第三電路230可包括第三接墊430,第三接墊430可形成於第二絕緣層120的上表面上以向外突出,這與第三電路230類似。第三接墊430可形成於組成第三電路230的導線的端部部分處。第三接墊430的厚度可與第三電路230的厚度實質上相同,且第三接墊430的寬度可大於第三電路230的寬度,且第三接墊430的橫截面可近乎是圓形的。The third circuit 230 may include a third pad 430, which may be formed on the upper surface of the second insulating layer 120 to protrude outward, which is similar to the third circuit 230. The third pad 430 may be formed at an end portion of the wire constituting the third circuit 230. The thickness of the third pad 430 may be substantially the same as the thickness of the third circuit 230, and the width of the third pad 430 may be greater than the width of the third circuit 230, and the cross section of the third pad 430 may be nearly circular of.

第二通路320可與第三接墊430接觸。具體而言,第二通路320的上表面可與第三接墊430的下表面接觸。The second via 320 may be in contact with the third pad 430. Specifically, the upper surface of the second via 320 may be in contact with the lower surface of the third pad 430.

在實例中,可透過以下路線傳送電訊號:第一電路210—第一接墊410—第一通路310—第二接墊420—第二電路220;或第一電路210—第一接墊410—第一通路310—第二接墊420—第二通路320—第三接墊430—第三電路230。In an example, electrical signals can be transmitted through the following routes: first circuit 210—first pad 410—first path 310—second pad 420—second circuit 220; or first circuit 210—first pad 410 -First path 310-Second pad 420-Second path 320-Third pad 430-Third circuit 230.

與此同時,第一接墊410及第三接墊430可各自耦合至連接部件500。連接部件500可以是焊料凸塊或焊球。此類連接部件500被配置來電性連接印刷電路板與電子裝置(或外部板)以及實體地接合印刷電路板與電子裝置。換言之,印刷電路板與電子裝置(或外部板)藉由連接部件500彼此接合。At the same time, the first pad 410 and the third pad 430 may be coupled to the connection part 500 respectively. The connection member 500 may be a solder bump or a solder ball. Such a connection member 500 is configured to electrically connect the printed circuit board and the electronic device (or external board) and physically join the printed circuit board and the electronic device. In other words, the printed circuit board and the electronic device (or external board) are joined to each other by the connecting member 500.

在實例中,放置於印刷電路板的上側上的連接部件500(亦即,耦合至第三接墊430的連接部件500)可耦合至電子裝置,且放置於印刷電路板的下側上的連接部件500(亦即,耦合至第一接墊410的連接部件500)可耦合至外部板。在此種情形中,可透過以下路線傳送電訊號:外部板—連接部件500—第一接墊410—第一通路310—第二接墊420—第二通路320—第三接墊430—連接部件500—電子裝置。In an example, the connection member 500 placed on the upper side of the printed circuit board (that is, the connection member 500 coupled to the third pad 430) may be coupled to the electronic device, and the connection placed on the lower side of the printed circuit board The component 500 (ie, the connection component 500 coupled to the first pad 410) may be coupled to the external board. In this case, the electrical signal can be transmitted through the following route: external board-connecting part 500-first pad 410-first path 310-second pad 420-second path 320-third pad 430-connection Component 500-electronic device.

第一絕緣層110的下表面上可層疊有阻焊層600,且第二絕緣層120的上表面上亦可層疊有阻焊層600。阻焊層600可被配置成保護第一電路210及第三電路230。與此同時,阻焊層600中可形成有開口(或通孔)以部分地暴露出第一接墊410及第三接墊430,且所述開口中可耦合有連接部件500。A solder resist layer 600 may be stacked on the lower surface of the first insulating layer 110, and a solder resist layer 600 may also be stacked on the upper surface of the second insulating layer 120. The solder resist layer 600 may be configured to protect the first circuit 210 and the third circuit 230. At the same time, an opening (or through hole) may be formed in the solder resist layer 600 to partially expose the first pad 410 and the third pad 430, and the connection part 500 may be coupled in the opening.

圖2示出根據本發明的實施例的印刷電路板。2 shows a printed circuit board according to an embodiment of the present invention.

參考圖2,根據本發明的實施例的印刷電路板包括:絕緣材料100、第一絕緣層110、第二絕緣層120、第三絕緣層130、第四絕緣層140、第一電路210、第二電路220、第三電路230、第四電路240、第五電路250及第六電路260。2, a printed circuit board according to an embodiment of the present invention includes: an insulating material 100, a first insulating layer 110, a second insulating layer 120, a third insulating layer 130, a fourth insulating layer 140, a first circuit 210, a first The second circuit 220, the third circuit 230, the fourth circuit 240, the fifth circuit 250 and the sixth circuit 260.

絕緣材料100是成為印刷電路板的芯且支撐印刷電路板的部分。絕緣材料100可由諸如環氧樹脂等絕緣材料製成,且絕緣材料100中可含有加強材100a。加強材100a可以是諸如玻璃纖維織物等纖維加強材。絕緣材料100可以是排除銅箔的覆銅層疊板(copper clad laminate,CCL)的部分。The insulating material 100 is a portion that becomes the core of the printed circuit board and supports the printed circuit board. The insulating material 100 may be made of an insulating material such as epoxy resin, and the insulating material 100 may contain a reinforcing material 100a. The reinforcing material 100a may be a fiber reinforcing material such as glass fiber fabric. The insulating material 100 may be a copper clad laminate (CCL) excluding copper foil.

絕緣材料100的一個表面上可層疊有第一絕緣層110。第一絕緣層110可層疊於絕緣材料100的上表面上。在此種情形中,絕緣材料100可與第一絕緣層110的下表面接觸。此外,第二絕緣層120可層疊於第一絕緣層110上方。The first insulating layer 110 may be stacked on one surface of the insulating material 100. The first insulating layer 110 may be stacked on the upper surface of the insulating material 100. In this case, the insulating material 100 may be in contact with the lower surface of the first insulating layer 110. In addition, the second insulating layer 120 may be stacked above the first insulating layer 110.

與此同時,絕緣材料100的另一表面上可層疊有第三絕緣層130。在此種情形中,絕緣材料100可與第三絕緣層130的上表面接觸。此外,第四絕緣層140可層疊於第三絕緣層130下方。At the same time, a third insulating layer 130 may be stacked on the other surface of the insulating material 100. In this case, the insulating material 100 may be in contact with the upper surface of the third insulating layer 130. In addition, the fourth insulating layer 140 may be stacked under the third insulating layer 130.

第一絕緣層110與第三絕緣層130彼此實質上相同,且第二絕緣層120與第四絕緣層140彼此實質上相同,且印刷電路板可關於絕緣材料100對稱。The first insulating layer 110 and the third insulating layer 130 are substantially the same as each other, and the second insulating layer 120 and the fourth insulating layer 140 are substantially the same as each other, and the printed circuit board may be symmetrical with respect to the insulating material 100.

然而,本發明不一定僅限於上文所述的結構,且當(舉例而言)第一絕緣層110及第二絕緣層120層疊於絕緣材料100上方且僅第三絕緣層130層疊於絕緣材料100下方時,印刷電路板可關於絕緣材料100不對稱。此外,第一絕緣層110及第二絕緣層120層疊於絕緣材料100上方,且第三絕緣層130及第四絕緣層140層疊於絕緣材料下方,但第一絕緣層110與第三絕緣層130可彼此實質上不相同(就材料或厚度而言),且第二絕緣層120與第四絕緣層140可彼此實質上不相同(就材料或厚度而言)。However, the present invention is not necessarily limited to the structure described above, and when (for example) the first insulating layer 110 and the second insulating layer 120 are stacked on the insulating material 100 and only the third insulating layer 130 is stacked on the insulating material When below 100, the printed circuit board may be asymmetric with respect to the insulating material 100. In addition, the first insulating layer 110 and the second insulating layer 120 are stacked above the insulating material 100, and the third insulating layer 130 and the fourth insulating layer 140 are stacked under the insulating material, but the first insulating layer 110 and the third insulating layer 130 It may be substantially different from each other (in terms of material or thickness), and the second insulating layer 120 and the fourth insulating layer 140 may be substantially different from each other (in terms of material or thickness).

在後文中,將進一步闡述第一絕緣層110、第二絕緣層120、第三絕緣層130及第四絕緣層140。然而,由於上文已參考圖1闡述了第一絕緣層110及第二絕緣層120,因此本文中將不再對第一絕緣層110及第二絕緣層120予以贅述。In the following, the first insulating layer 110, the second insulating layer 120, the third insulating layer 130, and the fourth insulating layer 140 will be further described. However, since the first insulating layer 110 and the second insulating layer 120 have been explained above with reference to FIG. 1, the first insulating layer 110 and the second insulating layer 120 will not be repeated here.

第三絕緣層130是具有絕緣性質且主要由絕緣材料製成的層。第三絕緣層130可由幾乎不具有撓性的剛性材料製成。舉例而言,環氧樹脂、酚醛樹脂或BT樹脂可用作所述剛性材料。環氧樹脂可以是(但不限於)例如:萘環氧樹脂、雙酚A型環氧樹脂、雙酚F型環氧樹脂、酚醛清漆環氧樹脂、甲酚酚醛清漆環氧樹脂、橡膠改質的環氧樹脂、環型脂族環氧樹脂、矽環氧樹脂、氮環氧樹脂或磷環氧樹脂。The third insulating layer 130 is a layer having insulating properties and mainly made of an insulating material. The third insulating layer 130 may be made of a rigid material with little flexibility. For example, epoxy resin, phenol resin or BT resin can be used as the rigid material. The epoxy resin may be (but not limited to) for example: naphthalene epoxy resin, bisphenol A epoxy resin, bisphenol F epoxy resin, novolac epoxy resin, cresol novolac epoxy resin, rubber modification Epoxy resin, cycloaliphatic epoxy resin, silicon epoxy resin, nitrogen epoxy resin or phosphorus epoxy resin.

第三絕緣層130可以是含有纖維加強材(諸如,玻璃纖維織物)的預浸體(PPG)。第三絕緣層130可以是填充有無機填充物(諸如,二氧化矽)的積層膜。味之素積層膜(ABF)可用作此積層膜。The third insulating layer 130 may be a prepreg (PPG) containing fiber reinforcement such as glass fiber fabric. The third insulating layer 130 may be a laminated film filled with an inorganic filler (such as silicon dioxide). Ajinomoto laminated film (ABF) can be used as this laminated film.

第四絕緣層140是具有絕緣性質且主要由絕緣材料製成的層。第四絕緣層140可由具有高撓性的撓性材料製成。聚醯亞胺(PI)、液晶聚合物(LCP)等可用作所述撓性材料。The fourth insulating layer 140 is a layer having insulating properties and mainly made of an insulating material. The fourth insulating layer 140 may be made of a flexible material with high flexibility. Polyimide (PI), liquid crystal polymer (LCP), etc. can be used as the flexible material.

第一電路210、第二電路220、第三電路230、第四電路240、第五電路250及第六電路260用於傳送電訊號,且可由諸如銅(Cu)、鈀(Pd)、鋁(Al)、鎳(Ni)、鈦(Ti)、金(Au)、鉑(Pt)等金屬製成,或者考慮到該些金屬的導電率而由該些金屬中的一些金屬的合金製成。The first circuit 210, the second circuit 220, the third circuit 230, the fourth circuit 240, the fifth circuit 250, and the sixth circuit 260 are used to transmit electrical signals, and may be made of copper (Cu), palladium (Pd), aluminum ( Al), nickel (Ni), titanium (Ti), gold (Au), platinum (Pt), or other metals, or alloys of some of these metals in consideration of their electrical conductivity.

第一電路210、第二電路220、第三電路230、第四電路240、第五電路250及第六電路260可各自由導電配線製成,所述導電配線可被設置為多個。The first circuit 210, the second circuit 220, the third circuit 230, the fourth circuit 240, the fifth circuit 250, and the sixth circuit 260 may each be made of conductive wiring, and the conductive wiring may be provided in plural.

第一電路210形成於第一絕緣層110的下表面上且嵌入於第一絕緣層110中。由於第一電路210嵌入於第一絕緣層110中,因此第一電路210的除了第一電路210的下表面(亦即,第一電路210的在圖2中放置於下側上的表面)之外的表面皆與第一絕緣層110接觸。The first circuit 210 is formed on the lower surface of the first insulating layer 110 and embedded in the first insulating layer 110. Since the first circuit 210 is embedded in the first insulating layer 110, the lower surface of the first circuit 210 except the first circuit 210 (that is, the surface of the first circuit 210 placed on the lower side in FIG. 2) The outer surfaces are in contact with the first insulating layer 110.

此外,第一電路210形成於絕緣材料100的一個表面(亦即,上表面)上。In addition, the first circuit 210 is formed on one surface (ie, upper surface) of the insulating material 100.

第二電路220形成於第二絕緣層120的下表面上且嵌入於第一絕緣層110中。第二電路220的上表面(亦即,第二電路220的在圖2中放置於上側上的表面)與第二絕緣層120的下表面接觸,且第二電路220的除了第二電路220的上表面之外的表面皆與第一絕緣層110接觸。The second circuit 220 is formed on the lower surface of the second insulating layer 120 and embedded in the first insulating layer 110. The upper surface of the second circuit 220 (that is, the surface of the second circuit 220 placed on the upper side in FIG. 2) is in contact with the lower surface of the second insulating layer 120, and the second circuit 220 except the second circuit 220 The surfaces other than the upper surface are in contact with the first insulating layer 110.

第三電路230形成於第二絕緣層120的上表面上。第三電路230與第二絕緣層120的上表面接觸且自第二絕緣層120的上表面突出至第二絕緣層120之外。The third circuit 230 is formed on the upper surface of the second insulating layer 120. The third circuit 230 is in contact with the upper surface of the second insulating layer 120 and protrudes from the upper surface of the second insulating layer 120 beyond the second insulating layer 120.

第二電路220的節距小於第一電路210的節距。此外,第二電路220的寬度可小於第一電路210的寬度,且第二電路220的空間可小於第一電路210的空間。The pitch of the second circuit 220 is smaller than the pitch of the first circuit 210. In addition, the width of the second circuit 220 may be smaller than the width of the first circuit 210, and the space of the second circuit 220 may be smaller than the space of the first circuit 210.

此外,第三電路230的節距可小於第一電路210的節距。第三電路230的寬度可小於第一電路210的寬度,且第三電路230的空間可小於第一電路210的空間。In addition, the pitch of the third circuit 230 may be smaller than the pitch of the first circuit 210. The width of the third circuit 230 may be smaller than the width of the first circuit 210, and the space of the third circuit 230 may be smaller than the space of the first circuit 210.

舉例而言,第二電路220的節距及第三電路230的節距可各自為約20微米,且第一電路210的節距可大於此節距。For example, the pitch of the second circuit 220 and the pitch of the third circuit 230 may each be about 20 microns, and the pitch of the first circuit 210 may be greater than this pitch.

換言之,第二電路220及第三電路230可形成為較第一電路210密集。此外,第二電路220及第三電路230可形成為較第一電路210精密。In other words, the second circuit 220 and the third circuit 230 may be formed denser than the first circuit 210. In addition, the second circuit 220 and the third circuit 230 may be formed to be more precise than the first circuit 210.

第四電路240形成於絕緣材料100的另一表面(亦即,下表面)上且嵌入於第三絕緣層130中。由於第四電路240嵌入於第三絕緣層130中,因此第四電路240的除了第四絕緣層240的上表面(亦即,第四電路240的在圖2中放置於上側上的表面)之外的表面皆與第三絕緣層130接觸。The fourth circuit 240 is formed on the other surface (ie, the lower surface) of the insulating material 100 and is embedded in the third insulating layer 130. Since the fourth circuit 240 is embedded in the third insulating layer 130, the top surface of the fourth circuit 240 except the fourth insulating layer 240 (that is, the surface of the fourth circuit 240 placed on the upper side in FIG. 2) The outer surfaces are in contact with the third insulating layer 130.

第五電路250形成於第三絕緣層130的下表面上且嵌入於第三絕緣層130中。第五電路250的除了第五電路250的下表面(亦即,第五電路250的在圖2中放置於下側上的表面)之外的表面皆與第三絕緣層130接觸。第五電路250位於第四絕緣層140的一個表面(亦即,上表面)上。The fifth circuit 250 is formed on the lower surface of the third insulating layer 130 and embedded in the third insulating layer 130. The surfaces of the fifth circuit 250 other than the lower surface of the fifth circuit 250 (that is, the surface of the fifth circuit 250 placed on the lower side in FIG. 2) are in contact with the third insulating layer 130. The fifth circuit 250 is located on one surface (ie, upper surface) of the fourth insulating layer 140.

第六電路260形成於第四絕緣層140的另一表面(亦即,下表面)上。第六電路260與第四絕緣層140的下表面接觸且自第四絕緣層140的另一表面(亦即,下表面)向外突出。The sixth circuit 260 is formed on the other surface (ie, the lower surface) of the fourth insulating layer 140. The sixth circuit 260 is in contact with the lower surface of the fourth insulating layer 140 and protrudes outward from the other surface (ie, the lower surface) of the fourth insulating layer 140.

第五電路250的節距小於第四電路240的節距。此外,第五電路250的寬度可小於第四電路240的寬度,且第五電路250的空間可小於第四電路240的空間。The pitch of the fifth circuit 250 is smaller than the pitch of the fourth circuit 240. In addition, the width of the fifth circuit 250 may be smaller than the width of the fourth circuit 240, and the space of the fifth circuit 250 may be smaller than the space of the fourth circuit 240.

此外,第六電路260的節距可小於第四電路240的節距。第六電路260的寬度可小於第四電路240的寬度,且第六電路260的空間可小於第四電路240的空間。In addition, the pitch of the sixth circuit 260 may be smaller than the pitch of the fourth circuit 240. The width of the sixth circuit 260 may be smaller than the width of the fourth circuit 240, and the space of the sixth circuit 260 may be smaller than the space of the fourth circuit 240.

舉例而言,第五電路250的節距及第六電路260的節距可各自為約20微米,且第四電路240的節距可大於此節距。For example, the pitch of the fifth circuit 250 and the pitch of the sixth circuit 260 may each be about 20 microns, and the pitch of the fourth circuit 240 may be greater than this pitch.

換言之,第五電路250及第六電路260可形成為較第四電路240密集。此外,第五電路250及第六電路260可形成為較第四電路240精密。In other words, the fifth circuit 250 and the sixth circuit 260 may be formed denser than the fourth circuit 240. In addition, the fifth circuit 250 and the sixth circuit 260 may be formed to be more precise than the fourth circuit 240.

第一電路210與第四電路240可彼此對稱,且第二電路220與第五電路250可彼此對稱,且第三電路230與第六電路260可彼此對稱。The first circuit 210 and the fourth circuit 240 may be symmetrical to each other, the second circuit 220 and the fifth circuit 250 may be symmetrical to each other, and the third circuit 230 and the sixth circuit 260 may be symmetrical to each other.

參考圖2,根據本發明的實施例的印刷電路板可更包括貫穿通路100b、第一通路310、第二通路320、第三通路330及第四通路340。Referring to FIG. 2, the printed circuit board according to the embodiment of the present invention may further include a through via 100 b, a first via 310, a second via 320, a third via 330 and a fourth via 340.

貫穿通路100b穿透絕緣材料100以電性連接第一電路210與第四電路240。貫穿通路100b可以是鍍覆通路且可由與第一電路210相同的金屬製成。貫穿通路100b可自絕緣材料100的一個表面至另一表面穿透絕緣材料100,且所述貫穿通路100b的橫截面積可自絕緣材料100的一個表面朝向另一表面首先減小且然後增大。貫穿通路100b的上表面可與第一電路210的第一接墊410接觸,且貫穿通路100b的下表面可與第四電路240的第四接墊440接觸。The through via 100 b penetrates the insulating material 100 to electrically connect the first circuit 210 and the fourth circuit 240. The through via 100b may be a plated via and may be made of the same metal as the first circuit 210. The through via 100b may penetrate the insulating material 100 from one surface of the insulating material 100 to another surface, and the cross-sectional area of the through via 100b may first decrease from one surface of the insulating material 100 toward the other surface and then increase . The upper surface of the through via 100b may be in contact with the first pad 410 of the first circuit 210, and the lower surface of the through via 100b may be in contact with the fourth pad 440 of the fourth circuit 240.

第一通路310是被配置成藉由穿透第一絕緣層110來電性連接第一電路210與第二電路220的導電結構。此外,第二通路320是被配置成藉由穿透第二絕緣層120來電性連接第二電路220與第三電路230的導電結構。The first via 310 is configured to electrically connect the conductive structure of the first circuit 210 and the second circuit 220 by penetrating the first insulating layer 110. In addition, the second via 320 is configured to electrically connect the conductive structure of the second circuit 220 and the third circuit 230 by penetrating the second insulating layer 120.

第一通路310的熔點可低於第一電路210的熔點。第一通路310可由導電膏製成。在此,導電膏可以是含有金屬的膏,或是由導電聚合物製成但不含任何金屬的的膏。膏中所含有的金屬可以是銀(Ag)、錫(Sn)、鎳(Ni)及銅(Cu)中的一者或多者。在實例中,第一電路210可主要由銅製成,且第一通路310可主要由錫製成。導電膏的此實例被填充於通孔中且然後透過迴焊製程或加熱/冷卻製程而被金屬化以成為第一通路310。The melting point of the first via 310 may be lower than the melting point of the first circuit 210. The first via 310 may be made of conductive paste. Here, the conductive paste may be a paste containing metal, or a paste made of a conductive polymer but not containing any metal. The metal contained in the paste may be one or more of silver (Ag), tin (Sn), nickel (Ni), and copper (Cu). In an example, the first circuit 210 may be mainly made of copper, and the first via 310 may be mainly made of tin. This example of conductive paste is filled in the through hole and then metallized to become the first via 310 through a reflow process or a heating/cooling process.

第一通路310的橫截面積可自第一絕緣層110的下表面至第一絕緣層110的上表面增大,在此種情形中第一通路310的縱截面可呈倒置梯形形狀。The cross-sectional area of the first via 310 may increase from the lower surface of the first insulating layer 110 to the upper surface of the first insulating layer 110. In this case, the longitudinal section of the first via 310 may have an inverted trapezoidal shape.

第一電路210可包括第一接墊410,第一接墊410可形成於第一絕緣層110的下表面上以嵌入於第一絕緣層110中,這與第一電路210類似。第一接墊410可形成於組成第一電路210的導線的端部部分處。第一接墊410的厚度可與第一電路210的厚度實質上相同,且第一接墊410的寬度可大於第一電路210的寬度,且第一接墊410的橫截面可近乎是圓形的。The first circuit 210 may include a first pad 410, which may be formed on the lower surface of the first insulating layer 110 to be embedded in the first insulating layer 110, which is similar to the first circuit 210. The first pad 410 may be formed at an end portion of the wire constituting the first circuit 210. The thickness of the first pad 410 may be substantially the same as the thickness of the first circuit 210, and the width of the first pad 410 may be greater than the width of the first circuit 210, and the cross section of the first pad 410 may be nearly circular of.

第一通路310可與第一接墊410接觸。具體而言,第一通路310的下表面可與第一接墊410的上表面接觸。此外,如上文所述,貫穿通路110b可與第一接墊410接觸。The first via 310 may be in contact with the first pad 410. Specifically, the lower surface of the first via 310 may be in contact with the upper surface of the first pad 410. In addition, as described above, the through via 110b may be in contact with the first pad 410.

第二通路320的熔點可高於第一通路310的熔點。舉例而言,第二通路320可主要由銅製成,而第一通路310可主要由錫製成。此外,第二通路320可以是透過鍍覆形成的鍍覆通路。The melting point of the second via 320 may be higher than the melting point of the first via 310. For example, the second via 320 may be mainly made of copper, and the first via 310 may be mainly made of tin. In addition, the second via 320 may be a plated via formed by plating.

第二通路320可自第二絕緣層120的上表面至下表面穿透第二絕緣層120。第二通路320的橫截面積可(但不限於)自第二絕緣層120的上表面朝向下表面首先減小且然後增大。The second via 320 may penetrate the second insulating layer 120 from the upper surface to the lower surface of the second insulating layer 120. The cross-sectional area of the second via 320 may (but is not limited to) first decrease from the upper surface of the second insulating layer 120 toward the lower surface and then increase.

第二電路220可包括第二接墊420,第二接墊420可形成於第二絕緣層120的下表面上以嵌入於第一絕緣層110中,這與第二電路220類似。第二接墊420可形成於組成第二電路220的導線的端部部分處。第二接墊420的厚度可與第二電路220的厚度實質上相同,且第二接墊420的寬度可大於第二電路220的寬度,且第二接墊420的橫截面可近乎是圓形的。The second circuit 220 may include a second pad 420, which may be formed on the lower surface of the second insulating layer 120 to be embedded in the first insulating layer 110, which is similar to the second circuit 220. The second pad 420 may be formed at an end portion of the wire constituting the second circuit 220. The thickness of the second pad 420 may be substantially the same as the thickness of the second circuit 220, and the width of the second pad 420 may be greater than the width of the second circuit 220, and the cross section of the second pad 420 may be nearly circular of.

第一通路310可與第二接墊420接觸。具體而言,第一通路310的上表面可與第二接墊420的下表面接觸。此外,第二通路320可與第二接墊420接觸。具體而言,第二通路320的下表面可與第二接墊420的上表面接觸。The first via 310 may be in contact with the second pad 420. Specifically, the upper surface of the first via 310 may be in contact with the lower surface of the second pad 420. In addition, the second via 320 may be in contact with the second pad 420. Specifically, the lower surface of the second via 320 may be in contact with the upper surface of the second pad 420.

第三電路230可包括第三接墊430,第三接墊430可形成於第二絕緣層120的上表面上以向外突出,這與第三電路230類似。第三接墊430可形成於組成第三電路230的導線的端部部分處。第三接墊430的厚度可與第三電路230的厚度實質上相同,且第三接墊430的寬度可大於第三電路230的寬度,且第三接墊430的橫截面可近乎是圓形的。The third circuit 230 may include a third pad 430, which may be formed on the upper surface of the second insulating layer 120 to protrude outward, which is similar to the third circuit 230. The third pad 430 may be formed at an end portion of the wire constituting the third circuit 230. The thickness of the third pad 430 may be substantially the same as the thickness of the third circuit 230, and the width of the third pad 430 may be greater than the width of the third circuit 230, and the cross section of the third pad 430 may be nearly circular of.

第二通路320可與第三接墊430接觸。具體而言,第二通路320的上表面可與第三接墊430的下表面接觸。The second via 320 may be in contact with the third pad 430. Specifically, the upper surface of the second via 320 may be in contact with the lower surface of the third pad 430.

第三通路330是被配置成藉由穿透第三絕緣層130來電性連接第四電路240與第五電路250的導電結構。此外,第四通路340是被配置成藉由穿透第二絕緣層120來電性連接第二電路220與第三電路230的導電結構。The third via 330 is configured to electrically connect the conductive structure of the fourth circuit 240 and the fifth circuit 250 by penetrating the third insulating layer 130. In addition, the fourth via 340 is configured to electrically connect the conductive structure of the second circuit 220 and the third circuit 230 by penetrating the second insulating layer 120.

第三通路330的熔點可低於第四電路240的熔點。第三通路330可由導電膏製成。在此,導電膏可以是含有金屬的膏,或是由導電聚合物製成但不含任何金屬的的膏。膏中所含有的金屬可以是銀(Ag)、錫(Sn)、鎳(Ni)及銅(Cu)中的一者或多者。在實例中,第四電路240可主要由銅製成,且第三通路330可主要由錫製成。導電膏的此實例被填充於通孔中且然後透過迴焊製程或加熱/冷卻製程而被金屬化以成為第三通路330。The melting point of the third via 330 may be lower than the melting point of the fourth circuit 240. The third via 330 may be made of conductive paste. Here, the conductive paste may be a paste containing metal, or a paste made of a conductive polymer but not containing any metal. The metal contained in the paste may be one or more of silver (Ag), tin (Sn), nickel (Ni), and copper (Cu). In an example, the fourth circuit 240 may be mainly made of copper, and the third via 330 may be mainly made of tin. This example of the conductive paste is filled in the through hole and then metallized to become the third via 330 through the reflow process or the heating/cooling process.

第三通路330的橫截面積可自第四絕緣層140的上表面至下表面增大。在此種情形中,第三通路330的縱截面可呈梯形形狀。The cross-sectional area of the third via 330 may increase from the upper surface to the lower surface of the fourth insulating layer 140. In this case, the longitudinal section of the third passage 330 may have a trapezoidal shape.

第四電路240可包括第四接墊440,第四接墊440可形成於絕緣材料100的下表面上以嵌入於第三絕緣層130中,這與第四電路240類似。第四接墊440可形成於組成第四電路240的導線的端部部分處。第四接墊440的厚度可與第四電路240的厚度實質上相同,且第四接墊440的寬度可大於第四電路240的寬度,且第四接墊440的橫截面可近乎是圓形的。The fourth circuit 240 may include a fourth pad 440, which may be formed on the lower surface of the insulating material 100 to be embedded in the third insulating layer 130, which is similar to the fourth circuit 240. The fourth pad 440 may be formed at an end portion of the wire constituting the fourth circuit 240. The thickness of the fourth pad 440 may be substantially the same as the thickness of the fourth circuit 240, and the width of the fourth pad 440 may be greater than the width of the fourth circuit 240, and the cross section of the fourth pad 440 may be nearly circular of.

第三通路330可與第四接墊440接觸。具體而言,第三通路330的上表面可與第四接墊440的下表面接觸。此外,如上文所述,貫穿通路110b可與第四接墊440接觸。The third via 330 may be in contact with the fourth pad 440. Specifically, the upper surface of the third via 330 may be in contact with the lower surface of the fourth pad 440. In addition, as described above, the through via 110b may be in contact with the fourth pad 440.

第四通路340的熔點可高於第三通路330的熔點。舉例而言,第四通路340可主要由銅製成,而第三通路330可主要由錫製成。此外,第四通路340可以是透過鍍覆形成的鍍覆通路。The melting point of the fourth via 340 may be higher than the melting point of the third via 330. For example, the fourth via 340 may be mainly made of copper, and the third via 330 may be mainly made of tin. In addition, the fourth via 340 may be a plated via formed by plating.

第四通路340可自第四絕緣層140的上表面至下表面穿透第四絕緣層140。第四通路340的橫截面積可(但不限於)自第四絕緣層140的上表面朝向下表面減小首先且然後增大。The fourth via 340 may penetrate the fourth insulating layer 140 from the upper surface to the lower surface of the fourth insulating layer 140. The cross-sectional area of the fourth via 340 may (but is not limited to) decrease from the upper surface of the fourth insulating layer 140 toward the lower surface first and then increase.

第五電路250可包括第五接墊450,第五接墊450可形成於第三絕緣層130的下表面上以嵌入於第三絕緣層130中,這與第五電路250類似。第五接墊450可形成於組成第五電路250的導線的端部部分處。第五接墊450的厚度可與第五電路250的厚度實質上相同,且第五接墊450的寬度可大於第五電路250的寬度,且第五接墊450的橫截面可近乎是圓形的。The fifth circuit 250 may include a fifth pad 450 which may be formed on the lower surface of the third insulating layer 130 to be embedded in the third insulating layer 130, which is similar to the fifth circuit 250. The fifth pad 450 may be formed at an end portion of the wire constituting the fifth circuit 250. The thickness of the fifth pad 450 may be substantially the same as the thickness of the fifth circuit 250, and the width of the fifth pad 450 may be greater than the width of the fifth circuit 250, and the cross section of the fifth pad 450 may be nearly circular of.

第三通路330可與第五接墊450接觸。具體而言,第三通路330的下表面可與第五接墊450的上表面接觸。此外,第四通路340可與第五接墊450接觸。具體而言,第四通路340的上表面可與第五接墊450的下表面接觸。The third via 330 may be in contact with the fifth pad 450. Specifically, the lower surface of the third via 330 may be in contact with the upper surface of the fifth pad 450. In addition, the fourth via 340 may be in contact with the fifth pad 450. Specifically, the upper surface of the fourth via 340 may be in contact with the lower surface of the fifth pad 450.

第六電路260可包括第六接墊460,第六接墊460可形成於第四絕緣層140的下表面上以向外突出,這與第六電路260類似。第六接墊460可形成於組成第六電路260的導線的端部部分處。第六接墊460的厚度可與第六電路260的厚度實質上相同,且第六接墊460的寬度可大於第六電路260的寬度,且第六接墊460的橫截面可近乎是圓形的。The sixth circuit 260 may include a sixth pad 460, which may be formed on the lower surface of the fourth insulating layer 140 to protrude outward, which is similar to the sixth circuit 260. The sixth pad 460 may be formed at an end portion of the wire constituting the sixth circuit 260. The thickness of the sixth pad 460 may be substantially the same as the thickness of the sixth circuit 260, and the width of the sixth pad 460 may be greater than the width of the sixth circuit 260, and the cross section of the sixth pad 460 may be nearly circular of.

第四通路340可與第六接墊460接觸。具體而言,第四通路340的下表面可與第六接墊460的上表面接觸。The fourth via 340 may be in contact with the sixth pad 460. Specifically, the lower surface of the fourth via 340 may be in contact with the upper surface of the sixth pad 460.

在實例中,可透過以下路線傳送電訊號:第六電路260—第六接墊460—第四通路340—第五接墊450—第三通路330—第四接墊440—貫穿通路—第一接墊410—第一通路310—第二接墊420—第二通路320—第三接墊430—第三電路230。In an example, the electrical signal can be transmitted through the following route: sixth circuit 260—sixth pad 460—fourth path 340—fifth pad 450—third path 330—fourth pad 440—through path—first Pad 410-first path 310-second pad 420-second path 320-third pad 430-third circuit 230.

與此同時,第三接墊430及第六接墊460可各自耦合至連接部件500。連接部件500可以是焊料凸塊或焊球。此類連接部件500被配置成電性連接印刷電路板與電子裝置(或外部板)且實體地接合印刷電路板與電子裝置。換言之,印刷電路板與電子裝置(或外部板)藉由連接部件500彼此接合。At the same time, the third pad 430 and the sixth pad 460 may be coupled to the connection part 500 respectively. The connection member 500 may be a solder bump or a solder ball. Such a connection member 500 is configured to electrically connect the printed circuit board and the electronic device (or external board) and physically join the printed circuit board and the electronic device. In other words, the printed circuit board and the electronic device (or external board) are joined to each other by the connecting member 500.

在實例中,放置於印刷電路板的上側上的連接部件500(亦即,耦合至第三接墊430的連接部件500)可耦合至電子裝置,且放置於印刷電路板的下側上的連接部件500(亦即,耦合至第六接墊460的連接部件500)可耦合至外部板。在此種情形中,可透過以下路線傳送電訊號:外部板—連接部件500—第六接墊460—第四通路340—第五接墊450—第三通路330—第四接墊440—貫穿通路—第一接墊410—第一通路310—第二接墊420—第二通路320—第三接墊430—連接部件500—電子裝置。In an example, the connection member 500 placed on the upper side of the printed circuit board (that is, the connection member 500 coupled to the third pad 430) may be coupled to the electronic device, and the connection placed on the lower side of the printed circuit board The component 500 (ie, the connection component 500 coupled to the sixth pad 460) may be coupled to the external board. In this case, the electrical signal can be transmitted through the following route: external board—connecting member 500—sixth pad 460—fourth path 340—fifth pad 450—third path 330—fourth pad 440—through Via—first pad 410—first via 310—second pad 420—second via 320—third pad 430—connecting component 500—electronic device.

第四絕緣層140的下表面上可層疊有阻焊層600,且第二絕緣層120的上表面上亦可層疊有阻焊層600。阻焊層600可被配置成保護第六電路260及第三電路230。與此同時,阻焊層600中可形成有開口(或通孔)以部分地暴露出第六接墊460及第三接墊430,且所述開口中可耦合有連接部件500。A solder resist layer 600 may be stacked on the lower surface of the fourth insulating layer 140, and a solder resist layer 600 may also be stacked on the upper surface of the second insulating layer 120. The solder resist layer 600 may be configured to protect the sixth circuit 260 and the third circuit 230. At the same time, an opening (or through hole) may be formed in the solder resist layer 600 to partially expose the sixth pad 460 and the third pad 430, and the connection part 500 may be coupled in the opening.

圖3示出根據本發明的實施例的印刷電路板。FIG. 3 shows a printed circuit board according to an embodiment of the present invention.

參考圖3,根據本發明的實施例的印刷電路板包括絕緣材料100、第一絕緣層110、第二絕緣層120、第三絕緣層130、第四絕緣層140、第一電路210、第二電路220、第三電路230、第四電路240、第五電路250及第六電路260,且可更包括貫穿通路100b及整合式通路350、整合式通路360。3, a printed circuit board according to an embodiment of the present invention includes an insulating material 100, a first insulating layer 110, a second insulating layer 120, a third insulating layer 130, a fourth insulating layer 140, a first circuit 210, a second The circuit 220, the third circuit 230, the fourth circuit 240, the fifth circuit 250, and the sixth circuit 260, and may further include the through path 100b, the integrated path 350, and the integrated path 360.

絕緣材料100、第一絕緣層110、第二絕緣層120、第三絕緣層130、第四絕緣層140、第一電路210、第二電路220、第三電路230、第四電路240、第五電路250、第六電路260及貫穿通路100b上文已加以闡述且因此本文中將不再贅述。Insulating material 100, first insulating layer 110, second insulating layer 120, third insulating layer 130, fourth insulating layer 140, first circuit 210, second circuit 220, third circuit 230, fourth circuit 240, fifth The circuit 250, the sixth circuit 260, and the through via 100b have been described above and therefore will not be described in detail herein.

整合式通路350與第一電路210電性連接且整體地穿透第一絕緣層110及第二絕緣層120。此外,整合式通路350與第四電路240電性連接且整體地穿透第三絕緣層130及第四絕緣層140。The integrated via 350 is electrically connected to the first circuit 210 and penetrates the first insulating layer 110 and the second insulating layer 120 as a whole. In addition, the integrated via 350 is electrically connected to the fourth circuit 240 and penetrates the third insulating layer 130 and the fourth insulating layer 140 as a whole.

整合式通路350、整合式通路360的熔點可低於第一電路210(或第四電路240)的熔點。整合式通路350、整合式通路360可由導電膏製成。在此,導電膏可以是含有金屬的膏,或是由導電聚合物製成但不含任何金屬的膏。膏中所含有的金屬可以是銀(Ag)、錫(Sn)、鎳(Ni)及銅(Cu)中的一者或多者。在實例中,第一電路210可主要由銅製成,且整合式通路350、整合式通路360可主要由錫製成。導電膏的此實例被填充於通孔中且然後透過迴焊製程或加熱/冷卻製程而被金屬化以成為整合式通路350、整合式通路360。The melting points of the integrated channel 350 and the integrated channel 360 may be lower than the melting point of the first circuit 210 (or the fourth circuit 240). The integrated channel 350 and the integrated channel 360 may be made of conductive paste. Here, the conductive paste may be a paste containing metal, or a paste made of a conductive polymer but not containing any metal. The metal contained in the paste may be one or more of silver (Ag), tin (Sn), nickel (Ni), and copper (Cu). In an example, the first circuit 210 may be mainly made of copper, and the integrated via 350 and the integrated via 360 may be mainly made of tin. This example of the conductive paste is filled in the through holes and then metallized through the reflow process or the heating/cooling process to become the integrated via 350 and the integrated via 360.

整合式通路350是被整合在一起的參考圖1及圖2所述的第一通路310與第二通路320,但不具有接墊。此外,整合式通路360是整合在一起的第三通路330及第四通路340,但不具有接墊。The integrated via 350 is integrated with the first via 310 and the second via 320 described with reference to FIGS. 1 and 2, but does not have pads. In addition, the integrated channel 360 is the third channel 330 and the fourth channel 340 integrated together, but does not have pads.

整合式通路350、整合式通路360可延伸至阻焊層600的開口。此外,整合式通路350、整合式通路360可在整合式通路350、整合式通路360與連接部件500之間不存在接墊的情況下與連接部件500接合。The integrated via 350 and the integrated via 360 may extend to the opening of the solder resist layer 600. In addition, the integrated channel 350 and the integrated channel 360 can be joined to the connection member 500 without a pad between the integrated channel 350, the integrated channel 360 and the connection member 500.

圖4及圖5示出製造根據本發明的實施例的印刷電路板的方法。4 and 5 illustrate a method of manufacturing a printed circuit board according to an embodiment of the present invention.

圖4說明在第二絕緣層120上或在第二絕緣層120中形成第二電路220、第三電路230及第二通路320的步驟,且圖5說明使用圖4中已製備的各個組件(在後文中稱為「單元基板」)來製造印刷電路板的步驟。FIG. 4 illustrates the steps of forming the second circuit 220, the third circuit 230, and the second via 320 on or in the second insulating layer 120, and FIG. 5 illustrates the use of the various components prepared in FIG. 4 ( Hereinafter referred to as "unit substrate") to produce a printed circuit board.

參考圖4中的步驟(a),在其中金屬層M1層疊於第二絕緣層120的兩個表面上的基板中形成通孔VH1。Referring to step (a) in FIG. 4, through holes VH1 are formed in the substrate in which the metal layer M1 is stacked on both surfaces of the second insulating layer 120.

如上文所述,第二絕緣層120可由諸如聚醯亞胺等撓性材料製成。第二絕緣層120已在上文加以詳細地闡述且因此本文中將不再贅述。金屬層M1可由與第二電路220及第三電路230相同的金屬製成。金屬層M1可用作晶種層。As described above, the second insulating layer 120 may be made of a flexible material such as polyimide. The second insulating layer 120 has been explained in detail above and therefore will not be repeated here. The metal layer M1 may be made of the same metal as the second circuit 220 and the third circuit 230. The metal layer M1 may be used as a seed layer.

通孔VH1穿透金屬層M1及第二絕緣層120兩者。可使用例如雷射鑽機來形成通孔VH1,或者若有必要,可在使用例如蝕刻來部分地移除金屬層M1之後對第二絕緣層120進行雷射鑽孔來打孔。CO2 雷射可用作雷射鑽機。The via hole VH1 penetrates both the metal layer M1 and the second insulating layer 120. The through hole VH1 may be formed using, for example, a laser drill, or if necessary, the second insulating layer 120 may be laser drilled to be drilled after partially removing the metal layer M1 using, for example, etching. CO 2 laser can be used as a laser rig.

通孔VH1的橫截面積可自第二絕緣層120的一個表面至另一表面首先減小且然後增大。具體而言,在使用雷射鑽機形成通孔的情形中,孔的橫截面積可在雷射入射的表面處是最大的。因此,可通過將雷射輻射於第二絕緣層120的一個表面及另一表面兩者上來形成圖4的步驟(a)中所示的通孔VH1的形狀。然而,本發明不一定僅限於此形狀。與圖4的步驟(a)中所示的形狀不同,通孔的橫截面積自第二絕緣層120的一個表面至另一表面可以是恆定的、一直減小或一直增大。The cross-sectional area of the via hole VH1 may first decrease from one surface to the other surface of the second insulating layer 120 and then increase. Specifically, in the case of forming a through hole using a laser drilling machine, the cross-sectional area of the hole may be the largest at the surface where the laser is incident. Therefore, the shape of the via hole VH1 shown in step (a) of FIG. 4 may be formed by radiating laser light on both one surface and the other surface of the second insulating layer 120. However, the present invention is not necessarily limited to this shape. Unlike the shape shown in step (a) of FIG. 4, the cross-sectional area of the through hole may be constant from one surface to the other surface of the second insulating layer 120 to always decrease or increase.

參考圖4中的步驟(b),可在通孔VH1內形成鍍覆層。鍍覆層可僅形成於通孔VH1內,或可不僅形成於通孔VH1內而且形成於金屬層M1的表面上。鍍覆層可由與金屬層M1相同的金屬製成。雖然鍍覆層與金屬層M1之間可形成界面,但圖4中未示出所述界面。Referring to step (b) in FIG. 4, a plating layer may be formed in the via hole VH1. The plating layer may be formed only in the through hole VH1, or may be formed not only in the through hole VH1 but also on the surface of the metal layer M1. The plating layer may be made of the same metal as the metal layer M1. Although an interface may be formed between the plating layer and the metal layer M1, the interface is not shown in FIG. 4.

參考圖4中的步驟(c),在第二絕緣層120的兩個表面上形成電路。在第二絕緣層120的一個表面上(亦即,下表面)形成第二電路220,且在第二絕緣層120的另一表面(亦即,上表面)上形成第三電路230。與此同時,第二接墊420與第二電路220一起形成,且第三接墊430與第三電路230一起形成。Referring to step (c) in FIG. 4, circuits are formed on both surfaces of the second insulating layer 120. A second circuit 220 is formed on one surface (ie, lower surface) of the second insulating layer 120, and a third circuit 230 is formed on the other surface (ie, upper surface) of the second insulating layer 120. At the same time, the second pad 420 is formed together with the second circuit 220, and the third pad 430 is formed together with the third circuit 230.

可使用卷對卷設備(roll-to-roll equipment)透過減成技術或蓋孔技術(tenting technique)來形成第二電路220及第三電路230。在鍍覆層僅形成於通孔VH1內的情形中,蝕刻金屬層M1以形成第二電路220及第三電路230。在鍍覆層不僅形成於通孔VH1內而且亦形成於金屬層M1的表面上的情形中,一起蝕刻金屬層M1及鍍覆層以形成第二電路220及第三電路230。The second circuit 220 and the third circuit 230 may be formed by a roll-to-roll equipment through a subtraction technique or a tenting technique. In the case where the plating layer is formed only in the via hole VH1, the metal layer M1 is etched to form the second circuit 220 and the third circuit 230. In the case where the plating layer is formed not only in the via hole VH1 but also on the surface of the metal layer M1, the metal layer M1 and the plating layer are etched together to form the second circuit 220 and the third circuit 230.

在通過減成技術或蓋孔技術形成電路的情形中,電路可各自具有精密的節距,且電路的製造成本可得以降低。與此同時,當使用減成技術或蓋孔技術形成電路時,電路的側面可為傾斜的,且電路中的每一者的橫截面積可向外減小。In the case of forming a circuit by a subtractive technology or a cover hole technology, the circuits can each have a precise pitch, and the manufacturing cost of the circuit can be reduced. At the same time, when a circuit is formed using a subtractive technique or a cover hole technique, the side of the circuit may be inclined, and the cross-sectional area of each of the circuits may decrease outward.

參考圖5中的步驟(a),形成第一電路210。可透過減成技術、蓋孔技術、SAP(半加成製程)技術或MSAP(經過修改的半加成製程)技術來形成第一電路210。Referring to step (a) in FIG. 5, the first circuit 210 is formed. The first circuit 210 may be formed by subtractive technology, cap hole technology, SAP (semi-additive process) technology or MSAP (modified semi-additive process) technology.

具體而言,提供拆卸型芯(detach core)(或載體)D,且在拆卸型芯D的一個表面上形成第一電路210。Specifically, a detach core (or carrier) D is provided, and the first circuit 210 is formed on one surface of the detach core D.

拆卸型芯D是最終可拆除的基板,其絕緣材料層的兩個表面上可形成有金屬層。此外,金屬層可各自包括載體金屬層及晶種金屬層S,其中載體金屬層層疊於絕緣材料層上且晶種金屬層S層疊於載體金屬層上。載體金屬層的厚度可小於晶種金屬層S的厚度。在步驟(a)中,圖5僅示出晶種金屬層S,未示出載體金屬層。The detachable core D is a finally removable substrate, and metal layers may be formed on both surfaces of the insulating material layer. In addition, the metal layers may each include a carrier metal layer and a seed metal layer S, where the carrier metal layer is stacked on the insulating material layer and the seed metal layer S is stacked on the carrier metal layer. The thickness of the carrier metal layer may be smaller than the thickness of the seed metal layer S. In step (a), FIG. 5 shows only the seed metal layer S, not the carrier metal layer.

使用拆卸型芯的優勢之一是可同時製造兩個印刷電路板。亦即,如圖5的步驟(a)中所說明,除了拆卸型芯D的一個表面之外,亦可在拆卸型芯D的另一表面上形成與第一電路210相同或類似的電路。在此種情形中,載體金屬層及晶種金屬層S層疊於拆卸型芯D的兩個表面上。One of the advantages of using a removable core is that two printed circuit boards can be manufactured simultaneously. That is, as explained in step (a) of FIG. 5, in addition to disassembling one surface of the core D, a circuit that is the same as or similar to the first circuit 210 may be formed on the other surface of the disassembling core D. In this case, the carrier metal layer and the seed metal layer S are stacked on both surfaces of the detachable core D.

根據減成技術或蓋孔技術,可藉由在晶種金屬層S上形成鍍覆層且然後與抗蝕劑圖案對應地選擇性地蝕刻所述鍍覆層來形成第一電路210。此外,根據SAP技術或MSAP技術,可藉由與抗鍍覆劑的圖案對應地對晶種金屬層S執行選擇性的鍍覆來形成第一電路210。According to the subtractive technique or the capping technique, the first circuit 210 may be formed by forming a plating layer on the seed metal layer S and then selectively etching the plating layer corresponding to the resist pattern. In addition, according to the SAP technology or the MSAP technology, the first circuit 210 may be formed by performing selective plating on the seed metal layer S corresponding to the pattern of the plating resist.

亦可使用與第一電路210相同的技術形成第一接墊410。The first pad 410 can also be formed using the same technique as the first circuit 210.

參考圖5中的步驟(b),在拆卸型芯D上層疊第一絕緣層110。第一絕緣層110覆蓋第一電路210。可在拆卸型芯D的一個表面上層疊第一電路110,且亦可在拆卸型芯D的另一表面上層疊與第一絕緣層110相同或類似的絕緣層。Referring to step (b) in FIG. 5, the first insulating layer 110 is stacked on the detachable core D. The first insulating layer 110 covers the first circuit 210. The first circuit 110 may be laminated on one surface of the detachable core D, and an insulating layer that is the same as or similar to the first insulating layer 110 may also be laminated on the other surface of the detachable core D.

在第一絕緣層110中形成通孔VH2以部分地暴露出第一接墊410。可使用雷射鑽機來形成通孔VH2。CO2 雷射可用作雷射鑽機。通孔VH2的橫截面積可向內減小。A through hole VH2 is formed in the first insulating layer 110 to partially expose the first pad 410. A laser drill can be used to form the through hole VH2. CO 2 laser can be used as a laser rig. The cross-sectional area of the through hole VH2 may decrease inward.

參考圖5中的步驟(c),將導電膏P填充於通孔VH2中。可將導電膏擠壓至通孔VH2中。導電膏P的熔點可低於第一電路210的熔點。Referring to step (c) in FIG. 5, the conductive paste P is filled in the via hole VH2. The conductive paste can be squeezed into the through hole VH2. The melting point of the conductive paste P may be lower than the melting point of the first circuit 210.

參考圖5中的步驟(d),將透過圖4中所說明的步驟製造的單元基板層疊於第一絕緣層110上。單元基板的第二接墊420可定位於導電膏P的上表面上。Referring to step (d) in FIG. 5, the unit substrate manufactured through the steps illustrated in FIG. 4 is laminated on the first insulating layer 110. The second pad 420 of the unit substrate may be positioned on the upper surface of the conductive paste P.

可在高溫環境將單元基板加壓層疊於第一絕緣層110上,且加壓可在高於導電膏P的熔點且低於第一電路210的熔點的溫度下進行。在此種情形中,僅導電膏P被熔融,而第一電路210及第二電路220未被熔融,且在冷卻期間使導電膏P硬化以成為第一通路310。在一系列步驟中,導電膏P用作第一電路210與第二電路220的黏合劑。The unit substrate may be stacked on the first insulating layer 110 under pressure in a high-temperature environment, and the pressing may be performed at a temperature higher than the melting point of the conductive paste P and lower than the melting point of the first circuit 210. In this case, only the conductive paste P is melted, and the first circuit 210 and the second circuit 220 are not melted, and the conductive paste P is hardened to become the first passage 310 during cooling. In a series of steps, the conductive paste P serves as an adhesive for the first circuit 210 and the second circuit 220.

此外,透過圖5的(d)中所示的步驟,將第二電路220及第二接墊420嵌入於第一絕緣層110中。為此,當圖5的(d)中所示的步驟開始時,第一絕緣層110可處於B階段。In addition, through the step shown in (d) of FIG. 5, the second circuit 220 and the second pad 420 are embedded in the first insulating layer 110. For this reason, when the step shown in (d) of FIG. 5 starts, the first insulating layer 110 may be in the B stage.

參考圖5中的步驟(e),移除拆卸型芯D。可通過首先移除除了晶種金屬層S之外的部分且然後蝕刻掉晶種金屬層S來移除拆卸型芯D。具體而言,在首先將載體金屬層與晶種金屬層S彼此分離且然後將晶種金屬層S保留於將成為印刷電路板的一部分處之後,透過單獨的步驟(亦即,蝕刻)移除晶種金屬層S。當蝕刻晶種金屬層S時,可部分地蝕刻第一電路210的下表面(亦即,位於拆卸型芯的一側上的表面)。Referring to step (e) in FIG. 5, the detachable core D is removed. The detachment core D may be removed by first removing a portion other than the seed metal layer S and then etching away the seed metal layer S. Specifically, after first separating the carrier metal layer and the seed metal layer S from each other and then retaining the seed metal layer S where it will become part of the printed circuit board, it is removed by a separate step (ie, etching) Seed metal layer S. When the seed metal layer S is etched, the lower surface of the first circuit 210 (ie, the surface on the side where the core is detached) may be partially etched.

參考圖5中的步驟(f),將阻焊層600層疊於第一絕緣層110及第二絕緣層120上,並在阻焊層600中形成通孔VH3。可透過微影製程來形成通孔VH3,所述微影製程包括曝光及顯影。通孔VH3可暴露出第一接墊410的部分及第三接墊430的部分。Referring to step (f) in FIG. 5, the solder resist layer 600 is stacked on the first insulating layer 110 and the second insulating layer 120, and a via hole VH3 is formed in the solder resist layer 600. The via hole VH3 may be formed through a lithography process, which includes exposure and development. The through hole VH3 may expose a portion of the first pad 410 and a portion of the third pad 430.

參考圖5中的步驟(g),將連接部件500(諸如,焊料凸塊或焊球)耦合於通孔VH3中。連接部件500可與第一接墊410及第三接墊430接合。Referring to step (g) in FIG. 5, the connection member 500 (such as a solder bump or a solder ball) is coupled into the through hole VH3. The connecting member 500 can be engaged with the first pad 410 and the third pad 430.

圖6示出製造根據本發明的實施例的印刷電路板的方法。圖6中所示的方法是使用透過圖4中所示的步驟製造的單元基板來製造印刷電路板的另一方法。6 shows a method of manufacturing a printed circuit board according to an embodiment of the present invention. The method shown in FIG. 6 is another method of manufacturing a printed circuit board using the unit substrate manufactured through the steps shown in FIG. 4.

參考圖6中的步驟(a),提供兩個表面上皆層疊有金屬層M2的絕緣材料100(例如,雙面覆銅層疊板),並在所述絕緣材料中形成通孔VH4。可使用例如雷射鑽機來形成通孔VH4。Referring to step (a) in FIG. 6, an insulating material 100 (for example, a double-sided copper-clad laminate) having a metal layer M2 laminated on both surfaces is provided, and a through hole VH4 is formed in the insulating material. The through hole VH4 may be formed using, for example, a laser drill.

參考圖6中的步驟(b),在通孔VH4內形成貫穿通路100b。此外,在絕緣材料100的表面上形成第一電路210及第四電路240。亦與第一電路210及第四電路240同時地形成第一接墊410及第四接墊440。Referring to step (b) in FIG. 6, a through via 100 b is formed in the through hole VH4. In addition, the first circuit 210 and the fourth circuit 240 are formed on the surface of the insulating material 100. The first pad 410 and the fourth pad 440 are also formed simultaneously with the first circuit 210 and the fourth circuit 240.

參考圖6中的步驟(c),將第一絕緣層110及第三絕緣層130層疊於絕緣材料100上,且分別在第一絕緣層110及第三絕緣層130中形成通孔VH5及通孔VH5’。Referring to step (c) in FIG. 6, the first insulating layer 110 and the third insulating layer 130 are laminated on the insulating material 100, and through holes VH5 and through holes are formed in the first insulating layer 110 and the third insulating layer 130, respectively. Hole VH5'.

參考圖6中的步驟(d),將導電膏P填充於通孔VH5中,且將導電膏P’填充於通孔VH5’中。可將導電膏P、導電膏P’擠壓至通孔VH5、通孔VH5’中。導電膏P、導電膏P’的熔點可低於第一電路210(或第四電路240)的熔點。Referring to step (d) in FIG. 6, the conductive paste P is filled in the through hole VH5, and the conductive paste P'is filled in the through hole VH5'. The conductive paste P and the conductive paste P'may be pressed into the through holes VH5 and VH5'. The melting point of the conductive paste P and the conductive paste P'may be lower than the melting point of the first circuit 210 (or the fourth circuit 240).

參考圖6中的步驟(e),將單元基板層疊於第一絕緣層110及第三絕緣層130中的每一者上。可透過圖4中所示的步驟製造單元基板。第一絕緣層110可與包括第二絕緣層120的單元基板層疊在一起,且第三絕緣層130可與包括第四絕緣層140的單元基板層疊在一起。當單元基板被層疊時,第二接墊420對應於導電膏P,且第五接墊450對應於導電膏P’。Referring to step (e) in FIG. 6, the unit substrate is stacked on each of the first insulating layer 110 and the third insulating layer 130. The unit substrate can be manufactured through the steps shown in FIG. 4. The first insulating layer 110 may be stacked with the unit substrate including the second insulating layer 120, and the third insulating layer 130 may be stacked with the unit substrate including the fourth insulating layer 140. When the unit substrates are stacked, the second pad 420 corresponds to the conductive paste P, and the fifth pad 450 corresponds to the conductive paste P'.

可在高溫環境下將單元基板加壓層疊於第一絕緣層110及第三絕緣層130中的每一者上,且加壓可在高於導電膏P、導電膏P’的熔點且低於第一電路210(或第四電路240)的熔點的溫度下進行。在此種情形中,僅導電膏P、導電膏P’被熔融,而第一電路210(或第四電路240)未被熔融,且在冷卻期間使導電膏P硬化以成為第一通路310,且在冷卻期間使導電膏P’硬化以成為第三通路330。The unit substrate can be laminated on each of the first insulating layer 110 and the third insulating layer 130 under high temperature environment, and the pressure can be higher than the melting point of the conductive paste P and the conductive paste P'and lower than The temperature of the melting point of the first circuit 210 (or the fourth circuit 240) is performed. In this case, only the conductive paste P and the conductive paste P'are melted, and the first circuit 210 (or the fourth circuit 240) is not melted, and the conductive paste P is hardened to become the first passage 310 during cooling. And during the cooling period, the conductive paste P′ is hardened to become the third via 330.

此外,第二電路220嵌入於第一絕緣層110中,且第五電路250嵌入於第三絕緣層130中。In addition, the second circuit 220 is embedded in the first insulating layer 110 and the fifth circuit 250 is embedded in the third insulating layer 130.

參考圖6中的步驟(f),將阻焊層600層疊於第二絕緣層120及第四絕緣層140中的每一者上,且在阻焊層600中形成通孔VH6。可透過微影製程來形成通孔VH6,所述微影製程包括曝光及顯影。通孔VH6可暴露出第三接墊430的部分及第六接墊460的部分。Referring to step (f) in FIG. 6, the solder resist layer 600 is stacked on each of the second insulating layer 120 and the fourth insulating layer 140, and a via hole VH6 is formed in the solder resist layer 600. The via hole VH6 may be formed through a lithography process including exposure and development. The through hole VH6 may expose a portion of the third pad 430 and a portion of the sixth pad 460.

參考圖6中的步驟(g),可將連接部件500(諸如,焊料凸塊或焊球)耦合於通孔VH6內。連接部件500可與第三接墊430及第六接墊460接合。可藉由將焊接材料插入於通孔VH6中且然後執行迴焊製程來形成連接部件500。Referring to step (g) in FIG. 6, the connection member 500 (such as a solder bump or a solder ball) may be coupled into the through hole VH6. The connecting member 500 can be engaged with the third pad 430 and the sixth pad 460. The connection member 500 may be formed by inserting solder material into the through hole VH6 and then performing a reflow process.

圖7及圖8示出製造根據本發明的實施例的印刷電路板的方法。7 and 8 illustrate a method of manufacturing a printed circuit board according to an embodiment of the present invention.

圖7示出形成與圖4中所示的單元基板不同的單元基板的步驟,且圖8示出使用透過圖7中所示的步驟所製備的單元基板來製造印刷電路板的步驟。7 shows a step of forming a unit substrate different from the unit substrate shown in FIG. 4, and FIG. 8 shows a step of manufacturing a printed circuit board using the unit substrate prepared through the steps shown in FIG. 7.

參考圖7,在第二絕緣層120上形成第二電路220及第三電路230,且在第二絕緣層120中形成通孔VH7。未使用通路來填充通孔VH7。Referring to FIG. 7, the second circuit 220 and the third circuit 230 are formed on the second insulating layer 120, and the through hole VH7 is formed in the second insulating layer 120. Vias are not used to fill vias VH7.

圖8中的步驟(a)與圖6中的步驟(a)相同,且圖8中的步驟(b)與圖6中的步驟(b)相同。Step (a) in FIG. 8 is the same as step (a) in FIG. 6, and step (b) in FIG. 8 is the same as step (b) in FIG. 6.

參考圖8中的步驟(c)及步驟(d),將第一絕緣層110及第三絕緣層130層疊於絕緣材料100的兩個表面上,且分別在第一絕緣層110及第三絕緣層130中形成通孔VH5及通孔VH5’。可首先將每一者皆包括金屬層M3的第一絕緣層110及第三絕緣層130層疊於絕緣材料110上,且然後可在形成通孔VH5、通孔VH5’之後,藉由例如蝕刻來移除金屬層M3。Referring to step (c) and step (d) in FIG. 8, the first insulating layer 110 and the third insulating layer 130 are laminated on both surfaces of the insulating material 100, and are respectively insulated on the first insulating layer 110 and the third insulating layer 100 In the layer 130, a via hole VH5 and a via hole VH5' are formed. The first insulating layer 110 and the third insulating layer 130 each of which includes the metal layer M3 may be first stacked on the insulating material 110, and then may be formed by, for example, etching after forming the vias VH5, VH5' Remove the metal layer M3.

參考圖8中的步驟(e),將單元基板層疊於第一絕緣層110及第三絕緣層130中的每一者上。在此,形成於第二絕緣層120中的通孔VH7對應於形成於第一絕緣層110中的通孔VH5,且形成於第四絕緣層140中的通孔VH7’對應於形成於第三絕緣層130中的通孔VH5’。Referring to step (e) in FIG. 8, the unit substrate is stacked on each of the first insulating layer 110 and the third insulating layer 130. Here, the via hole VH7 formed in the second insulating layer 120 corresponds to the via hole VH5 formed in the first insulating layer 110, and the via hole VH7' formed in the fourth insulating layer 140 corresponds to the third hole formed in the third The through hole VH5' in the insulating layer 130.

參考圖8中的步驟(f),在第二絕緣層120及第四絕緣層140的每一者上形成阻焊層600,且然後在使阻焊層600形成有暴露出第三接墊430及第六接墊460的開口之後,將導電膏P整體地填充於通孔VH5、通孔VH7及阻焊層600的開口中。此外,將導電膏整體地填充於通孔VH5’、通孔VH7’及阻焊層600的開口中。將整體填充的導電膏熔融,且然後冷卻以成為整合式通路350、整合式通路360。Referring to step (f) in FIG. 8, a solder resist layer 600 is formed on each of the second insulating layer 120 and the fourth insulating layer 140, and then the solder resist layer 600 is formed with the exposed third pad 430 After the opening of the sixth pad 460, the conductive paste P is entirely filled in the openings of the via holes VH5, VH7, and the solder resist layer 600. In addition, the conductive paste is entirely filled in the openings of the via holes VH5', the via holes VH7', and the solder resist layer 600. The integrally filled conductive paste is melted and then cooled to become the integrated channel 350 and the integrated channel 360.

參考圖8中的步驟(g),將連接部件500(諸如,焊料凸塊或焊球)耦合至整合式通路350、整合式通路360。Referring to step (g) in FIG. 8, the connection member 500 (such as a solder bump or a solder ball) is coupled to the integrated via 350 and the integrated via 360.

雖然本發明包括具體的實例,但熟習此項技術者應明瞭可在不背離申請專利範圍及其等效形式的精神及範疇的情況下對該些實例做出各種形式及細節上的改變。本文中所述的實例僅應被視為具說明意義,並不應出於限制目的。對每一實例中的特徵或態樣的說明應被視為適用於其他實例中的類似特徵或態樣。若以不同的次序執行所述技術,及/或若以不同的方式組合及/或藉由其他組件或其等效形式替代或補充所述系統、架構、裝置或電路中的組件,則可達成合適的結果。因此,本發明的範疇並不是由所述詳細說明界定,而是由申請專利範圍及其等效形式界定,且在申請專利範圍及其等效形式的範疇內的所有的變化應被理解為包含於本發明中。Although the present invention includes specific examples, those skilled in the art should understand that various changes in form and details can be made to these examples without departing from the spirit and scope of the scope of the patent application and its equivalents. The examples described in this article should only be regarded as illustrative and not for restrictive purposes. The description of the features or aspects in each instance should be considered applicable to similar features or aspects in other instances. This can be achieved if the techniques are performed in a different order, and/or if the components in the system, architecture, device, or circuit are replaced or supplemented in different ways and/or by other components or their equivalents Appropriate results. Therefore, the scope of the present invention is not defined by the detailed description, but by the scope of the patent application and its equivalent forms, and all changes within the scope of the patent scope and its equivalent forms should be understood to include In the present invention.

100‧‧‧絕緣材料 100a‧‧‧加強材 100b‧‧‧貫穿通路 110‧‧‧第一絕緣層 120‧‧‧第二絕緣層 130‧‧‧第三絕緣層 140‧‧‧第四絕緣層 210‧‧‧第一電路 220‧‧‧第二電路 230‧‧‧第三電路 240‧‧‧第四電路 250‧‧‧第五電路 260‧‧‧第六電路 310‧‧‧第一通路 320‧‧‧第二通路 330‧‧‧第三通路 340‧‧‧第四通路 350、360‧‧‧整合式通路 410‧‧‧第一接墊 420‧‧‧第二接墊 430‧‧‧第三接墊 440‧‧‧第四接墊 450‧‧‧第五接墊 460‧‧‧第六接墊 500‧‧‧連接部件 600‧‧‧阻焊層 (a)、(b)、(c)、(d)、(e)、(f)、(g)‧‧‧步驟 D‧‧‧拆卸型芯 M1、M2、M3‧‧‧金屬層 P、P’‧‧‧導電膏 S‧‧‧晶種金屬層 VH1、VH2、VH3、VH4、VH5、VH5’、VH6、VH7、VH7’‧‧‧通孔100‧‧‧Insulation material 100a‧‧‧reinforcement 100b‧‧‧Through the passage 110‧‧‧First insulation layer 120‧‧‧Second insulation layer 130‧‧‧The third insulating layer 140‧‧‧ Fourth insulation 210‧‧‧ First Circuit 220‧‧‧ Second circuit 230‧‧‧ Third Circuit 240‧‧‧ Fourth Circuit 250‧‧‧ fifth circuit 260‧‧‧Sixth circuit 310‧‧‧ First Path 320‧‧‧Second access 330‧‧‧The third channel 340‧‧‧ Fourth Path 350, 360‧‧‧Integrated access 410‧‧‧ First pad 420‧‧‧Second pad 430‧‧‧The third pad 440‧‧‧The fourth pad 450‧‧‧ fifth pad 460‧‧‧Sixth pad 500‧‧‧Connecting parts 600‧‧‧solder mask (A), (b), (c), (d), (e), (f), (g) ‧‧‧ steps D‧‧‧Disassembled core M1, M2, M3 ‧‧‧ metal layer P, P’‧‧‧ conductive paste S‧‧‧Seed metal layer VH1, VH2, VH3, VH4, VH5, VH5’, VH6, VH7, VH7’‧‧‧Through hole

圖1示出根據本發明的實施例的印刷電路板。 圖2示出根據本發明的實施例的印刷電路板。 圖3示出根據本發明的實施例的印刷電路板。 圖4及圖5示出製造根據本發明的實施例的印刷電路板的方法。 圖6示出製造根據本發明的實施例的印刷電路板的方法。 圖7及圖8示出製造根據本發明的實施例的印刷電路板的方法。FIG. 1 shows a printed circuit board according to an embodiment of the present invention. 2 shows a printed circuit board according to an embodiment of the present invention. FIG. 3 shows a printed circuit board according to an embodiment of the present invention. 4 and 5 illustrate a method of manufacturing a printed circuit board according to an embodiment of the present invention. 6 shows a method of manufacturing a printed circuit board according to an embodiment of the present invention. 7 and 8 illustrate a method of manufacturing a printed circuit board according to an embodiment of the present invention.

110‧‧‧第一絕緣層 110‧‧‧First insulation layer

120‧‧‧第二絕緣層 120‧‧‧Second insulation layer

210‧‧‧第一電路 210‧‧‧ First Circuit

220‧‧‧第二電路 220‧‧‧ Second circuit

230‧‧‧第三電路 230‧‧‧ Third Circuit

310‧‧‧第一通路 310‧‧‧ First Path

320‧‧‧第二通路 320‧‧‧Second access

410‧‧‧第一接墊 410‧‧‧ First pad

420‧‧‧第二接墊 420‧‧‧Second pad

430‧‧‧第三接墊 430‧‧‧The third pad

500‧‧‧連接部件 500‧‧‧Connecting parts

600‧‧‧阻焊層 600‧‧‧solder mask

Claims (19)

一種印刷電路板,包括: 第一絕緣層; 第二絕緣層,由撓性材料製成且層疊於所述第一絕緣層上; 第一電路,形成於所述第一絕緣層的下表面上且嵌入於所述第一絕緣層中; 第二電路,形成於所述第二絕緣層的下表面上且層疊於所述第一絕緣層中;以及 第三電路,形成於所述第二絕緣層的上表面上, 其中所述第二電路的節距小於所述第一電路的節距。A printed circuit board, including: First insulating layer; A second insulating layer made of flexible material and laminated on the first insulating layer; A first circuit formed on the lower surface of the first insulating layer and embedded in the first insulating layer; A second circuit formed on the lower surface of the second insulating layer and stacked in the first insulating layer; and A third circuit formed on the upper surface of the second insulating layer, The pitch of the second circuit is smaller than the pitch of the first circuit. 根據申請專利範圍第1項所述的印刷電路板,其中所述第三電路的節距小於所述第一電路的所述節距。The printed circuit board according to item 1 of the patent application scope, wherein the pitch of the third circuit is smaller than the pitch of the first circuit. 根據申請專利範圍第1項所述的印刷電路板,其中所述第三電路在所述第二絕緣層的所述上表面上向外突出。The printed circuit board according to item 1 of the patent application scope, wherein the third circuit protrudes outward on the upper surface of the second insulating layer. 根據申請專利範圍第1項所述的印刷電路板,其中所述第一絕緣層是由剛性材料製成。The printed circuit board according to item 1 of the patent application scope, wherein the first insulating layer is made of a rigid material. 根據申請專利範圍第1項所述的印刷電路板,更包括: 第一通路,穿透所述第一絕緣層且被配置成電性連接所述第一電路與所述第二電路;以及 第二通路,穿透所述第二絕緣層且被配置成電性連接所述第二電路與所述第三電路。The printed circuit board according to item 1 of the scope of patent application further includes: A first via that penetrates the first insulating layer and is configured to electrically connect the first circuit and the second circuit; and The second via penetrates the second insulating layer and is configured to electrically connect the second circuit and the third circuit. 根據申請專利範圍第5項所述的印刷電路板,其中所述第一通路的熔點低於所述第一電路的熔點。The printed circuit board according to item 5 of the patent application range, wherein the melting point of the first via is lower than the melting point of the first circuit. 根據申請專利範圍第5項所述的印刷電路板,其中所述第一通路的熔點低於所述第二通路的熔點。The printed circuit board according to item 5 of the patent application range, wherein the melting point of the first via is lower than the melting point of the second via. 根據申請專利範圍第5項所述的印刷電路板,其中第一接墊耦合至所述第一通路的下表面, 其中第二接墊耦合至所述第二通路的下表面, 其中第三接墊耦合至所述第二通路的上表面, 其中所述第一接墊及所述第二接墊嵌入於所述第一絕緣層中,且 其中所述第三接墊自所述第二通路的所述上表面向外突出。The printed circuit board according to item 5 of the patent application scope, wherein the first pad is coupled to the lower surface of the first via, Wherein the second pad is coupled to the lower surface of the second path, The third pad is coupled to the upper surface of the second path, Wherein the first pad and the second pad are embedded in the first insulating layer, and The third pad protrudes outward from the upper surface of the second passage. 根據申請專利範圍第8項所述的印刷電路板,其中連接部件耦合至所述第一接墊及所述第三接墊中的每一者。The printed circuit board according to item 8 of the patent application range, wherein the connection member is coupled to each of the first pad and the third pad. 根據申請專利範圍第1項所述的印刷電路板,更包括阻焊層,所述阻焊層層疊於所述第一絕緣層的所述下表面及所述第二絕緣層的所述上表面上。The printed circuit board according to item 1 of the patent application scope further includes a solder resist layer laminated on the lower surface of the first insulating layer and the upper surface of the second insulating layer on. 根據申請專利範圍第1項所述的印刷電路板,更包括絕緣材料,所述絕緣材料層疊於所述第一絕緣層的所述下表面上, 其中所述第一電路位於所述絕緣材料的上表面上。The printed circuit board according to item 1 of the scope of the patent application further includes an insulating material, the insulating material is laminated on the lower surface of the first insulating layer, The first circuit is located on the upper surface of the insulating material. 根據申請專利範圍第11項所述的印刷電路板,其中所述絕緣材料中含有加強材。The printed circuit board according to item 11 of the patent application scope, wherein the insulating material contains a reinforcing material. 根據申請專利範圍第11項所述的印刷電路板,更包括: 第三絕緣層,層疊於所述絕緣材料的下表面上且由剛性材料製成;以及 第四絕緣層,層疊於所述第三絕緣層的下表面上且由撓性材料製成。According to the printed circuit board described in item 11 of the patent application scope, it further includes: A third insulating layer laminated on the lower surface of the insulating material and made of a rigid material; and The fourth insulating layer is laminated on the lower surface of the third insulating layer and is made of a flexible material. 根據申請專利範圍第13項所述的印刷電路板,更包括: 第四電路,形成於所述絕緣材料的所述下表面上以嵌入於所述第三絕緣層中;以及 第五電路,形成於所述第四絕緣層的一個表面上以嵌入於所述第三絕緣層中, 其中所述第五電路的節距小於所述第四電路的節距。According to the printed circuit board described in item 13 of the patent application scope, it further includes: A fourth circuit formed on the lower surface of the insulating material to be embedded in the third insulating layer; and A fifth circuit formed on one surface of the fourth insulating layer to be embedded in the third insulating layer, The pitch of the fifth circuit is smaller than the pitch of the fourth circuit. 根據申請專利範圍第14項所述的印刷電路板,更包括第六電路,所述第六電路形成於所述第四絕緣層的另一表面上以向外突出,以被定位成與所述第五電路相對, 其中所述第六電路的節距小於所述第四電路的節距。The printed circuit board according to item 14 of the scope of the patent application further includes a sixth circuit formed on the other surface of the fourth insulating layer to protrude outward to be positioned in line with the The fifth circuit is opposite, The pitch of the sixth circuit is smaller than the pitch of the fourth circuit. 根據申請專利範圍第14項所述的印刷電路板,更包括貫穿通路,所述貫穿通路穿透所述絕緣材料以電性連接所述第一電路與所述第四電路。The printed circuit board according to item 14 of the patent application scope further includes a through-hole, the through-hole penetrates the insulating material to electrically connect the first circuit and the fourth circuit. 根據申請專利範圍第13項所述的印刷電路板,更包括阻焊層,所述阻焊層層疊於所述第二絕緣層的所述上表面及所述第四絕緣層的下表面上。The printed circuit board according to item 13 of the patent application scope further includes a solder resist layer laminated on the upper surface of the second insulating layer and the lower surface of the fourth insulating layer. 根據申請專利範圍第11項所述的印刷電路板,更包括通路,所述通路整體地穿透所述第一絕緣層及所述第二絕緣層以與所述第一電路電性連接。The printed circuit board according to item 11 of the scope of the patent application further includes a via, which entirely penetrates the first insulating layer and the second insulating layer to be electrically connected to the first circuit. 根據申請專利範圍第18項所述的印刷電路板,其中所述通路的熔點低於所述第一電路的熔點。The printed circuit board of claim 18, wherein the melting point of the via is lower than the melting point of the first circuit.
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