TW201804886A - Wiring substrate for fingerprint sensor - Google Patents

Wiring substrate for fingerprint sensor Download PDF

Info

Publication number
TW201804886A
TW201804886A TW106117388A TW106117388A TW201804886A TW 201804886 A TW201804886 A TW 201804886A TW 106117388 A TW106117388 A TW 106117388A TW 106117388 A TW106117388 A TW 106117388A TW 201804886 A TW201804886 A TW 201804886A
Authority
TW
Taiwan
Prior art keywords
layer
fingerprint sensor
electrode
insulating layer
pad electrode
Prior art date
Application number
TW106117388A
Other languages
Chinese (zh)
Other versions
TWI651026B (en
Inventor
馬場雄大
野口澄子
Original Assignee
京瓷股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京瓷股份有限公司 filed Critical 京瓷股份有限公司
Publication of TW201804886A publication Critical patent/TW201804886A/en
Application granted granted Critical
Publication of TWI651026B publication Critical patent/TWI651026B/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06VIMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12Fingerprints or palmprints
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10151Sensor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Theoretical Computer Science (AREA)
  • Measurement Of The Respiration, Hearing Ability, Form, And Blood Characteristics Of Living Organisms (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Image Input (AREA)
  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)

Abstract

A wiring substrate 100 for fingerprint sensor of this disclosure including an insulating substrate 1 formed by laminating a plurality of insulating layers 1a and 1b, a plurality of surface layer strip electrodes 6 for fingerprint reading formed on the uppermost insulating layer 1b and disposed in parallel along a first direction, a plurality of inner layer strip electrodes 8 for fingerprint reading formed on next insulating layer 1a in contact with the uppermost insulating layer 1b and are disposed in parallel along a second direction orthogonal to the first direction, a pad electrode 7 formed on the uppermost insulating layer 1b and disposed on the inner layer strip electrodes 8 and between the adjacent surface layer strip electrodes 6, and a via conductor 9 for electrically connecting the pad electrode 7 and the inner layer strip electrode 8, wherein the via conductor 9 is an oval shape longer in the first direction in top view.

Description

指紋感測器用佈線基板 Wiring substrate for fingerprint sensor

本公開關於指紋感測器用佈線基板。 The present disclosure relates to a wiring substrate for a fingerprint sensor.

現有的指紋感測器用佈線基板由基板、被覆在該基板的表面的佈線導體、以及被覆在該佈線導體的表面的阻焊層構成(日本特開2001-46359號公報)。 A conventional wiring substrate for a fingerprint sensor is composed of a substrate, a wiring conductor covering the surface of the substrate, and a solder resist layer covering the surface of the wiring conductor (JP-A-2001-46359).

本公開的指紋感測器用佈線基板具備:絕緣基板,係複數個絕緣層被積層而構成;指紋讀取用的複數條表層帶狀電極,形成在最上層的前述絕緣層上,沿著第1方向並排設置;指紋讀取用的複數條內層帶狀電極,形成在與最上層的前述絕緣層相接的次層的前述絕緣層上,沿著與前述第1方向正交的第2方向並排設置;焊盤電極,形成在最上層的前述絕緣層上,配置在前述內層帶狀電極上、且在相鄰的前述表層帶狀電極彼此之間;以及導孔導體,將前述焊盤電極與前述內層帶狀電極電連接。前述導孔導體是在俯視下在前述第1方向上較長的長圓形狀。 The wiring substrate for a fingerprint sensor of the present invention includes: an insulating substrate in which a plurality of insulating layers are laminated; and a plurality of surface layer strip electrodes for fingerprint reading are formed on the insulating layer of the uppermost layer, along the first The direction is arranged side by side; a plurality of inner strip electrodes for fingerprint reading are formed on the insulating layer of the sub-layer in contact with the uppermost insulating layer, along a second direction orthogonal to the first direction Side by side; pad electrodes are formed on the uppermost insulating layer, disposed on the inner strip electrodes and adjacent to the surface strip electrodes; and via conductors The electrode is electrically connected to the inner strip electrode. The via-hole conductor has an elongated shape that is long in the first direction in plan view.

1‧‧‧絕緣基板 1‧‧‧Insert substrate

1a、1b‧‧‧絕緣層 1a, 1b‧‧‧ insulation

2、2a、2b、2c、2d‧‧‧佈線導體 2, 2a, 2b, 2c, 2d‧‧‧ wiring conductor

3‧‧‧阻焊層 3‧‧‧ solder mask

4‧‧‧通孔 4‧‧‧through hole

5‧‧‧導孔 5‧‧‧ Guide hole

5a‧‧‧導孔 5a‧‧‧Guide

6‧‧‧表層帶狀電極 6‧‧‧Surface strip electrode

7‧‧‧焊盤電極 7‧‧‧Pad electrode

8‧‧‧內層帶狀電極 8‧‧‧ Inner layer strip electrode

9‧‧‧導孔導體 9‧‧‧ Guide hole conductor

10‧‧‧外部連接焊盤 10‧‧‧External connection pads

21‧‧‧支撐基板 21‧‧‧Support substrate

22‧‧‧載體銅箔 22‧‧‧ Carrier copper foil

23‧‧‧銅箔 23‧‧‧ copper foil

24‧‧‧附有載體銅箔 24‧‧‧with carrier copper foil

100、100’‧‧‧指紋感測器用佈線基板 100, 100'‧‧‧Wiring substrate for fingerprint sensor

第1圖是表示本公開的指紋感測器用佈線基板的實施方式的一例的剖視示意圖。 FIG. 1 is a schematic cross-sectional view showing an example of an embodiment of a wiring substrate for a fingerprint sensor according to the present disclosure.

第2圖是表示本公開的指紋感測器用佈線基板的實施方式的一例中的表層帶狀電極以及焊盤電極的俯視圖。 FIG. 2 is a plan view showing a surface strip electrode and a pad electrode in an example of the embodiment of the wiring substrate for a fingerprint sensor of the present disclosure.

第3圖是表示本公開的指紋感測器用佈線基板的實施方式的一例中的內層帶狀電極的俯視圖。 FIG. 3 is a plan view showing an inner layer strip electrode in an example of the embodiment of the wiring substrate for a fingerprint sensor of the present disclosure.

第4圖是表示本公開的指紋感測器用佈線基板的實施方式的一例中的表層帶狀電極以及焊盤電極與內層帶狀電極上下重疊的狀態的俯視圖。 FIG. 4 is a plan view showing a state in which the surface layer strip electrode and the pad electrode and the inner layer strip electrode are vertically overlapped in the example of the embodiment of the wiring substrate for a fingerprint sensor of the present disclosure.

第5圖是表示本公開的指紋感測器用佈線基板的實施方式的另一例的剖視示意圖。 Fig. 5 is a schematic cross-sectional view showing another example of the embodiment of the wiring substrate for a fingerprint sensor of the present disclosure.

第6A至6E圖是用於說明第5圖所示的指紋感測器用佈線基板的製造方法的每個步驟的剖視示意圖。 6A to 6E are schematic cross-sectional views for explaining each step of the method of manufacturing the wiring substrate for a fingerprint sensor shown in Fig. 5.

第7F至7J圖是用於說明第5圖所示的指紋感測器用佈線基板的製造方法的每個步驟的剖視示意圖。 7F to 7J are schematic cross-sectional views for explaining each step of the method of manufacturing the wiring substrate for a fingerprint sensor shown in Fig. 5.

參照第1圖~第4圖來說明本公開的指紋感測器用佈線基板的實施方式的一例。如第1圖所示,本例的佈線基板100具備絕緣基板1、佈線導體2、以及阻焊層3。 An example of an embodiment of the wiring substrate for a fingerprint sensor of the present disclosure will be described with reference to FIGS. 1 to 4 . As shown in FIG. 1, the wiring board 100 of this example is provided with the insulating substrate 1, the wiring conductor 2, and the soldering resist layer 3.

絕緣基板1是在核心絕緣層1a的上下表面積層了增層(buildup)絕緣層1b而構成的。核心絕緣層1a例如由加入了玻璃纖維布的熱固化性樹脂構成。增層絕緣 層1b例如由沒有玻璃纖維布的熱固化性樹脂構成。作為這些絕緣層用的熱固化性樹脂,使用環氧樹脂、雙馬來醯亞胺三

Figure TW201804886AD00001
樹脂等。熱固化性樹脂之中分散有氫氧化鋁、二氧化矽等的無機絕緣物填料。 The insulating substrate 1 is formed by laminating an insulating layer 1b on the upper and lower surface areas of the core insulating layer 1a. The core insulating layer 1a is made of, for example, a thermosetting resin to which a glass cloth is added. The build-up insulating layer 1b is made of, for example, a thermosetting resin having no glass cloth. As the thermosetting resin for these insulating layers, epoxy resin, bismaleimide III is used.
Figure TW201804886AD00001
Resin, etc. An inorganic filler filler such as aluminum hydroxide or cerium oxide is dispersed in the thermosetting resin.

核心絕緣層1a的厚度為30~400μm。在核心絕緣層1a形成有複數個通孔4。通孔4的直徑為70~100μm左右。增層絕緣層1b的厚度為10~20μm。在增層絕緣層1b形成有複數個導孔5。導孔5的直徑為20~70μm。 The core insulating layer 1a has a thickness of 30 to 400 μm. A plurality of through holes 4 are formed in the core insulating layer 1a. The diameter of the through hole 4 is about 70 to 100 μm. The buildup insulating layer 1b has a thickness of 10 to 20 μm. A plurality of via holes 5 are formed in the build-up insulating layer 1b. The diameter of the guide hole 5 is 20 to 70 μm.

佈線導體2被覆在核心絕緣層1a的上下表面及通孔4內、以及增層絕緣層1b的表面及導孔5內。佈線導體2例如由鍍銅構成。對於佈線導體2的厚度,如果是被覆在核心絕緣層1a的上下表面的佈線導體,則為10~20μm,如果是被覆在增層絕緣層1b的表面的佈線導體,則為5~50μm。 The wiring conductor 2 is coated on the upper and lower surfaces of the core insulating layer 1a and the through hole 4, and on the surface of the build-up insulating layer 1b and the via hole 5. The wiring conductor 2 is made of, for example, copper plating. The thickness of the wiring conductor 2 is 10 to 20 μm in the case of the wiring conductor covering the upper and lower surfaces of the core insulating layer 1a, and is 5 to 50 μm in the case of the wiring conductor covering the surface of the build-up insulating layer 1b.

在上表面側的增層絕緣層1b的表面所被覆的佈線導體2的一部分形成指紋讀取用的表層帶狀電極6。如第2圖所示,表層帶狀電極6是在端部具有連接盤6a的細的帶狀的圖案,複數條的表層帶狀電極6沿著第1方向平行地並排設置。表層帶狀電極6的帶狀圖案部的寬度為5~20μm左右,彼此相鄰的帶狀圖案部相互的間隔為50~65μm左右。 A part of the wiring conductor 2 covered on the surface of the build-up insulating layer 1b on the upper surface side forms the surface strip electrode 6 for fingerprint reading. As shown in Fig. 2, the surface strip electrode 6 has a thin stripe pattern having lands 6a at its ends, and a plurality of surface strip electrodes 6 are arranged in parallel along the first direction. The strip-shaped pattern portion of the surface strip electrode 6 has a width of about 5 to 20 μm, and the interval between the strip-shaped pattern portions adjacent to each other is about 50 to 65 μm.

在上表面側的增層絕緣層1b的表面所被覆的佈線導體2的一部分,係在表層帶狀電極6相互之間具有複數個焊盤電極7。焊盤電極7的沿著第1方向的尺寸 為40~65μm左右,沿著與其正交的第2方向的尺寸為30~45μm左右,與表層帶狀電極6的間隔為10~20μm。該焊盤電極7位於後述的內層帶狀電極8上。焊盤電極7是短徑為20~40μm、長徑為30~60μm的長圓形狀。焊盤電極7經由在第1方向上較長的長圓形的導孔5a內所充填的導孔導體9而連接於內層帶狀電極8。 A part of the wiring conductor 2 covered on the surface of the build-up insulating layer 1b on the upper surface side has a plurality of pad electrodes 7 between the surface strip electrodes 6. Dimension of the pad electrode 7 along the first direction The size is about 40 to 65 μm, the size in the second direction orthogonal thereto is about 30 to 45 μm, and the distance from the surface strip electrode 6 is 10 to 20 μm. This pad electrode 7 is located on the inner layer strip electrode 8 which will be described later. The pad electrode 7 has an oblong shape with a short diameter of 20 to 40 μm and a long diameter of 30 to 60 μm. The pad electrode 7 is connected to the inner strip electrode 8 via a via conductor 9 filled in an elongated circular via 5a that is long in the first direction.

焊盤電極7是與導孔導體9相同或者相似的形狀的長圓形。較佳為,導孔導體9是短徑以及長徑比焊盤電極7小的長圓形狀。焊盤電極7的短徑為20~25μm,長徑為30~40μm為佳。此外,較佳為導孔導體9的上表面整體被覆在焊盤電極7。 The pad electrode 7 is an oblong shape having the same or similar shape as the via-hole conductor 9. Preferably, the via-hole conductor 9 has an elliptical shape having a short diameter and a small diameter smaller than that of the pad electrode 7. The pad electrode 7 preferably has a short diameter of 20 to 25 μm and a long diameter of 30 to 40 μm. Further, it is preferable that the entire upper surface of the via conductor 9 is covered on the pad electrode 7.

再有,在本公開中,所謂長圓形的概念在於,不僅包含第2圖所示的這種形狀,還包含橢圓形、蛋形。 Further, in the present disclosure, the concept of an oblong shape includes not only the shape shown in FIG. 2 but also an elliptical shape and an egg shape.

如第1圖所示,在核心絕緣層1a的上表面所被覆的佈線導體2的一部分形成指紋讀取用的內層帶狀電極8。如第3圖所示,內層帶狀電極8是在端部具有連接盤8a的細的帶狀的圖案,沿著與第1方向成直角的第2方向而平行地並排設置。內層帶狀電極8的帶狀圖案部的寬度為30~65μm左右,彼此相鄰的帶狀圖案相互的間隔為15~40μm左右。 As shown in Fig. 1, a part of the wiring conductor 2 covered on the upper surface of the core insulating layer 1a forms an inner layer strip electrode 8 for fingerprint reading. As shown in Fig. 3, the inner layer strip electrode 8 has a thin stripe pattern having lands 8a at the end portions, and is arranged in parallel along the second direction at right angles to the first direction. The strip-shaped pattern portion of the inner layer strip electrode 8 has a width of about 30 to 65 μm, and the interval between the adjacent strip-shaped patterns is about 15 to 40 μm.

如第4圖所示,表層帶狀電極6與內層帶狀電極8在上下重疊,使得在相互正交的方向上交叉。焊盤電極7與表層帶狀電極6的水平間隔為5~20μm。 As shown in Fig. 4, the surface strip electrode 6 and the inner strip electrode 8 are vertically overlapped so as to intersect each other in the direction orthogonal to each other. The horizontal interval between the pad electrode 7 and the surface strip electrode 6 is 5 to 20 μm.

如第1圖所示,在下表面側的增層絕緣層 1b的表面所被覆的佈線導體2的一部分形成外部連接焊盤10。外部連接焊盤10是直徑為200~500μm的圓形。外部連接焊盤10與表層帶狀電極6以及內層帶狀電極8的預定的部件彼此經由佈線導體2而電連接。 As shown in Figure 1, the build-up insulating layer on the lower surface side A part of the wiring conductor 2 covered by the surface of 1b forms the external connection pad 10. The external connection pad 10 is a circle having a diameter of 200 to 500 μm. The predetermined members of the external connection pad 10 and the surface strip electrode 6 and the inner layer strip electrode 8 are electrically connected to each other via the wiring conductor 2.

被覆阻焊層3,以使得覆蓋上表面側以及下表面側的增層絕緣層1b及其表面的佈線導體2。阻焊層3由熱固化性樹脂構成。在阻焊層3中作為填料而分散有二氧化矽粉末。阻焊層3的厚度在佈線導體2的表面上為5~20μm左右。上表面側的阻焊層3完全覆蓋佈線導體2。下表面側的阻焊層3具有使外部連接焊盤10露出的開口部。 The solder resist layer 3 is coated so as to cover the build-up insulating layer 1b on the upper surface side and the lower surface side and the wiring conductor 2 on the surface thereof. The solder resist layer 3 is composed of a thermosetting resin. The cerium oxide powder is dispersed as a filler in the solder resist layer 3. The thickness of the solder resist layer 3 is about 5 to 20 μm on the surface of the wiring conductor 2. The solder resist layer 3 on the upper surface side completely covers the wiring conductor 2. The solder resist layer 3 on the lower surface side has an opening portion through which the external connection pads 10 are exposed.

若將手指放置在該指紋感測器用佈線基板100的上表面從而對表層帶狀電極6施加電壓,則在隔著上表面側的阻焊層3而對置的表層帶狀電極6與手指的表面之間形成靜電電容。該靜電電容在指紋的凸部較大,在指紋的凹部較小。藉由對複數個表層帶狀電極6與複數個內層帶狀電極7依次施加電壓並進行掃描來檢測該靜電電容的差,並在外部的處理器對其進行運算処理由此能夠讀取出指紋。 When a finger is placed on the upper surface of the fingerprint sensor wiring substrate 100 to apply a voltage to the surface strip electrode 6, the surface strip electrode 6 and the finger are opposed to each other via the solder resist layer 3 on the upper surface side. An electrostatic capacitance is formed between the surfaces. The electrostatic capacitance is larger at the convex portion of the fingerprint and smaller at the concave portion of the fingerprint. By sequentially applying a voltage to a plurality of surface strip electrodes 6 and a plurality of inner strip electrodes 7 and scanning them, the difference in electrostatic capacitance is detected and processed by an external processor to thereby read out fingerprint.

再者,在該指紋感測器用佈線基板100中,經由導孔導體9而與內層帶狀電極8電連接的焊盤電極7被配置在表層帶狀電極6之間。因此,表層帶狀電極6與內層帶狀電極8之間的靜電耦合增強,指紋讀取的靈敏度得以提高。進而,由於將焊盤電極7與內層帶狀電極8連 接的導孔導體9在俯視下為在沿著表層帶狀電極6的第1方向上較長的長圓形狀,因此導孔導體9與表層帶狀電極6的對置面積變大。其結果,表層帶狀電極6與內層帶狀電極8之間的靜電耦合進一步增強。由此,能夠提供可進一步提高指紋讀取的靈敏度的指紋感測器用佈線基板100。 Further, in the wiring substrate 100 for a fingerprint sensor, the pad electrode 7 electrically connected to the inner strip electrode 8 via the via conductor 9 is disposed between the surface strip electrodes 6. Therefore, the electrostatic coupling between the surface strip electrode 6 and the inner strip electrode 8 is enhanced, and the sensitivity of fingerprint reading is improved. Further, since the pad electrode 7 is connected to the inner strip electrode 8 The via-hole conductor 9 is formed in an elongated shape that is long in the first direction along the surface strip electrode 6 in plan view, and therefore the opposing area of the via-hole conductor 9 and the surface strip electrode 6 becomes large. As a result, the electrostatic coupling between the surface strip electrode 6 and the inner strip electrode 8 is further enhanced. Thereby, it is possible to provide the wiring substrate 100 for a fingerprint sensor which can further improve the sensitivity of fingerprint reading.

本公開並不限於上述實施方式的一例,只要是不脫離本公開的主旨的範圍,就可以進行各種變更。第5圖中表示本公開的指紋感測器用佈線基板的實施方式的另一例。在第5圖所示的指紋感測器用佈線基板100’中,對於與上述實施方式的一例相同的部分,付與同樣的符號,並省略其詳細的說明。 The present disclosure is not limited to the examples of the above-described embodiments, and various modifications can be made without departing from the scope of the present invention. Fig. 5 shows another example of the embodiment of the wiring substrate for a fingerprint sensor of the present disclosure. In the same manner as in the above-described embodiment, the same portions as those in the above-described embodiment are denoted by the same reference numerals, and the detailed description thereof will be omitted.

在第5圖所示的例子中,與上述第1圖所示的實施方式的一例的不同點在於,表層帶狀電極6以及焊盤電極7被埋入最上層的絕緣層1b的上表面。較佳為,被埋入的表層帶狀電極6以及焊盤電極7的上表面比絕緣基板1的最上層的絕緣層1b的上表面低0.1~3μm。 The example shown in Fig. 5 is different from the example of the embodiment shown in Fig. 1 in that the surface strip electrode 6 and the pad electrode 7 are buried in the upper surface of the uppermost insulating layer 1b. Preferably, the upper surface of the buried surface strip electrode 6 and the pad electrode 7 is 0.1 to 3 μm lower than the upper surface of the uppermost insulating layer 1b of the insulating substrate 1.

表層帶狀電極6及焊盤電極7的上表面以比最上層的絕緣層1b的上表面低0.1~3μm的方式,被埋入絕緣基板1的最上層的絕緣層1b的上表面。該情況下,即便覆蓋表層帶狀電極6以及焊盤電極7的阻焊層3的厚度為例如6μm以下的較薄的厚度,也能夠將阻焊層3的表面的凹凸形成為2μm以下的平坦的形狀。這樣,覆蓋表層帶狀電極6以及焊盤電極7的阻焊層3的厚度為6μm 以下而較薄、並且其表面的凹凸是2μm以下的平坦的形狀,由此能夠使得指紋的檢測靈敏度以及檢測精度良好。 The upper surface of the surface strip electrode 6 and the pad electrode 7 is buried on the upper surface of the uppermost insulating layer 1b of the insulating substrate 1 so as to be 0.1 to 3 μm lower than the upper surface of the uppermost insulating layer 1b. In this case, even if the thickness of the solder resist layer 3 covering the surface strip electrode 6 and the pad electrode 7 is a thin thickness of, for example, 6 μm or less, the unevenness on the surface of the solder resist layer 3 can be made flat at 2 μm or less. shape. Thus, the thickness of the solder resist layer 3 covering the surface strip electrode 6 and the pad electrode 7 is 6 μm. In the following, it is thin and the unevenness of the surface is a flat shape of 2 μm or less, whereby the detection sensitivity and the detection accuracy of the fingerprint can be made good.

參照第6圖以及第7圖來說明指紋感測器用佈線基板100’的製造方法。再者,第6圖、第7圖中表示第5圖所示的指紋感測器用佈線基板100’在上下顛倒的狀態下被製造的樣子。 A method of manufacturing the wiring substrate 100' for a fingerprint sensor will be described with reference to Figs. 6 and 7. In addition, in the sixth and seventh drawings, the fingerprint sensor wiring board 100' shown in Fig. 5 is manufactured in a state in which the wiring board 100' is turned upside down.

首先,如第6A圖所示,準備在平坦的支撐基板21的上表面積層了附有載體銅箔24的部件。支撐基板21是例如加入了玻璃纖維布的環氧樹脂板。附有載體銅箔24是載體銅箔22與銅箔23以可彼此剝離的方式積層而得到的。 First, as shown in FIG. 6A, a member to which the carrier copper foil 24 is attached is formed on the upper surface area of the flat support substrate 21. The support substrate 21 is, for example, an epoxy resin sheet to which a glass cloth is added. The carrier copper foil 24 is obtained by laminating the carrier copper foil 22 and the copper foil 23 so as to be peelable from each other.

接下來,如第6B圖所示,在銅箔23的表面形成佈線導體2a。該佈線導體2a包含表層帶狀電極6以及焊盤電極7。佈線導體2a藉由周知的半加成(semi-additive)法來形成。 Next, as shown in FIG. 6B, the wiring conductor 2a is formed on the surface of the copper foil 23. The wiring conductor 2a includes a surface strip electrode 6 and a pad electrode 7. The wiring conductor 2a is formed by a well-known semi-additive method.

接下來,如第6C圖所示,在銅箔23以及佈線導體2的表面積層絕緣層1b。在絕緣層1b,藉由雷射加工來形成包含導孔5a的複數個導孔5。 Next, as shown in FIG. 6C, the insulating layer 1b is layered on the surface areas of the copper foil 23 and the wiring conductor 2. In the insulating layer 1b, a plurality of via holes 5 including via holes 5a are formed by laser processing.

接著,如第6D圖所示,在絕緣層1b的表面以及導孔5內形成次層的佈線導體2b。 Next, as shown in FIG. 6D, the wiring conductor 2b of the sub-layer is formed on the surface of the insulating layer 1b and the via hole 5.

接下來,如第6E圖所示,在形成了佈線導體2b的絕緣層1b的表面積層絕緣層1a以及次層的佈線導體2c。 Next, as shown in FIG. 6E, the surface layer insulating layer 1a of the insulating layer 1b of the wiring conductor 2b and the wiring conductor 2c of the sub-layer are formed.

接著,如第7F圖所示,在形成了佈線導體 2c的絕緣層1a的表面,形成絕緣層1b以及佈線導體2d。 Next, as shown in FIG. 7F, wiring conductors are formed The surface of the insulating layer 1a of 2c forms the insulating layer 1b and the wiring conductor 2d.

接下來,如第7G圖所示,在形成了佈線導體2d的絕緣層1b的表面,形成下表面側的阻焊層3。 Next, as shown in Fig. 7G, the solder resist layer 3 on the lower surface side is formed on the surface of the insulating layer 1b on which the wiring conductor 2d is formed.

接著,如第7H圖所示,使載體銅箔22與銅箔23之間剝離,從而除去支撐基板21以及載體銅箔22。 Next, as shown in Fig. 7H, the carrier copper foil 22 and the copper foil 23 are peeled off to remove the support substrate 21 and the carrier copper foil 22.

接下來,如第7I圖所示,將銅箔23蝕刻除去,使得表層帶狀電極6以及焊盤電極7露出。此時,會因為蝕刻而使表層帶狀電極6以及焊盤電極7的表面也被少許蝕刻,從而使表層帶狀電極6以及焊盤電極7的露出表面比絕緣層1b的表面凹陷0.1~3μm。 Next, as shown in Fig. 7I, the copper foil 23 is removed by etching, so that the surface strip electrode 6 and the pad electrode 7 are exposed. At this time, the surface of the surface strip electrode 6 and the pad electrode 7 is also slightly etched by etching, so that the exposed surface of the surface strip electrode 6 and the pad electrode 7 is recessed by 0.1 to 3 μm from the surface of the insulating layer 1b. .

最後,如第7J圖所示,藉由在絕緣層1b以及佈線導體2(2a)的表面被覆阻焊層3,由此完成指紋感測器用佈線基板100’。 Finally, as shown in Fig. 7J, the solder resist layer 3 is covered on the surface of the insulating layer 1b and the wiring conductor 2 (2a), whereby the wiring substrate 100' for fingerprint sensor is completed.

1‧‧‧絕緣基板 1‧‧‧Insert substrate

1a、1b‧‧‧絕緣層 1a, 1b‧‧‧ insulation

2‧‧‧佈線導體 2‧‧‧Wiring conductor

3‧‧‧阻焊層 3‧‧‧ solder mask

4‧‧‧通孔 4‧‧‧through hole

5‧‧‧導孔 5‧‧‧ Guide hole

5a‧‧‧導孔 5a‧‧‧Guide

6‧‧‧表層帶狀電極 6‧‧‧Surface strip electrode

7‧‧‧焊盤電極 7‧‧‧Pad electrode

8‧‧‧內層帶狀電極 8‧‧‧ Inner layer strip electrode

9‧‧‧導孔導體 9‧‧‧ Guide hole conductor

10‧‧‧外部連接焊盤 10‧‧‧External connection pads

100‧‧‧指紋感測器用佈線基板 100‧‧‧Wiring substrate for fingerprint sensor

Claims (10)

一種指紋感測器用佈線基板,其具備:絕緣基板,係複數個絕緣層被積層而構成;指紋讀取用的複數條表層帶狀電極,形成在最上層的前述絕緣層上,沿著第1方向並排設置;指紋讀取用的複數條內層帶狀電極,形成在與最上層的前述絕緣層相接的次層的前述絕緣層上,沿著與前述第1方向正交的第2方向並排設置;焊盤電極,形成在最上層的前述絕緣層上,配置在前述內層帶狀電極上、且在相鄰的前述表層帶狀電極彼此之間;以及導孔導體,將前述焊盤電極與前述內層帶狀電極電連接,前述導孔導體是在俯視下在前述第1方向上較長的長圓形狀。 A wiring substrate for a fingerprint sensor, comprising: an insulating substrate, wherein a plurality of insulating layers are laminated; and a plurality of surface layer strip electrodes for fingerprint reading are formed on the insulating layer of the uppermost layer, along the first The direction is arranged side by side; a plurality of inner strip electrodes for fingerprint reading are formed on the insulating layer of the sub-layer in contact with the uppermost insulating layer, along a second direction orthogonal to the first direction Side by side; pad electrodes are formed on the uppermost insulating layer, disposed on the inner strip electrodes and adjacent to the surface strip electrodes; and via conductors The electrode is electrically connected to the inner strip electrode, and the via conductor is an elliptical shape that is long in the first direction in plan view. 如申請專利範圍第1項所述的指紋感測器用佈線基板,其中,前述焊盤電極是在俯視下在前述第1方向上較長的長圓形狀,並且是與前述導孔導體相同的形狀或者相似的形狀。 The wiring board for a fingerprint sensor according to the first aspect of the invention, wherein the pad electrode has an elongated shape that is long in the first direction in plan view, and has the same shape as the via hole conductor or Similar shape. 如申請專利範圍第2項所述的指紋感測器用佈線基板,其中,前述導孔導體是短徑以及長徑比前述焊盤電極小的長圓形狀。 The wiring board for a fingerprint sensor according to the second aspect of the invention, wherein the via-hole conductor has an elliptical shape having a short diameter and a long diameter smaller than that of the pad electrode. 如申請專利範圍第1項至第3項中任一項所述的指紋感測器用佈線基板,其中,前述導孔導體的上表面整 體被覆在前述焊盤電極。 The wiring substrate for a fingerprint sensor according to any one of claims 1 to 3, wherein the upper surface of the via conductor is The body is covered on the aforementioned pad electrode. 如申請專利範圍第1項至第4項中任一項所述的指紋感測器用佈線基板,其中,前述表層帶狀電極以及前述焊盤電極被埋入前述絕緣基板的最上層的前述絕緣層的上表面。 The wiring board for a fingerprint sensor according to any one of the first aspect, wherein the surface layer strip electrode and the pad electrode are buried in the uppermost layer of the insulating substrate. Upper surface. 如申請專利範圍第1項至第5項中任一項所述的指紋感測器用佈線基板,其中,形成有前述表層帶狀電極、前述內層帶狀電極以及前述焊盤電極的前述絕緣基板的表面被阻焊層覆蓋。 The wiring substrate for a fingerprint sensor according to any one of the first aspect, wherein the surface layer strip electrode, the inner layer strip electrode, and the pad electrode are formed. The surface is covered by a solder mask. 如申請專利範圍第1項至第6項中任一項所述的指紋感測器用佈線基板,其中,前述絕緣層及前述表層帶狀電極以及前述焊盤電極被具有平坦的表面的阻焊層覆蓋。 The wiring substrate for a fingerprint sensor according to any one of the first aspect, wherein the insulating layer, the surface layer strip electrode, and the pad electrode are a solder resist layer having a flat surface. cover. 如申請專利範圍第5項至第7項中任一項所述的指紋感測器用佈線基板,其中,前述表層帶狀電極及前述焊盤電極的上表面以比前述絕緣基板的最上層的前述絕緣層的上表面低0.1~3μm的方式,被埋入最上層的前述絕緣層的上表面。 The wiring board for a fingerprint sensor according to any one of the fifth aspect, wherein the upper surface of the surface layer strip electrode and the pad electrode is higher than the uppermost layer of the insulating substrate. The upper surface of the insulating layer is buried in the upper surface of the uppermost insulating layer so as to be lower by 0.1 to 3 μm. 如申請專利範圍第8項所述的指紋感測器用佈線基板,其中,覆蓋前述表層帶狀電極以及焊盤電極的上表面的前述阻焊層的厚度為6μm以下。 The wiring board for a fingerprint sensor according to the invention of claim 8, wherein the thickness of the solder resist layer covering the upper surface of the surface layer strip electrode and the pad electrode is 6 μm or less. 如申請專利範圍第8項或第9項所述的指紋感測器用佈線基板,其中,前述阻焊層的表面的凹凸為2μm以下。 The wiring board for a fingerprint sensor according to the above aspect of the invention, wherein the surface of the solder resist layer has an unevenness of 2 μm or less.
TW106117388A 2016-05-30 2017-05-25 Wiring substrate for fingerprint sensor TWI651026B (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2016106895 2016-05-30
JP2016-106895 2016-05-30
JP2017-030655 2017-02-22
JP2017030655A JP6813387B2 (en) 2016-05-30 2017-02-22 Wiring board for fingerprint sensor

Publications (2)

Publication Number Publication Date
TW201804886A true TW201804886A (en) 2018-02-01
TWI651026B TWI651026B (en) 2019-02-11

Family

ID=60577097

Family Applications (1)

Application Number Title Priority Date Filing Date
TW106117388A TWI651026B (en) 2016-05-30 2017-05-25 Wiring substrate for fingerprint sensor

Country Status (3)

Country Link
JP (1) JP6813387B2 (en)
KR (1) KR20170135734A (en)
TW (1) TWI651026B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI706518B (en) * 2018-07-26 2020-10-01 日商京瓷股份有限公司 Wiring board

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112861569B (en) * 2019-11-26 2023-08-18 宏碁股份有限公司 Fingerprint sensing panel and operation method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI706518B (en) * 2018-07-26 2020-10-01 日商京瓷股份有限公司 Wiring board

Also Published As

Publication number Publication date
KR20170135734A (en) 2017-12-08
JP6813387B2 (en) 2021-01-13
JP2017215934A (en) 2017-12-07
TWI651026B (en) 2019-02-11

Similar Documents

Publication Publication Date Title
TWI396474B (en) Method of manufacturing multilayer wiring board
TWI484875B (en) Circuit board and method for manufacturing same
TWI525769B (en) Package substrate and manufacturing method thereof
US20140353026A1 (en) Wiring board
TW201644334A (en) Wiring substrate and identifying method for coding information thereof
TWI651026B (en) Wiring substrate for fingerprint sensor
JP2015038912A (en) Electronic component incorporated wiring board and manufacturing method thereof
JP2014154877A (en) Multilayer printed circuit board and method of measuring interlayer registration
TWI628987B (en) Wiring board for fingerprint sensor
JP2013206707A (en) Mounting adaptor, printed circuit board and manufacturing method therefor
TWI613598B (en) Wiring substrate for fingerprint sensor
US11792920B2 (en) Circuit board, semiconductor device and method of manufacturing circuit board
TWI530240B (en) Printed circuit board and method for manufacturing same
US10089513B2 (en) Wiring board for fingerprint sensor
JP6791784B2 (en) Wiring board for fingerprint sensor
JP2018082111A (en) Printed wiring board and manufacturing method of printed wiring board
TWI625077B (en) Chip package structure
JP2006173435A (en) Wiring board, semiconductor device, and its manufacturing method
KR101896225B1 (en) Printed circuit boards and method of manufacturing the same
JP2006173434A (en) Wiring board, and semiconductor device, and its manufacturing method
KR101593880B1 (en) Bonding pad for printed circuit board and semiconductor chip package using same
KR102279152B1 (en) Interposer for wiring and electric module having the same
JP2022010969A (en) Printed circuit board and method for manufacturing the same
JP6316616B2 (en) Built-in component board
JP2015026775A (en) Wiring board