TW201727738A - Etching method - Google Patents

Etching method Download PDF

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TW201727738A
TW201727738A TW105140600A TW105140600A TW201727738A TW 201727738 A TW201727738 A TW 201727738A TW 105140600 A TW105140600 A TW 105140600A TW 105140600 A TW105140600 A TW 105140600A TW 201727738 A TW201727738 A TW 201727738A
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frequency power
high frequency
etching
etching method
film
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TW105140600A
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TWI723096B (en
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Ryohei TAKEDA
Sho Tominaga
Yoshinobu Ooya
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Tokyo Electron Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/32137—Radio frequency generated discharge controlling of the discharge by modulation of energy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J49/00—Particle spectrometers or separator tubes
    • H01J49/02—Details
    • H01J49/10—Ion sources; Ion guns
    • H01J49/105—Ion sources; Ion guns using high-frequency excitation, e.g. microwave excitation, Inductively Coupled Plasma [ICP]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02249—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by combined oxidation and nitridation performed simultaneously
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02312—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
    • H01L21/02315—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05H—PLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
    • H05H1/00—Generating plasma; Handling plasma
    • H05H1/24—Generating plasma
    • H05H1/46—Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Chemical Kinetics & Catalysis (AREA)
  • Electromagnetism (AREA)
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  • Drying Of Semiconductors (AREA)
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Abstract

An etching method performed by an etching apparatus includes a first process of causing a first high-frequency power supply to output a first high-frequency power with a first frequency and causing a second high-frequency power supply to output a second high-frequency power with a second frequency lower than the first frequency in a cryogenic environment where the temperature of a wafer is -35 DEG C. or lower, to generate plasma from a hydrogen-containing gas and a fluorine-containing gas and to etch, with the plasma, a multi-layer film of silicon dioxide and silicon nitride and a single-layer film of silicon dioxide that are formed on the wafer; and a second process of stopping the output of the second high-frequency power supply. The first process and the second process are repeated multiple times, and the first process is shorter in time than the second process.

Description

蝕刻方法Etching method

本發明係關於一種蝕刻方法。The present invention relates to an etching method.

提出一種於低溫環境下對氧化矽膜蝕刻高縱橫比之孔之方法(例如參照專利文獻1)。例如，可於3D NAND(Not AND，反及)快閃記憶體等三維積層半導體記憶體之製造中，使用上述方法對氧化矽膜與氮化矽膜之積層膜、及氧化矽膜之單層膜蝕刻高縱橫比之孔或槽。 [先前技術文獻] [專利文獻] [專利文獻1]日本專利特開平7-22393號公報 [專利文獻2]日本專利特公昭62-50978號公報 [專利文獻3]日本專利特公平7-22149號公報 [專利文獻4]日本專利第2956524號公報A method of etching a hole having a high aspect ratio to a ruthenium oxide film in a low temperature environment has been proposed (for example, refer to Patent Document 1). For example, in the manufacture of a three-dimensional laminated semiconductor memory such as a 3D NAND (Not AND) flash memory, a laminated film of a hafnium oxide film and a tantalum nitride film, and a single layer of a hafnium oxide film using the above method can be used. The film etches holes or slots of high aspect ratio. [PRIOR ART DOCUMENT] [Patent Document 1] Japanese Patent Laid-Open No. Hei 7-22393 (Patent Document 2) Japanese Patent Publication No. Sho 62-50978 [Patent Document 3] Japanese Patent Special Publication No. 7-22149 Bulletin [Patent Document 4] Japanese Patent No. 2955564

[發明所欲解決之問題] 然而，就上述方法而言，於對上述積層膜及單層膜同時進行加工之情形時，由於兩蝕刻對象膜之蝕刻速率不同，故而有加工時間變長而生產性變差之問題。 又，就使用電漿之蝕刻而言，重要的是避免因來自電漿之熱輸入所致之基板溫度上升，而均勻地對氧化矽膜與氮化矽膜之積層膜、及氧化矽膜之單層膜進行蝕刻。 針對上述問題，於一態樣中，本發明之目的在於提高對不同種類之蝕刻對象膜進行蝕刻時之基板之溫度控制性及蝕刻均勻性。 [解決問題之技術手段] 為了解決上述問題，根據一態樣，提供一種蝕刻方法，其具有：第1步驟，其係於晶圓溫度為-35℃以下之極低溫環境下，自第1高頻電源輸出第1高頻功率，自第2高頻電源輸出低於上述第1高頻之第2高頻功率，由含氫氣體及含氟氣體生成電漿，藉由電漿對積層有氧化矽膜及氮化矽膜之積層膜與氧化矽膜之單層膜進行蝕刻；及第2步驟，其係停止上述第2高頻電源之輸出；且重複上述第1步驟與上述第2步驟複數次，且控制為上述第1步驟係短於上述第2步驟之時間。 [發明之效果] 根據一態樣，可提高對不同種類之蝕刻對象膜進行蝕刻時之基板之溫度控制性及蝕刻均勻性。[Problems to be Solved by the Invention] However, in the case of the above method, when the laminated film and the single layer film are simultaneously processed, since the etching rates of the two etching target films are different, the processing time becomes long and the production is performed. The problem of poor sex. Moreover, in the case of etching using plasma, it is important to avoid the increase in the temperature of the substrate due to the heat input from the plasma, and to uniformly laminate the film of the ruthenium oxide film and the tantalum nitride film, and the ruthenium oxide film. The single layer film is etched. In view of the above problems, in one aspect, an object of the present invention is to improve temperature controllability and etching uniformity of a substrate when etching a different type of etching target film. [Means for Solving the Problems] In order to solve the above problems, according to an aspect, there is provided an etching method comprising: a first step of a first high temperature in a very low temperature environment having a wafer temperature of -35 ° C or less The frequency power supply outputs the first high frequency power, and the second high frequency power output is lower than the second high frequency power of the first high frequency, and the plasma is generated by the hydrogen-containing gas and the fluorine-containing gas, and the plasma is oxidized by the plasma. Etching the laminated film of the ruthenium film and the tantalum nitride film and the single layer film of the ruthenium oxide film; and the second step of stopping the output of the second high frequency power supply; and repeating the first step and the second step And, the control is such that the first step is shorter than the time of the second step. [Effects of the Invention] According to an aspect, temperature controllability and etching uniformity of a substrate when etching a different type of etching target film can be improved.

以下，參照圖式對用以實施本發明之形態進行說明。再者，於本說明書及圖式中，對於實質上相同之構成，藉由附上相同之符號而省略重複之說明。 [蝕刻裝置之整體構成] 首先，基於圖1對本發明之一實施形態之蝕刻裝置進行說明。圖1係表示本實施形態之蝕刻裝置之縱截面之一例的圖。 蝕刻裝置1具有例如表面經氧化鋁膜處理(陽極氧化處理)之包含鋁之圓筒形之處理容器10。處理容器10接地。 於處理容器10之內部設置有載置台17。載置台17例如由鋁(Al)或鈦(Ti)、碳化矽(SiC)等材質構成，且經由絕緣性之保持部14支持於支持部16。藉此，載置台17係設置於處理容器10之底部。 於處理容器10之底部設置有排氣管26，排氣管26連接於排氣裝置28。排氣裝置28包括渦輪分子泵或乾式泵等真空泵，將處理容器10內之處理空間減壓至特定之真空度，並且將處理容器10內之氣體朝排氣通路20及排氣口24引導並排氣。於排氣通路20安裝有用以控制氣體之流動之擋板22。 於處理容器10之側壁設置有閘閥30。藉由閘閥30之開閉而進行晶圓W自處理容器10之搬入及搬出。 於載置台17，經由匹配器33連接有用以生成電漿之第1高頻電源31，且經由匹配器34連接有用以將電漿中之離子提取至晶圓W之第2高頻電源32。例如，第1高頻電源31係對載置台17施加適於用以在處理容器10內生成電漿之第1頻率、例如60 MHz之第1高頻功率HF(電漿生成用之高頻功率)。第2高頻電源32係對載置台17施加適於將電漿中之離子提取至載置台17上之晶圓W之低於第1頻率之第2頻率、例如13.56 MHz之第2高頻功率LF(偏壓電壓產生用之高頻功率)。第2高頻功率LF例如與第1高頻功率HF同步地施加。如此一來，載置台17載置晶圓W，並且具有作為下部電極之功能。 於載置台17之上表面設置有用以利用靜電吸附力保持晶圓W之靜電吸盤40。靜電吸盤40係將包含導電膜之電極40a夾入至一對絕緣層40b(或絕緣片)之間而成者，於電極40a經由開關43連接有直流電壓源42。靜電吸盤40係藉由來自直流電壓源42之電壓，利用庫侖力將晶圓W吸附並保持於靜電吸盤上。於靜電吸盤40設置有溫度感測器77，而測定靜電吸盤40之溫度。藉此，測定靜電吸盤40上之晶圓W之溫度。 於靜電吸盤40之周緣部，以包圍載置台17之周圍之方式配置有聚焦環18。聚焦環18例如由矽或石英形成。聚焦環18係以提高蝕刻之面內均勻性之方式發揮功能。 於處理容器10之頂壁部，設置有氣體簇射頭38作為接地電位之上部電極。藉此，將自第1高頻電源31輸出之第1高頻功率HF電容性地施加至載置台17與氣體簇射頭38之間。 氣體簇射頭38具有：電極板56，其具有多個氣體通氣孔56a；及電極支持體58，其將電極板56可裝卸地支持。氣體供給源62係經由氣體供給配管64自氣體導入口60a向氣體簇射頭38內供給處理氣體。處理氣體係於氣體擴散室57擴散，並自多個氣體通氣孔56a導入至處理容器10內。於處理容器10之周圍，配置有呈環狀或同心圓狀延伸之磁鐵66，藉由磁力而控制上部電極與下部電極之電漿生成空間中所生成之電漿。 於靜電吸盤40埋入有加熱器75。加熱器75亦可貼附於靜電吸盤40之背面而代替埋入至靜電吸盤40內。對加熱器75經由饋電線供給自交流電源44輸出之電流。藉此，加熱器75將載置台17加熱。 於載置台17之內部形成有冷媒管70。自冷卻器單元71供給之冷媒(以下，亦稱為「鹽水(Brine)」)係於冷媒管70及冷媒循環管73中循環而將載置台17冷卻。 藉由該構成，載置台17係由加熱器75加熱，並且藉由特定溫度之鹽水流經載置台17內之冷媒管70而冷卻。藉此，將晶圓W調整為所期望之溫度。又，向靜電吸盤40之上表面與晶圓W之背面之間，經由傳熱氣體供給管線72供給氦氣(He)等傳熱氣體。 控制部50具有CPU(Central Processing Unit，中央處理單元)51、ROM(Read Only Memory，唯讀記憶體)52、RAM(Random Access Memory，隨機存取記憶體)53及HDD(Hard Disk Drive，硬碟驅動器)54。CPU51按照由ROM52、RAM53或HDD54之記錄部中記錄之配方所設定之程序，進行蝕刻等電漿蝕刻。又，於記錄部記錄有下述資料表等各種資料。控制部50對利用加熱器75之加熱機構或利用鹽水之冷卻機構之溫度進行控制。 於藉由處理容器10內所生成之電漿進行蝕刻時，控制閘閥30之開閉，將晶圓W搬入至處理容器10內，並載置於靜電吸盤40上。閘閥30於搬入晶圓W後關閉。處理容器10內之壓力係藉由排氣裝置28而減壓為設定值。藉由對靜電吸盤40之電極40a施加來自直流電壓源42之電壓，而將晶圓W靜電吸附於靜電吸盤40上。 繼而，將特定氣體自氣體簇射頭38呈簇射狀導入至處理容器10內，並對載置台17施加特定功率之電漿生成用之第1高頻功率HF。藉由所導入之氣體利用第1高頻功率HF進行游離及解離而生成電漿，藉由電漿之作用對晶圓W實施蝕刻等電漿蝕刻。亦可對載置台17施加偏壓電壓產生用之第2高頻功率LF。電漿蝕刻結束後，將晶圓W搬出至處理容器10外。 [蝕刻方法] 其次，對藉由利用該構成之蝕刻裝置1所生成之電漿對晶圓W進行蝕刻之蝕刻方法之一實施形態進行說明。具體而言，如圖2(b)所示，若對積層有氧化矽膜及氮化矽膜之積層膜12與氧化矽膜之單層膜13同時進行加工時，兩蝕刻對象膜之蝕刻速率(以下，亦記為「ER」)不同，則加工時間變長，而生產性變差。 因此，於本實施形態之蝕刻方法中，對在下部電極(載置台17)之溫度為-60℃以下之極低溫環境下使形成於晶圓W上之積層膜12與氧化矽膜之單層膜13之ER大致相同的蝕刻方法進行說明。 此處，於晶圓W上，形成有氧化矽膜之單層膜13、及將氧化矽膜與氮化矽膜交替地積層複數層之積層膜12，於積層膜12及單層膜13上形成有遮罩膜11。晶圓W例如為矽晶圓。遮罩膜11例如為多晶矽膜、有機膜、非晶形碳膜、氮化鈦膜。介隔遮罩膜11，同時對積層膜12與單層膜13進行蝕刻。 圖2(c)係表示將下部電極之溫度控制為25℃～-60℃時之氧化矽膜(SiO2 )之ER與氮化矽膜(SiN)之ER之關係之一例的實驗結果。此時之製程條件為以下條件。再者，以下說明之下部電極之溫度與冷卻器單元之設定溫度含義相同，於將下部電極之溫度控制為-60℃之情形時，只要將冷卻器單元之設定溫度控制為-60℃即可。 氣體        氫(H2 )/四氟化碳(CF4 ) 第1高頻功率HF 2500 W(固定)、連續波 第2高頻功率LF 間歇(重複接通及斷開) 12000 W、脈衝波 占空比 40% 如圖2(c)所示，將下部電極之溫度控制為25℃～-60℃時之氮化矽膜(SiN)之ER高於氧化矽膜(SiO2 )之ER。若將下部電極之溫度控制為-60℃附近之極低溫，則可使氮化矽膜之ER接近氧化矽膜之ER。 然而，當進行重複第2高頻功率LF之接通→斷開→接通→斷開・・・之間歇蝕刻時，可進一步提高氧化矽膜相對於氮化矽膜之ER。其結果，如圖2(a)所示，可使氧化矽膜之單層膜13之ER相對於氮化矽膜15之ER相等或者為其以上。 因此，於本實施形態之蝕刻方法中，使上述間歇蝕刻時之製程條件適當化，而執行積層膜12及單層膜13之電漿蝕刻。藉此，如圖2(b)所示，藉由間歇蝕刻而控制對積層膜12與單層膜13同時進行加工時之兩膜之ER，使兩膜之加工時間變短，藉此提昇生產性。 ＜第1實施形態＞ [蝕刻處理] 首先，一面參照圖3之流程圖一面對第1實施形態之蝕刻處理之一例進行說明。再者，圖3之蝕刻處理係由圖1所示之控制部50控制。 當圖3之蝕刻處理開始時，首先，將晶圓表面之溫度控制為-35℃以下之極低溫(步驟S10)。例如，藉由將冷卻器之設定溫度控制為-60℃或-70℃，可將晶圓表面之溫度控制為-35℃以下。 其次，將含氫氣體及含氟氣體供給至處理容器10內(步驟S12)。例如，供給氫(H2 )氣及四氟化碳(CF4 )氣體或包含該等氣體之氣體。 其次，自第1高頻電源31輸出第1高頻功率HF，並施加(接通)至載置台17。又，自第2高頻電源32輸出第2高頻功率LF，並施加至載置台17。藉此，對氧化矽膜與氮化矽膜之積層膜12及氧化矽膜之單層膜13進行蝕刻(步驟S14：第1步驟)。此時，第1高頻功率HF及第2高頻功率LF為連續波。又，進行第1步驟之時間(特定時間)控制為短於進行第2步驟之時間。例如，第1步驟之時間亦可為第2步驟之時間之1/3以下。 其次，執行第1步驟後，於停止第2高頻電源32之輸出(斷開)之狀態下對積層膜12及單層膜13進行蝕刻(步驟S16：第2步驟)。其次，判定第2高頻功率LF之接通及斷開是否已重複特定次數(步驟S18)。特定次數為預設之2次以上之次數。若判定為第2高頻功率LF之重複次數未超過特定次數，則自第2高頻電源32再次輸出第2高頻功率LF(步驟S20)。將進行步驟S20之步驟之時間控制為短於進行第2步驟之時間。繼而，返回至步驟S16，重複步驟S16～S20之處理，直至於步驟S18中判定為已重複特定次數為止。若步驟S18中判定為第2高頻功率LF之重複次數已超過特定次數之情形時，結束本處理。 [蝕刻處理結果] 其次，一面參照圖4，一面對上述第1實施形態之蝕刻處理之結果之一例進行說明。再者，為了獲得圖4(a)及圖4(b)之結果，上述製程條件中之不同方面在於將下部電極之溫度控制為-70℃之方面。 圖4(a)之橫軸表示時間，縱軸表示晶圓W之溫度。晶圓W之溫度係藉由在將下部電極冷卻至-70℃之狀態下對晶圓W照射紅外線之雷射時之該雷射之反射光而測定。然而，測定晶圓W之溫度之方法並不限定於此，可使用周知之任一方法。 線F係以脈衝波自第1高頻電源31輸出經控制為2500 W之第1高頻功率HF且自第2高頻電源32輸出經控制為12000 W之第2高頻功率LF者。晶圓溫度之上升值亦依存於來自電漿之熱輸入量而變化，故而可藉由控制第2高頻功率LF之接通、斷開而控制晶圓溫度。連續地輸出第2高頻功率LF之結果，如圖4(b)之編號1所示，線F所示之晶圓W之溫度係於電漿點火後，於30 s上升至高於-35℃之溫度，於120 s上升至-33℃。據此，電漿點火後120 s之時間點之晶圓W之溫度的差量(溫度上升)為32℃。 與此相對，線E係將第1高頻功率HF控制為2500 W，將第2高頻功率LF控制為12000 W(與線F相同)，並且將第2高頻功率LF接通之時間(以下，亦稱為「接通時間」)設為5 s，將第2高頻功率LF斷開之時間(以下，亦稱為「斷開時間」)設為15 s，重複接通、斷開24次時的結果。於將第2高頻功率LF斷開之期間，電漿之生成得到抑制，來自電漿之熱輸入減少，而晶圓之溫度上升得到抑制。其結果，如圖4(b)之編號2所示，線E所示之晶圓W之溫度於電漿點火後，於120 s為-40.7℃，維持-35℃以下之極溫度狀態。據此，電漿點火後經過120 s時之晶圓W之溫度的差量(溫度上升)為24.5℃，與輸出第2高頻功率LF之連續波之情形(線F)相比，晶圓W之溫度上升得到抑制。但是，若參照圖4(a)則可知，就線E而言，晶圓W之溫度一點一點上升，未將自電漿對晶圓W之熱輸入完全除熱。 冷卻器單元71係於蝕刻處理中，始終使控制為-60℃或-70℃之冷媒於載置台17循環。由此，於蝕刻處理中，晶圓W之表面係介隔載置台17始終由冷媒除熱。儘管如此，就圖4(a)之線E所示之蝕刻結果而言，由於晶圓W之溫度一點一點上升，故而預測第2高頻功率LF斷開之時間稍短。 因此，就圖4(a)之線D所示之蝕刻結果而言，將第2高頻功率LF之斷開時間控制為長於15 s之30 s。具體而言，測定將第1高頻功率HF控制為2500 W並將第2高頻功率LF控制為12000 W(與線F、線E相同)並且將接通時間5 s及斷開時間30 s重複24次時的蝕刻處理中之晶圓W之溫度。於此情形時，於將第2高頻功率LF斷開之期間，電漿之生成得到抑制，來自電漿之熱輸入減少，故而可進一步抑制晶圓之溫度上升。其結果，如圖4(b)之編號3所示，線型D所示之晶圓W之溫度係於電漿點火後，於120 s為-43.5℃，維持-35℃以下之極溫度狀態。據此可知，電漿點火後經過120 s時之晶圓W之溫度之差量(溫度上升)為21.1℃，可進一步抑制溫度上升。關於圖4(a)所示之線D可知，於蝕刻處理中，晶圓W之溫度未上升，可將自電漿對晶圓W之熱輸入完全除熱。 根據以上情況，於本實施形態之蝕刻方法中，執行間歇蝕刻，該間歇蝕刻係重複將第2高頻功率LF以接通時間5 s、斷開時間30 s接通及斷開的動作。藉此，可將晶圓W之溫度控制為-40℃以下之極低溫，與未間歇地施加(連續地施加)第2高頻功率LF之蝕刻方法相比，可使晶圓W之峰值溫度降低約11℃。由此，相較使冷卻器單元71之冷媒之溫度降低10℃，可使晶圓W之峰值溫度變低，且可將蝕刻處理中之晶圓W之溫度維持得更低。因此，於蝕刻處理中熱輸入至晶圓W之熱量與線型F所示之連續地施加第2高頻功率LF之情形相比大幅度變小。 如此，根據本實施形態之蝕刻方法，與連續地施加第2高頻功率LF之蝕刻方法相比，可使峰值溫度降低，且可使晶圓之溫度維持-35℃以下之極低溫狀態。藉此，能以-35℃以下之極低溫度對晶圓W進行蝕刻，故而可將積層膜與單層膜之ER控制為大致相同，並且可提高ER而提昇生產性。 圖5表示於以下之製程條件下執行本實施形態之蝕刻方法時之結果。 ・製程條件 圖5(a)：比較例 下部電極溫度     -60℃ 氣體        氫(H2 )/四氟化碳(CF4 ) 第1高頻功率HF 2500 W、連續波 第2高頻功率LF 4000 W、連續波 圖5(b)：本實施形態之一例 下部電極溫度     -60℃ 氣體        氫(H2 )/四氟化碳(CF4 ) 第1高頻功率HF 2500 W、連續波 第2高頻功率LF 4000 W、接通(ON)5 s/斷開(OFF)15 s 重複次數     36次 圖5(c)：本實施形態之一例 下部電極溫度     -60℃ 氣體        氫(H2 )/四氟化碳(CF4 ) 第1高頻功率HF 2500 W、連續波 第2高頻功率LF 4000 W、接通5 s/斷開30 s 重複次數     36次 圖5(a)對應於第2高頻功率LF為連續波時之圖4之線型F。圖5(b)對應於第2高頻功率LF為脈衝波時之圖4之線型E。圖5(c)對應於第2高頻功率LF為脈衝波時之圖4之線型D。圖5(a)～圖5(c)中，作為上述各製程條件下之蝕刻結果之一例，表示出對積層膜12及單層膜13進行蝕刻後之截面形狀、蝕刻深度(Depth)、及ER。 據此，於圖5(a)中，積層膜12之ER成為單層膜13之ER之約2倍。另一方面，於本實施形態之蝕刻處理方法中，藉由使第2高頻功率LF重複接通、斷開而間歇地施加第2高頻功率，藉此，於圖5(b)及圖5(c)中，單層膜13之ER與積層膜12之ER成為大致相同。據此，可藉由在第2高頻功率LF之斷開時間抑制電漿之生成而抑制來自電漿之熱輸入，而將晶圓W之溫度維持為-35℃以下之極低溫。其結果，可將積層膜12與單層膜13之ER控制為大致相同，並且可提高積層膜12與單層膜13之ER而提昇生產性。 再者，只要使製程條件中之第2高頻功率LF之斷開時間長於接通時間即可。藉此，可抑制來自電漿側之熱輸入而將晶圓W之溫度維持為-35℃以下之極低溫。 再者，於第1實施形態中，僅對第2高頻電源32控制接通、斷開，但並不限定於此，亦可以間歇地施加第1高頻電源31及第2高頻電源32之方式加以控制。此時，亦可以使第1高頻電源31及第2高頻電源32之接通、斷開同步之方式加以控制。 ＜第2實施形態＞ [蝕刻處理] 其次，一面參照圖6之流程圖，一面對第2實施形態之蝕刻處理之一例進行說明。再者，圖6之蝕刻處理係由圖1所示之控制部50控制。 當開始圖6之蝕刻處理方法時，首先，將晶圓表面之溫度控制為-35℃以下之極低溫(步驟S10)。其次，將含氫氣體及含氟氣體供給至處理容器10內(步驟S12)。例如供給氫(H2 )氣及四氟化碳(CF4 )氣體或包含該等氣體之氣體。 其次，控制第1高頻功率HF及第2高頻功率LF之至少任一者之占空比，自第1高頻電源31輸出第1高頻功率HF，自第2高頻電源32輸出第2高頻功率LF，對載置台17施加各高頻功率。於圖6之步驟S30中，作為其一例，將第2高頻功率LF之占空比控制為50%以下，一面高速地重複第2高頻功率LF之接通、斷開且輸出連續波之第1高頻功率HF，一面對積層膜12及單層膜13進行蝕刻(步驟S30)。步驟S30之處理後，結束本處理。 即，於第2實施形態之蝕刻處理中，只要步驟S30中施加之第1高頻功率HF及第2高頻功率LF之至少任一者為脈衝波即可。例如，於第2高頻功率LF為脈衝波時，如圖6之框內所示，將第2高頻功率LF之接通時間設為「Ton」，將第2高頻功率LF之斷開時間設為Toff。於此情形時，施加頻率為1/(Ton＋Toff)之第2高頻功率之脈衝波。又，占空比係以接通時間Ton相對於接通時間Ton及斷開時間Toff之總時間之比率、即Ton/(Ton＋Toff)表示。 然而，較佳為與第2高頻電源之輸出之停止同步地使第1高頻電源之輸出停止。即，此時，第1高頻功率HF及第2高頻功率LF均為脈衝波，第1高頻功率HF及第2高頻功率LF之占空比控制為相同。藉此，第1高頻功率HF之接通時間與第2高頻功率LF之接通時間成為相同之時間(Ton)，且第1高頻功率HF之斷開時間與第2高頻功率LF之斷開時間成為相同之時間(Toff)。藉此，可使第2高頻電源之輸出與第1高頻電源之輸出高速地同步，且可使第2高頻電源之輸出之停止與第1高頻電源之輸出之停止高速地同步。 以上，根據第2實施形態之蝕刻方法，較佳為第1高頻功率HF及第2高頻功率LF之兩者為脈衝波。又，對第1高頻功率HF及第2高頻功率LF之至少任一者加以控制之占空比較佳為50%以下。此係為了抑制來自電漿之熱輸入而將晶圓W之溫度維持為-35℃以下之極低溫。 [蝕刻處理結果] 其次，一面參照圖7，一面對上述第2實施形態之蝕刻處理之結果進行說明。再者，為了獲得圖7(a)～圖7(c)之蝕刻結果，而將下部電極之溫度控制為-70℃。圖7表示於以下之製程條件下執行本實施形態之蝕刻方法時之結果。 製程條件 圖7(a)：本實施形態 下部電極溫度     -70℃ 氣體        氫(H2 )/四氟化碳(CF4 ) 第1高頻功率HF 2500 W、脈衝波 占空比 40% (第1高頻功率HF之有效值：1000 W) 第2高頻功率LF 12000 W、脈衝波 占空比 40% (第2高頻功率LF之有效值：4800 W) 圖7(b)：本實施形態 下部電極溫度     -70℃ 氣體        氫(H2 )/四氟化碳(CF4 ) 第1高頻功率HF 2500 W、脈衝波 占空比 30% (第1高頻功率HF之有效值：750 W) 第2高頻功率LF 12000 W、脈衝波 占空比 30% (第2高頻功率LF之有效值：3600 W) 圖7(c)：本實施形態 下部電極溫度     -70℃ 氣體        氫(H2 )/四氟化碳(CF4 ) 第1高頻功率HF 2500 W、脈衝波 占空比 20% (第1高頻功率HF之有效值：500 W) 第2高頻功率LF 12000 W、脈衝波 占空比 20% (第2高頻功率LF之有效值：2400 W) 如圖7(a)～圖7(c)所示可知，於本實施形態之蝕刻方法中，藉由控制第1高頻功率HF及第2高頻功率LF之占空比，可控制ER。就該結果而言，圖7(b)之占空比為30%之情形時，積層膜12與單層膜13之ER最為接近，適於對積層膜12及單層膜13同時進行加工。於圖7(a)之占空比為40%之情形時，積層膜12之ER高於單層膜13之ER。反之，於圖7(c)之占空比為20%之情形時，單層膜13之ER高於積層膜12之ER。 根據第2實施形態之蝕刻方法，藉由高速地切換第1高頻功率HF及第2高頻功率LF之接通時間及斷開時間，可於斷開時間抑制來自電漿之熱輸入。藉此，可抑制晶圓W之溫度上升而將晶圓W維持為-35℃以下之極低溫。尤其是，根據第2實施形態之蝕刻方法，藉由控制占空比，可容易地將積層膜12與單層膜13之ER控制為大致相同。又，藉由提高積層膜12與單層膜13之ER，可提昇生產性。 惟第1高頻功率HF及第2高頻功率LF之占空比較佳為50%以下。藉此，藉由進行接通時間(Ton)短於斷開時間(Toff)之間歇蝕刻，可將晶圓W之溫度確實地維持為-35℃以下之極低溫而提高積層膜12與單層膜13之ER，且可將積層膜12與單層膜13之ER控制為大致相同。 又，可同步地控制第1高頻功率HF及第2高頻功率LF之占空比，亦可控制第1高頻功率HF或第2高頻功率LF之任一者之占空比。於此情形時亦較佳為將第1高頻功率HF或第2高頻功率LF之任一者之占空比控制為50%以下。藉此，可將晶圓W之溫度維持為-35℃以下之極低溫，將積層膜12與單層膜13之ER控制為大致相同，並且可提高積層膜12與單層膜13之ER。 例如，於上述實施形態中，作為含氫氣體舉氫氣為例，作為含氟氣體舉四氟化碳氣體為例而進行了說明。然而，含氫氣體並不限定於氫(H2 )氣，只要包含甲烷(CH4 )氣體、氟甲烷(CH3 F)氣體、二氟甲烷(CH2 F2 )氣體及三氟甲烷(CHF3 )氣體之至少任一種氣體即可。又，含氟氣體並不限定於四氟化碳(CF4 )氣體，亦可為C4 F6 (六氟-1,3-丁二烯)氣體、C4 F8 (全氟環丁烷)氣體、C3 F8 (八氟化丙烷)氣體、三氟化氮(NF3 )氣體、SF6 (六氟化硫)氣體。 ＜第3實施形態＞ 根據以上所說明之第1實施形態之蝕刻方法，於間歇地施加第1高頻電源31及第2高頻電源32時，可同步地控制第1高頻電源31及第2高頻電源32之接通、斷開。又，根據第2實施形態之蝕刻方法，如圖8(a)之同步脈衝(sync-pulse)所示，於高速地切換第1高頻電源31及第2高頻電源32之接通、斷開時，控制該脈衝波之占空比。 與此相對，第3實施形態之蝕刻方法係如圖8(b)之進階脈衝(advanced-pulse)所示，代替與第2高頻電源32之輸出之停止同步地將第1高頻電源31之輸出完全斷開，而使其輸出變小。於圖8(b)中，將第2步驟中之輸出記載為100 W，但輸出值並不限定於此，只要小於第1步驟中之輸出值即可。 如此，於第3實施形態之蝕刻方法中，進行使第1高頻電源31之輸出與第2高頻電源32之輸出之停止同步地變小但不完全斷開的控制，藉此，於圖8(b)所示之第2步驟中電漿亦點火，故而相較圖8(a)所示之第2步驟，由離子形成之各向異性之堆積物附著於孔之側面。藉此，於本實施形態之蝕刻方法中，相較第1及第2實施形態之蝕刻方法，可進一步提高蝕刻形狀之控制性。再者，於第3實施形態中，第1步驟與第2步驟亦重複複數次，第1步驟控制為時間短於第2步驟。 以下，對本實施形態之蝕刻方法之結果之一例進行說明。圖9表示於以下之製程條件下執行本實施形態之蝕刻方法時之結果。 ・製程條件 下部電極溫度    -70℃ 氣體        氫(H2 )/四氟化碳(CF4 )/三氟甲烷(CHF3 )/三氟化氮(NF3 )/全氟環丁烷(C4 F8 ) 第1高頻功率HF 2500 W、脈衝波 占空比 20% (第1高頻功率HF之有效值：500 W) 第2高頻功率LF 12000 W、脈衝波 占空比 20% (第2高頻功率LF之有效值：2400 W) 圖9(a)表示藉由第2實施形態之蝕刻方法(sync-pulse)蝕刻所得之孔之蝕刻形狀之一例，且係與圖7(c)所示之蝕刻結果相同之圖。與此相對，圖9(b)表示藉由本實施形態之蝕刻方法(advanced-pulse)蝕刻所得之孔之蝕刻形狀之一例。 根據該結果，控制第1高頻功率HF及第2高頻功率LF之占空比，且與第2高頻電源32之輸出之停止同步地高速地控制第1高頻電源31之輸出，但不完全斷開。藉此，可進一步提高蝕刻形狀之控制性。又，可知蝕刻速率(ER)及蝕刻深度(Depth)可控制為與第2實施形態之蝕刻方法之情形相等。 如以上所說明般，於本實施形態之蝕刻方法中，進行與第2高頻電源32之輸出之停止同步地使第1高頻電源31之輸出變小但不完全斷開的控制，藉此，可進一步提高蝕刻形狀之控制性。 再者，於第3實施形態中，於圖9所示之實驗中，供給氫(H2 )/四氟化碳(CF4 )/三氟甲烷(CHF3 )/三氟化氮(NF3 )/全氟環丁烷(C4 F8 )之混合氣體。然而，關於第3實施形態之蝕刻方法中使用之氣體，只要使用含氫氣體及含氟氣體或包含該等氣體之混合氣體即可。 又，於第3實施形態中，亦較佳為第1步驟之時間為第2步驟之時間之1/3以下。又，第3實施形態之蝕刻方法可使用如第1實施形態般將第1高頻電源31及第2高頻電源32以數秒～數十秒為單位接通、斷開之間歇蝕刻、或如第2實施形態般控制占空比之蝕刻的任一者。 例如，於第1實施形態之蝕刻方法之間歇蝕刻中，於第2步驟中進行與第2高頻電源32之輸出之停止同步地使第1高頻電源31之輸出變小但不完全斷開的控制，藉此，可提高蝕刻形狀之控制性。此時，亦可於僅使第2高頻電源32停止之控制時進行與第2高頻電源32之輸出之停止同步地使第1高頻電源31之輸出變小但不完全斷開的控制。 又，例如，於使用第2實施形態之控制占空比之蝕刻之情形時，第3實施形態中之占空比較佳為與第2實施形態之情形同樣地為50%以下。又，較佳為對第1高頻電源31及第2高頻電源32加以控制之占空比相同。 又，於第3實施形態中，亦可於第2步驟中使第1控制與第2控制混合存在而進行控制，上述第1控制係於將第1高頻電源31及第2高頻電源32接通、斷開時均完全停止，上述第2控制係與第2高頻電源32之輸出之停止同步地使第1高頻電源31之輸出變小，但不完全斷開。 進而，亦可對上部電極施加直流電壓(DC)。於此情形時，亦可為第2步驟中施加之直流電壓較第1步驟高。 以上，藉由上述實施形態對蝕刻方法進行了說明，但本發明之蝕刻方法並不限定於上述實施形態，可於本發明之範圍內進行各種變化及改良。上述複數個實施形態中所記載之事項可於不矛盾之範圍內組合。 又，本發明之蝕刻裝置不僅可應用於電容耦合型電漿(CCP：Capacitively Coupled Plasma)裝置，亦可應用於其他電漿處理裝置。作為其他電漿處理裝置，亦可為電感耦合型電漿(ICP：Inductively Coupled Plasma)、使用放射狀線槽孔天線之電漿處理裝置、螺旋波激發型電漿(HWP：Helicon Wave Plasma)裝置、電子回旋共振電漿(ECR：Electron Cyclotron Resonance Plasma)裝置等。 於本說明書中，作為蝕刻對象，對半導體晶圓W進行了說明，亦可為用於LCD(Liquid Crystal Display，液晶顯示器)、FPD(Flat Panel Display，平板顯示器)等之各種基板或光罩、CD(Compact Disc，光碟)基板、印刷基板等。Hereinafter, embodiments for carrying out the invention will be described with reference to the drawings. In the present specification and the drawings, the same components are denoted by the same reference numerals, and the description thereof will not be repeated. [Overall Configuration of Etching Apparatus] First, an etching apparatus according to an embodiment of the present invention will be described based on Fig. 1 . Fig. 1 is a view showing an example of a longitudinal section of an etching apparatus of the present embodiment. The etching apparatus 1 has a cylindrical processing container 10 containing aluminum, for example, whose surface is treated with an aluminum oxide film (anodized). The processing vessel 10 is grounded. A mounting table 17 is provided inside the processing container 10. The mounting table 17 is made of, for example, aluminum (Al), titanium (Ti), or tantalum carbide (SiC), and is supported by the support portion 16 via the insulating holding portion 14 . Thereby, the mounting table 17 is provided in the bottom of the processing container 10. An exhaust pipe 26 is provided at the bottom of the processing vessel 10, and the exhaust pipe 26 is connected to the exhaust device 28. The exhaust device 28 includes a vacuum pump such as a turbo molecular pump or a dry pump, decompresses the processing space in the processing container 10 to a specific degree of vacuum, and guides the gas in the processing container 10 toward the exhaust passage 20 and the exhaust port 24 and exhaust. A baffle 22 for controlling the flow of the gas is installed in the exhaust passage 20. A gate valve 30 is provided on the side wall of the processing vessel 10. The wafer W is carried in and out of the processing container 10 by opening and closing of the gate valve 30. The first high-frequency power source 31 for generating plasma is connected to the mounting table 17 via the matching unit 33, and the second high-frequency power source 32 for extracting ions in the plasma to the wafer W is connected via the matching unit 34. For example, the first high-frequency power source 31 applies a first high-frequency power HF (a high-frequency power for plasma generation) to the mounting table 17 at a first frequency suitable for generating plasma in the processing container 10, for example, 60 MHz. ). The second high-frequency power source 32 applies a second high frequency power of the second frequency lower than the first frequency, for example, 13.56 MHz, to the mounting table 17 for extracting ions in the plasma onto the wafer W on the mounting table 17. LF (high frequency power for bias voltage generation). The second high frequency power LF is applied, for example, in synchronization with the first high frequency power HF. As a result, the mounting table 17 mounts the wafer W and has a function as a lower electrode. An electrostatic chuck 40 for holding the wafer W by electrostatic adsorption is provided on the upper surface of the mounting table 17. The electrostatic chuck 40 is formed by sandwiching an electrode 40a including a conductive film between a pair of insulating layers 40b (or insulating sheets), and a DC voltage source 42 is connected to the electrode 40a via a switch 43. The electrostatic chuck 40 adsorbs and holds the wafer W on the electrostatic chuck by Coulomb force by a voltage from the DC voltage source 42. A temperature sensor 77 is provided on the electrostatic chuck 40, and the temperature of the electrostatic chuck 40 is measured. Thereby, the temperature of the wafer W on the electrostatic chuck 40 is measured. A focus ring 18 is disposed on a peripheral portion of the electrostatic chuck 40 so as to surround the periphery of the mounting table 17. The focus ring 18 is formed, for example, of tantalum or quartz. The focus ring 18 functions to increase the in-plane uniformity of the etch. At the top wall portion of the processing container 10, a gas shower head 38 is provided as a ground potential upper electrode. Thereby, the first high frequency power HF output from the first high frequency power source 31 is capacitively applied between the mounting table 17 and the gas shower head 38. The gas shower head 38 has an electrode plate 56 having a plurality of gas vent holes 56a, and an electrode support body 58 detachably supporting the electrode plate 56. The gas supply source 62 supplies the processing gas into the gas shower head 38 from the gas introduction port 60a via the gas supply pipe 64. The treatment gas system is diffused in the gas diffusion chamber 57 and introduced into the processing container 10 from the plurality of gas vent holes 56a. Around the processing container 10, a magnet 66 extending in a ring shape or a concentric shape is disposed, and the plasma generated in the plasma generating space of the upper electrode and the lower electrode is controlled by a magnetic force. A heater 75 is embedded in the electrostatic chuck 40. The heater 75 may also be attached to the back surface of the electrostatic chuck 40 instead of being embedded in the electrostatic chuck 40. The heater 75 is supplied with a current output from the AC power source 44 via a feeder. Thereby, the heater 75 heats the mounting table 17. A refrigerant pipe 70 is formed inside the mounting table 17. The refrigerant supplied from the cooler unit 71 (hereinafter also referred to as "Brine") circulates in the refrigerant pipe 70 and the refrigerant circulation pipe 73 to cool the mounting table 17. With this configuration, the mounting table 17 is heated by the heater 75, and the brine of a specific temperature flows through the refrigerant pipe 70 in the mounting table 17 to be cooled. Thereby, the wafer W is adjusted to a desired temperature. Further, a heat transfer gas such as helium (He) is supplied to the upper surface of the electrostatic chuck 40 and the back surface of the wafer W via the heat transfer gas supply line 72. The control unit 50 includes a CPU (Central Processing Unit) 51, a ROM (Read Only Memory) 52, a RAM (Random Access Memory) 53, and an HDD (Hard Disk Drive, hard). Disc drive) 54. The CPU 51 performs plasma etching such as etching in accordance with a program set by the recipe recorded in the recording unit of the ROM 52, the RAM 53, or the HDD 54. Further, various materials such as the following data sheets are recorded in the recording unit. The control unit 50 controls the temperature of the heating mechanism using the heater 75 or the cooling mechanism using the brine. When etching is performed by the plasma generated in the processing container 10, the opening and closing of the gate valve 30 is controlled, the wafer W is carried into the processing container 10, and placed on the electrostatic chuck 40. The gate valve 30 is closed after being loaded into the wafer W. The pressure in the processing vessel 10 is reduced to a set value by the exhaust device 28. The wafer W is electrostatically adsorbed onto the electrostatic chuck 40 by applying a voltage from the DC voltage source 42 to the electrode 40a of the electrostatic chuck 40. Then, the specific gas is introduced into the processing container 10 in a shower form from the gas shower head 38, and the first high-frequency power HF for plasma generation of a specific power is applied to the mounting table 17. The introduced gas is freed and dissociated by the first high-frequency power HF to generate a plasma, and the wafer W is subjected to plasma etching such as etching by the action of the plasma. The second high frequency power LF for generating a bias voltage may be applied to the mounting table 17. After the plasma etching is completed, the wafer W is carried out to the outside of the processing container 10. [Etching Method] Next, an embodiment of an etching method for etching the wafer W by the plasma generated by the etching apparatus 1 having the above configuration will be described. Specifically, as shown in FIG. 2(b), when the laminated film 12 in which the tantalum oxide film and the tantalum nitride film are laminated and the single layer film 13 of the tantalum oxide film are simultaneously processed, the etching rate of the two etching target films is performed. (hereinafter, also referred to as "ER"), the processing time becomes long and the productivity is deteriorated. Therefore, in the etching method of the present embodiment, a single layer of the laminated film 12 and the yttrium oxide film formed on the wafer W is formed in a very low temperature environment in which the temperature of the lower electrode (mounting stage 17) is -60 ° C or lower. An etching method in which the ER of the film 13 is substantially the same will be described. Here, on the wafer W, a single-layer film 13 having a hafnium oxide film and a build-up film 12 in which a plurality of layers of a hafnium oxide film and a tantalum nitride film are alternately laminated are formed on the build-up film 12 and the monolayer film 13. A mask film 11 is formed. The wafer W is, for example, a germanium wafer. The mask film 11 is, for example, a polycrystalline germanium film, an organic film, an amorphous carbon film, or a titanium nitride film. The laminated film 12 and the single layer film 13 are etched while interposing the mask film 11. Fig. 2(c) shows an experimental result of an example of the relationship between the ER of the yttrium oxide film (SiO 2 ) and the ER of the tantalum nitride film (SiN) when the temperature of the lower electrode is controlled to 25 ° C to -60 ° C. The process conditions at this time are as follows. In addition, the temperature of the lower electrode is the same as the set temperature of the cooler unit, and when the temperature of the lower electrode is controlled to -60 ° C, the temperature of the cooler unit can be controlled to -60 ° C. . Gas Hydrogen (H 2 ) / Carbon tetrafluoride (CF 4 ) First high-frequency power HF 2500 W (fixed), continuous wave second high-frequency power LF Intermittent (repetitive turn-on and turn-off) 12000 W, pulse wave Air ratio 40% As shown in Fig. 2(c), when the temperature of the lower electrode is controlled to 25 ° C to -60 ° C, the ER of the tantalum nitride film (SiN) is higher than the ER of the ruthenium oxide film (SiO 2 ). If the temperature of the lower electrode is controlled to a very low temperature near -60 ° C, the ER of the tantalum nitride film can be made close to the ER of the ruthenium oxide film. However, when the intermittent etching of the second high-frequency power LF is turned on, turned off, turned on, and turned off, the ER of the hafnium oxide film with respect to the tantalum nitride film can be further increased. As a result, as shown in FIG. 2(a), the ER of the single-layer film 13 of the yttrium oxide film can be made equal to or higher than the ER of the tantalum nitride film 15. Therefore, in the etching method of the present embodiment, the plasma etching of the laminated film 12 and the single layer film 13 is performed by optimizing the process conditions at the time of the intermittent etching. Thereby, as shown in FIG. 2(b), the ER of the two films when the laminated film 12 and the single layer film 13 are simultaneously processed is controlled by intermittent etching, so that the processing time of the two films is shortened, thereby improving production. Sex. <First Embodiment> [Etching Process] First, an example of the etching process of the first embodiment will be described with reference to the flowchart of Fig. 3 . Furthermore, the etching process of FIG. 3 is controlled by the control unit 50 shown in FIG. When the etching process of FIG. 3 is started, first, the temperature of the wafer surface is controlled to an extremely low temperature of -35 ° C or lower (step S10). For example, by controlling the set temperature of the cooler to -60 ° C or -70 ° C, the temperature of the wafer surface can be controlled to -35 ° C or lower. Next, the hydrogen-containing gas and the fluorine-containing gas are supplied into the processing container 10 (step S12). For example, hydrogen (H 2 ) gas and carbon tetrafluoride (CF 4 ) gas or a gas containing the gases are supplied. Next, the first high-frequency power HF is output from the first high-frequency power source 31, and is applied (turned on) to the mounting table 17. Moreover, the second high-frequency power LF is output from the second high-frequency power source 32 and applied to the mounting table 17. Thereby, the laminated film 12 of the yttrium oxide film and the tantalum nitride film and the single layer film 13 of the yttrium oxide film are etched (step S14: first step). At this time, the first high frequency power HF and the second high frequency power LF are continuous waves. Further, the time (specific time) for performing the first step is controlled to be shorter than the time for performing the second step. For example, the time of the first step may be 1/3 or less of the time of the second step. Then, after the first step is performed, the laminated film 12 and the single layer film 13 are etched while the output (disconnection) of the second high frequency power source 32 is stopped (step S16: second step). Next, it is determined whether or not the turning on and off of the second high frequency power LF has been repeated a certain number of times (step S18). The specific number of times is the preset number of times or more. When it is determined that the number of repetitions of the second high-frequency power LF has not exceeded a certain number of times, the second high-frequency power LF is output again from the second high-frequency power source 32 (step S20). The time at which the step S20 is performed is controlled to be shorter than the time at which the second step is performed. Then, the process returns to step S16, and the processes of steps S16 to S20 are repeated until it is determined in step S18 that the predetermined number of times has been repeated. If it is determined in step S18 that the number of repetitions of the second high frequency power LF has exceeded a certain number of times, the present process is terminated. [Etching Process Result] Next, an example of the result of the etching process of the first embodiment will be described with reference to Fig. 4 . Further, in order to obtain the results of Figs. 4(a) and 4(b), a different aspect of the above process conditions is to control the temperature of the lower electrode to -70 °C. The horizontal axis of Fig. 4(a) represents time, and the vertical axis represents the temperature of the wafer W. The temperature of the wafer W is measured by reflecting the laser light when the wafer W is irradiated with an infrared laser in a state where the lower electrode is cooled to -70 °C. However, the method of measuring the temperature of the wafer W is not limited thereto, and any known method can be used. The line F outputs a first high frequency power HF controlled to 2500 W from the first high frequency power source 31 and a second high frequency power LF controlled to 12000 W from the second high frequency power source 32 by a pulse wave. The rise in the wafer temperature also varies depending on the amount of heat input from the plasma. Therefore, the wafer temperature can be controlled by controlling the on and off of the second high frequency power LF. As a result of continuously outputting the second high-frequency power LF, as shown by the number 1 in Fig. 4(b), the temperature of the wafer W shown by the line F rises to 30-s higher than -35 °C after the plasma is ignited. The temperature rises to -33 ° C at 120 s. Accordingly, the difference in temperature (temperature rise) of the wafer W at the time point of 120 s after the plasma ignition was 32 °C. On the other hand, the line E controls the first high-frequency power HF to 2500 W, the second high-frequency power LF to 12000 W (same as the line F), and the second high-frequency power LF to be turned on ( Hereinafter, the "on-time" is also set to 5 s, and the time at which the second high-frequency power LF is turned off (hereinafter also referred to as "off-time") is set to 15 s, and the turn-on and turn-off are repeated. Results at 24 times. During the period in which the second high-frequency power LF is turned off, the generation of plasma is suppressed, the heat input from the plasma is reduced, and the temperature rise of the wafer is suppressed. As a result, as shown by the number 2 in Fig. 4(b), the temperature of the wafer W shown by the line E is -40.7 °C at 120 s after the plasma is ignited, and the temperature is maintained at -35 ° C or lower. Accordingly, the difference in temperature (temperature rise) of the wafer W after 120 s of plasma ignition is 24.5 ° C, compared with the case of outputting the continuous wave of the second high frequency power LF (line F), the wafer The temperature rise of W is suppressed. However, referring to FIG. 4(a), it can be seen that in the case of the line E, the temperature of the wafer W rises little by little, and the heat input from the plasma to the wafer W is not completely removed. The cooler unit 71 is in the etching process, and the refrigerant controlled to -60 ° C or -70 ° C is always circulated on the mounting table 17 . Thereby, in the etching process, the surface of the wafer W is always separated from the mounting stage 17 by the heat of the refrigerant. However, in the etching result shown by the line E of FIG. 4(a), since the temperature of the wafer W rises little by little, the time during which the second high-frequency power LF is turned off is predicted to be slightly shorter. Therefore, with respect to the etching result shown by the line D of Fig. 4 (a), the off time of the second high frequency power LF is controlled to be longer than 15 s for 30 s. Specifically, it is measured that the first high frequency power HF is controlled to 2500 W and the second high frequency power LF is controlled to 12000 W (same as the line F and the line E) and the on time is 5 s and the off time is 30 s. The temperature of the wafer W in the etching process at the time of repeating 24 times. In this case, during the period in which the second high-frequency power LF is turned off, the generation of plasma is suppressed, and the heat input from the plasma is reduced, so that the temperature rise of the wafer can be further suppressed. As a result, as shown by the number 3 in Fig. 4(b), the temperature of the wafer W indicated by the line type D is -43.5 ° C at 120 s after the plasma ignition, and the temperature is maintained at -35 ° C or lower. From this, it can be seen that the difference in temperature (temperature rise) of the wafer W after 120 s of plasma ignition is 21.1 ° C, and the temperature rise can be further suppressed. As can be seen from the line D shown in FIG. 4(a), in the etching process, the temperature of the wafer W does not rise, and the heat input from the plasma to the wafer W can be completely removed. According to the above, in the etching method of the present embodiment, the intermittent etching is performed, and the second high-frequency power LF is repeatedly turned on and off for an on-time of 5 s and an off-time of 30 s. Thereby, the temperature of the wafer W can be controlled to an extremely low temperature of -40 ° C or lower, and the peak temperature of the wafer W can be made compared with an etching method in which the second high frequency power LF is not applied intermittently (continuously applied) Reduced by about 11 °C. Thereby, the peak temperature of the wafer W can be made lower than the temperature of the refrigerant of the cooler unit 71 by 10 ° C, and the temperature of the wafer W in the etching process can be kept lower. Therefore, the amount of heat input to the wafer W during the etching process is significantly smaller than the case where the second high-frequency power LF is continuously applied as indicated by the line F. As described above, according to the etching method of the present embodiment, the peak temperature can be lowered and the temperature of the wafer can be maintained at an extremely low temperature of -35 ° C or lower as compared with the etching method in which the second high-frequency power LF is continuously applied. Thereby, the wafer W can be etched at an extremely low temperature of -35 ° C or lower, so that the ER of the laminated film and the single layer film can be controlled to be substantially the same, and the ER can be improved to improve productivity. Fig. 5 shows the results when the etching method of the present embodiment is carried out under the following process conditions.・Processing conditionsFig. 5(a): Comparative example lower electrode temperature -60 °C Gas Hydrogen (H 2 ) / carbon tetrafluoride (CF 4 ) First high frequency power HF 2500 W, continuous wave second high frequency power LF 4000 W, continuous wave diagram 5 (b): one example of the present embodiment lower electrode temperature -60 ° C gas hydrogen (H 2 ) / carbon tetrafluoride (CF 4 ) first high frequency power HF 2500 W, continuous wave second high Frequency power LF 4000 W, ON (ON) 5 s / OFF (OFF) 15 s Repeat times 36 times Figure 5 (c): One example of this embodiment lower electrode temperature -60 ° C gas hydrogen (H 2 ) / four Fluorinated carbon (CF 4 ) First high frequency power HF 2500 W, continuous wave second high frequency power LF 4000 W, on 5 s/off 30 s number of repetitions 36 times Fig. 5(a) corresponds to the second highest The frequency power LF is the line type F of FIG. 4 in the case of continuous wave. Fig. 5(b) corresponds to the line type E of Fig. 4 when the second high frequency power LF is a pulse wave. Fig. 5(c) corresponds to the line type D of Fig. 4 when the second high frequency power LF is a pulse wave. 5(a) to 5(c), as an example of the etching results under the respective process conditions, the cross-sectional shape, the etching depth (Depth), and the etching depth of the laminated film 12 and the single-layer film 13 are shown. ER. Accordingly, in FIG. 5(a), the ER of the laminated film 12 becomes about twice as large as the ER of the single layer film 13. On the other hand, in the etching processing method of the present embodiment, the second high-frequency power is intermittently applied to the second high-frequency power LF, and the second high-frequency power is intermittently applied, thereby showing FIG. 5(b) and FIG. In 5 (c), the ER of the single layer film 13 and the ER of the laminated film 12 are substantially the same. According to this, the generation of the plasma can be suppressed during the off time of the second high-frequency power LF, and the heat input from the plasma can be suppressed, and the temperature of the wafer W can be maintained at an extremely low temperature of -35 ° C or lower. As a result, the ER of the laminated film 12 and the single-layer film 13 can be controlled to be substantially the same, and the ER of the laminated film 12 and the single-layer film 13 can be improved to improve productivity. Further, the off time of the second high frequency power LF in the process condition may be longer than the on time. Thereby, the heat input from the plasma side can be suppressed, and the temperature of the wafer W can be maintained at an extremely low temperature of -35 ° C or lower. In the first embodiment, only the second high-frequency power source 32 is controlled to be turned on or off. However, the present invention is not limited thereto, and the first high-frequency power source 31 and the second high-frequency power source 32 may be intermittently applied. The way to control. At this time, the first high-frequency power source 31 and the second high-frequency power source 32 may be controlled to be turned on and off. <Second Embodiment> [Etching Process] Next, an example of the etching process of the second embodiment will be described with reference to the flowchart of Fig. 6 . Further, the etching process of Fig. 6 is controlled by the control unit 50 shown in Fig. 1. When the etching treatment method of FIG. 6 is started, first, the temperature of the wafer surface is controlled to an extremely low temperature of -35 ° C or lower (step S10). Next, the hydrogen-containing gas and the fluorine-containing gas are supplied into the processing container 10 (step S12). For example, hydrogen (H 2 ) gas and carbon tetrafluoride (CF 4 ) gas or a gas containing the gases are supplied. Then, the duty ratio of at least one of the first high-frequency power HF and the second high-frequency power LF is controlled, and the first high-frequency power HF is output from the first high-frequency power source 31, and the second high-frequency power source 32 is outputted from the second high-frequency power source 32. 2 High-frequency power LF, and each high-frequency power is applied to the mounting table 17. In the step S30 of FIG. 6, as an example, when the duty ratio of the second high-frequency power LF is controlled to 50% or less, the second high-frequency power LF is turned on and off at high speed, and the continuous wave is output. The first high-frequency power HF is etched toward the laminated film 12 and the single-layer film 13 (step S30). After the processing of step S30, the processing is ended. In other words, in the etching process of the second embodiment, at least one of the first high frequency power HF and the second high frequency power LF applied in step S30 may be a pulse wave. For example, when the second high-frequency power LF is a pulse wave, as shown in the frame of FIG. 6, the ON time of the second high-frequency power LF is "Ton", and the second high-frequency power LF is turned off. The time is set to Toff. In this case, a pulse wave of the second high frequency power having a frequency of 1/(Ton+Toff) is applied. Further, the duty ratio is expressed by the ratio of the on-time Ton to the total time of the on-time Ton and the off-time Toff, that is, Ton/(Ton+Toff). However, it is preferable to stop the output of the first high-frequency power source in synchronization with the stop of the output of the second high-frequency power source. In other words, at this time, the first high frequency power HF and the second high frequency power LF are both pulse waves, and the duty ratios of the first high frequency power HF and the second high frequency power LF are controlled to be the same. Thereby, the on-time of the first high-frequency power HF and the on-time of the second high-frequency power LF are the same time (Ton), and the off-time of the first high-frequency power HF and the second high-frequency power LF The disconnection time becomes the same time (Toff). Thereby, the output of the second high-frequency power source can be synchronized with the output of the first high-frequency power source at a high speed, and the stop of the output of the second high-frequency power source can be synchronized with the stop of the output of the first high-frequency power source at a high speed. As described above, according to the etching method of the second embodiment, it is preferable that both of the first high frequency power HF and the second high frequency power LF are pulse waves. Further, the duty ratio for controlling at least one of the first high frequency power HF and the second high frequency power LF is preferably 50% or less. This is to maintain the temperature of the wafer W at an extremely low temperature of -35 ° C or less in order to suppress heat input from the plasma. [Etching Process Result] Next, the result of the etching process of the second embodiment will be described with reference to Fig. 7 . Further, in order to obtain the etching results of FIGS. 7(a) to 7(c), the temperature of the lower electrode was controlled to -70 °C. Fig. 7 shows the results of performing the etching method of the present embodiment under the following process conditions. Process conditions Fig. 7(a): Lower electrode temperature - 70 °C in this embodiment Gas hydrogen (H 2 ) / carbon tetrafluoride (CF 4 ) First high frequency power HF 2500 W, pulse wave duty ratio 40% (No. 1 RMS of high frequency power HF: 1000 W) 2nd high frequency power LF 12000 W, pulse wave duty ratio 40% (effective value of 2nd high frequency power LF: 4800 W) Fig. 7(b): This implementation Form lower electrode temperature -70 °C Gas hydrogen (H 2 ) / carbon tetrafluoride (CF 4 ) First high frequency power HF 2500 W, pulse wave duty ratio 30% (effective value of first high frequency power HF: 750 W) 2nd high frequency power LF 12000 W, pulse wave duty ratio 30% (effective value of 2nd high frequency power LF: 3600 W) Fig. 7(c): The lower electrode temperature of this embodiment - 70 ° C gas hydrogen ( H 2 )/tetrafluorocarbon (CF 4 ) The first high-frequency power HF 2500 W, the pulse wave duty ratio 20% (the effective value of the first high-frequency power HF: 500 W) The second high-frequency power LF 12000 W Pulse wave duty ratio 20% (effective value of second high frequency power LF: 2400 W) As shown in Figs. 7(a) to 7(c), in the etching method of the present embodiment, by the control The duty ratio of the first high frequency power HF and the second high frequency power LF can be System ER. As a result of this, when the duty ratio of FIG. 7(b) is 30%, the laminated film 12 and the ER of the single-layer film 13 are the closest, and it is suitable for simultaneously processing the laminated film 12 and the single-layer film 13. When the duty ratio of Fig. 7(a) is 40%, the ER of the laminated film 12 is higher than the ER of the single layer film 13. On the other hand, in the case where the duty ratio of FIG. 7(c) is 20%, the ER of the single layer film 13 is higher than the ER of the laminated film 12. According to the etching method of the second embodiment, by switching the on-time and the off-time of the first high-frequency power HF and the second high-frequency power LF at high speed, the heat input from the plasma can be suppressed at the off-time. Thereby, it is possible to suppress the temperature rise of the wafer W and maintain the wafer W at an extremely low temperature of -35 ° C or lower. In particular, according to the etching method of the second embodiment, the ER of the laminated film 12 and the single layer film 13 can be easily controlled to be substantially the same by controlling the duty ratio. Moreover, productivity can be improved by increasing the ER of the laminated film 12 and the single layer film 13. However, the duty ratio of the first high frequency power HF and the second high frequency power LF is preferably 50% or less. Thereby, by performing the intermittent etching in which the on-time (Ton) is shorter than the off-time (Toff), the temperature of the wafer W can be surely maintained at an extremely low temperature of -35 ° C or less to increase the laminated film 12 and the single layer. The ER of the film 13 can control the ER of the laminated film 12 and the single layer film 13 to be substantially the same. Further, the duty ratios of the first high frequency power HF and the second high frequency power LF can be controlled in synchronization, and the duty ratio of any of the first high frequency power HF or the second high frequency power LF can be controlled. In this case, it is preferable to control the duty ratio of any of the first high frequency power HF or the second high frequency power LF to 50% or less. Thereby, the temperature of the wafer W can be maintained at an extremely low temperature of -35 ° C or lower, and the ER of the laminated film 12 and the single-layer film 13 can be controlled to be substantially the same, and the ER of the laminated film 12 and the single-layer film 13 can be improved. For example, in the above embodiment, hydrogen gas is taken as an example of hydrogen-containing gas, and carbon tetrafluoride gas is exemplified as a fluorine-containing gas. However, the hydrogen-containing gas is not limited to hydrogen (H 2 ) gas as long as it contains methane (CH 4 ) gas, fluoromethane (CH 3 F) gas, difluoromethane (CH 2 F 2 ) gas, and trifluoromethane (CHF). 3 ) Any one of the gases may be used. Further, the fluorine-containing gas is not limited to carbon tetrafluoride (CF 4 ) gas, and may be C 4 F 6 (hexafluoro-1,3-butadiene) gas or C 4 F 8 (perfluorocyclobutane). Gas, C 3 F 8 (octafluoropropane) gas, nitrogen trifluoride (NF 3 ) gas, SF 6 (sulfur hexafluoride) gas. <Third Embodiment> According to the etching method of the first embodiment described above, when the first high-frequency power source 31 and the second high-frequency power source 32 are intermittently applied, the first high-frequency power source 31 and the third-stage power source can be synchronously controlled. 2 The high frequency power source 32 is turned on and off. Further, according to the etching method of the second embodiment, as shown in the sync-pulse of (a) of FIG. 8 , the first high-frequency power source 31 and the second high-frequency power source 32 are switched on and off at high speed. When on, the duty cycle of the pulse wave is controlled. On the other hand, in the etching method of the third embodiment, as shown in the advanced pulse of FIG. 8(b), the first high-frequency power source is replaced in place of the stop of the output of the second high-frequency power source 32. The output of 31 is completely broken, and its output is made smaller. In FIG. 8(b), the output in the second step is described as 100 W, but the output value is not limited thereto, and may be smaller than the output value in the first step. In the etching method of the third embodiment, the control for reducing the output of the first high-frequency power source 31 and the stop of the output of the second high-frequency power source 32 is performed, but the control is not completely turned off. In the second step shown in Fig. 8(b), the plasma is also ignited. Therefore, compared with the second step shown in Fig. 8(a), the anisotropic deposit formed by ions adheres to the side of the hole. As a result, in the etching method of the present embodiment, the controllability of the etching shape can be further improved as compared with the etching methods of the first and second embodiments. Furthermore, in the third embodiment, the first step and the second step are also repeated a plurality of times, and the first step is controlled to be shorter than the second step. Hereinafter, an example of the result of the etching method of the present embodiment will be described. Fig. 9 shows the results when the etching method of the present embodiment is carried out under the following process conditions.・Process conditions Lower electrode temperature -70 °C Gas Hydrogen (H 2 ) / Carbon tetrafluoride (CF 4 ) / Trifluoromethane (CHF 3 ) / Nitrogen trifluoride (NF 3 ) / Perfluorocyclobutane (C 4 F 8 ) First high-frequency power HF 2500 W, pulse wave duty ratio 20% (effective value of first high-frequency power HF: 500 W) Second high-frequency power LF 12000 W, pulse wave duty ratio 20% ( RMS of the second high-frequency power LF: 2400 W) Fig. 9(a) shows an example of the etching shape of the hole obtained by the etching method of the second embodiment, and is shown in Fig. 7(c). The graph shows the same etching results. On the other hand, Fig. 9(b) shows an example of the etching shape of the hole obtained by the etching method of the present embodiment. According to the result, the duty ratios of the first high-frequency power HF and the second high-frequency power LF are controlled, and the output of the first high-frequency power source 31 is controlled at a high speed in synchronization with the stop of the output of the second high-frequency power source 32, but Not completely disconnected. Thereby, the controllability of the etching shape can be further improved. Further, it is understood that the etching rate (ER) and the etching depth (Depth) can be controlled to be equal to those in the etching method of the second embodiment. As described above, in the etching method of the present embodiment, the output of the first high-frequency power source 31 is reduced in synchronization with the stop of the output of the second high-frequency power source 32, but the control is not completely turned off. The controllability of the etching shape can be further improved. Further, in the third embodiment, in the experiment shown in Fig. 9, hydrogen (H 2 ) / carbon tetrafluoride (CF 4 ) / trifluoromethane (CHF 3 ) / nitrogen trifluoride (NF 3 ) was supplied. ) / a mixture of perfluorocyclobutane (C 4 F 8 ). However, the gas used in the etching method of the third embodiment may be a hydrogen-containing gas, a fluorine-containing gas, or a mixed gas containing the gases. Further, in the third embodiment, it is preferable that the time of the first step is 1/3 or less of the time of the second step. In the etching method of the third embodiment, the first high-frequency power source 31 and the second high-frequency power source 32 are intermittently etched and turned off in units of seconds to tens of seconds, or as in the first embodiment. Any of the etching of the duty ratio is controlled as in the second embodiment. For example, in the intermittent etching of the etching method of the first embodiment, the output of the first high-frequency power source 31 is made small but not completely disconnected in synchronization with the stop of the output of the second high-frequency power source 32 in the second step. The control can thereby improve the controllability of the etching shape. At this time, it is also possible to control the output of the first high-frequency power source 31 to be small but not completely disconnected in synchronization with the stop of the output of the second high-frequency power source 32 when the second high-frequency power source 32 is stopped. . Further, for example, when the etching of the duty ratio is used in the second embodiment, the duty ratio in the third embodiment is preferably 50% or less as in the case of the second embodiment. Further, it is preferable that the duty ratios for controlling the first high frequency power source 31 and the second high frequency power source 32 are the same. Further, in the third embodiment, the first control and the second control may be mixed and controlled in the second step, and the first control is performed by the first high frequency power source 31 and the second high frequency power source 32. When both the ON and OFF states are completely stopped, the second control system causes the output of the first high frequency power supply 31 to be smaller in synchronization with the stop of the output of the second high frequency power supply 32, but is not completely turned off. Further, a DC voltage (DC) may be applied to the upper electrode. In this case, the DC voltage applied in the second step may be higher than the first step. Although the etching method has been described above by the above embodiment, the etching method of the present invention is not limited to the above embodiment, and various changes and improvements can be made within the scope of the invention. The matters described in the above embodiments can be combined within a range that does not contradict each other. Further, the etching apparatus of the present invention can be applied not only to a capacitively coupled plasma (CCP) device but also to other plasma processing apparatuses. The other plasma processing apparatus may be an inductively coupled plasma (ICP), a plasma processing apparatus using a radial slot antenna, or a HeWP Wave Plasma apparatus. , Electron Cyclotron Resonance Plasma (ECR) device, etc. In the present specification, the semiconductor wafer W is described as an object of etching, and may be used for various substrates or masks such as an LCD (Liquid Crystal Display), an FPD (Flat Panel Display), or the like. CD (Compact Disc) substrate, printed circuit board, and the like.

1‧‧‧蝕刻裝置
10‧‧‧處理容器
11‧‧‧遮罩膜
12‧‧‧積層膜
13‧‧‧單層膜
14‧‧‧保持部
16‧‧‧支持部
17‧‧‧載置台
18‧‧‧聚焦環
20‧‧‧排氣通路
22‧‧‧擋板
24‧‧‧排氣口
26‧‧‧排氣管
28‧‧‧排氣裝置
30‧‧‧閘閥
31‧‧‧第1高頻電源
32‧‧‧第2高頻電源
33‧‧‧匹配器
34‧‧‧匹配器
38‧‧‧氣體簇射頭
40‧‧‧靜電吸盤
40a‧‧‧電極
40b‧‧‧絕緣層
42‧‧‧直流電壓源
43‧‧‧開關
44‧‧‧交流電源
50‧‧‧控制部
51‧‧‧CPU
52‧‧‧ROM
53‧‧‧RAM
54‧‧‧HDD
56‧‧‧電極板
56a‧‧‧氣體通氣孔
57‧‧‧氣體擴散室
58‧‧‧電極支持體
60a‧‧‧氣體導入口
62‧‧‧氣體供給源
64‧‧‧氣體供給配管
66‧‧‧磁鐵
70‧‧‧冷媒管
71‧‧‧冷卻器單元
72‧‧‧氣體供給管線
73‧‧‧冷媒循環管
75‧‧‧加熱器
77‧‧‧溫度感測器
D‧‧‧線
E‧‧‧線
F‧‧‧線
HF‧‧‧第1高頻功率
LF‧‧‧第2高頻功率
S10‧‧‧步驟
S12‧‧‧步驟
S14‧‧‧步驟
S16‧‧‧步驟
S18‧‧‧步驟
S20‧‧‧步驟
S30‧‧‧步驟
Ton‧‧‧接通時間
Toff‧‧‧斷開時間
W‧‧‧晶圓1‧‧‧ etching device
10‧‧‧Processing container
11‧‧‧ Mask film
12‧‧‧ laminated film
13‧‧‧monolayer film
14‧‧‧ Keeping Department
16‧‧‧Support Department
17‧‧‧Station
18‧‧‧ Focus ring
20‧‧‧Exhaust passage
22‧‧‧Baffle
24‧‧‧Exhaust port
26‧‧‧Exhaust pipe
28‧‧‧Exhaust device
30‧‧‧ gate valve
31‧‧‧1st high frequency power supply
32‧‧‧2nd high frequency power supply
33‧‧‧matcher
34‧‧‧matcher
38‧‧‧ gas shower head
40‧‧‧Electrostatic suction cup
40a‧‧‧electrode
40b‧‧‧Insulation
42‧‧‧DC voltage source
43‧‧‧Switch
44‧‧‧AC power supply
50‧‧‧Control Department
51‧‧‧CPU
52‧‧‧ROM
53‧‧‧RAM
54‧‧‧HDD
56‧‧‧Electrode plate
56a‧‧‧ gas vents
57‧‧‧Gas diffusion chamber
58‧‧‧Electrode support
60a‧‧‧ gas inlet
62‧‧‧ gas supply
64‧‧‧Gas supply piping
66‧‧‧ magnet
70‧‧‧ refrigerant tube
71‧‧‧cooler unit
72‧‧‧ gas supply pipeline
73‧‧‧Refrigerant circulation tube
75‧‧‧heater
77‧‧‧Temperature Sensor
D‧‧‧ line
E‧‧‧ line
F‧‧‧ line
HF‧‧‧1st high frequency power
LF‧‧‧2nd high frequency power
S10‧‧‧ steps
Step S12‧‧‧
S14‧‧‧ steps
S16‧‧ steps
S18‧‧‧ steps
S20‧‧‧ steps
S30‧‧‧ steps
Ton‧‧‧Connected time
Toff‧‧‧ disconnection time
W‧‧‧ wafer

圖1係表示一實施形態之蝕刻裝置之縱截面之一例的圖。 圖2(a)～(c)係模式性地表示一實施形態之極低溫環境下之蝕刻對象膜(積層膜及單層膜)之蝕刻的圖。 圖3係表示第1實施形態之間歇蝕刻處理之一例之流程圖。 圖4(a)、(b)係表示第1實施形態之間歇蝕刻及比較例之連續蝕刻之晶圓溫度之推移之一例的圖。 圖5(a)～(c)係表示第1實施形態之間歇蝕刻及比較例之連續蝕刻之蝕刻形狀之一例的圖。 圖6係表示第2實施形態之間歇蝕刻處理之一例的流程圖。 圖7(a)～(c)係表示第1實施形態之間歇蝕刻之占空比(duty ratio)之控制與蝕刻形狀之一例的圖。 圖8(a)、(b)係用以說明第3實施形態之蝕刻方法之圖。 圖9(a)、(b)係表示第3實施形態之蝕刻方法之結果之一例的圖。Fig. 1 is a view showing an example of a longitudinal section of an etching apparatus according to an embodiment. 2(a) to 2(c) are diagrams schematically showing etching of an etching target film (layered film and single layer film) in an extremely low temperature environment according to an embodiment. Fig. 3 is a flow chart showing an example of the batch etching process of the first embodiment. 4(a) and 4(b) are views showing an example of the transition of the wafer temperature in the intermittent etching of the first embodiment and the continuous etching in the comparative example. Figs. 5(a) to 5(c) are views showing an example of the etching shape of the intermittent etching of the first embodiment and the continuous etching of the comparative example. Fig. 6 is a flow chart showing an example of the intermittent etching process of the second embodiment. Figs. 7(a) to 7(c) are views showing an example of control and etching shape of the duty ratio of the intermittent etching in the first embodiment. 8(a) and 8(b) are views for explaining the etching method of the third embodiment. Figs. 9(a) and 9(b) are views showing an example of the result of the etching method of the third embodiment.

D‧‧‧線 D‧‧‧ line

E‧‧‧線 E‧‧‧ line

F‧‧‧線 F‧‧‧ line

Claims (14)

一種蝕刻方法，其具有： 第1步驟，其係於晶圓溫度為-35℃以下之極低溫環境下，自第1高頻電源輸出第1高頻功率，自第2高頻電源輸出低於上述第1高頻之第2高頻功率， 由含氫氣體及含氟氣體生成電漿，藉由電漿對積層有氧化矽膜及氮化矽膜之積層膜與氧化矽膜之單層膜進行蝕刻；及 第2步驟，其係停止上述第2高頻電源之輸出；且 重複上述第1步驟與上述第2步驟複數次，且控制為上述第1步驟係短於上述第2步驟之時間。An etching method comprising: a first step of outputting a first high frequency power from a first high frequency power supply in an extremely low temperature environment having a wafer temperature of -35 ° C or less; and outputting from the second high frequency power supply is lower than The second high-frequency power of the first high frequency generates a plasma from a hydrogen-containing gas and a fluorine-containing gas, and a laminated film of a ruthenium oxide film and a tantalum nitride film and a single-layer film of a ruthenium oxide film are laminated by a plasma. Etching; and a second step of stopping output of the second high frequency power supply; repeating the first step and the second step a plurality of times, and controlling the first step to be shorter than the second step . 如請求項1之蝕刻方法，其中 上述第2步驟係與上述第2高頻電源之輸出之停止同步地停止上述第1高頻電源之輸出。The etching method according to claim 1, wherein the second step stops the output of the first high-frequency power source in synchronization with the stop of the output of the second high-frequency power source. 如請求項1之蝕刻方法，其中 上述第1步驟之時間為上述第2步驟之時間之1/3以下。The etching method according to claim 1, wherein the time of the first step is 1/3 or less of the time of the second step. 如請求項2之蝕刻方法，其中 上述第1步驟之時間為上述第2步驟之時間之1/3以下。The etching method according to claim 2, wherein the time of the first step is 1/3 or less of the time of the second step. 一種蝕刻方法，其係 於晶圓溫度為-35℃以下之極低溫環境下，自第1高頻電源輸出第1高頻功率，自第2高頻電源輸出低於上述第1高頻之第2高頻功率，利用含氫氣體及含氟氣體生成電漿，藉由電漿對積層有氧化矽膜及氮化矽膜之積層膜與氧化矽膜之單層膜進行蝕刻，且 上述第1高頻功率或上述第2高頻功率之任一者為脈衝波，且控制上述脈衝波之占空比。An etching method for outputting a first high frequency power from a first high frequency power supply in a very low temperature environment having a wafer temperature of -35 ° C or less, and outputting from the second high frequency power supply lower than the first high frequency 2 high-frequency power, using a hydrogen-containing gas and a fluorine-containing gas to form a plasma, and etching a laminated film having a ruthenium oxide film and a tantalum nitride film and a single-layer film of a ruthenium oxide film by plasma, and the first Any of the high frequency power or the second high frequency power is a pulse wave, and the duty ratio of the pulse wave is controlled. 如請求項5之蝕刻方法，其中 所控制之上述占空比為50%以下。The etching method of claim 5, wherein the duty ratio controlled is 50% or less. 如請求項6之蝕刻方法，其中 上述第1高頻功率及上述第2高頻功率為脈衝波，且 上述第1高頻功率及上述第2高頻功率之上述占空比相同。The etching method according to claim 6, wherein the first high frequency power and the second high frequency power are pulse waves, and the duty ratios of the first high frequency power and the second high frequency power are the same. 如請求項1至7中任一項之蝕刻方法，其中 含氫氣體為氫(H2 )氣，含氟氣體為四氟化碳(CF4 )氣體。The etching method according to any one of claims 1 to 7, wherein the hydrogen-containing gas is hydrogen (H 2 ) gas and the fluorine-containing gas is carbon tetrafluoride (CF 4 ) gas. 一種蝕刻方法，其具有： 第1步驟，其係於晶圓溫度為-35℃以下之極低溫環境下，自第1高頻電源輸出第1高頻功率，自第2高頻電源輸出低於上述第1高頻之第2高頻功率， 由含氫氣體及含氟氣體生成電漿，藉由電漿對積層有氧化矽膜及氮化矽膜之積層膜與氧化矽膜之單層膜進行蝕刻；及 第2步驟，其係停止上述第2高頻電源之輸出； 上述第2步驟係以上述第1高頻電源之輸出與上述第2高頻電源之輸出之停止同步地變小之方式予以控制，且 重複上述第1步驟與上述第2步驟複數次，且控制為上述第1步驟係短於上述第2步驟之時間。An etching method comprising: a first step of outputting a first high frequency power from a first high frequency power supply in an extremely low temperature environment having a wafer temperature of -35 ° C or less; and outputting from the second high frequency power supply is lower than The second high-frequency power of the first high frequency generates a plasma from a hydrogen-containing gas and a fluorine-containing gas, and a laminated film of a ruthenium oxide film and a tantalum nitride film and a single-layer film of a ruthenium oxide film are laminated by a plasma. Etching; and a second step of stopping outputting of the second high frequency power supply; wherein the second step is smaller in synchronization with the output of the first high frequency power supply and the stop of the output of the second high frequency power supply The method is controlled, and the first step and the second step are repeated a plurality of times, and the first step is controlled to be shorter than the second step. 如請求項9之蝕刻方法，其中 上述第1步驟之時間為上述第2步驟之時間之1/3以下。The etching method according to claim 9, wherein the time of the first step is 1/3 or less of the time of the second step. 一種蝕刻方法，其係 於晶圓溫度為-35℃以下之極低溫環境下，自第1高頻電源輸出第1高頻功率，自第2高頻電源輸出低於上述第1高頻之第2高頻功率， 由含氫氣體及含氟氣體生成電漿，藉由電漿對積層有氧化矽膜及氮化矽膜之積層膜與氧化矽膜之單層膜進行蝕刻， 上述第1高頻功率及上述第2高頻功率為脈衝波， 控制上述脈衝波之占空比，且 以與上述第2高頻電源之輸出之停止同步地上述第1高頻電源之輸出變小之方式予以控制。An etching method for outputting a first high frequency power from a first high frequency power supply in a very low temperature environment having a wafer temperature of -35 ° C or less, and outputting from the second high frequency power supply lower than the first high frequency 2 high-frequency power, a plasma is generated from a hydrogen-containing gas and a fluorine-containing gas, and a laminated film having a ruthenium oxide film and a tantalum nitride film and a single-layer film of a ruthenium oxide film are etched by plasma, the first high The frequency power and the second high-frequency power are pulse waves, and the duty ratio of the pulse wave is controlled, and the output of the first high-frequency power source is reduced in synchronization with the stop of the output of the second high-frequency power source. control. 如請求項11之蝕刻方法，其中 所控制之上述占空比為50%以下。The etching method of claim 11, wherein the duty ratio controlled is 50% or less. 如請求項12之蝕刻方法，其中 上述第1高頻功率及上述第2高頻功率之上述占空比相同。The etching method of claim 12, wherein the duty ratios of the first high frequency power and the second high frequency power are the same. 如請求項9至13中任一項之蝕刻方法，其中 含氫氣體為氫(H2 )氣，含氟氣體為四氟化碳(CF4 )氣體。The etching method according to any one of claims 9 to 13, wherein the hydrogen-containing gas is hydrogen (H 2 ) gas and the fluorine-containing gas is carbon tetrafluoride (CF 4 ) gas.
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