TW201719914A - Photovoltaic element and method for manufacturing same - Google Patents

Abstract

Provided are: a photovoltaic element that has a low contact resistance in a collecting electrode, and that can increase conversion efficiency since the collecting electrode is formed with thin wires; and a method for manufacturing the photovoltaic element. The photovoltaic element is provided with: a layer structural body that has a transparent conductive film at least as an outermost layer on one side and that generates an electromotive force through photoirradiation; and a linear collecting electrode arranged on the outer surface of the transparent conductive film. The collecting electrode is characterized by having: a barrier layer that is layered on the outer surface of the transparent conductive film and that contains silver, copper, and at least one of palladium and gallium; and a copper layer that is layered on the outer surface of the barrier layer and of which the main ingredient is copper. The layer structural body preferably further has: a p-type or n-type crystal semiconductor substrate; a first true amorphous semiconductor layer and a p-type amorphous semiconductor layer that are layered in this order on one surface side of the crystal semiconductor substrate; and a n-layer side intermediate layer and a n-type amorphous semiconductor layer that are layered in this order on the other surface side of the crystal semiconductor substrate.

Description

Photoelectric power generation element and method of manufacturing same

The present invention relates to a photovoltaic power generation element and a method of manufacturing the same.

In recent years, solar cells have been attracting attention as a clean power generation means that does not generate a greenhouse gas such as CO ₂ or as a power generation means that is highly safe in operation in place of nuclear power generation. As a solar cell (photovoltaic element), a battery having a layer structure in which a transparent conductive film is provided on the outer surface is widely used, and a collector for collecting generated electric current is disposed on the outer surface of the transparent conductor.

The collector disposed on the outer surface is linear, and the amount of light acquisition can be increased by thinning the collector. As a method of forming a thinned collector, a method of forming a collector by a plating process using a resist film (also referred to as a mask) is disclosed (refer to Japanese Laid-Open Patent Publication No. 2010-98232). However, when the collector is thinned, the contact resistance with the transparent conductive film increases, and the electric resistance loss with respect to the current flowing along the collector increases, and the generated electric power cannot be sufficiently taken out. Therefore, as the collector, it is preferable to use a metal having good conductivity along the direction of the linear electrode, and in the above publication, a silver plating electrode layer is formed by a plating treatment. However, in the case of silver plating, silver cyanide or the like is usually used for the plating liquid, and it is desirable to form a plating layer containing another metal from the viewpoint of safety and the like.

For this reason, it is considered to form a plating layer by using copper which is second only to silver in conductivity. However, copper is easily oxidized, and a transparent conductive film is usually formed of an oxide. Therefore, in the case where copper is laminated on the transparent conductive film, copper is easily oxidized at the interface with the transparent conductive film to increase the contact resistance. Further, copper tends to diffuse toward the transparent conductive film side by annealing, which is also a cause of a decrease in conductivity.

PRIOR ART DOCUMENT Patent Document Patent Document 1: Japanese Patent Laid-Open Publication No. 2010-98232

Problem to be solved by the invention

The present invention has been made in view of the above circumstances, and an object of the invention is to provide a photovoltaic power generation element which has a small contact resistance of a collecting electrode and can improve conversion efficiency by thinning of a collecting electrode, and a method of manufacturing the same.

Means for solving problems

The present invention has been made in order to solve the above problems, and is a photovoltaic device comprising a layered structure including at least one outermost layer having a transparent conductive film and generating an electromotive force by light irradiation, and a transparent conductive layer disposed thereon a photovoltaic power generation element having a linear collector on an outer surface of the film, wherein the collector has a barrier layer laminated on an outer surface of the transparent conductive film, and a copper layer laminated on an outer surface of the barrier layer and containing copper as a main component. The barrier layer comprises at least one of palladium and gallium, silver and copper.

In the photovoltaic power generation element, a barrier layer containing at least one of palladium and gallium, silver, and copper can be used to suppress oxidation of the copper layer by the transparent conductive film. On the other hand, the barrier layer having such a composition itself has a small increase in resistance due to oxidation. Further, the barrier layer suppresses the diffusion of the copper layer. Therefore, according to the photovoltaic power generation element, the amount of light can be increased by the thinning of the collector, and the increase in resistance can be suppressed, so that the conversion efficiency can be improved.

Preferably, the collector further has a coating layer laminated on the outer surface of the copper layer. By having a coating layer, oxidation of the surface of the copper layer is suppressed, and as a result, a decrease in conversion efficiency can be suppressed.

The cover layer preferably contains tin as a main component. The surface oxidation of the copper layer can be effectively suppressed by using a coating layer containing tin as a main component. Further, since the light reflectance of tin is high, light reflected on the outer surface of the transparent conductive film is easily reflected again on the back surface of the cover film, and the amount of light can be increased. Further, by using tin as a coating layer, wettability and the like at the time of soft soldering can be improved.

The layer structure preferably further includes a p-type or n-type crystalline semiconductor substrate, and a first intrinsic amorphous semiconductor layer 13 and a p-type amorphous layer which are sequentially laminated on one surface side of the crystalline semiconductor substrate in the following order The semiconductor layer 14 and the n-layer side intermediate layer and the n-type amorphous semiconductor layer 17 which are sequentially stacked in the following order on the other surface side of the crystalline semiconductor substrate, and the n-layer side intermediate layer is the second intrinsic amorphous The high-resistance n-type amorphous semiconductor layer 17 having a higher resistivity than the n-type amorphous semiconductor layer 17 is used. The inventors have found that when the photovoltaic power generation element is of such a heterojunction type, the annealing treatment improves the passivation ability of the intrinsic amorphous semiconductor layer and the like which suppress carrier recombination, and the photovoltaic power generation element is improved. The output characteristics are improved. On the other hand, since the collector of the photovoltaic power generation element has the barrier layer described above, oxidation and diffusion of the copper layer can be suppressed by the annealing treatment, and the rise in contact resistance of the collector is small. Therefore, by using the photovoltaic power generation element in a heterojunction type element, conversion efficiency and the like can be further improved.

Another invention to solve the above problems is a method for producing a photovoltaic power generation device, which comprises sequentially laminating palladium on the outer surface of a layer structure having at least one outermost layer of a transparent conductive film and generating electromotive force by light irradiation. And a step of forming at least one of gallium and a metal film of silver and copper; forming a resist film on a portion of the outer surface of the metal film; and depositing copper on the exposed portion of the outer surface of the metal film by a plating treatment a step of forming a copper layer as a main component; a step of laminating a coating layer on the outer surface of the copper layer by a plating treatment; a step of removing the resist film; and removing the metal film in a region where the resist film has been removed A step of.

According to this manufacturing method, it is possible to obtain a photovoltaic power generation element having a small contact resistance and a high conversion efficiency by thinning the collector.

Preferably, after the step of removing the metal film, the step of annealing the layer structure is further included. By performing the annealing in this manner, the performance of the heterojunction type photoelectric conversion element can be improved, and oxidation and diffusion of the copper layer can be suppressed even by annealing, so that a photoelectric conversion element having more excellent output characteristics can be obtained.

Here, the "main component" means a component having the highest content on a weight basis. The "amorphous system" in the amorphous semiconductor layer includes not only a completely amorphous body but also a case where microcrystals are present in the amorphous material. Further, the "intrinsic" in the intrinsic amorphous semiconductor layer means a case where impurities are intentionally not doped, and the meaning thereof also includes the presence of impurities originally contained in the raw material and impurities which are inadvertently mixed in the manufacturing process.

Effect of the invention

According to the photovoltaic power generation element of the present invention, the contact resistance of the collector is small, and the thinning of the collector can be utilized to improve the conversion efficiency. Further, according to the method of manufacturing a photovoltaic power generation element of the present invention, such a photovoltaic power generation element can be manufactured.

Hereinafter, a photovoltaic power generation element according to an embodiment of the present invention and a method of manufacturing the same will be described in detail with reference to the accompanying drawings.

<Photovoltaic power generation element>

The photovoltaic power generation element 10 of Fig. 1 includes a layer structure 11 that generates an electromotive force by irradiating light. The layer structure 11 has an n-type crystalline semiconductor substrate 12 and a first intrinsic amorphous semiconductor layer 13 and a p-type layer which are sequentially laminated on one surface side (upper side in FIG. 1) of the n-type crystalline semiconductor substrate 12 in the following order. The amorphous semiconductor layer 14 and the first transparent conductive film 15; and the n-side intermediate layer 16 and the n-type which are sequentially laminated on the other surface side (the lower side in FIG. 1) of the n-type crystalline semiconductor substrate 12 in the following order The amorphous semiconductor layer 17 and the second transparent conductive film 18. That is, the first transparent conductive film 15 and the second transparent conductive film 18 are the outermost layers of the layer structure 11. Further, the photovoltaic power generation element 10 includes a plurality of linear collectors disposed on the outer surface (surface and back surface) of the layer structure 11, that is, the outer surface of the first transparent conductive film 15 and the outer surface of the second transparent conductive film 18. 19. In addition, the "outer surface" means a surface on the opposite side of the n-type crystalline semiconductor substrate 12 and on the opposite side to the n-type crystalline semiconductor substrate 12. In addition, the "inner surface" means a surface on the side of the n-type crystalline semiconductor substrate 12.

The n-type crystalline semiconductor substrate 12 is formed of an n-type crystalline semiconductor. By using an n-type substrate, it is possible to avoid the phenomenon of photodegradation peculiar to the p-type substrate. The n-type crystalline semiconductor is usually a crystal obtained by adding a trace amount of a pentavalent element to a semiconductor such as ruthenium. In addition to bismuth (Si), SiC, SiGe, and the like are exemplified as the crystalline semiconductor constituting the n-type crystalline semiconductor substrate 12. However, from the viewpoint of productivity and the like, it is preferable. The n-type crystalline semiconductor substrate 12 may be a single crystal or a polycrystalline body.

A pyramid-shaped fine concavo-convex structure is formed on both surfaces of the n-type crystalline semiconductor substrate 12. With this configuration, the light confinement function can be improved. The height or size of the uneven structure (texture structure) may not be uniform, and a part of adjacent unevenness may be overlapped. In addition, the vertices and valleys can be rounded. The height of the unevenness is about several μm to several tens of μm. Such a concavo-convex structure can be obtained, for example, by immersing a substrate material in an etching solution containing about 1 to 5% by weight of sodium hydroxide and anisotropically etching the (100) plane of the substrate material.

The average thickness of the n-type crystalline semiconductor substrate 12 is not particularly limited. The upper limit of the average thickness is, for example, 300 μm, preferably 200 μm. Further, the lower limit can be, for example, 50 μm. By thinning the n-type crystalline semiconductor substrate 12 in this manner, it is possible to reduce the size and cost of the photovoltaic power generation element 10 itself.

The first intrinsic amorphous semiconductor layer 13 is a layer existing between the n-type crystalline semiconductor substrate 12 and the p-type amorphous semiconductor layer 14 and functions as a layer that functions as a passivation layer that suppresses carrier recombination. . The first intrinsic amorphous semiconductor layer 13 is usually formed of tantalum. By using such an intrinsic amorphous semiconductor layer, recombination of carriers can be suppressed, and output characteristics can be improved. In addition, the average thickness of the first intrinsic amorphous semiconductor layer 13 can be, for example, 1 nm or more and 10 nm or less.

The p-type amorphous semiconductor layer 14 is usually an amorphous layer obtained by adding a trace amount of a trivalent element to ruthenium. The average thickness of the p-type amorphous semiconductor layer 14 can be, for example, 1 nm or more and 20 nm or less.

The n-layer side intermediate layer 16 is a layer existing between the n-type crystalline semiconductor substrate 12 and the n-type amorphous semiconductor layer 17, and functions as a layer that functions as a passivation layer for suppressing carrier recombination. The n-layer side intermediate layer 16 is a second intrinsic amorphous semiconductor layer or a high-resistance n-type amorphous semiconductor layer 17 having a higher specific resistance than the n-type amorphous semiconductor layer 17. In the case where the n-layer side intermediate layer 16 is an intrinsic amorphous semiconductor layer, the layer is usually formed of tantalum. When the n-layer side intermediate layer 16 is the high-resistance n-type amorphous semiconductor layer 17, an amorphous layer in which a trace amount of a pentavalent element is added to ruthenium is usually used. The high-resistance n-type amorphous semiconductor layer 17 has a high resistance due to the addition amount (doping amount) of the pentavalent element being smaller than that of the n-type amorphous semiconductor layer 17. By using the n-layer side intermediate layer 16 (intrinsic amorphous semiconductor layer or high-resistance n-type amorphous semiconductor layer 17), carrier recombination can be suppressed, and output characteristics can be improved. In addition, the average thickness of the n-layer side intermediate layer 16 can be, for example, 1 nm or more and 10 nm or less.

The n-type amorphous semiconductor layer 17 is usually an amorphous layer obtained by adding a trace amount of a pentavalent element to ruthenium. The average thickness of the n-type amorphous semiconductor layer 17 can be, for example, 1 nm or more and 20 nm or less.

Examples of the transparent conductive material constituting the first transparent conductive film 15 and the second transparent conductive film 18 include indium tin oxide (ITO), indium tungsten oxide (IWO), and indium antimony oxide (ICO). The average thickness of the first transparent conductive film 15 and the second transparent conductive film 18 is not particularly limited, and may be, for example, 40 nm or more and 200 nm or less.

Each of the collectors 19 is a layer structure 11 having a barrier layer 20, a copper layer 21, and a cover layer 22.

The barrier layer 20 is laminated on the outer surfaces of the transparent conductive films (the first transparent conductive film 15 and the second transparent conductive film 18). The barrier layer 20 includes: silver (Ag); at least one of palladium (Pd) and gallium (Ga); and copper (Cu). The barrier layer 20 containing such a component exhibits good barrier properties between the copper layer 21 and the first transparent conductive film 15 or the second transparent conductive film 18, and can suppress oxidation of the copper layer 21 due to contact with the transparent conductive film. On the other hand, the barrier layer 20 having such a composition itself has a small increase in resistance due to oxidation. In addition, the barrier layer 20 can also suppress the diffusion of copper forming the copper layer 21. Further, by forming the barrier layer 20 from such a component, the copper layer 21 can be effectively laminated on the barrier layer 20 by a plating treatment or the like.

The barrier layer 20 is preferably formed of an Ag-Pd-Cu-based or Ag-Ga-Cu-based silver alloy containing Ag as a main component and adding at least one of Pd and Ga and Cu. The content of Ag in the barrier layer 20 can be, for example, 90 atom% or more and 99 atom% or less. The content of Pd in the barrier layer 20 can be, for example, 0.2 atom% or more and 5 atom% or less. The content of Ga in the barrier layer 20 can be, for example, 0.2 atom% or more and 5 atom% or less. The barrier layer 20 may contain both Pd and Ga, and the total content of Pd and Ga may be, for example, 0.2 atom% or more and 5 atom% or less. The content of Cu in the barrier layer 20 can be, for example, 0.1 atom% or more and 5 atom% or less. By forming the barrier layer 20 from a silver metal having such a composition, it is possible to function more as a barrier layer of the copper layer 21. Incidentally, in the barrier layer 20, other components may be contained in a range that does not inhibit the effects of the present invention.

The average thickness of the barrier layer 20 is not particularly limited, and is preferably, for example, 10 nm, more preferably 20 nm, still more preferably 30 nm. On the other hand, as the upper limit thereof, it is preferably 300 nm, more preferably 150 nm, still more preferably 100 nm. When the average thickness of the barrier layer 20 is less than the above lower limit, sufficient barrier properties may not be exhibited. On the contrary, in the case where the average thickness of the barrier layer 20 exceeds the above upper limit, it is not necessary to partially remove (etch back) in the manufacturing step, and the productivity is lowered.

The copper layer 21 is laminated on the outer surface of the barrier layer 20. The copper layer 21 contains copper (Cu) as a main component. The lower limit of the content of Cu in the copper layer 21 is, for example, 80% by weight, preferably 95% by weight, and more preferably 99% by weight. The upper limit may be 100% by weight. However, the copper layer 21 may contain other components than Cu in a range that does not impair the effects of the present invention.

The average thickness of the copper layer 21 is not particularly limited, and may be, for example, 1 μm or more and 50 μm or less. When the average thickness of the copper layer 21 is less than the above lower limit, sufficient conductivity, current collecting property, and the like may not be exhibited. On the other hand, when the average thickness of the copper layer 21 exceeds the above upper limit, there is a risk that the cost is high and the productivity is lowered.

The cover layer 22 is preferably laminated on the outer surface of the copper layer 21. The oxidation of the surface of the copper layer 21 can be prevented by the cover layer 22. The cover layer 22 is typically formed of a metal. The metal forming the coating layer 22 is not particularly limited, and it is preferable that the coating layer 22 contains tin (Sn) as a main component. Since Sn has a high light reflectance, for example, light reflected on the outer surface of the first transparent conductive film 15 is easily reflected again on the back surface (inner surface) of the cover film 22, and the amount of light can be increased. Further, by using Sn for the cover layer 22, the wettability of the solder and the like can be improved. The lower limit of the content of Sn in the cover layer 22 is, for example, 80% by weight, preferably 95% by weight, and more preferably 99% by weight. The upper limit may be 100% by weight. However, other components than Sn may be contained in the cover layer 22 within a range not inhibiting the effects of the present invention.

The average thickness of the coating layer 22 is not particularly limited, and may be, for example, 0.5 μm or more and 5 μm or less. When the average thickness of the cover layer 22 is less than the above lower limit, a sufficient function may not be exhibited. On the contrary, in the case where the average thickness of the cover layer 22 exceeds the above upper limit, there is a risk that the cost is high and the productivity is lowered.

The plurality of linear collectors 19 are arranged in parallel with each other. The lower limit of the line width of the collecting electrode 19 is, for example, preferably 5 μm, more preferably 10 μm. On the other hand, the upper limit of the line width is, for example, preferably 100 μm, more preferably 50 μm. By setting the line width of the collecting electrode 19 to the above range, it is possible to increase the amount of light acquisition and to ensure conductivity.

The pitch of the collecting electrode 19 (the distance between the centers of the adjacent collecting electrodes 19) is not particularly limited, and is preferably 0.5 mm, more preferably 1 mm, as the lower limit. On the other hand, as the upper limit thereof, it is preferably 10 mm, more preferably 5 mm. By setting the pitch of the collecting electrodes 19 to the above range, the amount of light acquisition can be increased and the current collecting property can be ensured.

In the photovoltaic power generation element 10, the light incident surface may be the first transparent conductive film 15 side or the second transparent conductive film 18 side. It can also be used in such a way as to receive light from both sides. A plurality of photovoltaic power generation elements 10 are usually used in series connection. By using a plurality of photovoltaic power generation elements 10 in series, the power generation voltage can be increased.

<Method of Manufacturing Photovoltaic Power Generation Element>

The method of manufacturing the photovoltaic power generation element 10 includes the steps of obtaining the layer structure 11 and the step of forming the collector 19.

The layer structure 11 can be obtained by a conventional method, and specifically includes a step of laminating the first intrinsic amorphous semiconductor layer 13 on one surface side of the n-type crystalline semiconductor substrate 12; a step of laminating the semiconductor layer 14; a step of laminating the first transparent conductive film 15; a step of laminating the n-side intermediate layer 16 on the other surface side of the n-type crystalline semiconductor substrate 12; and further laminating an n-type amorphous semiconductor layer a step of 17; and a step of laminating the second transparent conductive film 18 in turn. Incidentally, the order of the respective steps is not particularly limited as long as the order of the layer structure of the layer structure 11 can be obtained.

As a method of laminating the first intrinsic amorphous semiconductor layer 13 and the n-layer intermediate layer 16 which is an intrinsic amorphous semiconductor layer, a conventional method such as a chemical vapor deposition method can be mentioned. Examples of the chemical vapor deposition method include a plasma CVD method, a catalyst CVD method (alias hot filament CVD method), and the like. In the case of the plasma CVD method, as the material gas, for example, a mixed gas of SiH ₄ and H ₂ can be used.

As a method of laminating the p-type amorphous semiconductor layer 14 and the n-type amorphous semiconductor layer 17, a chemical vapor deposition method similar to the lamination of the intrinsic amorphous semiconductor layer may be used. The method is used to form a film. In the case of the plasma CVD method, as the source gas, a mixed gas of, for example, SiH ₄ , H ₂ and B ₂ H ₆ can be used for the p-type amorphous semiconductor layer 14 . A mixed gas of, for example, SiH ₄ , H _{2 ,} and PH ₃ can be used in the n-type amorphous semiconductor layer 17.

The n-layer side intermediate layer 16 which is the high-resistance n-type amorphous semiconductor layer 17 can be formed by a conventional method such as chemical vapor deposition in the same manner as the n-type amorphous semiconductor layer 17 . The high-resistance n-type amorphous semiconductor layer 17 can be formed by further reducing the doping amount than the n-type amorphous semiconductor layer 17. For example, using the case of using a mixed gas containing SiH ₄ and PH ₃ plasma CVD method is a high-resistance n-type amorphous semiconductor layer 17, it will SiH ₄ as a reference PH ₃ as a dopant of When the amount of introduction is controlled to 1000 ppm or less, film formation is performed, whereby the high-resistance n-type amorphous semiconductor layer 17 can be obtained. In addition, when the high-resistance n-type amorphous semiconductor layer 17 is formed into a film, the introduction amount (concentration) of the PH ₃ can be introduced as a film for forming the n-type amorphous semiconductor layer 17 (concentration) is 1/100 or more and 1/5 or less.

Examples of the method of laminating the first transparent conductive film 15 and the second transparent conductive film 18 include a sputtering method, a vacuum deposition method, and an ion plating method (reactive plasma evaporation method), but it is preferred to use a sputtering method. Shooting method and ion plating method. The sputtering method is excellent in film thickness controllability and the like, and can be performed at a lower cost than ion plating or the like. On the other hand, according to the ion plating method, film formation in which the occurrence of defects is suppressed can be performed.

The collector electrode 19 can be formed, for example, by sequentially passing through the following steps (a) to (f).

Step (a) of laminating a metal film 30 containing at least one of palladium and gallium, silver and copper on the outer surface of the layer structure 11

Step (b) of forming a resist film 31 on a part of the outer surface of the above metal film 30

Step (c) of laminating a copper layer 21 containing copper as a main component on the exposed portion of the outer surface of the above-described metal film 30 by a plating treatment

Step (d) of laminating the cover layer 22 on the outer surface of the copper layer 21 by a plating treatment

Step (e) of removing the above resist film 31

Step (f) of removing the above-described metal film 30 in the region where the above resist film 31 has been removed

Hereinafter, each step will be described with reference to Fig. 2 .

[Step (a)]

In the step (a), a metal film 30 containing at least one of palladium and gallium, silver and copper is laminated on the outer surface of the layer structure 11 (see FIG. 2(a)). Incidentally, the outermost layer of the layer structure 11 is the first transparent conductive film 15 or the second transparent conductive film 18 (not shown in FIG. 2). The metal film 30 becomes the barrier layer 20 of the photovoltaic power generation element 10 of Fig. 1 . The lamination method of the metal film 30 is not particularly limited, and lamination can be suitably performed by sputtering. This sputtering can be performed using a sputtering target including the composition of the barrier layer 20. Further, film formation can be performed by using a sputtering target constituting each element of the barrier layer 20, controlling the amount of discharge, and simultaneously performing sputtering.

[Step (b)]

In the step (b), a resist film 31 is formed on a part of the outer surface of the metal film 30 (see FIG. 2(b)). The resist film 31 is also referred to as a mask, a plating resist, or the like, and a portion where the resist film 31 is not laminated is a portion where the collector electrode 19 is formed. The resist film 31 can be formed, for example, by inkjet printing. The material for forming the resist film 31 is not particularly limited, and an inorganic material or an organic material which is generally used can be used. As the resist material, in the case where the resist film 31 is formed by inkjet printing, paraffin wax is preferably used. When the heated paraffin wax in the molten state is printed on the surface of the metal film 30 by inkjet printing, the paraffin wax is cured on the surface of the metal film 30 after printing. Thereby, the resist film 31 having a steep side surface can be efficiently formed. Further, the removal of the resist film 31 formed of paraffin can also be easily performed. Incidentally, the resist film 31 may be formed of other materials such as a photoresist material or the like.

[Step (c)]

In the step (c), the copper layer 21 containing copper as a main component is laminated on the exposed portion of the outer surface of the metal film 30 by a plating treatment (see FIG. 2(c)). This copper plating can be carried out by a conventional method such as a sulfate bath.

[Step (d)]

In the step (d), the cover layer 22 is laminated on the outer surface of the copper layer 21 by a plating treatment (see FIG. 2(d)). This plating treatment can be carried out by a known method. For example, in the case of tin plating, it can be carried out by using a sulfate bath or the like.

[Step (e)]

In the step (e), the resist film 31 is removed (see Fig. 2(e)). The removal of the resist film 31 can be carried out using an acid solution, an alkali solution or the like. In the case where the resist film 31 is formed of paraffin, the resist film 31 can be effectively removed by, for example, an aqueous potassium hydroxide solution. The concentration of the aqueous potassium hydroxide solution is, for example, about 1% by weight or more and about 5% by weight or less.

[Step (f)]

In the step (f), the region where the resist film 31 has been removed, that is, the metal film 30 in the region where the copper layer 21 is not laminated is removed (etched back) (see FIG. 2(f)). The collector electrode 19 is thus formed. The removal of the metal film 30 can be performed by using an etching solution capable of dissolving the metal film 30. Examples of such an etching solution include a phosphoric acid aqueous solution and the like. The etching liquid of the metal film 30 preferably has a phosphoric acid content of 50% by weight or more and 70% or less, a nitric acid content of 0.1% by weight or more and 9.9% by weight or less, and an acetic acid content of 10% by weight or more and 30% by weight. An aqueous solution having a content of ammonium fluoride or less of 0.1% by weight or more and 2.0% by weight or less.

Incidentally, the collector electrode 19 shown in Fig. 2(f) obtained by such a step has a shape in which the upper surface is slightly wider than the bottom surface and the side surface is slightly curved to be concave. When the collector electrode 19 has such a shape, the light reflected on the outer surface of the transparent conductive film is again reflected on the side surface of the collector electrode 19 or the like, and is easily incident on the transparent conductive film. This can increase the amount of light acquired.

The manufacturing method preferably further includes a step of annealing the layer structure 11 after removing the metal film 30 in the region where the copper layer 21 is not laminated. By performing such annealing, the passivation ability and the like of the first intrinsic amorphous semiconductor layer 13 are improved, and the output characteristics of the heterojunction type photoelectric conversion element can be improved. On the other hand, at the time of the annealing, the collector electrode 19 is also annealed, and by performing the annealing, the oxidation and diffusion of the copper layer 21 are suppressed by the barrier layer 20, so that the electric resistance is not greatly increased, and photovoltaics having excellent power generation efficiency can be obtained. Conversion component.

The conditions for the annealing treatment are not particularly limited, and for example, the treatment temperature may be 150° C. or higher and 250° C. or lower. Further, the treatment time may be 10 minutes or longer and 1 hour or shorter.

The present invention is not limited to the above-described embodiments, and the configuration may be changed within a range that does not change the gist of the present invention. For example, the collector 19 on the back side of the double-sided collector 19 may be formed of a metal or the like laminated on the entire surface. As such a metal, silver, an Ag-Pd-Cu alloy, an Ag-Ga-Cu alloy, or the like can be suitably used. Further, when the layer structure 11 constitutes a heterojunction type, a p-type crystalline semiconductor substrate may be used. Further, the transparent conductive film may be formed on at least the incident surface side, and the transparent conductive film may not be formed on the back surface side. However, by laminating a transparent conductive film on the outer surface of the amorphous semiconductor layer on the back side, generation of a defect level can be suppressed, and conversion efficiency can be improved.

Example

Hereinafter, the contents of the present invention will be more specifically described by way of examples and comparative examples. It should be noted that the present invention is not limited to the following examples.

<Example 1>

Formed to include a first transparent conductive film 15 / p type amorphous germanium layer / first intrinsic amorphous germanium layer / n type crystalline germanium substrate / second intrinsic amorphous germanium layer (n layer side The intermediate layer 16)/n-type amorphous enamel layer/layer structure 11 of the second transparent conductive film 18. The n-type crystalline germanium substrate is formed by using a single crystal substrate having a fine uneven structure (texture structure) having a plurality of pyramidal shapes on both surfaces. The uneven structure is formed by immersing a substrate material in an etching solution containing about 3% by weight of sodium hydroxide and anisotropically etching the (100) plane of the substrate material. Further, each of the tantalum layers was laminated by a plasma CVD method. In each of the transparent conductive films, indium oxide (a sputtering target of UMICORE Co., Ltd.) containing 3% by weight of tin oxide was used and laminated by sputtering. It is to be noted that the p-type amorphous germanium layer, the first intrinsic amorphous germanium layer, the n-type crystalline germanium substrate, the second intrinsic amorphous germanium layer, and the n-type amorphous germanium layer are respectively The p-type amorphous semiconductor layer 14, the first intrinsic amorphous semiconductor layer 13, the n-type crystalline semiconductor substrate 12, the second intrinsic amorphous semiconductor layer, and the n-type amorphous semiconductor layer 17 correspond to each other. .

Next, a plurality of linear collector electrodes 19 (line width 30 μm, pitch 2 mm) were formed on the outer surfaces of the first transparent conductive film 15 and the second transparent conductive film 18 by the following method. First, an Ag-Pd-Cu-based metal film 30 having an average thickness of 50 nm was formed on both surfaces of the layer structure 11 by sputtering using an APC-TR target of FURUYA METAL. Next, a resist film 31 for plating is formed on the metal film 30 by inkjet printing using paraffin wax. Next, a copper plating layer having an average thickness of about 4 μm was formed on the exposed metal film 30 by a plating treatment. Next, a tin plating layer having an average thickness of about 1 μm was formed on the copper plating layer by a plating treatment. Next, it was immersed in a 3% by weight potassium hydroxide solution at 25 ° C for 1 minute to remove paraffin wax as the resist film 31. Next, it was immersed in a phosphoric acid aqueous solution for 10 seconds, thereby removing the exposed portion of the metal film 30. Thereafter, annealing treatment was performed at 200 ° C for 30 minutes. Thus, the photovoltaic power generation element of Example 1 was obtained.

<Example 2>

Using an AGC target (Ag: 97.0 to 99.7 wt%, Ga: 0.2 to 1.5 wt%, Cu: 0.1 to 1.5 wt%), Ag-Ga-Cu having an average thickness of 50 nm was formed on both surfaces of the layer structure 11 by sputtering. A photovoltaic power generation element of Example 2 was obtained in the same manner as in Example 1 except that the metal film 30 was used.

<Comparative Example 1>

A photovoltaic power generation element of Comparative Example 1 was obtained in the same manner as in Example 1 except that the collecting electrode 19 (line width: 80 μm, pitch: 2 mm) was formed by screen printing using a silver paste.

<Comparative Example 2>

A photovoltaic power generation element of Comparative Example 2 was obtained in the same manner as in Example 1 except that the collecting electrode 19 (line width: 30 μm, pitch: 2 mm) was formed by screen printing using a silver paste.

<evaluation>

The short-circuit current (A), open circuit voltage (V), curve factor, and conversion efficiency (%) of each of the obtained photovoltaic power generation elements were measured. The results are shown in Table 1.

Table 1

As shown in Table 1, it is understood that the photovoltaic power generation elements of Examples 1 and 2 have a large curve factor and excellent conversion efficiency.

<Measurement of contact resistance>

The following test film (average thickness: 50 nm) was formed by sputtering on the surface of a transparent conductive film containing indium oxide containing 3% by weight of tin oxide, and then annealed (200 ° C, 30 minutes). The contact resistivity of each test film before and after the annealing treatment was measured. The measurement results are shown in Fig. 3. Incidentally, the test films 1 and 2 (Ag-Pd-Cu-based alloy film) were formed by using the APC-TR target used in Example 1. The test films 3 and 4 (Ag-Ga-Cu-based alloy film) were formed by using the AGC target used in Example 2.

・Test film 1: Ag-Pd-Cu alloy (before annealing treatment)

・Test film 2: Ag-Pd-Cu alloy (after annealing)

・Test film 3: Ag-Ga-Cu alloy (before annealing treatment)

・Test film 4: Ag-Ga-Cu alloy (after annealing)

・Test film 5: Al-Ni alloy (before annealing treatment)

・Test film 6: Al-Ni alloy (after annealing treatment)

・Test film 7: Mo (before annealing treatment)

・Test film 8: Mo (after annealing treatment)

Incidentally, any annealing treatment was carried out at 200 ° C for 30 minutes.

As shown 3 As shown, it can be seen that: generally as a barrier 20 Metal used Al - Ni High resistance of metal (test film 5 ), and the resistance is made higher by performing annealing treatment (test film 6 ). In use Mo Condition (test film 7 , 8 Under, although the resistance ratio Al - Ni The alloy is low, but it is difficult to use plating. Mo Laminated copper Floor twenty one . On the other hand, we know that: in use Ag - Pd - Cu Alloy condition (test film 1 , 2 )and use Ag - Ga - Cu Alloy condition (test film 3 , 4 Underneath, the lower resistance is shown before and after the annealing treatment.

Industrial availability

The photovoltaic power generation element of the present invention can improve conversion efficiency and can be suitably used for photovoltaic power generation.

10‧‧‧Photovoltaic components
11‧‧‧ layer structure
12‧‧‧n type crystalline semiconductor substrate
13‧‧‧First intrinsic amorphous semiconductor layer
14‧‧‧p-type amorphous semiconductor layer
15‧‧‧First transparent conductive film
16‧‧‧n intermediate layer
17‧‧‧n-type amorphous semiconductor layer
18‧‧‧Second transparent conductive film
19‧‧‧ Collector
20‧‧‧Block
21‧‧‧ copper layer
22‧‧‧ Coverage
30‧‧‧Metal film
31‧‧‧Resist film

1 is a schematic cross-sectional view of a photovoltaic power generation element according to an embodiment of the present invention; (a) to (f) of FIG. 2 are schematic cross-sectional views showing a method of manufacturing the photovoltaic power generation element of FIG. 1; A graph of the results of contact resistance measurements in the examples.

10‧‧‧Photovoltaic components

11‧‧‧ layer structure

12‧‧‧n type crystalline semiconductor substrate

13‧‧‧First intrinsic amorphous semiconductor layer

14‧‧‧p-type amorphous semiconductor layer

15‧‧‧First transparent conductive film

16‧‧‧n intermediate layer

17‧‧‧n-type amorphous semiconductor layer

18‧‧‧Second transparent conductive film

19‧‧‧ Collector

20‧‧‧Block

21‧‧‧ copper layer

22‧‧‧ Coverage

Claims (6)

A photovoltaic power generation element comprising: a layered structure having a transparent conductive film as at least one outermost layer and generating an electromotive force by light irradiation; and the photovoltaic power generation element disposed on a linear collector of an outer surface of the transparent conductive film; The linear collector has a barrier layer laminated on an outer surface of the transparent conductive film and a copper layer laminated on an outer surface of the barrier layer and containing copper as a main component, the barrier layer containing at least one of palladium and gallium , silver and copper. The photovoltaic power generation element according to claim 1, wherein the linear collector further has a cover layer laminated on an outer surface of the copper layer. The photovoltaic power generation element according to claim 2, wherein the cover layer contains tin as a main component. The photovoltaic power generation device according to any one of claims 1 to 3, wherein the layer structure further comprises: a p-type crystalline semiconductor substrate or an n-type crystalline semiconductor substrate; and one side of the crystalline semiconductor substrate a first intrinsic amorphous semiconductor layer and a p-type amorphous semiconductor layer which are sequentially stacked in the following order; and an n-side intermediate layer which is sequentially laminated on the other surface side of the crystalline semiconductor substrate in the following order and An n-type amorphous semiconductor layer; the n-layer side intermediate layer is a second intrinsic amorphous semiconductor layer or a high-resistance n-type non-resistivity higher than the n-type amorphous semiconductor layer A crystalline semiconductor layer. A method for producing a photovoltaic power generation device, comprising: laminating at least one of palladium and gallium, silver, and copper on an outer surface of a layered structure having at least one outermost layer of a transparent conductive film and generating electromotive force by light irradiation a step of forming a resist film on a portion of the outer surface of the metal film; and a step of laminating a copper layer containing copper as a main component on the exposed portion of the outer surface of the metal film by a plating treatment; a step of laminating a cover layer on the outer surface of the copper layer by a plating treatment; a step of removing the resist film; and a step of removing the metal film in a region where the resist film has been removed. The method for producing a photovoltaic power generation device according to claim 5, further comprising the step of annealing the layer structure after the metal film removing step.