TW201714227A - Processing method of electric packaging structure by discharging bubbles from periphery of adhesive member to greatly enhance reliability and quality of electric packaging structure - Google Patents

Processing method of electric packaging structure by discharging bubbles from periphery of adhesive member to greatly enhance reliability and quality of electric packaging structure Download PDF

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TW201714227A
TW201714227A TW104133482A TW104133482A TW201714227A TW 201714227 A TW201714227 A TW 201714227A TW 104133482 A TW104133482 A TW 104133482A TW 104133482 A TW104133482 A TW 104133482A TW 201714227 A TW201714227 A TW 201714227A
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package structure
electronic package
temperature
substrate
processing chamber
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TW104133482A
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TWI562247B (en
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Yu-Mian Zhuang
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Yu-Mian Zhuang
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Abstract

The present invention provides a processing method of electric packaging structure, which includes the following steps: (a) preparing an electric packaging structure on which at least one adhesive member is disposed for protecting, isolating, or joining with electric components; (b) moving the adhesive member and electric packaging structure into a processing chamber before the at least one adhesive member is cured; (c) raising the temperature inside the processing chamber from room temperature to a predetermined temperature in a temperature raising speed and maintaining the predetermined temperature for a predetermined period, and then reducing from the predetermined temperature to room temperature in a predetermined cooling speed, while the pressure in the processing chamber is subjected to at least once the sequentially alternative changing process between an intermittent pressure rising and an intermittent pressure dropping, so as to discharge the bubbles from the periphery of the adhesive member, and thus greatly enhance the reliability and quality of the electric packaging structure.

Description

電子封裝結構之處理方法 Electronic package structure processing method

本發明係屬電子封裝的技術領域,尤指其技術上提供一電子封裝結構之處理方法,透過間歇性的壓力變化使氣泡有較充裕的時間調整空間位置,有助於消除黏著膠件與電子封裝結構界面處之氣泡及/或該黏著膠件內部氣泡,將氣泡由該黏著膠件之四周排出,大幅度提高了電子封裝結構之可靠性與品質。 The invention belongs to the technical field of electronic packaging, in particular to a technical method for providing an electronic packaging structure, which enables the bubbles to have ample time to adjust the spatial position through intermittent pressure changes, which helps to eliminate adhesive parts and electrons. The bubbles at the interface of the package structure and/or the bubbles inside the adhesive member are discharged from the periphery of the adhesive member, which greatly improves the reliability and quality of the electronic package structure.

在科技日新月異的世代,高科技電子技術相繼問世,使得更人性化、功能更佳的電子產品不斷地推陳出新,並朝向輕、薄、短、小的趨勢設計。為達成上述的要求,必須滿足電子元件的高速處理化、多功能化、積集化、小型輕量化及低價化等多方面的要求,為此電子封裝結構例如球柵陣列(ball grid array)封裝結構、覆晶(Flip Chip)封裝結構、印刷電路板(Printed circuit board,PCB)封裝結構及封模穿孔(through mold via,TMV)封裝結構等也跟著朝向微型化、高密度化發展。 In the ever-changing generation of technology, high-tech electronic technology has come out one after another, making more humanized and functional electronic products constantly innovating and designing towards light, thin, short and small trends. In order to achieve the above requirements, it is necessary to satisfy various requirements such as high-speed processing, multi-function, integration, small size, light weight, and low cost of electronic components. For this reason, an electronic package structure such as a ball grid array The package structure, Flip Chip package structure, printed circuit board (PCB) package structure, and through-mold via (TMV) package structure have also been developed toward miniaturization and high density.

習知球柵陣列封裝結構包含一晶片及一基板,該晶片透過黏晶薄膜(die attachment film,DAF)等黏晶料件貼附在該基板上,在貼附過程中容易在該黏晶料件及該基板界面處產生氣泡,嚴重影響產品的可靠性與品質;覆晶封裝結構包含一晶片、一基板及複數個導電凸塊,該晶片和該基板之間固設該些導電凸塊,由於導電凸塊間距日益細微化,晶片與基板的接合間隙亦日益縮小化,在從晶片邊緣填膠過程中容易在該底膠與該基板界面處以及該底膠內部產生氣泡,使得導電性或導熱性不佳,甚而影響覆晶封裝結構之使用壽命;印刷電路板封裝結構包含一印刷電路板,該印刷電路板間隔貫設複數個通孔,每一通孔內周進行通孔電鍍(Plating through hole,PTH),形成一金屬電鍍層,每一金屬電鍍層上填覆非導電膠,由於通孔口徑日益細微化,愈增填入非導電膠的困難度,在填膠過程中容易在該非導電膠與該金屬電鍍層界面處產生氣泡,造成影響PCB封裝結構之可靠性與品質;封模穿孔封裝結構包含一晶片、一基板、複數個導電凸塊及一 封裝膠體,該晶片和該基板之間固設該些導電凸塊,該封裝膠體配置於該基板一表面上,該封裝膠體包覆該晶片及各該導電凸塊,該封裝膠體間隔貫設複數個通孔,每一通孔內填覆該導電膠,由於通孔口徑日益細微化,且該基板封閉通孔一端,愈增將導電膠由通孔另一端填入通孔的困難度,在從通孔另一端邊緣填膠過程中容易在導電膠與通孔界面處產生氣泡,造成影響TMV封裝結構之可靠性與品質,前述各式氣泡的形成對於球柵陣列封裝結構等電子封裝結構朝向微型化、高密度化發展必將造成嚴重的阻礙,實有急切加以解決的必要。 The conventional ball grid array package structure comprises a wafer and a substrate, and the wafer is attached to the substrate through a die attaching material (DAF) or the like, and is easily applied to the bonded material during the attaching process. Bubbles are generated at the interface of the substrate, which seriously affects the reliability and quality of the product; the flip chip package structure comprises a wafer, a substrate and a plurality of conductive bumps, and the conductive bumps are fixed between the wafer and the substrate, due to conduction The pitch of the bumps is increasingly finer, and the bonding gap between the wafer and the substrate is also increasingly reduced, and bubbles are easily generated at the interface between the primer and the substrate and inside the primer during the edge filling process of the wafer, so that conductivity or thermal conductivity is obtained. Poor, even affecting the service life of the flip chip package structure; the printed circuit board package structure comprises a printed circuit board, the printed circuit board is provided with a plurality of through holes, and each through hole is plated through the inner periphery (Plating through hole, PTH), forming a metal plating layer, each metal plating layer is filled with non-conductive glue, and the difficulty of filling the non-conductive glue is increased due to the increasingly fine diameter of the through hole. Filler during the non-conductive adhesive easily generated at the interface of the metal-plated layer of bubbles, resulting in reliability and Quality PCB package structure; overmolding perforated package comprises a chip, a substrate, a plurality of conductive bumps and a The encapsulant colloid is disposed between the wafer and the substrate, and the encapsulant is disposed on a surface of the substrate, the encapsulant covers the wafer and each of the conductive bumps, and the encapsulant is disposed at intervals a through hole, each of which is filled with the conductive paste. Since the diameter of the through hole is increasingly fine, and the substrate closes one end of the through hole, the difficulty of filling the conductive hole from the other end of the through hole is more difficult. The edge of the other end of the through hole is easy to generate bubbles at the interface between the conductive paste and the through hole, which affects the reliability and quality of the TMV package structure. The formation of the above various types of bubbles is toward the micro package structure such as the ball grid array package structure. The development of high-density and high-density will inevitably cause serious obstacles, and it is necessary to urgently solve them.

是以,針對上述習知電子封裝結構所存在之問題點,如何開發一種更具理想實用性並兼顧經濟效益之氣泡排除方法,實為相關業者積極研發突破之目標及方向。 Therefore, in view of the problems existing in the above-mentioned conventional electronic package structure, how to develop a bubble elimination method which is more ideal and practical and takes into consideration economic benefits is actually an objective and direction for the relevant industry to actively develop breakthroughs.

有鑑於此,發明人本於多年從事相關產品之製造開發與設計經驗,針對上述之目標,詳加設計與審慎評估後,終得一確具實用性之本發明。 In view of this, the inventor has been engaged in the manufacturing development and design experience of related products for many years. After detailed design and careful evaluation, the inventor has finally obtained the practical invention.

欲解決之技術問題點:習知球柵陣列封裝結構等電子封裝結構在朝向微型化、高密度化發展的過程中,由於填膠或黏膠等技術難度日益增加,導致各式氣泡的形成,嚴重影響產品之可靠性與品質,實有加以改良的必要。 Technical problems to be solved: In the process of miniaturization and high density development of electronic package structures such as the conventional ball grid array package structure, the formation of various types of bubbles is seriously affected due to the increasing technical difficulty of filling or viscose. The reliability and quality of the product are necessary to improve.

解決問題之技術特點:為改善上述之問題,本發明提供一種電子封裝結構之處理方法,其步驟包括:a.製備一電子封裝結構,在該電子封裝結構上設置至少一黏著膠件,藉以保護、隔絕或結合電子構件。 Technical Solution to Problem: In order to improve the above problems, the present invention provides a method for processing an electronic package structure, the steps of which include: a. preparing an electronic package structure, wherein at least one adhesive component is disposed on the electronic package structure, thereby protecting , isolated or combined with electronic components.

b.在至少一該黏著膠件未固化前,將至少一該黏著膠件及該電子封裝結構移入一處理腔室內。 b. moving at least one of the adhesive member and the electronic package structure into a processing chamber before at least one of the adhesive members is uncured.

c.使該處理腔室內的溫度以一預定升溫速率由一初始溫度上升至一預定溫度,並維持該預定溫度經過一預定時間,以增加該黏著膠件的流動性,再以一預定降溫速率由該預定溫度下降至一設定溫度,同時該處理腔室內的壓力依序進行至少一次間歇性壓力上升及間歇性壓力下降之壓力升 降交互變化過程,以消除黏著膠件與電子封裝結構界面處之氣泡及/或黏著膠件內部氣泡,將氣泡由黏著膠件之四周排出。 c. raising the temperature in the processing chamber from an initial temperature to a predetermined temperature at a predetermined heating rate, and maintaining the predetermined temperature for a predetermined time to increase the fluidity of the adhesive member, and then at a predetermined cooling rate The predetermined temperature is lowered to a set temperature, and the pressure in the processing chamber is sequentially subjected to at least one intermittent pressure rise and intermittent pressure drop. The interaction process is reduced to eliminate bubbles at the interface between the adhesive member and the electronic package structure and/or bubbles inside the adhesive member, and the bubbles are discharged from the periphery of the adhesive member.

前述,該處理腔室內溫度之設定介於攝氏20度至500度的範圍。 As described above, the temperature in the processing chamber is set in the range of 20 to 500 degrees Celsius.

前述,該處理腔室內壓力變化範圍之設定介於1大氣壓(atm)至60大氣壓(atm)之間。 As described above, the pressure variation range in the processing chamber is set between 1 atmosphere (atm) and 60 atmospheres (atm).

本發明更提供一種電子封裝結構之黏著膠件氣泡排除方法,其步驟包括:a.製備一電子封裝結構,在該電子封裝結構上設置至少一黏著膠件,藉以保護、隔絕或結合電子構件。 The invention further provides an adhesive sealing method for an electronic packaging structure, the steps comprising: a. preparing an electronic packaging structure, wherein at least one adhesive component is disposed on the electronic packaging structure, thereby protecting, isolating or combining the electronic components.

b.在至少一該黏著膠件未固化前,將至少一該黏著膠件及該電子封裝結構移入一處理腔室內。 b. moving at least one of the adhesive member and the electronic package structure into a processing chamber before at least one of the adhesive members is uncured.

c.使該處理腔室內的溫度以一預定升溫速率由一初始溫度上升至一預定溫度,並維持該預定溫度經過一預定時間,以增加該黏著膠件的流動性,同時該處理腔室內的壓力依序進行至少一次間歇性壓力上升及間歇性壓力下降之壓力升降交互變化過程,以消除黏著膠件與該電子封裝結構界面處之氣泡及/或黏著膠件內部氣泡,將氣泡由黏著膠件之四周逐漸排出。 c. raising the temperature in the processing chamber from an initial temperature to a predetermined temperature at a predetermined heating rate, and maintaining the predetermined temperature for a predetermined time to increase the fluidity of the adhesive member while the processing chamber is The pressure sequentially performs at least one intermittent pressure rise and intermittent pressure drop pressure change interaction process to eliminate bubbles at the interface between the adhesive component and the electronic package structure and/or internal bubbles of the adhesive component, and the bubble is adhered by the adhesive The parts are gradually discharged.

d.將該處理腔室內的壓力進行一次間歇性壓力上升及持續性壓力下降之壓力升降交互變化過程,同時使該處理腔室內的溫度以一預定降溫速率由該預定溫度下降至一設定溫度,將殘留氣泡由黏著膠件之四周排出。 d. performing a pressure rise and fall alternating process of intermittent pressure rise and continuous pressure drop in the pressure in the processing chamber, and simultaneously lowering the temperature in the processing chamber from the predetermined temperature to a set temperature by a predetermined temperature drop rate, The residual air bubbles are discharged from the periphery of the adhesive member.

前述,在步驟c及步驟d中該處理腔室內溫度之設定介於攝氏20度至500度的範圍。 As described above, in step c and step d, the temperature of the processing chamber is set in the range of 20 to 500 degrees Celsius.

前述,在步驟c及步驟d中該處理腔室內壓力變化範圍之設定介於1大氣壓(atm)至60大氣壓(atm)之間。 In the foregoing, in step c and step d, the pressure variation range in the processing chamber is set between 1 atm and 60 atm.

對照先前技術之功效:本發明之電子封裝結構之處理方法,該處理腔室內的壓力進行間歇性壓力上升及間歇性壓力下降之壓力變化過程,藉由間歇性的壓力變化使氣泡有較充裕的時間調整空間位置,有助於消除黏著膠件與電子封裝結構界面處之氣泡及/或黏著膠件內部氣 泡,將氣泡由黏著膠件之四周排出,大幅度提高了電子封裝結構之可靠性與品質。 Compared with the efficacy of the prior art: the processing method of the electronic package structure of the present invention, the pressure in the processing chamber is subjected to a pressure change process of intermittent pressure rise and intermittent pressure drop, and the bubble is more abundant by intermittent pressure change. Time adjustment of the spatial position helps to eliminate air bubbles at the interface between the adhesive component and the electronic package structure and/or internal gas of the adhesive component The bubble is discharged from the periphery of the adhesive member, which greatly improves the reliability and quality of the electronic package structure.

有關本發明所採用之技術、手段及其功效,茲舉數較佳實施例並配合圖式詳細說明於後,相信本發明上述之目的、構造及特徵,當可由之得一深入而具體的瞭解。 The above-mentioned objects, structures and features of the present invention will be described in detail with reference to the preferred embodiments of the present invention. .

201-203‧‧‧步驟 201-203‧‧‧Steps

301-304‧‧‧步驟 301-304‧‧‧Steps

10‧‧‧球柵陣列封裝結構 10‧‧‧Ball grid array package structure

11‧‧‧晶片 11‧‧‧ wafer

12‧‧‧基板 12‧‧‧Substrate

13‧‧‧金屬線 13‧‧‧Metal wire

14‧‧‧焊塊 14‧‧‧ solder bumps

15‧‧‧氣泡 15‧‧‧ bubbles

20‧‧‧黏晶料件 20‧‧‧bonded material

30‧‧‧覆晶封裝結構 30‧‧‧Flip chip package structure

31‧‧‧晶片 31‧‧‧ wafer

32‧‧‧基板 32‧‧‧Substrate

33‧‧‧導電凸塊 33‧‧‧Electrical bumps

34‧‧‧氣泡 34‧‧‧ bubbles

35‧‧‧氣泡 35‧‧‧ bubbles

40‧‧‧底膠 40‧‧‧Bottom glue

50‧‧‧PCB封裝結構 50‧‧‧PCB package structure

51‧‧‧印刷電路板 51‧‧‧Printed circuit board

52‧‧‧第一導電層 52‧‧‧First conductive layer

53‧‧‧第二導電層 53‧‧‧Second conductive layer

54‧‧‧通孔 54‧‧‧through hole

55‧‧‧金屬電鍍層 55‧‧‧metal plating

56‧‧‧第一穿孔 56‧‧‧First perforation

57‧‧‧第二穿孔 57‧‧‧Second perforation

58‧‧‧氣泡 58‧‧‧ bubbles

60‧‧‧非導電膠 60‧‧‧ Non-conductive adhesive

70‧‧‧TMV封裝結構 70‧‧‧TMV package structure

71‧‧‧晶片 71‧‧‧ wafer

72‧‧‧基板 72‧‧‧Substrate

73‧‧‧導電凸塊 73‧‧‧Electrical bumps

74‧‧‧封裝膠體 74‧‧‧Package colloid

75‧‧‧通孔 75‧‧‧through hole

76‧‧‧焊塊 76‧‧‧ solder bumps

77‧‧‧氣泡 77‧‧‧ bubbles

80‧‧‧導電膠 80‧‧‧ conductive adhesive

第1圖係本發明之第一實施例之電子封裝結構之處理方法的流程圖。 1 is a flow chart showing a method of processing an electronic package structure according to a first embodiment of the present invention.

第2圖係本發明之第一實施例之氣泡排除過程溫度、壓力及時間三者間變化之關係圖。 Fig. 2 is a graph showing the relationship between temperature, pressure and time of the bubble removing process in the first embodiment of the present invention.

第3圖係本發明之第二實施例之電子封裝結構之處理方法的流程圖。 Figure 3 is a flow chart showing the processing method of the electronic package structure of the second embodiment of the present invention.

第4圖係本發明之第二實施例之氣泡排除過程溫度、壓力及時間三者間變化之關係圖。 Fig. 4 is a graph showing the relationship between temperature, pressure and time of the bubble removing process in the second embodiment of the present invention.

第5圖係本發明之球柵陣列封裝結構上膠的剖面示意圖。 Figure 5 is a schematic cross-sectional view showing the sizing of the ball grid array package structure of the present invention.

第6圖係本發明之覆晶封裝結構上膠的剖面示意圖。 Figure 6 is a schematic cross-sectional view showing the sizing of the flip chip package structure of the present invention.

第7圖係本發明之PCB封裝結構上膠的剖面示意圖。 Figure 7 is a schematic cross-sectional view showing the sizing of the PCB package structure of the present invention.

第8圖係本發明之TMV封裝結構上膠的剖面示意圖。 Figure 8 is a schematic cross-sectional view showing the sizing of the TMV package structure of the present invention.

參閱第1至2圖所示,本發明第一實施例係提供一種電子封裝結構之處理方法,其步驟包括:a.(步驟201)製備一電子封裝結構,在該電子封裝結構上設置至少一黏著膠件,藉以保護、隔絕或結合電子構件。 Referring to Figures 1 to 2, a first embodiment of the present invention provides a method for processing an electronic package structure, the steps of which include: a. (Step 201) preparing an electronic package structure, at least one of which is disposed on the electronic package structure Adhesive parts are used to protect, insulate or combine electronic components.

b.(步驟202)在至少一該黏著膠件未固化前,將至少一該黏著膠件及該電子封裝結構移入一處理腔室內。 b. (Step 202) moving at least one of the adhesive member and the electronic package structure into a processing chamber before at least one of the adhesive members is uncured.

c.(步驟203)使該處理腔室內的溫度以一預定升溫速率由一初始溫度上升至一預定溫度,並維持該預定溫度經過一預定時間,以增加該黏著膠件的流動性,再以一預定降溫速率由該預定溫度下降至一設定溫 度,同時該處理腔室內的壓力依序進行至少一次間歇性壓力上升及間歇性壓力下降之壓力升降交互變化過程,以消除黏著膠件與該電子封裝結構界面處之氣泡及/或黏著膠件內部氣泡,將氣泡由黏著膠件之四周排出,其中該處理腔室內溫度之設定介於攝氏20度至500度的範圍,壓力變化範圍之設定介於1大氣壓(atm)至60大氣壓(atm)之間。 c. (Step 203) increasing the temperature in the processing chamber from an initial temperature to a predetermined temperature at a predetermined heating rate, and maintaining the predetermined temperature for a predetermined time to increase the fluidity of the adhesive member, and then a predetermined cooling rate is decreased from the predetermined temperature to a set temperature Degree, at the same time, the pressure in the processing chamber sequentially performs at least one intermittent pressure rise and intermittent pressure drop pressure change interaction process to eliminate bubbles and/or adhesive parts at the interface between the adhesive component and the electronic package structure. The internal bubble discharges the bubble from the periphery of the adhesive member, wherein the temperature in the processing chamber is set in the range of 20 degrees Celsius to 500 degrees Celsius, and the pressure variation range is set from 1 atmosphere (atm) to 60 atmospheres (atm). between.

參閱第2圖所示,在本發明第一實施例中氣泡排除過程歷經80分鐘,該處理腔室內的溫度以一預定升溫速率歷經15分鐘由一初始溫度(攝氏20度)上升至一預定溫度(攝氏500度),並維持攝氏500度經過一預定時間(50分鐘),再以一預定降溫速率歷經15分鐘由該預定溫度(攝氏500度)下降至一常溫(攝氏20度),同時該處理腔室內的壓力依序進行四次間歇性壓力上升及間歇性壓力下降之壓力升降交互變化過程,其中壓力變化範圍介於1大氣壓(atm)至60大氣壓(atm)之間,惟上述預定升溫速率、預定溫度、預定降溫速率、每一次間歇性壓力上升與間歇性壓力下降之壓力變化範圍及進行間歇性壓力上升與間歇性壓力下降之壓力升降交互變化過程的次數皆可視製程需求進行必要的調整。 Referring to FIG. 2, in the first embodiment of the present invention, the bubble removing process is performed for 80 minutes, and the temperature in the processing chamber is raised from an initial temperature (20 degrees Celsius) to a predetermined temperature over a period of 15 minutes at a predetermined heating rate. (500 degrees Celsius), and maintain a temperature of 500 degrees Celsius for a predetermined time (50 minutes), and then drop to a normal temperature (20 degrees Celsius) from the predetermined temperature (500 degrees Celsius) for 15 minutes at a predetermined cooling rate, and The pressure in the processing chamber is sequentially subjected to four intermittent pressure rises and intermittent pressure drop interactions, wherein the pressure varies from 1 atmosphere (atm) to 60 atmospheres (atm), but the predetermined temperature rise The rate, the predetermined temperature, the predetermined temperature drop rate, the pressure variation range of each intermittent pressure rise and intermittent pressure drop, and the number of pressure rise and fall interaction processes for intermittent pressure rise and intermittent pressure drop are all necessary to process process requirements. Adjustment.

參閱第3至4圖所示,本發明第二實施例係提供一種電子封裝結構之黏著膠件氣泡排除方法,其步驟包括:a.(步驟301)製備一電子封裝結構,在該電子封裝結構上設置至少一黏著膠件,藉以保護、隔絕或結合電子構件。 Referring to Figures 3 to 4, a second embodiment of the present invention provides an adhesive sealing method for an electronic package structure, the steps comprising: a. (Step 301) preparing an electronic package structure, wherein the electronic package structure At least one adhesive member is disposed thereon to protect, isolate or bond the electronic components.

b.(步驟302)在至少一該黏著膠件未固化前,將至少一該黏著膠件及該電子封裝結構移入一處理腔室內。 b. (Step 302) moving at least one of the adhesive member and the electronic package structure into a processing chamber before at least one of the adhesive members is uncured.

c.(步驟303)使該處理腔室內的溫度以一預定升溫速率由常溫上升至一預定溫度,並維持該預定溫度經過一預定時間,以增加該黏著膠件的流動性,同時該處理腔室內的壓力依序進行至少一次間歇性壓力上升及間歇性壓力下降之壓力升降交互變化過程,以消除該黏著膠件與該電子封裝結構界面處之氣泡及/或該黏著膠件內部氣泡,將氣泡由該黏著膠件之四周逐漸擠壓排出,其中該處理腔室內溫度之設定介於攝氏20度至500度的範圍,壓力變化範圍之設定介於1大氣壓(atm)至60大氣壓(atm)之間。 c. (Step 303) raising the temperature in the processing chamber from a normal temperature to a predetermined temperature at a predetermined heating rate, and maintaining the predetermined temperature for a predetermined time to increase the fluidity of the adhesive member while the processing chamber The pressure in the chamber sequentially performs at least one intermittent pressure rise and intermittent pressure drop interaction process to eliminate bubbles at the interface between the adhesive member and the electronic package structure and/or bubbles inside the adhesive member. The bubble is gradually squeezed out from the periphery of the adhesive member, wherein the temperature in the processing chamber is set in the range of 20 degrees Celsius to 500 degrees Celsius, and the pressure variation range is set between 1 atmosphere (atm) and 60 atmospheres (atm). between.

d.(步驟304)將該處理腔室內的壓力進行一次間歇性壓力 上升及持續性壓力下降之壓力升降交互變化過程,同時使該處理腔室內的溫度以一預定降溫速率由該預定溫度下降至一設定溫度常溫,將殘留氣泡由該黏著膠件之四周排出,其中該處理腔室內溫度之設定介於攝氏20度至500度的範圍,壓力變化範圍之設定介於1大氣壓(atm)至60大氣壓(atm)之間。 d. (Step 304) Performing an intermittent pressure on the pressure in the processing chamber The pressure rise and fall of the ascending and continuous pressure drop alternately changes, and the temperature in the processing chamber is lowered from the predetermined temperature to a set temperature at a predetermined temperature drop rate, and the residual air bubbles are discharged from the periphery of the adhesive member. The temperature in the processing chamber is set between 20 degrees Celsius and 500 degrees Celsius, and the pressure variation range is set between 1 atmosphere (atm) and 60 atmospheres (atm).

參閱第4圖所示,在本發明第二實施例中氣泡排除過程歷經80分鐘,該處理腔室內的溫度以一預定升溫速率歷經15分鐘由一初始溫度(攝氏20度)上升至一預定溫度(攝氏500度),並維持攝氏500度經過一預定時間(50分鐘),再以一預定降溫速率歷經15分鐘由該預定溫度(攝氏500度)下降至一設定溫度(攝氏20度),同時該處理腔室內的壓力依序進行三次間歇性壓力上升及間歇性壓力下降之壓力升降交互變化過程,與一次間歇性壓力上升及持續性壓力下降之壓力升降交互變化過程,其中壓力變化範圍介於1大氣壓(atm)至60大氣壓(atm)之間,惟上述預定升溫速率、預定溫度、預定降溫速率、每一次間歇性壓力上升與間歇性壓力下降之壓力變化範圍及進行間歇性壓力上升與間歇性壓力下降之壓力升降交互變化過程的次數皆可視製程需求進行必要的調整。 Referring to FIG. 4, in the second embodiment of the present invention, the bubble removing process is performed for 80 minutes, and the temperature in the processing chamber is raised from an initial temperature (20 degrees Celsius) to a predetermined temperature over a period of 15 minutes at a predetermined heating rate. (500 degrees Celsius), and maintain a temperature of 500 degrees Celsius for a predetermined time (50 minutes), and then drop to a set temperature (20 degrees Celsius) from the predetermined temperature (500 degrees Celsius) for 15 minutes at a predetermined cooling rate, while The pressure in the processing chamber sequentially performs three intermittent pressure rises and intermittent pressure drop pressure change interactions, and an intermittent pressure rise and a continuous pressure drop pressure rise and fall interaction process, wherein the pressure variation range is between 1 atmosphere (atm) to 60 atmospheres (atm), but the predetermined temperature increase rate, predetermined temperature, predetermined temperature drop rate, each intermittent pressure rise and intermittent pressure drop pressure variation range and intermittent pressure rise and intermittent The number of pressure rise and fall interactions of the pressure drop is adjusted according to the process requirements.

參閱第5圖所示,前述該電子封裝結構係為球柵陣列(Ball Grid Array)封裝結構10,該黏著膠件係為黏晶料件20,例如是黏晶薄膜(die attachment film,DAF)、可網印黏晶膠(screen-on die attach paste)、薄膜覆蓋銲線(film over wire;FOW)膠材和非導電膠(non-conducting paste;NCP)等,該球柵陣列封裝結構10包含至少一晶片11及一基板12,該基板12可以為硬質或軟性電路基板,該晶片11透過該黏晶料件20貼附在該基板12上,一金屬線13連接晶片11上之焊塊14與基板12,在貼附過程中容易在該黏晶料件20及該基板12界面處產生氣泡15,嚴重影響產品的可靠性與品質。 Referring to FIG. 5, the electronic package structure is a Ball Grid Array package structure 10, and the adhesive component is a die bond member 20, such as a die attachment film (DAF). , screen-on die attach paste, film over wire (FOW) glue and non-conducting paste (NCP), etc., the ball grid array package structure 10 At least one wafer 11 and a substrate 12 are included. The substrate 12 can be a rigid or flexible circuit substrate. The wafer 11 is attached to the substrate 12 through the die member 20, and a metal wire 13 is connected to the solder bump on the wafer 11. 14 and the substrate 12, during the attaching process, bubbles 15 are easily generated at the interface of the bonded material member 20 and the substrate 12, which seriously affects the reliability and quality of the product.

參閱第6圖所示,前述該電子封裝結構係為覆晶(Flip-Chip)封裝結構30,該黏著膠件係為底膠(underfill)40,該底膠40成份例如是摻雜有二氧化矽(SiO2)粉末等填充物之環氧樹脂,該覆晶封裝結構30包含一晶片31、一基板32及複數個導電凸塊33,該導電凸塊33係藉由一般的凸塊製程(bumping process)所製作而成之焊料凸塊,其成份為錫、銀、 銅、金、銦、鉛、鉍、鋅、鎳至少其中之一,或是其他利於焊接的材質,該晶片31和該基板32之間固設該些導電凸塊33,使用一點膠工具於晶片31與基板32之間隙內填充該底膠40,該底膠40包覆各該導電凸塊33,用以對晶片31與基板32之間可能產生之熱應力及機械應力提供緩衝、保護的功能,由於導電凸塊33間距日益細微化,晶片31與基板32的接合間隙亦日益縮小化,在從晶片31邊緣填膠過程中容易在該底膠40與該基板32界面處產生氣泡34、以及該底膠40內部產生氣泡35,使得導電性或導熱性不佳,甚而影響覆晶封裝結構30之使用壽命。 Referring to FIG. 6, the electronic package structure is a Flip-Chip package structure 30, and the adhesive component is an underfill 40, and the composition of the primer 40 is doped with, for example, dioxide. An epoxy resin filled with a filler such as S (S i O 2 ) powder, the flip chip package structure 30 includes a wafer 31, a substrate 32 and a plurality of conductive bumps 33, wherein the conductive bumps 33 are formed by general bumps A solder bump made of a bumping process, which is composed of at least one of tin, silver, copper, gold, indium, lead, antimony, zinc, nickel, or other material suitable for soldering, the wafer 31 The conductive bumps 33 are fixed between the substrate 32 and the substrate 32, and the primer 40 is filled in the gap between the wafer 31 and the substrate 32. The primer 40 covers each of the conductive bumps 33 for The function of buffering and protecting the thermal stress and the mechanical stress which may occur between the wafer 31 and the substrate 32 is provided. Since the pitch of the conductive bumps 33 is increasingly fine, the bonding gap between the wafer 31 and the substrate 32 is also increasingly reduced. It is easy to generate bubbles 34 at the interface between the primer 40 and the substrate 32 during the edge filling process. Primer 40 and internal bubbles 35, so that the electrical conductivity or thermal conductivity is poor, even affect the life of the structure 30 of the flip chip package.

參閱第7圖所示,前述該電子封裝結構係為印刷電路板(Printed circuit board,PCB)封裝結構,簡稱PCB封裝結構50,該黏著膠件係為非導電膠(non-conducting paste;NCP)60,該PCB封裝結構50包含一印刷電路板51、一第一導電層52及一第二導電層53,該印刷電路板51間隔貫設複數個通孔(Through hole)54,每一通孔54內周進行通孔電鍍(Plating through hole,PTH),例如是化學鍍覆(Chemical plating)以及電鍍(Electroplating)等,形成一金屬電鍍層55,該印刷電路板51二側分別配置該第一導電層52及該第二導電層53,該第一導電層52對應各該通孔54分別貫設一第一穿孔56,該第二導電層53對應各該通孔54分別貫設一第二穿孔57,每一金屬電鍍層55、第一穿孔56及第二穿孔57上填覆該非導電膠60,該第一、二導電層52、53透過該些金屬電鍍層55二端電性連接,由於通孔54、第一穿孔56及第二穿孔57口徑日益細微化,愈增填入非導電膠60的困難度,在從第一穿孔56邊緣填膠過程中容易在非導電膠60與金屬電鍍層55界面處產生氣泡58,造成影響PCB封裝結構50之可靠性與品質。 Referring to FIG. 7, the electronic package structure is a printed circuit board (PCB) package structure, referred to as a PCB package structure 50, and the adhesive component is a non-conducting paste (NCP). The PCB package structure 50 includes a printed circuit board 51, a first conductive layer 52, and a second conductive layer 53. The printed circuit board 51 is spaced apart from a plurality of through holes 54 each of the through holes 54. Plating through holes (PTH), for example, chemical plating and electroplating, to form a metal plating layer 55, which is disposed on both sides of the printed circuit board 51 The layer 52 and the second conductive layer 53 respectively define a first through hole 56 corresponding to each of the through holes 54. The second conductive layer 53 respectively defines a second through hole corresponding to each of the through holes 54. 57. Each of the metal plating layer 55, the first through hole 56 and the second through hole 57 are filled with the non-conductive adhesive 60, and the first and second conductive layers 52 and 53 are electrically connected through the metal plating layer 55. The through hole 54, the first through hole 56 and the second through hole 57 are increasingly finer in diameter The difficulty of filling the non-conductive adhesive 60 is increased, and bubbles 58 are easily generated at the interface between the non-conductive adhesive 60 and the metal plating layer 55 during the edge filling process of the first through-hole 56, thereby affecting the reliability of the PCB package structure 50. With quality.

參閱第8圖所示,前述該電子封裝結構係為封模穿孔(through mold via,TMV)封裝結構,簡稱TMV封裝結構70,該黏著膠件係為導電膠(conductive paste;CP)80,該TMV封裝結構70包含一晶片71、一基板72、複數個導電凸塊73及一封裝膠體74,該導電凸塊73係藉由一般的凸塊製程(bumping process)所製作而成之焊料凸塊,其成份為錫、銀、銅、金、銦、鉛、鉍、鋅、鎳至少其中之一,或是其他利於焊 接的材質,該晶片71和該基板72之間固設該些導電凸塊73,該封裝膠體74配置於該基板72一表面上,該封裝膠體74包覆該晶片71及各該導電凸塊73,該封裝膠體74間隔貫設複數個通孔75,每一通孔75內填覆該導電膠80,該基板72另一表面上對應各該通孔75分別固設一焊塊76,該些導電膠80及該些焊塊76和該基板72電性連接,由於通孔75口徑日益細微化,且該基板72封閉通孔75一端,愈增將導電膠80由通孔75另一端填入通孔75的困難度,在從通孔75另一端邊緣填膠過程中容易在導電膠80與通孔75界面處產生氣泡77,造成影響TMV封裝結構70之可靠性與品質。 As shown in FIG. 8 , the electronic package structure is a through mold via (TMV) package structure, which is referred to as a TMV package structure 70. The adhesive component is a conductive paste (CP) 80. The TMV package structure 70 includes a wafer 71, a substrate 72, a plurality of conductive bumps 73, and an encapsulant 74. The conductive bumps 73 are solder bumps formed by a general bumping process. , its composition is at least one of tin, silver, copper, gold, indium, lead, antimony, zinc, nickel, or other conducive to welding The conductive bumps 73 are disposed between the wafer 71 and the substrate 72. The encapsulant 74 is disposed on a surface of the substrate 72. The encapsulant 74 covers the wafer 71 and each of the conductive bumps. The plurality of through holes 75 are respectively disposed in the through hole 75. Each of the through holes 75 is filled with the conductive paste 80. The other surface of the substrate 72 is fixed with a solder bump 76 corresponding to each of the through holes 75. The conductive paste 80 and the solder bumps 76 are electrically connected to the substrate 72. Since the diameter of the through hole 75 is increasingly fine, and the substrate 72 closes one end of the through hole 75, the conductive paste 80 is filled in by the other end of the through hole 75. The difficulty of the through hole 75 easily generates bubbles 77 at the interface between the conductive paste 80 and the through hole 75 during the edge filling process from the other end of the through hole 75, thereby affecting the reliability and quality of the TMV package structure 70.

本發明之電子封裝結構之處理方法,在步驟203中該處理腔室內的壓力依序進行至少一次間歇性壓力上升及間歇性壓力下降之壓力升降交互變化過程,藉由間歇性的壓力變化使氣泡有較充裕的時間調整空間位置,有助於消除黏著膠件與電子封裝結構界面處之氣泡及/或黏著膠件內部氣泡,將氣泡由黏著膠件之四周排出,大幅度提高了球柵陣列封裝結構10、覆晶封裝結構30、PCB封裝結構50及TMV封裝結構70等電子封裝結構之可靠性與品質。 In the processing method of the electronic package structure of the present invention, in step 203, the pressure in the processing chamber sequentially performs at least one intermittent pressure rise and intermittent pressure drop in the pressure rise and fall interaction process, and the bubble is intermittently changed by pressure. There is ample time to adjust the spatial position, which helps to eliminate the bubbles at the interface between the adhesive component and the electronic package structure and/or the air bubbles inside the adhesive component, and discharges the bubbles from the periphery of the adhesive component, thereby greatly improving the ball grid array. The reliability and quality of the electronic package structure such as the package structure 10, the flip chip package structure 30, the PCB package structure 50, and the TMV package structure 70.

本發明之電子封裝結構之處理方法,在步驟303中該處理腔室內的壓力依序進行至少一次間歇性壓力上升及間歇性壓力下降之壓力升降交互變化過程,在步驟304中該處理腔室內的壓力進行一次間歇性壓力上升之壓力變化過程,藉由間歇性的壓力變化使氣泡有較充裕的時間調整空間位置,有助於消除黏著膠件與電子封裝結構界面處之氣泡及/或黏著膠件內部氣泡,將氣泡由黏著膠件之四周_排出,大幅度提高了球柵陣列封裝結構10、覆晶封裝結構30、PCB封裝結構50及TMV封裝結構70等電子封裝結構之可靠性與品質。 In the processing method of the electronic package structure of the present invention, in step 303, the pressure in the processing chamber sequentially performs at least one intermittent pressure rise and intermittent pressure drop pressure change interactive change process, in step 304, the processing chamber The pressure undergoes an intermittent pressure rise process, and the intermittent pressure changes cause the bubbles to have ample time to adjust the spatial position, which helps to eliminate bubbles and/or adhesive at the interface between the adhesive component and the electronic package structure. The inner air bubbles are discharged from the periphery of the adhesive member, which greatly improves the reliability and quality of the electronic package structure such as the ball grid array package structure 10, the flip chip package structure 30, the PCB package structure 50 and the TMV package structure 70. .

前文係針對本發明之較佳實施例為本發明之技術特徵進行具體之說明;惟,熟悉此項技術之人士當可在不脫離本發明之精神與原則下對本發明進行變更與修改,而該等變更與修改,皆應涵蓋於如下申請專利範圍所界定之範疇中。 The present invention has been described with reference to the preferred embodiments of the present invention. However, those skilled in the art can change and modify the present invention without departing from the spirit and scope of the invention. Such changes and modifications shall be covered in the scope defined by the following patent application.

301-304‧‧‧步驟 301-304‧‧‧Steps

Claims (10)

一種電子封裝結構之處理方法,其步驟包括:(a)製備一電子封裝結構,在該電子封裝結構上設置至少一黏著膠件;(b)將至少一該黏著膠件及該電子封裝結構移入一處理腔室內;(c)使該處理腔室內的溫度由一初始溫度上升至一預定溫度,並維持該預定溫度經過一預定時間,再由該預定溫度下降至一設定溫度,同時該處理腔室內的壓力依序進行至少一次間歇性壓力上升及間歇性壓力下降之壓力升降交互變化過程,以消除至少一該黏著膠件與該電子封裝結構界面處之氣泡及/或至少一該黏著膠件內部氣泡,將氣泡由至少一該黏著膠件之四周排出。 The method for processing an electronic package structure includes the steps of: (a) preparing an electronic package structure, disposing at least one adhesive member on the electronic package structure; and (b) moving at least one of the adhesive member and the electronic package structure into the electronic package structure; a processing chamber; (c) increasing the temperature in the processing chamber from an initial temperature to a predetermined temperature, and maintaining the predetermined temperature for a predetermined time, and then descending from the predetermined temperature to a set temperature, and simultaneously processing the chamber The pressure in the chamber sequentially performs at least one intermittent pressure rise and intermittent pressure drop interaction process to eliminate at least one bubble at the interface between the adhesive member and the electronic package structure and/or at least one adhesive member. The internal bubbles are discharged from at least one of the adhesive members. 如申請專利範圍第1項所述之電子封裝結構之處理方法,其中該處理腔室內溫度之設定介於攝氏20度至500度的範圍。 The method of processing an electronic package structure according to claim 1, wherein the processing chamber temperature is set in a range of 20 to 500 degrees Celsius. 如申請專利範圍第1項所述之電子封裝結構之處理方法,其中該處理腔室內壓力變化範圍之設定介於1大氣壓(atm)至60大氣壓(atm)之間。 The method for processing an electronic package structure according to claim 1, wherein the pressure variation range in the processing chamber is set between 1 atm and 60 atm. 一種電子封裝結構之處理方法,其步驟包括:(a)製備一電子封裝結構,在該電子封裝結構上設置至少一黏著膠件;(b)將至少一該黏著膠件及該電子封裝結構移入一處理腔室內; (c)使該處理腔室內的溫度由一初始溫度上升至一預定溫度,並維持該預定溫度經過一預定時間,同時該處理腔室內的壓力依序進行至少一次間歇性壓力上升及間歇性壓力下降之壓力升降交互變化過程,以消除至少一該黏著膠件與該電子封裝結構界面處之氣泡及/或至少一該黏著膠件內部氣泡,將氣泡由至少一該黏著膠件之四周逐漸排出;(d)將該處理腔室內的壓力進行一次間歇性壓力上升及持續性壓力下降之壓力升降交互變化過程,同時使該處理腔室內的溫度由該預定溫度下降至一設定溫度,將殘留氣泡由至少一該黏著膠件之四周排出。 The method for processing an electronic package structure includes the steps of: (a) preparing an electronic package structure, disposing at least one adhesive member on the electronic package structure; and (b) moving at least one of the adhesive member and the electronic package structure into the electronic package structure; a processing chamber; (c) increasing the temperature in the processing chamber from an initial temperature to a predetermined temperature and maintaining the predetermined temperature for a predetermined period of time while the pressure in the processing chamber sequentially performs at least one intermittent pressure rise and intermittent pressure The descending pressure rises and lowers the alternating change process to eliminate at least one bubble at the interface between the adhesive member and the electronic package structure and/or at least one bubble inside the adhesive member, and gradually discharges the bubble from at least one of the adhesive members (d) performing a pressure rise and fall alternating process of intermittent pressure rise and continuous pressure drop in the pressure in the processing chamber, and simultaneously lowering the temperature in the processing chamber from the predetermined temperature to a set temperature, and remaining bubbles Discharged from at least one of the adhesive members. 如申請專利範圍第4項所述之電子封裝結構之處理方法,其中在步驟(c)及步驟(d)中該處理腔室內溫度之設定介於攝氏20度至500度的範圍。 The method of processing an electronic package structure according to claim 4, wherein in the steps (c) and (d), the temperature in the processing chamber is set in a range of 20 to 500 degrees Celsius. 如申請專利範圍第4項所述之電子封裝結構之處理方法,其中在步驟(c)及步驟(d)中該處理腔室內壓力變化範圍之設定介於1大氣壓(atm)至60大氣壓(atm)之間。 The method for processing an electronic package structure according to claim 4, wherein in the steps (c) and (d), the pressure variation range of the processing chamber is set from 1 atm to 60 atm. )between. 如申請專利範圍第1至6項其中任一項所述之電子封裝結構之處理方法,其中該電子封裝結構係為球柵陣列封裝結構,該黏著膠件係為黏晶料件,該球柵陣列封裝結構包含至少一晶片及一基板,至少一該晶片透過至少一該黏晶料件貼附在該基板上。 The method for processing an electronic package structure according to any one of claims 1 to 6, wherein the electronic package structure is a ball grid array package structure, and the adhesive component is a bonded material member, the ball grid The array package structure includes at least one wafer and a substrate, and at least one of the wafers is attached to the substrate through at least one of the die members. 如申請專利範圍第1至6項其中任一項所述之電子封裝結構之處理方法,其中該電子封裝結構係為覆晶封裝結構,該黏著膠件係為底膠,該覆晶封裝結構包含一晶片、一基板及複數個導電凸塊,該晶片和該基板之間固設該些導電凸塊,使用一點膠工具於該晶片與該基板之間隙內填充該底膠,該底膠包覆各該導電凸塊。 The method for processing an electronic package structure according to any one of claims 1 to 6, wherein the electronic package structure is a flip chip package structure, the adhesive component is a primer, and the flip chip package structure comprises a substrate, a substrate and a plurality of conductive bumps, the conductive bumps are fixed between the wafer and the substrate, and the primer is filled in the gap between the wafer and the substrate by using a glue tool, the primer package Each of the conductive bumps is covered. 如申請專利範圍第1至6項其中任一項所述之電子封裝結構之處理方法,其中該電子封裝結構係為PCB封裝結構,該黏著膠件係為非導電膠,該PCB封裝結構包含一印刷電路板、一第一導電層及一第二導電層,該印刷電路板間隔貫設複數個通孔,每一通孔內周進行通孔電鍍形成一金屬電鍍層,該印刷電路板二側分別配置該第一導電層及該第二導電層,該第一導電層對應各該通孔分別貫設一第一穿孔,該第二導電層對應各該通孔分別貫設一第二穿孔,每一金屬電鍍層、第一穿孔及第二穿孔上填覆該非導電膠,該第一、二導電層透過該些金屬電鍍層二端電性連接。 The method for processing an electronic package structure according to any one of claims 1 to 6, wherein the electronic package structure is a PCB package structure, the adhesive component is a non-conductive glue, and the PCB package structure comprises a a printed circuit board, a first conductive layer and a second conductive layer, wherein the printed circuit board is formed with a plurality of through holes, and each of the through holes is internally plated to form a metal plating layer, and the printed circuit board has two sides respectively Disposing the first conductive layer and the second conductive layer, wherein the first conductive layer respectively has a first through hole corresponding to each of the through holes, and the second conductive layer respectively has a second through hole corresponding to each of the through holes, and each of the second conductive layers respectively The metal plating layer, the first through hole and the second through hole are filled with the non-conductive glue, and the first and second conductive layers are electrically connected through the two ends of the metal plating layer. 如申請專利範圍第1至6項其中任一項所述之電子封裝結構之處理方法,其中該電子封裝結構係為TMV封裝結構,該黏著膠件係為導電膠,該TMV封裝結構包含一晶片、一基板、複數個導電凸塊及一封裝膠體,該晶片和該基板之間固設該些導電凸塊,該封裝膠體配置於該基板一表面上,該封裝膠體包覆該晶片及各該導電凸塊,該封裝膠體間隔貫設複數個通孔,每一通孔內填覆該導電膠,該基板另一表面上對應各該通孔分別固設一焊塊,該些導電膠及 該些焊塊和該基板電性連接。 The method of processing an electronic package structure according to any one of claims 1 to 6, wherein the electronic package structure is a TMV package structure, the adhesive component is a conductive paste, and the TMV package structure comprises a wafer. a substrate, a plurality of conductive bumps, and an encapsulant, the conductive bumps are fixed between the wafer and the substrate, the encapsulant is disposed on a surface of the substrate, the encapsulant encapsulates the wafer and each of the packages a conductive bump, the package colloid is disposed with a plurality of through holes, each of the through holes is filled with the conductive paste, and the other surface of the substrate is fixed with a solder bump corresponding to each of the through holes, and the conductive paste and the conductive paste The solder bumps are electrically connected to the substrate.
TW104133482A 2015-10-12 2015-10-12 Processing method of electric packaging structure by discharging bubbles from periphery of adhesive member to greatly enhance reliability and quality of electric packaging structure TW201714227A (en)

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