TW201703150A - Transparent conductive wire and method for manufacturing transparent conductive wire - Google Patents

Transparent conductive wire and method for manufacturing transparent conductive wire Download PDF

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TW201703150A
TW201703150A TW105106099A TW105106099A TW201703150A TW 201703150 A TW201703150 A TW 201703150A TW 105106099 A TW105106099 A TW 105106099A TW 105106099 A TW105106099 A TW 105106099A TW 201703150 A TW201703150 A TW 201703150A
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film
transparent conductive
etching
less
conductive oxide
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TWI591696B (en
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塩野一郎
歳森悠人
野中荘平
齋藤淳
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三菱綜合材料股份有限公司
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01BCABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B5/00Non-insulated conductors or conductive bodies characterised by their form
    • H01B5/14Non-insulated conductors or conductive bodies characterised by their form comprising conductive layers or films on insulating-supports
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01BCABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H01B1/02Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors mainly consisting of metals or alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Non-Insulated Conductors (AREA)
  • Manufacturing Of Electric Cables (AREA)
  • Physical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

A transparent conductive wire (10) includes an Ag film (11) consisting of Ag or Ag-alloy and a transparent conductive oxide film (12) laminated with the Ag film (11). The transparent conductive wire (10) has a wiring pattern formed by an etching processing. In the transparent conductive wire (10), a thickness (ta) of the Ag film (11) is less than or equal to 15 nm, and an overetching amount (L) of the Ag film (11) to the transparent conductive oxide film (12) is less than or equal to 1 [mu]m.

Description

透明導電電路及透明導電電路之製造方法 Transparent conductive circuit and method for manufacturing transparent conductive circuit

本發明係有關於例如顯示器或觸控面板等中所使用的透明導電電路及透明導電電路之製造方法。 The present invention relates to a transparent conductive circuit and a method of manufacturing a transparent conductive circuit used in, for example, a display or a touch panel.

本願係根據2015年2月27日於日本申請的特願2015-37950號、2015年11月5日於日本申請的特願2015-217683號、及2016年2月25日於日本申請的特願2016-34768號而主張優先權,其內容沿用於此。 This is a special wish based on the special request 2015-37950, which was filed in Japan on February 27, 2015, and the special offer 2015-217683, which was applied for in Japan on November 5, 2015, and in Japan on February 25, 2016. Priority is claimed on No. 2016-34768, the content of which is used here.

例如,在液晶顯示器或有機EL顯示器、觸控面板等中,作為電路,係例如專利文獻1-3所示,適用了透明導電氧化物膜與金屬膜之層合構造的透明導電電路。 For example, in a liquid crystal display, an organic EL display, a touch panel, or the like, a transparent conductive circuit having a laminated structure of a transparent conductive oxide film and a metal film is applied as a circuit, for example, as disclosed in Patent Documents 1-3.

該透明導電電路係被要求,可見光波段的光線之穿透率(以下稱為視感穿透率)為高,且電阻為低。 The transparent conductive circuit is required to have a high transmittance of light in the visible light band (hereinafter referred to as a visual transmittance) and a low resistance.

此處,在透明導電氧化物膜與金屬膜之層合膜形成電路圖案而作為透明導電電路的時候,如專利文獻3-5所示,對上述之層合膜進行蝕刻處理,是一般常見 的。 Here, when the laminated film of the transparent conductive oxide film and the metal film forms a circuit pattern as a transparent conductive circuit, as shown in Patent Document 3-5, it is common to etch the above-mentioned laminated film. of.

這些專利文獻3-5中,作為將透明導電氧化物膜與金屬膜之層合膜進行蝕刻的手段,提出了使用透明導電氧化物膜用的蝕刻液與金屬膜用的蝕刻液而以2階段進行蝕刻的方法,或者,使用特定組成之蝕刻液而將透明導電氧化物膜與金屬膜一起進行蝕刻的方法。 In the above-mentioned Patent Document 3-5, as a means for etching a laminated film of a transparent conductive oxide film and a metal film, an etching liquid for a transparent conductive oxide film and an etching liquid for a metal film are used in two stages. A method of etching or a method of etching a transparent conductive oxide film together with a metal film using an etching liquid having a specific composition.

[先前技術文獻] [Previous Technical Literature] [專利文獻] [Patent Literature]

[專利文獻1]日本特開2006-216266號公報 [Patent Document 1] Japanese Laid-Open Patent Publication No. 2006-216266

[專利文獻2]日本特開2012-054006號公報 [Patent Document 2] Japanese Patent Laid-Open Publication No. 2012-054006

[專利文獻3]日本特開2008-080743號公報 [Patent Document 3] Japanese Patent Laid-Open Publication No. 2008-080743

[專利文獻4]日本特開2007-007982號公報 [Patent Document 4] Japanese Patent Laid-Open Publication No. 2007-007982

[專利文獻5]日本特開2009-206462號公報 [Patent Document 5] Japanese Patent Laid-Open Publication No. 2009-206462

可是在最近,透明導電電路係被要求更進一步的視感穿透率之提升,因此必須要將金屬膜形成得比先前還要更薄。 However, recently, transparent conductive circuits have been required to have further improvement in visual transmittance, and it is therefore necessary to form the metal film to be thinner than before.

此處,將金屬膜之膜厚打薄的時候,藉由上述的先前之蝕刻方法,則相較於透明導電氧化物膜,金屬膜會被優先蝕刻,而有導致金屬膜的過度蝕刻量變大的問題。 Here, when the film thickness of the metal film is thinned, by the above-described prior etching method, the metal film is preferentially etched compared to the transparent conductive oxide film, and the excessive etching amount of the metal film is increased. The problem.

尤其是,在最近,隨著電路的微細化,電路的寬度變 得很小,因此若金屬膜的過度蝕刻量變大,則恐怕無法充分確保導電性。 In particular, recently, with the miniaturization of circuits, the width of circuits has changed. Since it is small, if the amount of over-etching of the metal film becomes large, it may be impossible to sufficiently ensure conductivity.

本發明係有鑑於前述事情而研發,目的在於提供一種,具有高視感穿透率,同時,金屬膜的過度蝕刻量係被抑制,充分確保導電性的透明導電電路、及該透明導電電路之製造方法。 The present invention has been made in view of the foregoing, and an object of the present invention is to provide a transparent conductive circuit having a high visual transmittance and at the same time suppressing an excessive etching amount of a metal film, sufficiently ensuring conductivity, and a transparent conductive circuit. Production method.

為了解決上記課題,本發明的透明導電電路,係具有由Ag或Ag合金所成之Ag膜和被層合在該Ag膜上之透明導電氧化物膜,藉由蝕刻處理而被形成有電路圖案的透明導電電路,其特徵為,前述Ag膜之膜厚是被設成15nm以下;前述Ag膜相對於前述透明導電氧化物膜的過度蝕刻量是被設成1μm以下。 In order to solve the above problem, the transparent conductive circuit of the present invention has an Ag film made of Ag or an Ag alloy and a transparent conductive oxide film laminated on the Ag film, and is formed with a circuit pattern by an etching process. In the transparent conductive circuit, the film thickness of the Ag film is set to 15 nm or less, and the amount of over-etching of the Ag film with respect to the transparent conductive oxide film is set to 1 μm or less.

若依據本發明的透明導電電路,則前述Ag膜之膜厚是被設成15nm以下,因此視感穿透率佳。 According to the transparent conductive circuit of the present invention, since the film thickness of the Ag film is set to 15 nm or less, the visual transmittance is good.

然後,在本發明的透明導電電路中,前述Ag膜的過度蝕刻量是被控制在1μm以下,因此即使電路寬度狹窄的情況下,仍可確保金屬膜的寬度,可確實確保導電性。 In the transparent conductive circuit of the present invention, the amount of over-etching of the Ag film is controlled to be 1 μm or less. Therefore, even when the circuit width is narrow, the width of the metal film can be ensured, and conductivity can be surely ensured.

此處,於本發明的透明導電電路中,前述Ag膜,係含有Sn、In、Mg、Ti之任意一種或二種以上之元素合計為0.05原子%以上、10.0原子%以下之範圍來作為添加元素,剩餘部分係為由Ag及不可避免之雜質所成之組成的Ag合金所構成為佳。 Here, in the transparent conductive circuit of the present invention, the Ag film contains any one or more of Sn, In, Mg, and Ti, and the total amount of the elements is 0.05 atom% or more and 10.0 atom% or less. The element and the remainder are preferably composed of an Ag alloy composed of Ag and an unavoidable impurity.

若依據該構成的透明導電電路,則Ag膜是含有Sn、In、Mg、Ti之任意一種或二種以上之元素合計為0.05原子%以上、10.0原子%以下之範圍來作為添加元素,剩餘部分係為由Ag及不可避免之雜質所成的Ag合金所構成,因此相對於基板及氧化物膜的Ag膜之濕潤性可被提升。藉此,即使是基板上或是氧化物膜上所被成膜的Ag膜之膜厚是設成15nm以下的比較薄的情況,仍可抑制膜的凝聚,可降低電阻,且可提升視感穿透率。 According to the transparent conductive circuit of the above configuration, the Ag film contains any one of Sn, In, Mg, and Ti, or a total of two or more elements in an amount of 0.05 atom% or more and 10.0 atom% or less as an additive element, and the remainder Since it is composed of Ag alloy formed of Ag and unavoidable impurities, the wettability of the Ag film with respect to the substrate and the oxide film can be improved. Thereby, even when the film thickness of the Ag film formed on the substrate or on the oxide film is relatively thin at 15 nm or less, aggregation of the film can be suppressed, resistance can be reduced, and the sense of sight can be improved. Penetration rate.

又,於本發明的透明導電電路中,亦可為,還含有Sb:0.01原子%以上、以及Cu:0.1原子%以上之其中任一方或雙方來作為添加元素,且全添加元素的合計是被設成10.0原子%以下,剩餘部分係為由Ag及不可避免之雜質所成之組成的Ag合金所構成。 Further, in the transparent conductive circuit of the present invention, either or both of Sb: 0.01 atom% or more and Cu: 0.1 atom% or more may be contained as an additive element, and the total of all added elements is The content is 10.0 atom% or less, and the remainder is composed of an Ag alloy composed of Ag and unavoidable impurities.

若依據該構成的透明導電電路,則還含有Sb:0.01原子%以上、以及Cu:0.1原子%以上之其中任一方或雙方來作為添加元素,且全添加元素的合計是被設成10.0原子%以下,剩餘部分係為由Ag及不可避免之雜質所成之組成的Ag合金所構成,因此藉由Sb及Cu的添加,膜的凝聚可被更進一步抑制,可降低電阻,且可提升視感穿透率。 According to the transparent conductive circuit of this configuration, either or both of Sb: 0.01 atom% or more and Cu: 0.1 atom% or more are added as an additive element, and the total of all added elements is set to 10.0 atom%. Hereinafter, the remaining portion is composed of an Ag alloy composed of Ag and an unavoidable impurity. Therefore, by the addition of Sb and Cu, the aggregation of the film can be further suppressed, the electrical resistance can be lowered, and the visual sense can be improved. Penetration rate.

甚至,在本發明的透明導電電路中,前述透明導電氧化物膜係設成非晶質膜為佳。 Further, in the transparent conductive circuit of the present invention, it is preferable that the transparent conductive oxide film is formed as an amorphous film.

若依據該構成的透明導電電路,則由於透明導電氧化物膜是被設成非晶質膜,因此可藉由後述的草酸蝕刻液而 確實地蝕刻,可減少Ag膜的過度蝕刻量。 According to the transparent conductive circuit having such a configuration, since the transparent conductive oxide film is formed as an amorphous film, it can be formed by an oxalic acid etching solution to be described later. The etching is surely performed to reduce the amount of over-etching of the Ag film.

本發明的透明導電電路之製造方法,係具有由Ag或Ag合金所成之Ag膜和被層合在該Ag膜上之透明導電氧化物膜,而被形成有電路圖案的透明導電電路之製造方法,其特徵為,將前述Ag膜之膜厚設成15nm以下;具有:對具有前述Ag膜與前述透明導電氧化物膜的層合膜進行蝕刻處理以形成電路圖案的蝕刻處理工程;在該蝕刻處理工程中,係使用草酸蝕刻液,將前述透明導電氧化物膜及前述Ag膜一起溶解。 The method for producing a transparent conductive circuit of the present invention comprises the steps of: forming an Ag film formed of Ag or an Ag alloy and a transparent conductive oxide film laminated on the Ag film, and forming a transparent conductive circuit formed with a circuit pattern. The method of forming a film thickness of the Ag film to 15 nm or less, and having an etching process for etching a laminated film having the Ag film and the transparent conductive oxide film to form a circuit pattern; In the etching treatment, an oxalic acid etching solution is used to dissolve the transparent conductive oxide film and the Ag film together.

若依據本發明的透明導電電路之製造方法,則對具有前述Ag膜與前述透明導電氧化物膜的層合膜進行蝕刻處理以形成電路圖案的蝕刻處理工程中,使用草酸蝕刻液,將前述透明導電氧化物膜及前述Ag膜一起溶解。通常,草酸蝕刻液係難以進行Ag膜之蝕刻,但在本發明中,由於前述Ag膜之膜厚是15nm以下而被形成得比較薄,因此可藉由草酸蝕刻液來去除Ag膜。又,在該草酸蝕刻液中,相較於透明導電氧化物膜,Ag膜的蝕刻性較差,因此可抑制Ag膜的過度蝕刻。 According to the method for producing a transparent conductive circuit of the present invention, in the etching treatment process in which the laminated film having the Ag film and the transparent conductive oxide film is etched to form a circuit pattern, the etchant is used to form the transparent The conductive oxide film and the Ag film are dissolved together. In general, the oxalic acid etching liquid is difficult to etch the Ag film. However, in the present invention, since the film thickness of the Ag film is 15 nm or less, it is formed to be relatively thin, so that the Ag film can be removed by the oxalic acid etching solution. Further, in the oxalic acid etching solution, the etching property of the Ag film is inferior to that of the transparent conductive oxide film, so that excessive etching of the Ag film can be suppressed.

此處,於本發明的透明導電電路之製造方法中,前述草酸蝕刻液係為,被設成草酸濃度是3質量%以上7質量%以下之範圍內的草酸水溶液為佳。 In the method for producing a transparent conductive circuit of the present invention, the oxalic acid etching solution is preferably an aqueous oxalic acid solution having an oxalic acid concentration of 3% by mass or more and 7% by mass or less.

若依據該構成的透明導電電路之製造方法,則作為前述草酸蝕刻液,是使用被設成草酸濃度是3質量%以上7質量%以下之範圍內的草酸水溶液,因此可將Ag膜及透 明導電氧化物膜一起進行蝕刻,且可確實降低Ag膜的過度蝕刻量。 According to the method for producing a transparent conductive circuit of the above configuration, the oxalic acid etching solution is an aqueous solution of oxalic acid having a oxalic acid concentration of 3% by mass or more and 7% by mass or less. Therefore, the Ag film can be used. The conductive oxide film is etched together, and the amount of over-etching of the Ag film can be surely reduced.

若依據本發明,則可提供一種,具有高視感穿透率,同時,金屬膜的過度蝕刻量係被抑制,充分確保導電性的透明導電電路、及該透明導電電路之製造方法。 According to the present invention, it is possible to provide a transparent conductive circuit having a high visual transmittance and at the same time suppressing the excessive etching amount of the metal film, sufficiently ensuring conductivity, and a method of manufacturing the transparent conductive circuit.

10、110‧‧‧透明導電電路 10,110‧‧‧Transparent conductive circuit

11、111‧‧‧Ag膜 11, 111‧‧‧Ag film

12、112A、112B‧‧‧透明導電氧化物膜 12, 112A, 112B‧‧‧ transparent conductive oxide film

[圖1]本發明的實施形態所述之透明導電電路的部分放大剖面圖。 Fig. 1 is a partially enlarged cross-sectional view showing a transparent conductive circuit according to an embodiment of the present invention.

[圖2]本發明的實施形態所述之透明導電電路之蝕刻端面的放大剖面圖。 Fig. 2 is an enlarged cross-sectional view showing an etched end surface of a transparent conductive circuit according to an embodiment of the present invention.

[圖3]透明導電氧化物膜的進行X線繞射測定之例子的圖示。 Fig. 3 is a view showing an example of performing X-ray diffraction measurement of a transparent conductive oxide film.

[圖4]本發明的實施形態所述之透明導電電路之製造方法的流程圖。 Fig. 4 is a flow chart showing a method of manufacturing a transparent conductive circuit according to an embodiment of the present invention.

[圖5]本發明的其他實施形態所述之透明導電電路的部分放大剖面圖。 Fig. 5 is a partially enlarged cross-sectional view showing a transparent conductive circuit according to another embodiment of the present invention.

以下,關於本發明的實施形態的透明導電電路及透明導電電路之製造方法,參照添附的圖來加以說 明。 Hereinafter, a method of manufacturing a transparent conductive circuit and a transparent conductive circuit according to an embodiment of the present invention will be described with reference to the attached drawings. Bright.

本實施形態中的透明導電電路10,係被使用於各種顯示器及觸控面板。 The transparent conductive circuit 10 in the present embodiment is used in various displays and touch panels.

本實施形態的透明導電電路10,係如圖1所示,具備例如:在基板30之一面所被成膜的Ag膜11、和重疊於該Ag膜11而被成膜的透明導電氧化物膜12。此外,基板30係可使用無鹼玻璃、硼矽酸玻璃等之玻璃基板,或者PET薄膜等之樹脂薄膜。 As shown in FIG. 1, the transparent conductive circuit 10 of the present embodiment includes, for example, an Ag film 11 formed on one surface of the substrate 30, and a transparent conductive oxide film formed by being superposed on the Ag film 11 to form a film. 12. Further, as the substrate 30, a glass substrate such as an alkali-free glass or a borosilicate glass, or a resin film such as a PET film can be used.

該透明導電電路10,係藉由對具有Ag膜11和透明導電氧化物膜12的層合膜進行蝕刻處理,而形成電路圖案。 The transparent conductive circuit 10 is formed by etching a laminate film having the Ag film 11 and the transparent conductive oxide film 12 to form a circuit pattern.

然後,該透明導電電路10係為,Ag膜11相對於透明導電氧化物膜12的過度蝕刻量L是被設成1μm以下。具體而言,如圖2所示,已被蝕刻處理過的電路進行剖面觀察時,透明導電氧化物膜12之端面12e與Ag膜11之端面11e之距離係被設成1μm以下。Ag膜11相對於透明導電氧化物膜12的過度蝕刻量L,較理想係為0.8μm以下。 Then, in the transparent conductive circuit 10, the excessive etching amount L of the Ag film 11 with respect to the transparent conductive oxide film 12 is set to 1 μm or less. Specifically, as shown in FIG. 2, when the circuit which has been etched is subjected to cross-sectional observation, the distance between the end surface 12e of the transparent conductive oxide film 12 and the end surface 11e of the Ag film 11 is set to 1 μm or less. The excessive etching amount L of the Ag film 11 with respect to the transparent conductive oxide film 12 is preferably 0.8 μm or less.

又,於該透明導電電路10中,Ag膜11之膜厚ta係被設成3nm以上15nm以下之範圍。 Further, in the transparent conductive circuit 10, the film thickness ta of the Ag film 11 is set to be in the range of 3 nm or more and 15 nm or less.

甚至,透明導電氧化物膜12之膜厚to是被設成5nm以上80nm以下之範圍。 Further, the film thickness to of the transparent conductive oxide film 12 is set to be in the range of 5 nm or more and 80 nm or less.

此外,在本實施形態中,透明導電電路10之寬度係被設定在10μm以上100μm以下之範圍內。 Further, in the present embodiment, the width of the transparent conductive circuit 10 is set to be in the range of 10 μm or more and 100 μm or less.

此處,Ag膜11係由純Ag或Ag合金所構成。Ag合金,在本實施形態中,係含有Sn、In、Mg、Ti之任意一種或二種以上之元素合計為0.05原子%以上、10.0原子%以下之範圍來作為添加元素,剩餘部分係為由Ag及不可避免之雜質所成之組成的Ag合金所構成。此外,作為不可避免之雜質係可舉出例如:500ppm以下的Fe、Pb、Bi、Al、Zn等。 Here, the Ag film 11 is composed of pure Ag or an Ag alloy. In the present embodiment, the Ag alloy contains one or more of Sn, In, Mg, and Ti, and the total amount of the elements is 0.05 atom% or more and 10.0 atom% or less as an additive element, and the remainder is Ag alloy composed of Ag and inevitable impurities. Further, examples of the unavoidable impurities include Fe, Pb, Bi, Al, Zn, and the like of 500 ppm or less.

此處,將Ag合金之添加元素之含有量規定如上述的理由,說明如下。 Here, the reason why the content of the additive element of the Ag alloy is specified as described above will be described below.

構成Ag膜11的Ag合金中所含有的Sn、In、Mg、Ti,係具有提升Ag膜11之濕潤性的作用效果的元素。又,Sn、In、Mg、Ti,係還具有提升Ag膜11和透明導電氧化物膜12之密接性的作用效果。 The Sn, In, Mg, and Ti contained in the Ag alloy constituting the Ag film 11 are elements having an effect of improving the wettability of the Ag film 11. Further, Sn, In, Mg, and Ti also have an effect of improving the adhesion between the Ag film 11 and the transparent conductive oxide film 12.

此處,Sn、In、Mg、Ti之任意一種或二種以上之元素合計為未滿0.05原子%的情況下,可能無法充分達到上述作用效果。另一方面,Sn、In、Mg、Ti係為會使電阻大幅上升的元素,因此若Sn、In、Mg、Ti之任意一種或二種以上之元素合計超過10.0原子%,則電阻會變高而可能導致導電性惡化。 When the total of two or more elements of Sn, In, Mg, and Ti is less than 0.05 atomic %, the above-described effects may not be sufficiently achieved. On the other hand, Sn, In, Mg, and Ti are elements which cause a large increase in electric resistance. Therefore, if any one of Sn, In, Mg, and Ti or a combination of two or more elements exceeds 10.0 atom%, the electric resistance becomes high. It may cause deterioration in conductivity.

基於如此理由,在本實施形態中,係將身為添加元素的Sn、In、Mg、Ti之含有量,規定在合計0.05原子%以上10.0原子%以下之範圍內。Sn、In、Mg、Ti之含有量,較理想係為0.1原子%以上5.0原子%以下之範圍。 For this reason, in the present embodiment, the content of Sn, In, Mg, and Ti, which is an additive element, is set to be in a range of 0.05 atomic% or more and 10.0 atomic% or less in total. The content of Sn, In, Mg, and Ti is preferably in the range of 0.1 atom% or more and 5.0 atom% or less.

此外,在構成Ag膜11的Ag合金中,亦可還 含有Sb及Cu來作為添加元素。 Further, in the Ag alloy constituting the Ag film 11, it is also possible to Contains Sb and Cu as an additive element.

Sb、Cu,係不會大幅降低視感穿透率,且不會使電阻大幅提升,可抑制Ag膜11的Ag凝聚而為具有更能提升耐環境性的作用效果的元素。此處,Sb為未滿0.01原子%,Cu為未滿0.1原子%的情況下,則可能無法充分達到上述作用效果。基於如此理由,在本實施形態中,係在添加Sb時是將Sb之含有量設定成0.01原子%以上,在添加Cu時是將Cu之含有量設定成0.1原子%以上。 Sb and Cu do not significantly reduce the visual transmittance, and do not greatly increase the electric resistance, and it is possible to suppress Ag aggregation of the Ag film 11 and to have an effect of further improving the environmental resistance. Here, when Sb is less than 0.01 at% and Cu is less than 0.1 at%, the above-described effects may not be sufficiently achieved. For this reason, in the case of adding Sb, the content of Sb is set to 0.01 atom% or more, and when Cu is added, the content of Cu is set to 0.1 atom% or more.

另一方面,Sb及Cu,係也是和Sn、In、Mg、Ti同樣地會使電阻大幅上升的元素。因此,在本實施形態中,在添加Sb及Cu時,是將身為添加元素的Sn、In、Mg、Ti、Sb、Cu之含有量之合計,設定成10原子%以下。 Sn、In、Mg、Ti、Sb、Cu之含有量之合計,較理想係為7.0原子%以下。 On the other hand, Sb and Cu are also elements which greatly increase the electric resistance similarly to Sn, In, Mg, and Ti. Therefore, in the present embodiment, when Sb and Cu are added, the total content of Sn, In, Mg, Ti, Sb, and Cu which is an additive element is set to 10 atom% or less. The total content of Sn, In, Mg, Ti, Sb, and Cu is preferably 7.0 atom% or less in total.

構成透明導電氧化物膜12的透明導電氧化物,係被設成In-Sn氧化物(ITO)、Al-Zn氧化物(AZO)、In-Zn氧化物(IZO)、Zn-Sn氧化物(ZTO)、Zn-Sn-Al氧化物(AZTO)。 The transparent conductive oxide constituting the transparent conductive oxide film 12 is made of In-Sn oxide (ITO), Al-Zn oxide (AZO), In-Zn oxide (IZO), Zn-Sn oxide ( ZTO), Zn-Sn-Al oxide (AZTO).

藉由使用這些透明導電氧化物,就可將透明導電氧化物膜12在可見光波段中的光穿透率(視感穿透率)維持較高,同時可降低電阻。 By using these transparent conductive oxides, the light transmittance (visual transmittance) of the transparent conductive oxide film 12 in the visible light band can be maintained high while reducing the electric resistance.

此處,透明導電氧化物膜12,係被設成非晶質膜為佳。 Here, the transparent conductive oxide film 12 is preferably an amorphous film.

具體而言,在透明導電氧化物膜12的X線繞射測定 中,與其如圖3(a)所示有明確的結晶峰值存在的結晶質膜,不如如圖3(b)所示沒有明確的結晶峰值存在的非晶質膜,較為理想。 Specifically, X-ray diffraction measurement of the transparent conductive oxide film 12 Among them, a crystalline film having a clear crystal peak as shown in Fig. 3(a) is not preferable as an amorphous film having no clear crystal peak as shown in Fig. 3(b).

在本實施形態中,透明導電氧化物膜12,係設成In-Sn氧化物(ITO)的非晶質膜。 In the present embodiment, the transparent conductive oxide film 12 is an amorphous film of In-Sn oxide (ITO).

然後,本實施形態的透明導電電路10,係在進行蝕刻處理之前的層合膜之狀態下,可見光波段之視感穿透率是被設成70%以上。 Then, in the transparent conductive circuit 10 of the present embodiment, the visible light transmittance in the visible light band is set to 70% or more in the state of the laminated film before the etching process.

又,本實施形態的透明導電電路10,係在進行蝕刻處理之前的層合膜之狀態下,薄片電阻是被設成40Ω/sq以下。 Further, in the transparent conductive circuit 10 of the present embodiment, the sheet resistance is set to 40 Ω/sq or less in the state of the laminated film before the etching treatment.

接著,關於本實施形態的透明導電電路10之製造方法,參照圖4來說明。 Next, a method of manufacturing the transparent conductive circuit 10 of the present embodiment will be described with reference to FIG. 4.

(Ag膜成膜工程S01) (Ag film forming process S01)

首先,在基板30之上,使用Ag合金濺鍍靶,將Ag膜11予以成膜。 First, an Ag alloy sputtering target is used on the substrate 30 to form a film of the Ag film 11.

此處,在Ag膜11成膜之際所使用的Ag合金濺鍍靶,係隨應於所被成膜Ag膜11之組成,而調整其組成。 Here, the Ag alloy sputtering target used when the Ag film 11 is formed is adjusted in accordance with the composition of the film-forming Ag film 11 to be formed.

本實施形態中的Ag合金濺鍍靶係被製造如下。 The Ag alloy sputtering target system in the present embodiment is manufactured as follows.

作為原料,準備純度99.9質量%以上之Ag、和純度99.9質量%以上之Sn、In、Mg、Ti、Sb、Cu。 As a raw material, Ag having a purity of 99.9% by mass or more and Sn, In, Mg, Ti, Sb, and Cu having a purity of 99.9% by mass or more are prepared.

接著,於熔融爐中,將Ag在高真空或惰性氣體氛圍 中予以熔融,在所得到的熔湯中添加所定量以上的Sn、In、Mg、Ti之任意1種或2種以上、Sb、Cu之任意1種或2種以上。其後,在真空或惰性氣體氛圍中加以熔融,製作上述之組成的Ag合金鑄錠。 Next, in a melting furnace, Ag is placed in a high vacuum or inert gas atmosphere. In addition, one or two or more kinds of Sn, In, Mg, and Ti, and one or two or more of Sb and Cu may be added to the obtained molten soup. Thereafter, it is melted in a vacuum or an inert gas atmosphere to prepare an Ag alloy ingot of the above composition.

此處,Ag的熔融,係將熔融爐內部之氛圍一度抽成真空後,在以Ar置換過的氛圍中進行,熔融後,在Ar氛圍之中對Ag之熔湯添加Sn、In、Mg、Ti、Sb、Cu,較為理想。此外,Sn、In、Mg、Ti、Sb、Cu,係亦可以預先製作的母合金之形式而添加。 Here, the melting of Ag is performed by once evacuating the atmosphere inside the melting furnace and then performing an atmosphere in which it is replaced with Ar. After melting, Sn, In, Mg, and Ag are added to the melt of Ag in an Ar atmosphere. Ti, Sb, and Cu are preferred. Further, Sn, In, Mg, Ti, Sb, and Cu may be added in the form of a master alloy prepared in advance.

將所得的Ag合金鑄錠進行冷間壓延後,在大氣中實施例如600℃、保持2小時的熱處理,接著進行機械加工,而製作所定尺寸的Ag合金濺鍍靶。 The obtained Ag alloy ingot is subjected to cold rolling, and then subjected to heat treatment at 600 ° C for 2 hours in the air, followed by mechanical processing to produce a Ag alloy sputtering target having a predetermined size.

在Ag膜成膜工程S01中,將上述的Ag合金濺鍍靶焊接至無氧銅製之背板,將其裝著至直流磁控管濺鍍裝置。此時,與Ag合金濺鍍靶對向並保持所定之間隔而配設基板30。 In the Ag film forming process S01, the Ag alloy sputtering target described above was welded to a back sheet made of oxygen-free copper, and mounted to a DC magnetron sputtering apparatus. At this time, the substrate 30 is disposed to face the Ag alloy sputtering target at a predetermined interval.

接著,以真空排氣裝置將直流磁控管濺鍍裝置內,抽氣到例如5×10-5Pa以下後,導入Ar氣而形成所定之濺鍍氣壓,接著以直流電源對靶材施加例如50W之直流濺鍍功率。 Next, the inside of the DC magnetron sputtering apparatus is evacuated by a vacuum exhaust apparatus to, for example, 5 × 10 -5 Pa or less, and Ar gas is introduced to form a predetermined sputtering gas pressure, and then the target material is applied with a DC power source, for example. 50W DC sputtering power.

藉此,基板30與Ag合金濺鍍靶之間會產生電漿,在基板30上將Ag膜11予以成膜。 Thereby, a plasma is generated between the substrate 30 and the Ag alloy sputtering target, and the Ag film 11 is formed on the substrate 30.

(透明導電氧化物膜成膜工程S02) (Transparent Conductive Oxide Film Formation Engineering S02)

然後,在已被成膜的Ag膜11之上,使用由透明導電氧化物所成之濺鍍靶,進行濺鍍,在Ag膜11之上,將透明導電氧化物膜12予以成膜。此外,作為透明導電氧化物膜12是將ITO膜予以成膜的情況下,藉由成膜條件,可以將結晶質膜及非晶質膜做選擇性成膜。 Then, on the Ag film 11 which has been formed on the film, sputtering is performed using a sputtering target made of a transparent conductive oxide, and the transparent conductive oxide film 12 is formed on the Ag film 11. Further, when the transparent conductive oxide film 12 is formed by forming an ITO film, the crystalline film and the amorphous film can be selectively formed into a film by film formation conditions.

藉此,形成了由Ag膜11及透明導電氧化物膜12所層合而成的層合膜。 Thereby, a laminated film in which the Ag film 11 and the transparent conductive oxide film 12 are laminated is formed.

(蝕刻處理工程S03) (etching process engineering S03)

接著,將上述的層合膜進行蝕刻處理,形成電路圖案。 Next, the above laminated film is subjected to an etching treatment to form a circuit pattern.

首先,在層合膜之上塗布光阻液而進行預烤後,將電路圖案形狀以曝光機進行曝光,進行後烤,形成光阻膜。其後,浸漬在顯影液中,去除曝光部的光阻膜。 First, after the photoresist is applied onto the laminated film and pre-baked, the circuit pattern shape is exposed by an exposure machine, and post-baking is performed to form a photoresist film. Thereafter, it was immersed in a developing solution to remove the photoresist film of the exposed portion.

然後,浸漬在草酸蝕刻液中,將光阻被除去之部分的層合膜一起蝕刻。此外,蝕刻方式係不限於浸漬,亦可使用淋浴蝕刻等。 Then, it is immersed in an oxalic acid etching solution, and the laminated film in which the photoresist is removed is etched together. Further, the etching method is not limited to immersion, and shower etching or the like may be used.

此處,在本實施形態中,作為草酸蝕刻液,是使用草酸濃度為3質量%以上7質量%以下之範圍內的草酸水溶液。又,草酸蝕刻液的溫度係設定在40~60℃。此處,若草酸濃度未滿3質量%,則蝕刻速率太慢而可能無法有效率地進行蝕刻處理。 In the present embodiment, the oxalic acid etching solution is an aqueous oxalic acid solution having a oxalic acid concentration of 3% by mass or more and 7% by mass or less. Further, the temperature of the oxalic acid etching solution is set at 40 to 60 °C. Here, if the oxalic acid concentration is less than 3% by mass, the etching rate is too slow and the etching treatment may not be performed efficiently.

另一方面,若草酸濃度超過7質量%,則液中可能會有草酸析出。基於以上理由,在本實施形態中,是將草酸 水溶液中的草酸濃度,設定在3質量%以上7質量%以下之範圍內。 On the other hand, if the oxalic acid concentration exceeds 7 mass%, oxalic acid may be precipitated in the liquid. For the above reasons, in the present embodiment, oxalic acid is used. The oxalic acid concentration in the aqueous solution is set to be in the range of 3 mass% or more and 7 mass% or less.

草酸水溶液中的草酸濃度較理想為3質量%以上5質量%以下。 The concentration of oxalic acid in the aqueous oxalic acid solution is preferably 3% by mass or more and 5% by mass or less.

此外,於該草酸蝕刻液中,係為了抑制蝕刻殘渣的產生,亦可添加有機系添加劑。草酸及水(溶媒)以外之添加物的含有量,係限制在4質量%以下為理想。 Further, in the oxalic acid etching solution, an organic additive may be added in order to suppress the generation of etching residue. The content of the additive other than oxalic acid and water (solvent) is preferably 4% by mass or less.

(光阻剝離工程S04) (Photoresist Stripping Engineering S04)

蝕刻處理工程S03之後,浸漬在光阻剝離劑中,將光阻膜予以剝離。 After the etching treatment process S03, it is immersed in a photoresist stripper, and the photoresist film is peeled off.

藉此,製造出具有所定之電路圖案的透明導電電路10。 Thereby, a transparent conductive circuit 10 having a predetermined circuit pattern is manufactured.

被設計成如以上之構成的本實施形態的透明導電電路10中,係由於Ag膜11相對於透明導電氧化物膜12的過度蝕刻量L為1μm以下,因此即使在蝕刻處理工程S03中的電路圖案形狀之電路寬度較窄的情況下,仍可確保Ag膜的寬度,可確保導電性。 In the transparent conductive circuit 10 of the present embodiment, which is configured as described above, since the excessive etching amount L of the Ag film 11 with respect to the transparent conductive oxide film 12 is 1 μm or less, even in the etching process S03 In the case where the circuit pattern shape has a narrow circuit width, the width of the Ag film can be ensured, and conductivity can be ensured.

又,Ag膜11的膜厚ta是被設成3nm以上15nm以下之範圍內,因此視感穿透率佳,同時可確保透明導電電路10的導電性。因此,尤其適合於各種顯示器及觸控面板的電路。 Further, since the film thickness ta of the Ag film 11 is in the range of 3 nm or more and 15 nm or less, the visual transmittance is good, and the conductivity of the transparent conductive circuit 10 can be ensured. Therefore, it is especially suitable for circuits of various displays and touch panels.

又,在本實施形態中,Ag膜11係含有Sn、In、Mg、Ti之任意一種或二種以上之元素合計為0.05原 子%以上、10.0原子%以下之範圍來作為添加元素,剩餘部分係為由Ag及不可避免之雜質所成之組成的Ag合金所構成。因此,Ag膜的濕潤性會被提升,即使將Ag膜11的膜厚ta設成15nm以下的比較薄的情況下,仍可抑制膜的凝聚。因此,可降低透明導電電路10的電阻,且可提升視感穿透率。 Further, in the present embodiment, the Ag film 11 contains any one of Sn, In, Mg, and Ti, or a total of two or more elements is 0.05. The range of %% or more and 10.0 atom% or less is added as an additive element, and the remainder is composed of an Ag alloy composed of Ag and an unavoidable impurity. Therefore, the wettability of the Ag film is improved, and even when the film thickness ta of the Ag film 11 is set to be relatively thinner than 15 nm, the aggregation of the film can be suppressed. Therefore, the electric resistance of the transparent conductive circuit 10 can be lowered, and the visual transmittance can be improved.

再者,在本實施形態中,構成Ag膜11的Ag合金,係在上述的添加元素以外,還含有Sb:0.01原子%以上、以及Cu:0.1原子%以上之其中任一方或雙方,且全添加元素的合計是被設成10.0原子%以下,剩餘部分係為由Ag及不可避免之雜質所成之組成。在本實施形態中,藉由Sb及Cu的添加,可更加抑制膜的凝聚,更降低透明導電電路10的電阻,且更提升視感穿透率。 In addition, in the present embodiment, the Ag alloy constituting the Ag film 11 further contains one or both of Sb: 0.01 atom% or more and Cu: 0.1 atom% or more, in addition to the above-mentioned additive elements, and The total of the added elements is set to be 10.0 at% or less, and the remainder is composed of Ag and unavoidable impurities. In the present embodiment, by the addition of Sb and Cu, the aggregation of the film can be further suppressed, the electric resistance of the transparent conductive circuit 10 can be further reduced, and the visual transmittance can be further improved.

又,在本實施形態的透明導電電路10中,係在實施蝕刻處理工程S03前的層合膜中,將可見光波段之視感穿透率設成70%以上,同時,薄片電阻是被設成40Ω/sq以下,因此可成為視認性及導電性佳的透明導電電路10,可適用於各種顯示器或觸控面板。 Further, in the transparent conductive circuit 10 of the present embodiment, in the laminated film before the etching process S03 is performed, the visual transmittance in the visible light band is set to 70% or more, and the sheet resistance is set to Since it is 40 Ω/sq or less, it can be used as a transparent conductive circuit 10 which is excellent in visibility and conductivity, and can be applied to various displays or touch panels.

甚至,在本實施形態中,透明導電氧化物膜12是被設成非晶質之ITO膜,因此在蝕刻處理工程S03中,可使用草酸蝕刻液來確實地進行蝕刻處理。因此,可確實抑制Ag膜11的過度蝕刻量L。 Further, in the present embodiment, since the transparent conductive oxide film 12 is an amorphous ITO film, in the etching process S03, an etching treatment can be reliably performed using an oxalic acid etching solution. Therefore, the excessive etching amount L of the Ag film 11 can be surely suppressed.

若依據本實施形態的透明導電電路10之製造方法,則Ag膜11的膜厚ta是被形成為3nm以上15nm 以下之範圍內而比較薄,因此在蝕刻處理工程S03中,即使使用草酸蝕刻液,仍可去除Ag膜11,可形成電路圖案。 According to the method of manufacturing the transparent conductive circuit 10 of the present embodiment, the film thickness ta of the Ag film 11 is formed to be 3 nm or more and 15 nm. In the following range, it is relatively thin. Therefore, in the etching treatment process S03, even if an oxalic acid etching liquid is used, the Ag film 11 can be removed, and a circuit pattern can be formed.

又,在本實施形態中,作為草酸蝕刻液,是使用被設成草酸濃度是3質量%以上7質量%以下之範圍內的草酸水溶液,因此可將Ag膜11及透明導電氧化物膜12一起進行蝕刻,且可確實降低Ag膜11的過度蝕刻量L。 In addition, in the present embodiment, the oxalic acid etching solution is an aqueous solution of oxalic acid having a oxalic acid concentration of 3% by mass or more and 7% by mass or less. Therefore, the Ag film 11 and the transparent conductive oxide film 12 can be used together. Etching is performed, and the excessive etching amount L of the Ag film 11 can be surely lowered.

甚至,在本實施形態中,由於透明導電氧化物膜12的膜厚to是被設成5nm以上80nm以下之範圍內,因此可確保透明導電氧化物膜12的導電性及視感穿透率。 In the present embodiment, the film thickness to of the transparent conductive oxide film 12 is set to be in the range of 5 nm or more and 80 nm or less, so that the conductivity and the visual transmittance of the transparent conductive oxide film 12 can be ensured.

此外,透明導電氧化物膜12的膜厚to,係使用各單相膜上的光學常數(折射率及衰減係數),以Ag膜11/透明導電氧化物膜12之2層構造來進行光學模擬,而設計成讓可見光波段之穿透率會藉由光學性干涉效應而有所提升的膜厚。 Further, the film thickness to of the transparent conductive oxide film 12 is optically simulated by using a two-layer structure of the Ag film 11/transparent conductive oxide film 12 using optical constants (refractive index and attenuation coefficient) on each single-phase film. It is designed to increase the film thickness of the visible light band by the optical interference effect.

以上雖然說明本發明的實施形態,但本發明係不限定於此,在不脫離該發明之技術思想的範圍內,可做適宜變更。 The embodiment of the present invention has been described above, but the present invention is not limited thereto, and may be modified as appropriate without departing from the scope of the invention.

例如,在本實施形態中,是對基板30之一面,依序成膜Ag膜11及透明導電氧化物膜12,但不限於此,亦可對基板30之一面,依序成膜透明導電氧化物膜12及Ag膜11的構成。 For example, in the present embodiment, the Ag film 11 and the transparent conductive oxide film 12 are sequentially formed on one surface of the substrate 30. However, the present invention is not limited thereto, and a transparent conductive oxide may be sequentially formed on one surface of the substrate 30. The structure of the material film 12 and the Ag film 11.

又,例如亦可如圖5所示,在Ag膜111之一面側及他面側,分別形成有透明導電氧化物膜112A、112B的透明導電電路110。此情況下,可更加提升耐環境性。此外,透明導電氧化物膜112A與透明導電氧化物膜112B係亦可為彼此互異組成的透明導電氧化物。再者,亦可將Ag膜與透明導電氧化物膜層合達4層以上、任意之數量。 Further, for example, as shown in FIG. 5, a transparent conductive circuit 110 having transparent conductive oxide films 112A and 112B may be formed on one surface side and the other side of the Ag film 111, respectively. In this case, the environmental resistance can be further improved. Further, the transparent conductive oxide film 112A and the transparent conductive oxide film 112B may be transparent conductive oxides having mutually different compositions. Further, the Ag film and the transparent conductive oxide film may be laminated to have four or more layers and any number.

[實施例] [Examples]

針對本發明所述之層合膜之效果進行確認的確認實驗之結果,加以說明。 The result of the confirmation experiment for confirming the effect of the laminated film of the present invention will be described.

(實施例1) (Example 1)

表1所示之構成(透明導電氧化物膜/Ag膜/透明導電氧化物膜之3層構造)的層合膜,製作如下。 The laminated film of the structure (three-layer structure of a transparent conductive oxide film / Ag film / transparent conductive oxide film) shown in Table 1 was produced as follows.

在將Ag膜進行成膜之際,係準備了對應於表1所示之Ag膜之組成的濺鍍靶。此外,靶材尺寸設成4英吋×6mmt。 When the Ag film was formed into a film, a sputtering target corresponding to the composition of the Ag film shown in Table 1 was prepared. In addition, the target size is set to 4 inches ×6mmt.

又,透明導電氧化物膜,係使用以下的透明導電氧化物濺鍍靶。 Further, as the transparent conductive oxide film, the following transparent conductive oxide sputtering target was used.

ITO:相對於In與Sn之總和而含有Sn達10原子%的In與Sn的氧化物燒結體靶材。 ITO: an oxide sintered body target containing In and Sn in which Sn is 10 atom% with respect to the sum of In and Sn.

IZO:相對於In與Zn之總和而含有Zn達30原子%的In與Zn的氧化物燒結體靶材。 IZO: an oxide sintered body target containing Zn up to 30 atom% of In and Zn with respect to the sum of In and Zn.

ZTO:相對於Zn與Sn之總和而含有Sn達50原子%的Zn與Sn的氧化物燒結體靶材。 ZTO: an oxide sintered body target containing Zn and Sn in which Sn is 50 atom% with respect to the sum of Zn and Sn.

AZO:相對於Zn與Al之總和而含有Al達2原子%的Zn與Al的氧化物燒結體靶材。 AZO: an oxide sintered compact target of Zn and Al containing 2% by atom of Al with respect to the total of Zn and Al.

AZTO:相對於Zn與Al與Sn之總和而含有Al達2原子%、Sn達10原子%的Zn與Al與Sn的氧化物燒結體靶材。 AZTO: an oxide sintered body target of Zn, Al, and Sn containing Al up to 2 atom% and Sn up to 10 atom% with respect to the sum of Zn and Al and Sn.

此外,表1中的透明導電氧化物膜中,「結晶質」係如圖3(a)所示藉由X線繞射測定,觀察到明確的結晶峰值者。又,「非晶質」係如圖3(b)所示藉由X線繞射測定,未觀察到明確的結晶峰值者。 Further, in the transparent conductive oxide film shown in Table 1, "crystallinity" was measured by X-ray diffraction as shown in Fig. 3 (a), and a clear crystal peak was observed. Further, "amorphous" was measured by X-ray diffraction as shown in Fig. 3 (b), and no clear crystal peak was observed.

此處,透明導電氧化物膜之成膜條件係如以下所示。 Here, the film formation conditions of the transparent conductive oxide film are as follows.

基板:已洗淨之玻璃基板(康寧公司製EAGLE XG厚度0.7mm) Substrate: Washed glass substrate (EAGLE XG thickness 0.7mm by Corning)

使用氣體:Ar+2體積%氧 Use gas: Ar + 2 vol% oxygen

氣壓:0.67Pa Air pressure: 0.67Pa

濺鍍功率:直流300W Sputtering power: DC 300W

靶材/基板間距離:70mm Target/substrate distance: 70mm

又,Ag膜之成膜條件係如以下所示。 Further, the film formation conditions of the Ag film are as follows.

到達真空度:5×10-5Pa以下 The degree of vacuum reached: 5 × 10 -5 Pa or less

使用氣體:Ar Use gas: Ar

氣壓:0.67Pa Air pressure: 0.67Pa

濺鍍功率:直流200W Sputtering power: DC 200W

靶材/基板間距離:70mm Target/substrate distance: 70mm

針對所得到的層合膜,如以下般地進行蝕刻處理。 The obtained laminated film was subjected to an etching treatment as follows.

首先,在層合膜之上將光阻液(東京應化株式會社製OFPR-8600)予以滴下,將光阻進行旋轉塗布,在大氣中以110℃×90秒之條件進行預烤,形成光阻膜。 First, a photoresist (OFPR-8600 manufactured by Tokyo Ohka Co., Ltd.) was dropped on the laminated film, and the photoresist was spin-coated, and pre-baked in the air at 110 ° C × 90 seconds to form light. Resistance film.

接著,將電路寬度與電路間隔分別都設成30μm的電路圖案,藉由曝光機而將光阻膜予以曝光。曝光後的層合膜,在顯影液(東京應化株式會社製NMD-W)中以室溫浸漬100秒,將曝光部之光阻膜予以去除。其後,在大氣中以150℃×300秒之條件進行後烤。 Next, the circuit pattern and the circuit interval were each set to a circuit pattern of 30 μm , and the photoresist film was exposed by an exposure machine. The laminated film after the exposure was immersed in a developing solution (NMD-W, manufactured by Tokyo Ohka Co., Ltd.) at room temperature for 100 seconds, and the photoresist film of the exposed portion was removed. Thereafter, post-baking was carried out in the air at 150 ° C × 300 seconds.

接著,在No.1-7中,在溫度40℃的草酸蝕刻液(草酸濃度4質量%之草酸水溶液)中浸漬100~400秒,進行蝕刻。 Next, in No. 1-7, etched in an oxalic acid etching liquid (oxalic acid aqueous solution of oxalic acid concentration: 4 mass%) at 40 ° C for 100 to 400 seconds, and etching was performed.

在No.8-14中,在溫度40℃的磷酸與硝酸與醋酸所成的混酸(關東化學株式會社製ITO-02)中浸漬30~80,進行蝕刻。 In No. 8-14, 30 to 80 immersed in phosphoric acid at a temperature of 40 ° C and a mixed acid of nitric acid and acetic acid (ITO-02 manufactured by Kanto Chemical Co., Ltd.) was etched.

在No.15-21中,進行2階段蝕刻。首先,在溫度40℃的關東化學株式會社製ITO-07N中浸漬30秒,進行透明導電氧化物膜之蝕刻。其後,在溫度40℃的關東化學株式會社製SEA-5N中浸漬10秒,進行Ag膜之蝕刻。 In No. 15-21, 2-stage etching was performed. First, it was immersed in ITO-07N manufactured by Kanto Chemical Co., Ltd. at 40 ° C for 30 seconds to etch a transparent conductive oxide film. Thereafter, it was immersed in SEA-5N manufactured by Kanto Chemical Co., Ltd. at 40 ° C for 10 seconds to etch the Ag film.

如上述進行蝕刻處理後,浸漬在純水中實施超音波洗淨1分鐘,獲得No.1-21的透明導電電路。 After the etching treatment as described above, the film was immersed in pure water for ultrasonic cleaning for 1 minute to obtain a transparent conductive circuit of No. 1-21.

針對所得的透明導電電路,為了觀察電路剖面而將基板予以劈開,將其剖面,使用電子顯微鏡觀察之。 With respect to the obtained transparent conductive circuit, the substrate was cleaved in order to observe the circuit cross section, and the cross section was observed using an electron microscope.

然後,將相對於電子顯微鏡觀察所確認到的透明導電氧化物膜與Ag膜之各者的蝕刻端部之膜而在平行方向上的位置之差分,視為「過度蝕刻量」而予以評價。評價結果示於表1。 Then, the difference in position in the parallel direction between the transparent conductive oxide film and the film of the etching end portion of each of the Ag film confirmed by the electron microscope observation was regarded as "excessive etching amount". The evaluation results are shown in Table 1.

使用磷酸與硝酸與醋酸所成之混酸而進行一起蝕刻的No.8-14中,係確認到過度蝕刻量較大。 In No. 8-14 which was etched together using a mixed acid of phosphoric acid and nitric acid and acetic acid, it was confirmed that the amount of over-etching was large.

又,實施2階段蝕刻的No.15-21中,雖然比起使用混酸進行一起蝕刻的No.8-14還要降低,但過度蝕刻量係超過了1μm。 Further, in No. 15-21 in which the two-stage etching was performed, although the number of No. 8-14 which was etched together using the mixed acid was lower, the amount of over-etching exceeded 1 μm .

相對於此,使用草酸蝕刻液而進行一起蝕刻的No.1-7中,過度蝕刻量全部都被抑制在1μm以下。 On the other hand, in No. 1-7 in which etching was performed using an oxalic acid etching liquid, the amount of over-etching was all suppressed to 1 μm or less.

由以上可確認,若依據本發明,則可獲得Ag膜相對於透明導電氧化物膜的過度蝕刻量為1μm以下的透明導電電路。 From the above, it was confirmed that according to the present invention, a transparent conductive circuit in which the amount of over-etching of the Ag film with respect to the transparent conductive oxide film is 1 μm or less can be obtained.

(實施例2) (Example 2)

接著,藉由與實施例1之No.1-7相同的方法,製造表2所示之構造(透明導電氧化物膜/Ag膜/透明導電氧化物膜之3層構造)的透明導電電路。 Then, a transparent conductive circuit having a structure (a three-layer structure of a transparent conductive oxide film/Ag film/transparent conductive oxide film) shown in Table 2 was produced in the same manner as in No. 1-7 of Example 1.

針對所得的透明導電電路,評價是否可用草酸蝕刻液進行蝕刻。此外,將蝕刻後的透明導電電路進行光學顯微鏡觀察及SEM觀察,將沒有確認到殘渣,過度蝕刻量為1μm以下者,評價為「A」;將蝕刻係為可行,但光學顯微鏡觀察及SEM觀察之結果有確認到蝕刻殘渣者,評價為「B」;將3層(透明導電氧化物膜/Ag膜/透明導電氧化物膜)無法一起蝕刻者、或過度蝕刻量超過1μm者,評價為「C」。評價結果示於表2。 With respect to the obtained transparent conductive circuit, it was evaluated whether etching with an oxalic acid etching solution was possible. In addition, the transparent conductive circuit after the etching was observed by optical microscopy and SEM observation, and no residue was observed. The excessive etching amount was 1 μm or less, and it was evaluated as "A". The etching system was possible, but optical microscopy and As a result of SEM observation, it was confirmed that the etching residue was evaluated as "B", and three layers (transparent conductive oxide film/Ag film/transparent conductive oxide film) could not be etched together, or the amount of excessive etching was more than 1 μm . The rating is "C". The evaluation results are shown in Table 2.

Ag膜的膜厚是形成比本發明的範圍還厚的No.31、32、41、42、51、52、61、62、71、72、81、82中,無法將Ag膜充分蝕刻。 The film thickness of the Ag film was formed in Nos. 31, 32, 41, 42, 51, 52, 61, 62, 71, 72, 81, and 82 which were thicker than the range of the present invention, and the Ag film could not be sufficiently etched.

另一方面,Ag膜的膜厚是被設定在本發明的範圍內的No.33-35、43-45、53-55、63-65、73-75、83-85中,即使使用草酸蝕刻液的情況下,仍可將Ag膜充分蝕刻。 On the other hand, the film thickness of the Ag film is No. 33-35, 43-45, 53-55, 63-65, 73-75, 83-85 set within the scope of the present invention, even if etched using oxalic acid In the case of a liquid, the Ag film can still be sufficiently etched.

由以上的實驗結果確認到,藉由將Ag膜的膜厚設成15nm以下之範圍內,就可藉由草酸蝕刻液而加以蝕刻。 From the above experimental results, it was confirmed that the film thickness of the Ag film was set to be within a range of 15 nm or less, and etching was performed by an oxalic acid etching solution.

(實施例3) (Example 3)

接著,藉由與實施例1之No.1-7相同的方法,製造表3所示之構造(透明導電氧化物膜/Ag膜/透明導電氧化物膜之3層構造)的透明導電電路。 Then, a transparent conductive circuit having a structure (a three-layer structure of a transparent conductive oxide film/Ag film/transparent conductive oxide film) shown in Table 3 was produced in the same manner as in No. 1-7 of Example 1.

針對所得的透明導電電路,評價是否可用草酸蝕刻液進行蝕刻。評價內容,係和實施例2相同。評價結果示於表3。 With respect to the obtained transparent conductive circuit, it was evaluated whether etching with an oxalic acid etching solution was possible. The evaluation content is the same as in the second embodiment. The evaluation results are shown in Table 3.

使用草酸水溶液來作為蝕刻液的情況下,在形成了結晶質之ITO膜來作為透明導電氧化物膜的No.92中,相較於形成了非晶質之ITO膜的No.91,確認到草酸水溶液所致之蝕刻性較差。此外,使用草酸水溶液與硝酸之混合液來作為蝕刻液的情況下,即使形成了結晶質之ITO膜來作為透明導電氧化物膜的No.93中,蝕刻性仍為良好。 When the oxalic acid aqueous solution was used as the etching liquid, it was confirmed that No. 91 which is a transparent conductive oxide film in the crystalline ITO film was formed as compared with No. 91 in which the amorphous ITO film was formed. The etchability due to the aqueous oxalic acid solution is poor. Further, when a mixed liquid of an aqueous solution of oxalic acid and nitric acid was used as the etching liquid, the etching property was good even in No. 93 which was a transparent conductive oxide film in which a crystalline ITO film was formed.

由以上的實驗結果確認到,使用草酸水溶液來作為蝕刻液的情況下,將透明導電氧化物膜設成非晶質膜為佳。 From the above experimental results, it was confirmed that when an aqueous oxalic acid solution is used as the etching liquid, it is preferred to form the transparent conductive oxide film as an amorphous film.

(實施例4) (Example 4)

接著,藉由與實施例1之No.1-7相同的方法,製造表4所示之構造的透明導電電路。此外,在該實施例4中,是在玻璃基板上成膜透明導電氧化物膜,在其上成膜Ag膜的2層構造。 Next, a transparent conductive circuit having the structure shown in Table 4 was produced by the same method as No. 1-7 of Example 1. Further, in the fourth embodiment, a two-layer structure in which a transparent conductive oxide film is formed on a glass substrate and an Ag film is formed thereon is used.

在No.101-117中,以草酸蝕刻液進行蝕刻處理後,未確認到殘渣,過度蝕刻量係全部都是1μm以下。 In No. 101-117, after the etching treatment with the oxalic acid etching liquid, no residue was observed, and the excessive etching amount was all 1 μm or less.

針對所得之透明導電電路,測定薄片電阻值。薄片電阻值的測定,係使用表面電阻測定器(三菱油化公司製,Loresta AP MCP-T400)而以四探針法進行測定。評價結果示於表4。 The sheet resistance value was measured for the obtained transparent conductive circuit. The sheet resistance value was measured by a four-probe method using a surface resistance measuring instrument (Loresta AP MCP-T400, manufactured by Mitsubishi Petrochemical Co., Ltd.). The evaluation results are shown in Table 4.

構成Ag膜的Ag合金之添加元素之合計量超過10原子%的No.111-117中,薄片電阻值大到超過40Ω/sq。另一方面,構成Ag膜的Ag合金之添加元素之合計量為10原子%以下的No.101~108中,薄片電阻值係為40Ω/sq以下。 In No. 111-117 in which the total amount of the additive elements of the Ag alloy constituting the Ag film exceeds 10 atom%, the sheet resistance value is as large as more than 40 Ω/sq. On the other hand, in No. 101 to 108 in which the total amount of the additive elements of the Ag alloy constituting the Ag film is 10 atom% or less, the sheet resistance value is 40 Ω/sq or less.

由以上的實驗結果確認到,為了獲得低電阻的透明導電電路,將構成Ag膜的Ag合金之添加元素之合計量規定成10原子%以下,是尤其理想的。 From the above experimental results, it has been found that it is particularly preferable to set the total amount of the additive elements of the Ag alloy constituting the Ag film to 10 atom% or less in order to obtain a low-resistance transparent conductive circuit.

10‧‧‧透明導電電路 10‧‧‧Transparent conductive circuit

11‧‧‧Ag膜 11‧‧‧Ag film

12‧‧‧透明導電氧化物膜 12‧‧‧Transparent Conductive Oxide Film

11e‧‧‧端面 11e‧‧‧ end face

12e‧‧‧端面 12e‧‧‧ end face

30‧‧‧基板 30‧‧‧Substrate

L‧‧‧過度蝕刻量 L‧‧‧Excessive etching

to‧‧‧膜厚 To‧‧‧ film thickness

ta‧‧‧膜厚 Ta‧‧‧ film thickness

Claims (6)

一種透明導電電路,係具有由Ag或Ag合金所成之Ag膜和被層合在該Ag膜上之透明導電氧化物膜,藉由蝕刻處理而被形成有電路圖案的透明導電電路,其特徵為,前述Ag膜的膜厚是被設成15nm以下之範圍內;前述Ag膜相對於前述透明導電氧化物膜的過度蝕刻量是被設成1μm以下。 A transparent conductive circuit comprising a Ag film formed of Ag or an Ag alloy and a transparent conductive oxide film laminated on the Ag film, and a transparent conductive circuit formed with a circuit pattern by etching treatment, characterized in that The film thickness of the Ag film is set to be 15 nm or less, and the amount of over-etching of the Ag film with respect to the transparent conductive oxide film is set to 1 μm or less. 如請求項1所記載之透明導電電路,其中,前述Ag膜,係含有Sn、In、Mg、Ti之任意一種或二種以上之元素合計為0.05原子%以上、10.0原子%以下之範圍來作為添加元素,剩餘部分係為由Ag及不可避免之雜質所成之組成的Ag合金所構成。 The transparent conductive circuit according to claim 1, wherein the Ag film contains one or more of Sn, In, Mg, and Ti, and the total of the elements is 0.05 atom% or more and 10.0 atom% or less. The element is added, and the remainder is composed of an Ag alloy composed of Ag and an unavoidable impurity. 如請求項2所記載之透明導電電路,其中,前述Ag膜,係還含有Sb:0.01原子%以上、以及Cu:0.1原子%以上之其中任一方或雙方來作為添加元素,且全添加元素的合計是被設成10.0原子%以下,剩餘部分係為由Ag及不可避免之雜質所成之組成的Ag合金所構成。 The transparent conductive circuit according to claim 2, wherein the Ag film further contains one or both of Sb: 0.01 atom% or more and Cu: 0.1 atom% or more as an additive element, and all of the elements are added. The total amount is set to 10.0 atom% or less, and the remainder is composed of an Ag alloy composed of Ag and unavoidable impurities. 如請求項1或請求項2所記載之透明導電電路,其中,前述透明導電氧化物膜係被設成非晶質膜。 The transparent conductive circuit according to claim 1 or claim 2, wherein the transparent conductive oxide film is an amorphous film. 一種透明導電電路之製造方法,係具有由Ag或Ag合金所成之Ag膜和被層合在該Ag膜上之透明導電氧化物膜,而被形成有電路圖案的透明導電電路之製造方法,其特徵為, 將前述Ag膜的膜厚設成15nm以下之範圍內;具有:對具有前述Ag膜與前述透明導電氧化物膜的層合膜進行蝕刻處理以形成電路圖案的蝕刻處理工程;在該蝕刻處理工程中,係使用草酸蝕刻液,將前述透明導電氧化物膜及前述Ag膜一起溶解。 A method for producing a transparent conductive circuit, comprising: an Ag film formed of Ag or an Ag alloy; and a transparent conductive oxide film laminated on the Ag film, and a transparent conductive circuit formed with a circuit pattern, Its characteristic is that The film thickness of the Ag film is set to be 15 nm or less; and has an etching process for etching a laminated film having the Ag film and the transparent conductive oxide film to form a circuit pattern; In the middle, the transparent conductive oxide film and the Ag film are dissolved together using an oxalic acid etching solution. 如請求項5所記載之透明導電電路之製造方法,其中,前述草酸蝕刻液係為,被設成草酸濃度是3質量%以上7質量%以下之範圍內的草酸水溶液。 The method for producing a transparent conductive circuit according to claim 5, wherein the oxalic acid etching solution is an aqueous oxalic acid solution having an oxalic acid concentration of 3% by mass or more and 7% by mass or less.
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