TW201700988A - Multiplex analysis system and multiplex analyzer thereof for sampling and interpreting signals at the same time for further analysis - Google Patents

Abstract

The present invention provides a multiplex analysis system and a multiplex analyzer thereof use a single probe and cooperate with a flow increasing unit to duplicate a set of test signals into two sets of same test signals, which are respectively sent to a logic analysis module and a protocol analysis module, so that the test signals can be sampled by the logic analysis module and interpreted by the protocol analysis module at the same time, and then the sampling result and the interpretation result are respectively stored through a first transmission interface and a second transmission interface to a first storage unit and a second storage unit.

Description

Multiplex analysis system and its multiplex analyzer

The invention relates to a device for signal analysis; in particular to a multiplex analysis system and a multiplex analyzer capable of simultaneously sampling and interpreting a test signal.

The main purpose of the logic analyzer is to sample the signal. The main function of the protocol analyzer is to interpret the signal and record it. Therefore, the logic analyzers and protocol analyzers generally available on the market are two independent devices.

When the logic analyzer and the protocol analyzer simultaneously perform signal detection on a test object, a signal is generated between the probe of the logic analyzer and the protocol analyzer and the object to be tested, and the signal of the object to be tested is disturbed.

In addition, if the logic analyzer or the protocol analyzer performs signal detection on the Embedded Multi Media Card (EMMC) at the same time, the embedded multimedia card cannot withstand the load of the two probes, resulting in reduced efficiency. Function failure or damage, so the existing technology can not use the logic analyzer and the protocol analyzer at the same time to simultaneously sample and interpret the signals in the embedded multimedia card.

Based on the current equipment problem, when the signal detection is performed on the object to be tested, the protocol analyzer must be used to interpret the signal of the object to be tested, and when the interpretation result is found to be inconsistent with an expected result, it must be moved first. In addition to the protocol analyzer, after the signal detection by the logic analyzer from the beginning of the test, it is known that the test object emits a signal that does not meet the expected signal. therefore, When it is judged whether the signal of the object to be tested is correct, it takes a lot of time, and the user has to spend too long time detecting the object to be tested, resulting in inefficiency.

In view of the above, an object of the present invention is to provide a multiplex analysis system and a multiplex analyzer capable of simultaneously sampling and interpreting a test signal.

In order to achieve the above object, the multiplex analyzer provided by the present invention is configured to detect a signal to be tested issued by a test object, and the multiplex analyzer includes: a probe, a logic analysis module, and an agreement. An analysis module, a first storage unit, a first transmission interface, a second storage unit, and a second transmission interface. The probe is electrically connected to the object to be tested to receive the signal to be tested issued by the object to be tested. The logic analysis module is electrically connected to the probe for receiving the signal to be tested and sampling the signal to be tested, and outputting the sampling result. The protocol analysis module is electrically connected to the probe for receiving the signal to be tested, and interpreting the signal to be tested according to the communication protocol of the object to be tested, and outputting the interpretation result. The first storage unit is electrically connected to the first transmission interface, and the first transmission interface is electrically connected to the logic analysis module for receiving the sampling result output by the logic analysis module and outputting to the first transmission rate to the first transmission rate The first storage unit is stored. The second storage unit is electrically connected to the second transmission interface, and the second transmission interface is electrically connected to the protocol analysis module for receiving the interpretation result of the protocol analysis module output and outputting at a second transmission rate. And storing to the second storage unit, and the second transmission rate is not greater than the first transmission rate.

In order to achieve the above object, the present invention further provides a multiplex analysis system, comprising: a probe, a logic analysis module, a protocol analysis module, a first storage unit, a first transmission interface, and a second storage. A unit, a second transmission interface, and a processor.

The probe is electrically connected to a test object to receive a signal to be tested issued by the test object. The logic analysis module is electrically connected to the probe for receiving the signal to be tested and sampling the signal to be tested, and outputting the sampling result. The protocol analysis module is electrically connected to the probe for receiving the signal to be tested, and interpreting the signal to be tested according to the communication protocol of the object to be tested, and outputting the interpretation result. The first storage unit is electrically connected to the first transmission interface, and the first transmission interface is electrically connected to the logic analysis module for receiving the sampling result output by the logic analysis module and outputting to the first transmission rate to the first transmission rate The first storage unit is stored. The second storage unit is electrically connected to the second transmission interface, and the second transmission interface is electrically connected to the protocol analysis module and the first transmission interface, and is configured to receive the interpretation result of the protocol analysis module output and A second transmission rate is output to the second storage unit for storage, and the second transmission rate is not greater than the first transmission rate. The processor is electrically connected to the second storage unit, configured to analyze whether the interpretation result stored by the second storage unit meets a predetermined condition, and when the interpretation result meets the predetermined condition, the first storage unit is configured The stored sampling result is transmitted to the second storage unit via the first transmission interface and the second transmission interface.

The effect of the invention is that the logic analysis module and the protocol analysis module are simultaneously used, so that the signal to be tested can be simultaneously sampled by the logic analysis module and interpreted by the protocol analysis module to speed up the processing of the signal to be tested.

10‧‧‧Multiplex analysis system

110‧‧‧Multiplex analyzer

111‧‧‧ Probe

112‧‧‧Adding unit

113‧‧‧Logic Analysis Module

114‧‧‧Agreement Analysis Module

115‧‧‧First transmission interface

116‧‧‧Second transmission interface

117‧‧‧First storage unit

118‧‧‧Second storage unit

120‧‧‧ processor

130‧‧‧ display

140‧‧‧Alarm

240‧‧‧Alarm

30‧‧‧Multiplex analysis system

311‧‧‧First probe

312‧‧‧Second probe

321‧‧‧First increase unit

322‧‧‧Second flow-increasing unit

331‧‧‧First Logic/Agreement Analysis Module

332‧‧‧Second Logic/Agreement Analysis Module

333‧‧‧ Third Logic/Agreement Analysis Module

334‧‧‧ Fourth Logic/Agreement Analysis Module

341‧‧‧First transmission interface

342‧‧‧Second transmission interface

343‧‧‧ third transmission interface

344‧‧‧4th transmission interface

351‧‧‧First storage unit

352‧‧‧Second storage unit

353‧‧‧ third storage unit

354‧‧‧fourth storage unit

360‧‧‧ processor

370‧‧‧ display

1 is a block diagram of a multiplex analysis system according to a first embodiment of the present invention.

FIG. 2 is a block diagram of the above embodiment, showing the transmission direction of each signal when the analysis result is correct.

FIG. 3 is a block diagram of the above embodiment, showing the transmission direction of each signal when the analysis result is an error.

4 is a block diagram of a multiplex analysis system according to a second embodiment of the present invention.

Figure 5 is a block diagram of a multiplex analysis system in accordance with a third embodiment of the present invention.

Figure 6 is a block diagram of a multiplex analysis system in accordance with a fourth embodiment of the present invention.

In order to explain the present invention more clearly, the preferred embodiment will be described in detail with reference to the accompanying drawings. FIG. 1 is a multiplex analysis system according to a first embodiment of the present invention.

The multiplex analysis system 10 is mainly composed of a multiplex analyzer 110 and a computer. The multiplex analyzer 110 is configured to detect a signal to be tested sent by a test object (not shown). The object to be tested may refer to various signal transmission lines (such as a network route, a USB transmission line or a bus bar), a signal transmission connector (for example, a network connector, a USB connector or an RS232 connector), or a memory device (for example, an embedded multimedia card). ). In this embodiment, the object to be tested is an embedded multimedia card, and the embedded multimedia card transmits and receives data by means of a digital signal, and the data includes a plurality of packets. The above information is the signal to be detected to be detected by the multiplex analysis system 10 of the present invention.

In the present invention, the multiplexer 110 includes a probe 111, an add-on unit 112, a logic analysis module 113, a protocol analysis module 114, a first transmission interface 115, and a second transmission interface 116. a first storage unit 117 and a second storage unit 118.

The probe 111 is configured to electrically connect the signal contact of the embedded multimedia card to receive the signal to be tested on the embedded multimedia card.

The current increasing unit 112 has an input end and two output ends. The input end of the current-increasing unit 112 is electrically connected to the probe 111 for receiving the signal to be tested, and then the signal to be tested is simultaneously outputted by the two outputs. In practical implementation, the current increasing unit 112 may be a filter circuit and amplify the electricity. Circuits, matching circuits, or logic circuits are combined, but other conventional circuit structures can be utilized to achieve the foregoing objectives.

The logic analysis module 113 is electrically connected to one of the output terminals of the current-increasing unit 112, so that the logic analysis module 113 is electrically connected to the probe through the current-increasing unit 112, and is configured to receive the output of the output terminal. The signal to be tested is sampled at a predetermined sampling frequency of the signal to be tested, thereby obtaining a sampling result and outputting.

The protocol analysis module 114 is electrically connected to the other output end of the current-increasing unit 112, so that the protocol analysis module 114 is electrically connected to the probe through the current-increasing unit 112, and is configured to receive the output of the output terminal. The signal to be tested, and the signal to be tested is interpreted according to the communication protocol of the object to be tested, and then the interpretation result is output.

The first transmission interface 115 is electrically connected to the logic analysis module 113 and the first storage unit 117, and the first transmission interface 115 is configured to receive the sampling result output by the logic analysis module 113 and perform a first transmission. The rate outputs the sampling result to the first storage unit 117 for storage.

The second transmission interface 116 is electrically connected to the protocol analysis module 114, the first transmission interface 115, and the second storage unit 118, respectively. The second transmission interface 116 is configured to receive the interpretation result output by the protocol analysis module 114 and output the interpretation result to the second storage unit 118 for storage at a second transmission rate, and the second transmission rate is not greater than The first transmission rate. In addition, the second transmission rate is not greater than the first transmission rate. The first transmission interface 115 is configured to transmit the sampling result output by the logic analysis module 113, but the sampling result is in general, the data is The amount is very large. Therefore, the first transmission interface 115 requires a higher transmission rate to transmit the sampling result to the first storage unit 117 for complete and error-free storage. The second transmission interface 116 is used to transmit the interpretation result of the data output by the protocol analysis module 114, and the transmission result is not required to be too high. The entire transmission interpretation result.

In this embodiment, based on the requirements of the first transmission rate and the second transmission rate, the first transmission interface 115 is a memory bus with a transmission rate of about 8000 MB/s (ie, the first transmission rate is 8000 MB/s). And the second transmission interface 116 is a universal sequence bus with a transmission rate of about 200 MB/s (ie, the second transmission rate is 200 MB/s), and is configured to cooperate with the first transmission interface 115 and the second transmission interface. In the present embodiment, the first storage unit 117 is a third-generation triple-synchronous dynamic random access memory (DDR3 SDRAM). The second storage unit 118 is a Hard Disk Drive. Of course, in the actual implementation, the second transmission interface 116 can also be a PCI Express, a wireless transmission interface, or another transmission interface with a lower transmission rate, and the second storage unit 118 can also be a secure digital memory (Secure Digital Memory). Card) or other storage components used at low transfer rates. In addition, the reason for using a hard disk or a secure digital card is that the storage element applied to the low transfer rate not only provides a large storage capacity, but also can record the interpretation result output by the protocol analysis module 114 for a long time, and The cost is also relatively inexpensive, and the cost of the multiplex analysis system 10 at the time of manufacture can be reduced.

The computer includes a processor 120 and a display 130. The display 130 is electrically connected to the processor 120. The processor 120 is electrically connected to the display 130, and is electrically connected to the second storage unit 118 for analyzing whether the interpretation result stored by the second storage unit 118 meets a predetermined condition, and an analysis result is obtained. In this embodiment, if the interpretation result meets the predetermined condition, it means that the analysis result is an interpretation error, and conversely, when the interpretation result does not meet the predetermined condition, that is, the analysis result is correct for interpretation, and the processor 120 According to different analysis results, the following different controls are performed: If the analysis result is correct, as shown in FIG. 2, the processor 120 does not send any signal, and the probe 111 continuously receives the signal to be tested, and the signal to be tested is transmitted to the logic analysis via the increasing unit 112. The module 113 and the protocol analysis module 114 then store the sampling result and the interpretation result in the first storage unit 117 and the second storage unit 118 respectively via the first transmission interface 115 and the second transmission interface 116.

If the analysis result is an interpretation error, it means that some of the packets in the signal to be tested are wrong. The processor 120 sends a signal to the logic analyzer 113, causing the logic analyzer 113 to stop capturing the signal to be tested outputted by the object to be tested, and the sampling result stored by the first storage unit 117 is The first transmission interface 115 and the second transmission interface 116 are transmitted to the second storage unit 118 for the processor 120 of the computer to capture. If the analysis result meets certain conditions, it means that the signal to be tested is the interval that the user wants to analyze. The processor 120 sends a signal to the logic analyzer 113, causing the logic analyzer 113 to stop capturing the signal to be tested outputted by the object to be tested, and the sampling result stored by the first storage unit 117 is The first transmission interface 115 and the second transmission interface 116 are transmitted to the second storage unit 118 for the processor 120 of the computer to capture.

In more detail, as shown in FIG. 3, when the analysis result is incorrect, the sampling result stored by the first storage unit 117 of the logic analyzer 110 is transmitted via the first transmission interface 115 and the second transmission interface 116. Up to the second storage unit 118. The processor 120 converts the sampling result and the interpretation result obtained by sampling and translating the error packet into an image signal, and outputs the image signal to the display 130, so that the display 130 displays the corresponding interpretation result and the An image of the sampled result. In this way, by viewing the display 130, the user can know the part of the signal to be tested that will generate an error packet without re-detecting the entire signal to be tested.

The multiplex analysis system and the multiplex analyzer of the present invention only make Abutting the embedded multimedia card with a single probe, so that the embedded multimedia card is not damaged by the load of more than two probes, and the current-increasing unit in the multiplex analysis system of the present invention will The group to be tested is copied into two sets of identical signals to be tested, and transmitted to the logic analysis module and the protocol analysis module, so that the signal to be tested can be simultaneously sampled by the logic analysis module and interpreted by the protocol analysis module. And speed up the analysis of the test signal.

Further, in addition to the above structure, referring to FIG. 4, the multiplex analysis system further includes an alarm 140. The alarm 140 is electrically connected to the processor 120. When the analysis result is an error, when the sampling result output by the first storage unit 117 is transmitted to the second storage unit 118 for storage, the processor 120 sends a signal to the alarm 140, and the alarm 140 A warning signal is issued according to the signal to inform the user. In actual implementation, the warning signal may be a flash or a ringtone to notify a user located near the multiplex analysis system 10. In addition, the alarm device 140 can also send a warning signal to the user by sending an email, a newsletter or other communication software.

In addition, the alarm device of the present invention is electrically connected to the processor, and the alarm device 240 as shown in FIG. 5 is electrically connected to the first transmission interface 115, and when the first transmission interface 115 is detected. When the sampling result is sent to the second transmission interface 116, a warning signal is simultaneously issued to notify the user to achieve the same warning purpose.

It should be noted that the above description is only a preferred embodiment of the present invention, and is not limited thereto. For example, in other embodiments, the logic analysis module or the protocol analysis module may be changed to Logic/contract analysis module. The Logic/Assembly Analysis Module is a device that switches between logical analysis functions and protocol analysis functions according to the needs of the user.

In addition, the first storage unit and the second storage unit of the present invention may use the same storage element. More specifically, the first storage unit and the second storage unit are respectively the same type of dynamic random access. memory Therefore, the first transmission interface and the second transmission interface are transmission interfaces of the same specification, such that the first transmission rate is equal to the second transmission rate, and the effect of separately transmitting and storing is also achieved.

In addition, in addition to the above design, the first storage unit and the second storage unit of the present invention are different storage blocks of the same storage element. In more detail, the sampling result and the interpretation result are respectively stored in Different locations within the same dynamic random access memory. Therefore, the above two designs do not need to add different types of storage units, and the manufacturing complexity can be effectively reduced.

In addition, in addition to analyzing whether the interpretation is correct or not, the processor may also analyze whether the interpretation result satisfies other predetermined conditions (such as a specific interpretation situation or a specific signal occurs), and when the interpretation result meets the reservation. In the condition, the output signal causes the sampling result stored by the first storage unit to be transmitted to the second storage unit via the first transmission interface and the second transmission interface.

Furthermore, in addition to integrating the second storage unit into the logic analyzer, the hard disk in the computer can be directly used as the second storage unit, and the separate transmission and storage can be achieved, and In addition to the above, the equivalent variations of the specification and the scope of the application of the present invention are intended to be included in the scope of the invention. The logic analyzer stores the hard disk in the computer through the second transmission interface, and the stored data can be re-made or directly stored. At this time, the time of the logic analyzer to the signal is not limited, or is hardened by the computer. The capacity of the disc is limited.

Furthermore, in addition to integrating the second storage unit into the logic analyzer, the network storage device outside the computer can be directly used as the second storage unit, and the above separate transmission and storage can also be achieved. In addition to the above, the equivalent changes of the specification and the scope of the application of the present invention are intended to be included in the scope of the invention. The logic analyzer is stored in the network storage device outside the computer through the second transmission interface, and the storage device is The material can be reworked or stored directly; at this time, the time of the logic analyzer to the signal will be unrestricted or limited by the capacity of the network storage device outside the computer.

Figure 6 is a block diagram of a multiplex analysis system in accordance with a fourth embodiment of the present invention. The multiplex analysis system 30 of the fourth embodiment can be viewed as using the multiplex analyzers of the two first embodiment.

The multiplex analysis system 30 includes a first probe 311, a second probe 312, a first flow enhancement unit 321, a second flow enhancement unit 322, and first to fourth logic/protocol analysis modules 331. 334, first to fourth transmission interfaces 341 to 344, first to fourth storage units 351 to 354, a processor 360, and a display 370.

The first probe 311 is configured to electrically connect the signal contact of the embedded multimedia card to receive the signal to be tested on the embedded multimedia card. The second probe 312 is used to electrically connect a NAND flash.

The first increasing current unit 321 and the second increasing current unit 322 have an input end and two output ends. The input end of the first current-increasing unit 321 is electrically connected to the first probe 311, and the two output ends thereof are respectively connected to the first and second logic/protocol analysis modules 311, 312. The input end of the second current increasing unit 322 is electrically connected to the second probe 312, and the two output ends are respectively connected to the third and fourth logic/protocol analysis modules 333, 334.

The first to fourth transmission interfaces 341-344 are electrically connected to the first to fourth logic/protocol analysis modules 331-334, respectively, wherein the second transmission interface 342 is further connected to the first transmission interface 341 and the third transmission interface 343. The fourth transmission interface 344 is electrically connected. The first to fourth storage units 351-354 are electrically connected to the first to fourth transmission interfaces 341-344, respectively. In addition, the transmission speeds of the first to fourth transmission interfaces 341-344 are respectively a first transmission speed, a second transmission speed, a third transmission speed, and a fourth transmission speed, and the second transmission speed is not greater than the first transmission speed, The third transmission speed and the fourth transmission speed.

In this embodiment, the first to fourth storage units 351-354 correspond to the first to fourth logical/protocol analysis modules 341-344, and thus the contents stored in the first to fourth storage units 351-354 are stored. It may be the sampling result or the interpretation result, but for convenience of explanation, the sampling result and the interpretation result are collectively referred to as the analysis result, and the results output by the first to fourth logical/contract analysis modules 331 to 334 are respectively named as The first analysis result, the second analysis result, the third analysis result, and the fourth analysis result.

. Here, the first and third logic/agreement analysis modules 331, 333 are set to use the state of the logic analysis function; the second and fourth logic/agreement analysis modules 332, 334 are in the state of using the protocol analysis function, and thus the first The content stored in the third storage unit 351, 353 is the sampling result; the content stored in the second and fourth storage units 352, 354 is the interpretation result.

In this embodiment, the first and third transmission interfaces 341 and 343 are memory bus bars with a transmission rate of about 8000 MB/s, so the first and third storage units 351 and 353 are third-generation double data rates. Synchronous dynamic random access memory.

The second fourth transmission interface 342, 344 is a general-purpose serial bus with a transmission rate of about 200 MB/s, and the second storage unit 352 is a hard disk, and the fourth storage unit 354 is a static random access memory (Static Random- Access Memory, SRAM). Of course, in actual implementation, the second and fourth transmission interfaces 342 and 344 may also be PCI Express, a wireless transmission interface, or other transmission interface with a lower transmission rate, and the second and fourth storage units 352 and 354. It can also be a Secure Digital Memory Card or other storage component for low transfer rates.

The processor 360 is electrically connected to the second storage unit 352. The display 370 is electrically connected to the processor 360. The processor 360 is configured to analyze whether the interpretation result stored by the second storage unit 352 meets a predetermined condition, and obtain an analysis result. In this embodiment, if the interpretation result is consistent The predetermined condition indicates that the analysis result is an interpretation error. Conversely, when the interpretation result does not meet the predetermined condition, the analysis result indicates that the analysis result is correct, and the processor 360 performs control according to different analysis results. The content as described in the first embodiment will not be described again.

The fourth embodiment is different from the first embodiment in that the fourth embodiment has four storage units. Therefore, the display 370 is to display the sampling result of the first storage unit 351, the sampling result of the third storage unit 353, and the fourth. When the result of the storage unit 354 is interpreted, the sampling result of the first storage unit 351 is transmitted to the second storage unit 352 via the first transmission interface 341 and the second transmission interface 342. The sampling result of the third storage unit 353 is transmitted to the second storage unit 352 via the third transmission interface 343 and the second transmission interface 342. The interpretation result of the fourth storage unit 354 is transmitted to the second storage unit 352 via the fourth transmission interface 344 and the second transmission interface 342.

The processor 360 converts the sampling result and the interpretation result into an image signal, and outputs the image signal to the display 370, so that the display 370 displays the interpretation result and the image of the sampling result.

In this embodiment, four logic/consistency modules are integrated into the multiplex analysis system, and the first probe and the second probe are used to simultaneously detect the embedded multimedia card and the flash memory to achieve synchronization and multi-function. The function, and avoiding the disadvantages of multiple instruments when multiple objects to be tested are simultaneously detected in the prior art.

10‧‧‧Multiplex analysis system

110‧‧‧Multiplex analyzer

111‧‧‧ Probe

112‧‧‧Adding unit

113‧‧‧Logic Analysis Module

114‧‧‧Agreement Analysis Module

115‧‧‧First transmission interface

116‧‧‧Second transmission interface

117‧‧‧First storage unit

118‧‧‧Second storage unit

120‧‧‧ processor

130‧‧‧ display

Claims (16)

A multiplex analyzer for detecting a signal to be tested sent by a test object, the multiplex analyzer comprising: a probe for electrically connecting the object to be tested to receive the object to be tested The signal to be tested is a logic analysis module electrically connected to the probe for receiving the signal to be tested and sampling the signal to be tested, and outputting the sampling result; a protocol analysis module and electrical connection The probe is configured to receive the signal to be tested, and interpret the signal to be tested according to the communication protocol of the object to be tested, and output the interpretation result; a first storage unit and a first transmission interface, the first The storage unit is electrically connected to the first transmission interface, and the first transmission interface is electrically connected to the logic analysis module for receiving the sampling result output by the logic analysis module and outputting to the first at a first transmission rate The storage unit is stored; a second storage unit and a second transmission interface, the second storage unit is electrically connected to the second transmission interface, and the second transmission interface is electrically connected to the protocol analysis module for receiving the agreement Analysis module output And outputting a result of translation of a second transmission rate to the second storage unit stores, and the second transmission rate is not greater than the first transmission rate. The multiplexer of claim 1, further comprising a current increasing unit, wherein the current increasing unit has an input end and two output ends, and the input end is electrically connected to the probe, and the two output ends are Electrically connecting to the logic analysis module and the protocol analysis module, respectively, the logic analysis module and the protocol analysis module are electrically connected to the probe through the flow increasing unit; The to-be-tested signal is received from the input end, and the signal to be tested is simultaneously output from the two output ends to the logic analysis module and the protocol analysis module. The multiplex analyzer of claim 1, wherein the first storage unit and the second storage unit are the same type of dynamic random access memory, and the first transmission rate is equal to the second transmission rate. The multiplex analyzer of claim 3, wherein the DRAM is a third generation double data rate synchronous dynamic random access memory. The multiplex analyzer of claim 1, wherein the first storage unit is a dynamic random access memory; the second transmission interface is a universal serial bus, a PCI Express or a wireless transmission interface, and the second storage unit is Hard drive or secure digital card. The multiplex analyzer of claim 1, wherein the first transmission rate is greater than 8000 MB/s and the second transmission rate is greater than 200 MB/s. A multiplex analysis system includes: a probe for electrically connecting a sample to be tested to receive a signal to be tested issued by the object to be tested; and a logic analysis module electrically connecting the probe for Receiving the signal to be tested and sampling the signal to be tested, and outputting the sampling result; a protocol analysis module electrically connecting the probe to receive the signal to be tested, and according to the communication protocol of the object to be tested Interpreting the signal to be tested and outputting the interpretation result; a first storage unit and a first transmission interface, the first storage unit is electrically connected to the first transmission interface, and the first transmission interface is electrically connected The logic analysis module is configured to receive the sampling result output by the logic analysis module and output to the first storage unit for storage at a first transmission rate; a second storage unit and a second transmission interface, the second storage The unit is electrically connected to the second transmission interface, and the second transmission interface is electrically connected to the protocol analysis module and the first transmission interface, and is configured to receive the interpretation result of the protocol analysis module output and transmit the second transmission The rate is output to the second storage unit for storage, and the second transmission rate is not greater than the first transmission rate; and a processor is electrically connected to the second storage unit for analyzing the solution stored by the second storage unit Whether the result of the translation meets a predetermined condition, and when the interpretation result meets the predetermined condition, the sampling result stored by the first storage unit is transmitted to the second storage unit via the first transmission interface and the second transmission interface. . The multiplex analysis system of claim 7, further comprising a display electrically connected to the processor; wherein the processor converts the interpretation result and the sampling result stored by the second storage unit into an image signal, and The image signal is output to the display, so that the display displays an image corresponding to the interpretation result and the sampling result. The multiplex analysis system of claim 7, further comprising an alarm, electrically connected to the processor, wherein the sampling result output by the first storage unit is transmitted to the first transmission interface and the second transmission interface When the second storage unit is in the middle, the processor sends a signal to the alarm, and the alarm sends a warning signal according to the signal to notify a user. The multiplex analysis system of claim 7, further comprising an alarm electrically connected to the first transmission interface, wherein the sampling result output by the first storage unit is transmitted via the first transmission interface and the second transmission interface When the second storage unit is in the second storage unit, the first transmission interface sends a signal to the alarm, and the alarm sends a warning signal according to the signal to notify a user. The multiplex analysis system of claim 7, further comprising a flow-increasing unit, wherein the current-increasing unit has an input end and two output ends, and the input end is electrically connected to the probe, and the two output ends are Electrically connecting to the logic analysis module and the protocol analysis module, respectively, the logic analysis module and the protocol analysis module are electrically connected to the probe through the flow increasing unit; the current increasing unit is used for the input The terminal receives the to-be-tested signal, and outputs the signal to be tested simultaneously from the two output terminals to the logic analysis module and the protocol analysis module. The multiplex analysis system of claim 7, wherein the first storage unit and the second storage unit are the same type of dynamic random access memory. The multiplex analysis system of claim 12, wherein the DRAM is a third generation double data rate synchronous dynamic random access memory. The multiplex analysis system of claim 7, wherein the first storage unit is a dynamic random access memory; the second transmission interface is a universal serial bus, a PCI Express or a wireless transmission interface, and the second storage unit is Hard drive or secure digital card. The multiplex analysis system of claim 7, wherein the data storage rate of the first storage unit is greater than 8000 MB/s, and the data transmission rate of the second storage unit is greater than 200 MB/s. A multiplex analysis system comprising: a first probe for electrically connecting a first object to be tested to receive a first signal to be tested issued by the first object to be tested; and a second probe for electrically connecting a second object to be tested Receiving a second signal to be tested sent by the first object to be tested; a first logic/agreement analysis module electrically connecting the first probe to receive the first signal to be tested and The first signal to be tested is analyzed, and a first analysis result is output; a second logic/agreement analysis module is electrically connected to the first probe for receiving the first signal to be tested and the A signal to be tested is analyzed, and a second analysis result is output; a third logic/agreement analysis module is electrically connected to the second probe for receiving the second signal to be tested and the second to be tested The test signal is analyzed, and a third analysis result is output; a fourth logic/agreement analysis module is electrically connected to the second probe for receiving the second signal to be tested and the second signal to be tested Performing analysis and outputting a fourth analysis result; a first storage unit and a first transmission interface, The first storage unit is electrically connected to the first transmission interface, and the first transmission interface is electrically connected to the logic analysis module, and configured to receive the first analysis result output by the first logic/agreement analysis module The second transmission unit is electrically connected to the second transmission interface, and the second transmission interface is electrically connected to the logic analysis. The second storage unit is electrically connected to the second transmission interface, and the second transmission interface is electrically connected to the logic analysis. a module for receiving the second logic/agreement analysis module output The second analysis result is output to the second storage unit for storage at a second transmission rate; a third storage unit and a third transmission interface, the third storage unit is electrically connected to the third transmission interface, and the third storage unit The third transmission interface is electrically connected to the logic analysis module for receiving the third analysis result output by the third logic/agreement analysis module and outputting to the third storage unit for storage at a third transmission rate; and a fourth a storage unit and a fourth transmission interface, the fourth storage unit is electrically connected to the fourth transmission interface, and the fourth transmission interface is electrically connected to the logic analysis module for receiving the fourth logic/agreement analysis module And outputting the fourth analysis result to the first storage unit for storage at a fourth transmission rate; wherein the second transmission rate is not greater than the first transmission rate, the first transmission rate, and the third transmission rate