CN215526036U - Test circuit and test equipment - Google Patents

Test circuit and test equipment Download PDF

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Publication number
CN215526036U
CN215526036U CN202121113133.1U CN202121113133U CN215526036U CN 215526036 U CN215526036 U CN 215526036U CN 202121113133 U CN202121113133 U CN 202121113133U CN 215526036 U CN215526036 U CN 215526036U
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China
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signal
conversion circuit
signal conversion
waveform
circuit
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CN202121113133.1U
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石培杰
陈良
郭宪超
姚健
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Huafeng Test & Control Technology Tianjin Co ltd
Beijing Huafeng Test & Control Technology Co ltd
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Huafeng Test & Control Technology Tianjin Co ltd
Beijing Huafeng Test & Control Technology Co ltd
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Abstract

The application relates to a test circuit, which comprises a control device, a first signal conversion circuit, a transmission line, a second signal conversion circuit and a waveform driving device. The control device is used for receiving waveform data. The first signal conversion circuit is connected with the control device. The first signal conversion circuit is used for converting a single-ended signal carrying waveform data into a differential signal. The first end of the transmission line is connected to the first signal conversion circuit. The second signal conversion circuit is connected to a second end of the transmission line. The second signal conversion circuit is used for converting the differential signal into a single-ended driving signal. The waveform driving device is connected with the second signal conversion circuit. The waveform driving device is used for outputting an excitation signal according to the single-ended driving signal. When a signal is transmitted in the form of a differential signal between the first signal conversion circuit and the second signal conversion circuit, signal loss is reduced.

Description

Test circuit and test equipment
Technical Field
The present application relates to the field of testing, and in particular, to a test circuit and test equipment.
Background
With the development of semiconductor technology, the digitization of analog ICs is a trend, which means that the integration of ICs is higher and higher, and the requirements for test equipment are more and more strict. Testing of digital ICs relies primarily on the excitation of digital waveforms. However, the failure rate of the existing testing method is high, which affects the working efficiency.
SUMMERY OF THE UTILITY MODEL
In view of the above, it is necessary to provide a test circuit and a test apparatus for addressing the above problems.
A test circuit, comprising:
control means for receiving waveform data;
the first signal conversion circuit is connected with the control device and is used for converting a single-ended signal carrying waveform data into a differential signal;
a transmission line, a first end of which is connected to the first signal conversion circuit;
a second signal conversion circuit connected to a second end of the transmission line, the second signal conversion circuit configured to convert the differential signal into a single-ended driving signal; and
and the waveform driving device is connected with the second signal conversion circuit and is used for outputting an excitation signal according to the single-ended driving signal.
In one embodiment, further comprising:
and one end of the static discharge circuit is connected with the first signal conversion circuit, and the other end of the static discharge circuit is connected with the second signal conversion circuit.
In one embodiment, the waveform driving device further comprises a waveform generation detection device, wherein the waveform generation detection device is connected with the control device and is used for monitoring the connection state of the control device and the waveform driving device.
In one embodiment, the apparatus further comprises a storage device connected to the control device, the storage device being configured to store the waveform data.
In one embodiment, the storage device comprises a RAM memory chip.
In one embodiment, the control device further comprises a communication bus, and the communication bus is connected with the control device.
In one embodiment, the transmission line is a differential cable.
A test circuit, comprising:
a storage device for storing waveform data;
the control device is connected with the storage device and used for receiving the waveform data;
the first signal conversion circuit is connected with the control device and is used for converting a single-ended signal carrying waveform data into a differential signal;
a transmission line, a first end of which is connected to the first signal conversion circuit;
a second signal conversion circuit connected to a second end of the transmission line, the second signal conversion circuit configured to convert the differential signal into a single-ended driving signal; and
the waveform driving device is connected with the second signal conversion circuit and is used for outputting an excitation signal according to the single-ended driving signal; and
and the waveform generation detection device is connected with the control device and is used for detecting the connection state between the detection device and the waveform driving device.
A test circuit, comprising:
the waveform driving device comprises a control device, a conversion circuit and a waveform driving device which are connected in sequence, wherein the conversion circuit is used for converting a single-ended signal output by the control device into a differential signal, converting the differential signal into a single-ended signal after transmission and sending the single-ended signal to the waveform driving device.
A test device comprises the test circuit.
The test circuit provided by the embodiment of the application comprises a control device, a first signal conversion circuit, a transmission line, a second signal conversion circuit and a waveform driving device. The control device is used for receiving waveform data. The first signal conversion circuit is connected with the control device. The first signal conversion circuit is used for converting a single-ended signal carrying waveform data into a differential signal. The first end of the transmission line is connected to the first signal conversion circuit. The second signal conversion circuit is connected to a second end of the transmission line. The second signal conversion circuit is used for converting the differential signal into a single-ended driving signal. The waveform driving device is connected with the second signal conversion circuit. The waveform driving device is used for outputting an excitation signal according to the single-ended driving signal.
When the signal is transmitted between the first signal conversion circuit and the second signal conversion circuit in the form of differential signals, the interference degree of the signal is minimum. The first signal conversion circuit and the second signal conversion circuit are connected through a transmission line, and the waveform driving device can be positioned closer to the tested device. The distance between the second signal conversion circuit and the device under test is reduced. The single-ended driving signal converted by the second signal conversion circuit can be directly sent to the tested device, so that the distance between the signal and the tested device is further shortened, and the signal loss is reduced.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of a test circuit provided in an embodiment of the present application;
FIG. 2 is a schematic diagram of a test circuit according to another embodiment of the present application;
FIG. 3 is a schematic diagram of a waveform driving apparatus according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a first signal conversion circuit according to an embodiment of the present application;
fig. 5 is a schematic diagram of a second signal conversion circuit according to an embodiment of the present application.
Description of the reference numerals
The test circuit 10, the control device 100, the first signal conversion circuit 110, the second signal conversion circuit 120, the electrostatic discharge circuit 130, the waveform generation detection device 140, the storage device 150, the communication bus 160, and the waveform driving device 170.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, embodiments accompanying the present application are described in detail below with reference to the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. This application is capable of embodiments in many different forms than those described herein and those skilled in the art will be able to make similar modifications without departing from the spirit of the application and it is therefore not intended to be limited to the embodiments disclosed below.
The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings). In the description of the present application, it is to be understood that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present application and for simplicity in description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, are not to be considered as limiting the present application.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through intervening media. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
In the present digital IC test equipment, a digital waveform excitation signal is often output to an IC terminal to be tested through a cable. The quality of the excitation signal is therefore dependent primarily on the internal resistance of the cable and the interference rejection of the cable. In an actual test, when an excitation signal is transmitted in a cable, signal attenuation is inevitably caused, and the test failure rate of a tested chip is reduced.
Referring to fig. 1, an embodiment of the present application provides a test circuit 10. The test circuit 10 includes a control device 100, a first signal conversion circuit 110, a transmission line, a second signal conversion circuit 120, and a waveform driving device 170. The control device 100 is configured to receive waveform data. The first signal conversion circuit 110 is connected to the control device 100. The first signal conversion circuit 110 is used to convert a single-ended signal carrying waveform data into a differential signal. A first end of the transmission line is connected to the first signal conversion circuit 110. The second signal conversion circuit 120 is connected to a second end of the transmission line. The second signal conversion circuit 120 is configured to convert the differential signal into a single-ended driving signal. The waveform driving device 170 is connected to the second signal conversion circuit 120. The waveform driving device 170 is configured to output a stimulus signal according to the single-ended driving signal.
The waveform data received by the control device 100 can output excitation signals of different waveforms through the test circuit 10. The circuit types of the first signal conversion circuit 110 and the second signal conversion circuit 120 may be the same.
The first signal conversion circuit 110 converts a single-ended signal carrying waveform data into a differential signal. The interference noise is generally equally and simultaneously applied to two signal lines of the transmission line, and the difference is 0. That is, noise does not affect the logical significance of the signal. The second signal conversion circuit 120 converts the differential signal into a single-ended driving signal. The first signal conversion circuit 110 and the second signal conversion circuit 120 may be connected to each other via a transmission line. The transmission line may be a transmission cable. The signal carrying the waveform data is transmitted in the transmission line in the form of a differential signal. Therefore, the anti-interference capability of the signal can be enhanced, and the interference of the signal can be reduced.
In one embodiment, the transmission line may be a differential cable. The differential cable has the advantages of high transmission efficiency and small time delay and time delay difference, so that the precision of signal transmission can be further ensured.
The first signal conversion circuit 110 and the second signal conversion circuit 120 are connected by the differential cable. The positions of the second signal conversion circuit 120 and the waveform driving device 170 can be adjusted as needed. The second signal conversion circuit 120 and the waveform driving device 170 may be located closer to the device under test. Therefore, the distance between the waveform driving apparatus 170 and the device under test can be adjusted to be small, and the single-ended driving signal converted by the second signal conversion circuit 120 can be directly transmitted to the device under test through the small distance, thereby further reducing the distance between the signal and the device under test and reducing the signal loss.
Referring to fig. 2, in one embodiment, the test circuit 10 further includes an electrostatic discharge circuit 130. One end of the electrostatic discharge circuit 130 is connected to the first signal conversion circuit 110. The other end of the electrostatic discharge circuit 130 is connected to the second signal conversion circuit 120. The electrostatic discharge circuit 130 may be connected to one end of the transmission line near the first signal conversion circuit 110. The static electricity discharge circuit 130 may be used to discharge static electricity in the test circuit 10. The electrostatic discharge circuit 130 can ensure the accuracy of the signal transmission process.
In one embodiment, the test circuit 10 further comprises a waveform generation detection device 140. The waveform generation detection device 140 is connected to the control device 100. The waveform generation detecting device 140 is used to monitor the connection state of the control device 100 and the waveform driving device 170. The control device 100 and the waveform driving device 170 may be interfaced via a standard cable connector. When the control device 100 and the waveform driving device 170 are connected, the waveform generation detecting device 140 may determine whether the connection between the control device 100 and the waveform driving device 170 is normal. When the connection between the control device 100 and the waveform driving device 170 is normal, the waveform generation detecting device 140 may send a signal that the connection is normal. When the connection between the control device 100 and the waveform driving device 170 is abnormal, the waveform generation detecting device 140 may signal the connection abnormality. The waveform occurrence detection means 140 can ensure the integrity of the signal transmission link.
In one embodiment, the test circuit 10 further comprises a storage device 150. The storage device 150 is connected to the control device 100. The storage device 150 is used for storing the waveform data. The control device 100 may be used to read the waveform data. And converts the waveform data to a single-ended signal. The single-ended signal is converted into a differential signal by the first signal conversion circuit 110.
In one embodiment, the storage device 150 comprises a RAM memory chip. The RAM memory chip serves as a temporary data storage medium for the operating system or other programs in operation. The RAM memory chip has the advantages of random read-write, high speed and the like.
In one embodiment, the test circuit 10 further comprises a communication bus 160. The communication bus is connected to the control device 100. The waveform data or corresponding control instructions may be sent to the control device 100 via the communication bus 160. The control device 100 may store the waveform data in the storage device 150. The control device 100 can also retrieve the waveform data in the storage device 150 at any time when needed. In one embodiment, the system bus may be a PCI bus.
A feedback signal generated by the device under test excited by the excitation signal may be transmitted to the control apparatus 100 through the second signal conversion circuit 120, the transmission line, and the first signal conversion circuit 110. The control device 100 may upload data to an upper computer through a communication bus to detect the performance of the device under test.
In one embodiment, the control device 100 may comprise a programmable gate array (FPGA).
Referring to fig. 3, in one embodiment, the waveform driving device 170 may include a waveform driving IC. The waveform driving device 170 can have two functions of outputting digital waveforms and detecting input waveforms. SDO, SCK, STB in the figure are serial communication buses 160 of the waveform driving IC. The serial communication bus 160 mainly implements read and write operations of on-chip registers. When the waveform driving IC is in the waveform output mode, the output enable signal EN is set to 1. The FPGA outputs waveform Data content to a Data end, and the DOUT outputs a waveform to the tested device. When the unit is in the input mode, the FPGA sets the threshold value of the comparison level through the serial bus, the output enable signal EN is set to be 0, and the waveform signal introduced from the tested device passes through DIN to the waveform driving IC. And comparing the input signal with a set threshold value, and outputting the result to the FPGA through the CMPA and the CMPB.
Fig. 4 is a schematic diagram of the first signal conversion circuit 110. The first signal conversion circuit 110 includes a signal conversion IC. One end of the signal conversion IC is used for inputting a single-ended signal. And the other end of the signal conversion IC is used for outputting a differential signal.
Fig. 5 is a schematic diagram of the second signal conversion circuit 120. The second signal conversion circuit 120 also includes a signal conversion IC. One end of the second signal conversion circuit 120 is used for inputting a differential signal. The other end of the second signal conversion circuit 120 is used for outputting a single-ended signal.
When the FPGA writes data to the waveform driving IC, the signal carrying the waveform data is converted into a differential signal by a single-ended signal. When the FPGA reads the data of the driving IC, the differential signal is converted into a single-ended signal.
The embodiment of the application also provides a test circuit. The test circuit comprises a storage device, a control device, a first signal conversion circuit, a transmission line, a second signal conversion circuit, a waveform driving device and a waveform generation detection device. The storage device is used for storing waveform data. The control device is connected with the storage device. The control device is used for receiving the waveform data. The first signal conversion circuit is connected with the control device. The first signal conversion circuit is used for converting a single-ended signal carrying waveform data into a differential signal. The first end of the transmission line is connected to the first signal conversion circuit. The second signal conversion circuit is connected to a second end of the transmission line. The second signal conversion circuit is used for converting the differential signal into a single-ended driving signal. The waveform driving device is connected with the second signal conversion circuit. The waveform driving device is used for outputting an excitation signal according to the single-ended driving signal. The waveform detection device is connected with the control device. The waveform generation detection means is for detecting a connection state between the detection means and the waveform drive means.
The embodiment of the application also provides a test circuit. The test circuit comprises a control device, a conversion circuit and a waveform driving device which are connected in sequence. The conversion circuit is used for converting the single-ended signal output by the control device into a differential signal, converting the differential signal into a single-ended signal after transmission, and sending the single-ended signal to the waveform driving device.
It is understood that the conversion circuit may include the first signal conversion circuit 110 and the second signal conversion circuit. The first signal conversion circuit 110 converts a single-ended signal carrying waveform data into a differential signal. The interference noise is generally equally and simultaneously applied to two signal lines of the transmission line, and the difference is 0. That is, noise does not affect the logical significance of the signal. The second signal conversion circuit 120 converts the differential signal into a single-ended driving signal. The first signal conversion circuit 110 and the second signal conversion circuit 120 may be connected to each other via a transmission line. The transmission line may be a transmission cable. The signal carrying the waveform data is transmitted in the transmission line in the form of a differential signal. Therefore, the anti-interference capability of the signal can be enhanced, and the attenuation of the signal can be reduced.
The embodiment of the application also provides a test device. The test equipment comprises the test circuit 10. The test device may include a housing, and a circuit board disposed within the housing. The circuit board may carry the test circuitry. The test equipment may include a first module and a second module. The first module may be used to carry the control device 100, the first signal conversion circuit 110 and the electrostatic discharge circuit 130. The second module may be used to carry the waveform driving apparatus 170 and the second signal conversion circuit 120. The second module and the first module may be connected by a transmission line. Therefore, the positions of the first module and the second module can be more flexibly arranged. The position of the second module may be adjusted according to the position of the device under test.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present application. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. A test circuit, comprising:
control means for receiving waveform data;
the first signal conversion circuit is connected with the control device and is used for converting a single-ended signal carrying waveform data into a differential signal;
a transmission line, a first end of which is connected to the first signal conversion circuit;
a second signal conversion circuit connected to a second end of the transmission line, the second signal conversion circuit configured to convert the differential signal into a single-ended driving signal; and
and the waveform driving device is connected with the second signal conversion circuit and is used for outputting an excitation signal according to the single-ended driving signal.
2. The test circuit of claim 1, further comprising:
and one end of the static discharge circuit is connected with the first signal conversion circuit, and the other end of the static discharge circuit is connected with the second signal conversion circuit.
3. The test circuit of claim 1, further comprising waveform generation detection means connected to the control means, the waveform generation detection means for monitoring a connection state of the control means and the waveform driving means.
4. The test circuit of claim 1, further comprising a storage device coupled to the control device, the storage device configured to store the waveform data.
5. The test circuit of claim 4, wherein the storage device comprises a RAM memory chip.
6. The test circuit of claim 1, further comprising a communication bus, the communication bus coupled to the control device.
7. The test circuit of claim 1, wherein the transmission line is a differential cable.
8. A test circuit, comprising:
a storage device for storing waveform data;
the control device is connected with the storage device and used for receiving the waveform data;
the first signal conversion circuit is connected with the control device and is used for converting a single-ended signal carrying waveform data into a differential signal;
a transmission line, a first end of which is connected to the first signal conversion circuit;
a second signal conversion circuit connected to a second end of the transmission line, the second signal conversion circuit configured to convert the differential signal into a single-ended driving signal; and
the waveform driving device is connected with the second signal conversion circuit and is used for outputting an excitation signal according to the single-ended driving signal; and
and the waveform generation detection device is connected with the control device and is used for detecting the connection state between the detection device and the waveform driving device.
9. A test circuit, comprising:
the waveform driving device comprises a control device, a conversion circuit and a waveform driving device which are connected in sequence, wherein the conversion circuit is used for converting a single-ended signal output by the control device into a differential signal, converting the differential signal into a single-ended signal after transmission and sending the single-ended signal to the waveform driving device.
10. A test apparatus comprising a test circuit according to any one of claims 1 to 9.
CN202121113133.1U 2021-05-21 2021-05-21 Test circuit and test equipment Active CN215526036U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202121113133.1U CN215526036U (en) 2021-05-21 2021-05-21 Test circuit and test equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202121113133.1U CN215526036U (en) 2021-05-21 2021-05-21 Test circuit and test equipment

Publications (1)

Publication Number Publication Date
CN215526036U true CN215526036U (en) 2022-01-14

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202121113133.1U Active CN215526036U (en) 2021-05-21 2021-05-21 Test circuit and test equipment

Country Status (1)

Country Link
CN (1) CN215526036U (en)

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