TW201643639A - Display device - Google Patents
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- TW201643639A TW201643639A TW104133349A TW104133349A TW201643639A TW 201643639 A TW201643639 A TW 201643639A TW 104133349 A TW104133349 A TW 104133349A TW 104133349 A TW104133349 A TW 104133349A TW 201643639 A TW201643639 A TW 201643639A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0412—Digitisers structurally integrated in a display
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
- G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
- G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
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- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Mathematical Physics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
Abstract
Description
本揭露係有關於顯示裝置,且特別係有關於一種可接受觸控信號之顯示裝置。 The disclosure relates to display devices, and in particular to a display device that can accept touch signals.
隨著科技不斷的進步,使得各種資訊設備不斷地推陳出新,例如手機、平板電腦、超輕薄筆電、及衛星導航等。除了一般以鍵盤或滑鼠輸入或操控之外,利用觸控式技術來操控資訊設備是一種相當直覺且受歡迎的操控方式。其中,觸控顯示裝置具有人性化及直覺化的輸入操作介面,使得任何年齡層的使用者都可直接以手指或觸控筆選取或操控資訊設備。 With the continuous advancement of technology, various information devices are constantly being introduced, such as mobile phones, tablet computers, ultra-thin notebooks, and satellite navigation. In addition to keyboard or mouse input or manipulation, the use of touch technology to manipulate information devices is a fairly intuitive and popular way to manipulate. Among them, the touch display device has a user-friendly and intuitive input operation interface, so that users of any age can directly select or manipulate the information device with a finger or a stylus.
其中一種觸控顯示裝置是於顯示面板(例如液晶顯示面板)內設置感測電極之內嵌式觸控(in cell touch)顯示裝置。然而,目前的內嵌式觸控顯示裝置並非各方面皆令人滿意,舉例而言,在一般觸控顯示裝置中,觸控訊號線係設置於資料線上,可能會因為設計不良或製程變異,使觸控訊號線與薄膜電晶體的通道區間重疊而產生漏電情形,造成觸控功能不靈敏或產品顯示有問題。 One of the touch display devices is an in-cell touch display device in which a sensing electrode is disposed in a display panel (for example, a liquid crystal display panel). However, the current in-cell touch display device is not satisfactory in all aspects. For example, in a general touch display device, the touch signal line is disposed on the data line, which may be due to poor design or process variation. The touch signal line overlaps the channel section of the thin film transistor to generate a leakage condition, which causes the touch function to be insensitive or the product display to be problematic.
因此,業界仍須一種可更進一步提升製程良率之顯示裝置。 Therefore, the industry still needs a display device that can further improve the process yield.
本揭露提供一種顯示裝置,包括:第一基板,包括:掃描線,沿第一方向延伸;薄膜電晶體,包括源極電極,汲極電極,以及設於源極電極與汲極電極之間的通道區;資料線,與掃描線交錯並沿第二方向延伸,且源極電極或汲極電極為資料線之一部分,且掃描線與資料線藉由薄膜電晶體電性連接;及觸控訊號線,設於資料線上方,且位於通道區所對應之區域之外,且不與通道區重疊;第二基板;以及顯示介質,設於第一基板與第二基板之間。 The present disclosure provides a display device including: a first substrate including: a scan line extending in a first direction; a thin film transistor including a source electrode, a drain electrode, and a source electrode and a drain electrode a channel region; a data line interleaved with the scan line and extending in the second direction, and the source electrode or the drain electrode is a part of the data line, and the scan line and the data line are electrically connected by the thin film transistor; and the touch signal The line is disposed above the data line and outside the area corresponding to the channel area, and does not overlap with the channel area; the second substrate; and the display medium are disposed between the first substrate and the second substrate.
本揭露另提供一種顯示裝置,包括:第一基板,包括:掃描線,沿第一方向延伸;薄膜電晶體,包括源極電極,汲極電極,以及設於源極電極與汲極電極之間的通道區;資料線,與掃描線交錯並沿第二方向延伸,且源極電極為資料線之一部分,且掃描線與資料線藉由薄膜電晶體電性連接;觸控訊號線,設置於資料線上方並沿第二方向延伸,觸控訊號線包含主幹部與複數個彎折部,部分這些彎折部是位於資料線的遠離薄膜電晶體的一側,部分這些彎折部是位於資料線的靠近薄膜電晶體的一側;第二基板;以及顯示介質,設於第一基板與第二基板之間。 The disclosure further provides a display device comprising: a first substrate comprising: a scan line extending in a first direction; a thin film transistor comprising a source electrode, a drain electrode, and a source electrode and a drain electrode a channel region; the data line is interleaved with the scan line and extends in the second direction, and the source electrode is a part of the data line, and the scan line and the data line are electrically connected by the thin film transistor; the touch signal line is set at Above the data line and extending in the second direction, the touch signal line includes a trunk portion and a plurality of bent portions, and some of the bent portions are located on a side of the data line away from the thin film transistor, and some of the bent portions are located at the data a side of the line adjacent to the thin film transistor; a second substrate; and a display medium disposed between the first substrate and the second substrate.
為讓本揭露之特徵、和優點能更明顯易懂,下文特舉出較佳實施例,並配合所附圖式,作詳細說明如下。 In order to make the features and advantages of the present disclosure more comprehensible, the preferred embodiments are described below, and are described in detail below with reference to the accompanying drawings.
100‧‧‧顯示裝置 100‧‧‧ display device
102‧‧‧第一基板 102‧‧‧First substrate
104‧‧‧掃描線 104‧‧‧ scan line
106‧‧‧資料線 106‧‧‧Information line
108‧‧‧次畫素 108‧‧‧ pixels
110‧‧‧薄膜電晶體 110‧‧‧film transistor
112‧‧‧源極電極 112‧‧‧Source electrode
114‧‧‧汲極電極 114‧‧‧汲electrode
114S‧‧‧表面 114S‧‧‧ surface
116‧‧‧通道區 116‧‧‧Channel area
118‧‧‧閘極電極 118‧‧‧gate electrode
120‧‧‧觸控訊號線 120‧‧‧Touch signal line
120S‧‧‧上表面 120S‧‧‧ upper surface
122‧‧‧基材 122‧‧‧Substrate
124‧‧‧閘極介電層 124‧‧‧ gate dielectric layer
126‧‧‧半導體層 126‧‧‧Semiconductor layer
126R‧‧‧凹口 126R‧‧‧ notch
128‧‧‧第一絕緣層 128‧‧‧First insulation
128S‧‧‧上表面 128S‧‧‧ upper surface
130‧‧‧開口 130‧‧‧ openings
132‧‧‧襯層 132‧‧‧ lining
132S‧‧‧表面 132S‧‧‧ surface
134‧‧‧第二絕緣層 134‧‧‧Second insulation
136‧‧‧平坦層 136‧‧‧flat layer
136S‧‧‧上表面 136S‧‧‧ upper surface
138‧‧‧開口 138‧‧‧ openings
140‧‧‧開口 140‧‧‧ openings
142‧‧‧感測電極 142‧‧‧Sensor electrode
144‧‧‧第三絕緣層 144‧‧‧ third insulation layer
146‧‧‧開口 146‧‧‧ openings
148‧‧‧畫素電極 148‧‧‧ pixel electrodes
150‧‧‧第二基板 150‧‧‧second substrate
152‧‧‧顯示介質 152‧‧‧Display media
154‧‧‧基材 154‧‧‧Substrate
156‧‧‧遮光層 156‧‧‧Lighting layer
158‧‧‧彩色濾光層 158‧‧‧Color filter layer
160‧‧‧平坦層 160‧‧‧flat layer
162‧‧‧間隔物 162‧‧‧ spacers
164‧‧‧延伸區 164‧‧‧Extension
166‧‧‧重疊區 166‧‧‧ overlap zone
200‧‧‧顯示裝置 200‧‧‧ display device
300‧‧‧顯示裝置 300‧‧‧ display device
400‧‧‧顯示裝置 400‧‧‧ display device
402‧‧‧第一基板 402‧‧‧First substrate
410‧‧‧薄膜電晶體 410‧‧‧film transistor
414‧‧‧汲極電極 414‧‧‧汲electrode
414S‧‧‧表面 414S‧‧‧ surface
420‧‧‧觸控訊號線 420‧‧‧Touch signal line
420S‧‧‧上表面 420S‧‧‧ upper surface
422‧‧‧基材 422‧‧‧Substrate
424‧‧‧閘極介電層 424‧‧‧ gate dielectric layer
428‧‧‧第一絕緣層 428‧‧‧First insulation
428S‧‧‧上表面 428S‧‧‧ upper surface
434‧‧‧第二絕緣層 434‧‧‧Second insulation
434S‧‧‧上表面 434S‧‧‧ upper surface
436‧‧‧平坦層 436‧‧‧flat layer
436S‧‧‧上表面 436S‧‧‧ upper surface
438‧‧‧開口 438‧‧‧ openings
442‧‧‧感測電極 442‧‧‧Sensor electrode
446‧‧‧開口 446‧‧‧ openings
448‧‧‧畫素電極 448‧‧‧ pixel electrodes
450‧‧‧第二基板 450‧‧‧second substrate
452‧‧‧顯示介質 452‧‧‧Display media
462‧‧‧間隔物 462‧‧‧ spacers
468‧‧‧襯層 468‧‧‧ lining
500‧‧‧顯示裝置 500‧‧‧ display device
600‧‧‧顯示裝置 600‧‧‧ display device
D1‧‧‧距離 D1‧‧‧ distance
A1‧‧‧方向 A1‧‧ Direction
A2‧‧‧方向 A2‧‧‧ direction
W1‧‧‧寬度 W1‧‧‧Width
W2‧‧‧寬度 W2‧‧‧Width
1C-1C’‧‧‧線段 1C-1C’‧‧‧ segment
2B-2B’‧‧‧線段 2B-2B’‧‧‧ segment
4-4’‧‧‧線段 4-4’‧‧‧ Segment
第1A圖係本揭露實施例之顯示裝置之第一基板之上視圖。 1A is a top view of a first substrate of the display device of the embodiment.
第1B圖係本揭露另一實施例之顯示裝置之第一基板之上視圖。 FIG. 1B is a top view of a first substrate of a display device according to another embodiment of the present disclosure.
第1C圖係本揭露實施例之顯示裝置之剖面圖。 Fig. 1C is a cross-sectional view showing a display device of the embodiment.
第2A圖係本揭露另一實施例之顯示裝置之第一基板之上視圖。 2A is a top view of a first substrate of a display device according to another embodiment of the present disclosure.
第2B圖係本揭露另一實施例之顯示裝置之剖面圖。 2B is a cross-sectional view of a display device according to another embodiment of the present disclosure.
第3圖係本揭露另一實施例之顯示裝置之剖面圖。 Figure 3 is a cross-sectional view showing a display device according to another embodiment of the present invention.
第4圖係本揭露另一實施例之顯示裝置之剖面圖。 Figure 4 is a cross-sectional view showing a display device according to another embodiment of the present invention.
第5圖係本揭露另一實施例之顯示裝置之剖面圖。 Figure 5 is a cross-sectional view showing a display device according to another embodiment of the present invention.
第6圖係本揭露另一實施例之顯示裝置之剖面圖。 Figure 6 is a cross-sectional view showing a display device according to another embodiment of the present invention.
以下針對本揭露之顯示裝置作詳細說明。應了解的是,以下之敘述提供許多不同的實施例或例子,用以實施本揭露之不同樣態。以下所述特定的元件及排列方式僅為簡單清楚描述本揭露。當然,這些僅用以舉例而非本揭露之限定。此外,在不同實施例中可能使用重複的標號或標示。這些重複僅為了簡單清楚地敘述本揭露,不代表所討論之不同實施例及/或結構之間具有任何關連性。再者,當述及一第一材料層位於一第二材料層上或之上時,包括第一材料層與第二材料層直接接觸之情形。或者,亦可能間隔有一或更多其它材料層之情形,在此情形中,第一材料層與第二材料層之間可能不直接接觸。 The display device of the present disclosure will be described in detail below. It will be appreciated that the following description provides many different embodiments or examples for implementing the various aspects of the disclosure. The specific elements and arrangements described below are merely illustrative of the disclosure. Of course, these are only used as examples and not as a limitation of the disclosure. Moreover, repeated numbers or labels may be used in different embodiments. These repetitions are merely for the purpose of simplicity and clarity of the disclosure, and are not intended to be a limitation of the various embodiments and/or structures discussed. Furthermore, when a first material layer is on or above a second material layer, the first material layer is in direct contact with the second material layer. Alternatively, it is also possible to have one or more layers of other materials interposed, in which case there may be no direct contact between the first layer of material and the second layer of material.
必需了解的是,圖式之元件或裝置可以此技術人士 所熟知之各種形式存在。此外,當某層在其它層或基板「上」時,有可能是指「直接」在其它層或基板上,或指某層在其它層或基板上,或指其它層或基板之間夾設其它層。 It must be understood that the components or devices of the drawings can be used by this technical person. Various forms are known to exist. In addition, when a layer is "on" another layer or substrate, it may mean "directly" on another layer or substrate, or a layer on another layer or substrate, or between other layers or substrates. Other layers.
此外,實施例中可能使用相對性的用語,例如「較低」或「底部」及「較高」或「頂部」,以描述圖式的一個元件對於另一元件的相對關係。能理解的是,如果將圖式的裝置翻轉使其上下顛倒,則所敘述在「較低」側的元件將會成為在「較高」側的元件。 In addition, relative terms such as "lower" or "bottom" and "higher" or "top" may be used in the embodiments to describe the relative relationship of one element of the drawing to another. It will be understood that if the device of the drawing is flipped upside down, the component described on the "lower" side will become the component on the "higher" side.
能理解的是,雖然在此可使用用語「第一」、「第二」、「第三」等來敘述各種元件、組成成分、區域、層、及/或部分,這些元件、組成成分、區域、層、及/或部分不應被這些用語限定,且這些用語僅是用來區別不同的元件、組成成分、區域、層、及/或部分。因此,以下討論的一第一元件、組成成分、區域、層、及/或部分可在不偏離本揭露之教示的情況下被稱為一第二元件、組成成分、區域、層、及/或部分。 It will be understood that the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers, and/or portions, such elements, components, and regions. The layers, and/or parts are not to be limited by the terms, and the terms are used to distinguish different elements, components, regions, layers, and/or parts. Therefore, a first element, component, region, layer, and/or portion discussed below may be referred to as a second element, component, region, layer, and/or without departing from the teachings of the disclosure. section.
除非另外定義,在此使用的全部用語(包括技術及科學用語)具有與此篇揭露所屬之一般技藝者所通常理解的相同涵義。能理解的是這些用語,例如在通常使用的字典中定義的用語,應被解讀成具有一與相關技術及本揭露的背景或上下文一致的意思,而不應以一理想化或過度正式的方式解讀,除非在此特別定義。 Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning meaning It will be understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the relevant art and the context or context of the present disclosure, and should not be in an idealized or overly formal manner. Interpretation, unless specifically defined herein.
本揭露實施例可配合圖式一併理解,本揭露之圖式亦被視為揭露說明之一部分。需了解的是,本揭露之圖式並未以實際裝置及元件之比例繪示。在圖式中可能誇大實施例的形狀與 厚度以便清楚表現出本揭露之特徵。此外,圖式中之結構及裝置係以示意之方式繪示,以便清楚表現出本揭露之特徵。 The embodiments of the present disclosure can be understood in conjunction with the drawings, and the drawings of the present disclosure are also considered as part of the disclosure. It should be understood that the drawings of the present disclosure are not shown in the form of actual devices and components. The shape of the embodiment may be exaggerated in the drawings The thickness is to clearly show the features of the present disclosure. In addition, the structures and devices in the drawings are schematically illustrated in order to clearly illustrate the features of the disclosure.
在本揭露中,相對性的用語例如「下」、「上」、「水平」、「垂直」、「之下」、「之上」、「頂部」、「底部」等等應被理解為該段以及相關圖式中所繪示的方位。此相對性的用語僅是為了方便說明之用,其並不代表其所敘述之裝置需以特定方位來製造或運作。而關於接合、連接之用語例如「連接」、「互連」等,除非特別定義,否則可指兩個結構係直接接觸,或者亦可指兩個結構並非直接接觸,其中有其它結構設於此兩個結構之間。且此關於接合、連接之用語亦可包括兩個結構都可移動,或者兩個結構都固定之情況。 In this disclosure, relative terms such as "lower", "upper", "horizontal", "vertical", "lower", "above", "top", "bottom", etc. shall be understood as The orientation shown in the paragraph and related schemas. This relative term is used for convenience of description only, and does not mean that the device described therein is to be manufactured or operated in a particular orientation. Terms such as "joining" and "interconnecting", etc., unless otherwise defined, may mean that two structures are in direct contact, or that two structures are not in direct contact, and other structures are provided here. Between the two structures. The term "joining and joining" may also include the case where both structures are movable or both structures are fixed.
本揭露實施例係使觸控訊號線(touch line)於鄰近薄膜電晶體處避開通道區,以使觸控訊號線不會與此通道區重疊,故可於觸控訊號線因為製程變異而產生偏移時,防止觸控訊號線與通道區重疊而造成薄膜電晶體的通道區漏電及產品顯示問題。因此,本揭露實施例藉由使觸控訊號線於薄膜電晶體處避開通道區,可提升顯示裝置的良率及顯示品質。 The disclosure of the present invention is such that the touch signal line avoids the channel area adjacent to the thin film transistor, so that the touch signal line does not overlap with the channel area, so the touch signal line can be changed due to process variation. When the offset is generated, the touch signal line is prevented from overlapping with the channel region, thereby causing leakage of the channel region of the thin film transistor and product display problems. Therefore, the disclosed embodiment can improve the yield and display quality of the display device by avoiding the touch signal line from the channel region at the thin film transistor.
第1A圖係本揭露實施例之顯示裝置100之第一基板102之上視圖。如第1A圖所示,第一基板102包括沿第一方向A1延伸之掃描線(閘極線)104,以及與此掃描線104交會之資料線106。易言之,此閘極線104係沿著方向A1延伸,而大抵垂直(perpendicular)或正交(orthogonal)此掃描線(閘極線)延伸方向A1之方向係為方向A2。此外,第一基板102更包括對應每一個次畫素108設置之薄膜電晶體110。 FIG. 1A is a top view of the first substrate 102 of the display device 100 of the embodiment. As shown in FIG. 1A, the first substrate 102 includes a scanning line (gate line) 104 extending in the first direction A1, and a data line 106 intersecting the scanning line 104. In other words, the gate line 104 extends along the direction A1, and the direction perpendicular to the perpendicular or orthogonal direction of the scanning line (gate line) extending direction A1 is the direction A2. In addition, the first substrate 102 further includes a thin film transistor 110 disposed corresponding to each of the sub-pixels 108.
上述資料線106係透過薄膜電晶體110提供源極訊號至次畫素108,而此掃描線(閘極線)104係透過薄膜電晶體110控制資料訊號是否寫入至次畫素108。 The data line 106 provides a source signal to the sub-pixel 108 through the thin film transistor 110, and the scan line (gate line) 104 controls whether the data signal is written to the sub-pixel 108 through the thin film transistor 110.
上述薄膜電晶體110包括源極電極112、汲極電極114、設於源極電極112與汲極電極114之間的通道區116、以及閘極電極118。而此源極電極112則為資料線106之部分。 The thin film transistor 110 includes a source electrode 112, a drain electrode 114, a channel region 116 provided between the source electrode 112 and the drain electrode 114, and a gate electrode 118. The source electrode 112 is part of the data line 106.
此外,第一基板102更包括一觸控訊號線120,此觸控訊號線120除了在鄰近上述薄膜電晶體110處之外,大抵與上述資料線106重疊設置。而在鄰近上述薄膜電晶體110處,此觸控訊號線120係設於通道區116所對應之區域之外,且不與該通道區116重疊。 In addition, the first substrate 102 further includes a touch signal line 120. The touch signal line 120 is disposed to overlap with the data line 106 except for being adjacent to the thin film transistor 110. The touch signal line 120 is disposed outside the region corresponding to the channel region 116 and does not overlap the channel region 116 adjacent to the thin film transistor 110.
本揭露實施例係使觸控訊號線120於鄰近薄膜電晶體110處避開通道區116,以使觸控訊號線120不會與此通道區116重疊,故可於觸控訊號線120因為製程變異而產生偏移時,防止觸控訊號線120與通道區116重疊而造成薄膜電晶體110的通道區116漏電及產品顯示問題。因此,本揭露實施例藉由使觸控訊號線120於薄膜電晶體110處避開通道區116,可提升顯示裝置100的良率及顯示品質。 The disclosure of the present invention is such that the touch signal line 120 avoids the channel region 116 adjacent to the thin film transistor 110 so that the touch signal line 120 does not overlap with the channel region 116, so that the touch signal line 120 can be processed by the touch signal line 120. When the variation causes an offset, the touch signal line 120 is prevented from overlapping with the channel region 116 to cause leakage of the channel region 116 of the thin film transistor 110 and product display problems. Therefore, the present embodiment can improve the yield and display quality of the display device 100 by displacing the touch signal line 120 from the channel region 116 at the thin film transistor 110.
在一些實施例中,此觸控訊號線120與通道區116之間的最短距離D1為約1.5μm至5.5μm,例如為約2μm至3μm。需注意的是,若此距離D1過短,例如比1.5μm短,則此觸控訊號線120無法有效避開通道區116。然而,若此距離D1過長,例如比5.5μm長,則會加大每一個次畫素之面積,使單位面積內的畫素數目下降,故會降低裝置的顯示品質。 In some embodiments, the shortest distance D1 between the touch signal line 120 and the channel region 116 is about 1.5 μm to 5.5 μm, for example, about 2 μm to 3 μm. It should be noted that if the distance D1 is too short, for example, shorter than 1.5 μm, the touch signal line 120 cannot effectively avoid the channel area 116. However, if the distance D1 is too long, for example, longer than 5.5 μm, the area of each sub-pixel is increased, and the number of pixels per unit area is lowered, so that the display quality of the device is lowered.
此外,在一些實施例中,觸控訊號線120係設置於資料線106上方並沿方向A2延伸,此觸控訊號線120可包含一主幹部與複數個彎折部,部分該些彎折部是位於資料線106的遠離薄膜電晶體110的一側(例如左側),而另一部分該些彎折部是位於資料線106的靠近薄膜電晶體110的一側(例如右側)。此外,在一些實施例中,此觸控訊號線的彎折部與主幹部之間具有90~170度之間的夾角。 In addition, in some embodiments, the touch signal line 120 is disposed above the data line 106 and extends along the direction A2. The touch signal line 120 can include a trunk portion and a plurality of bending portions, and the plurality of bending portions. The other side of the data line 106 is away from the thin film transistor 110 (e.g., the left side), and the other portion of the bent portion is located on the side of the data line 106 near the thin film transistor 110 (e.g., the right side). In addition, in some embodiments, the bent portion of the touch signal line has an angle of between 90 and 170 degrees between the bent portion and the trunk portion.
此外,在一些實施例中,觸控訊號線120具有固定之寬度。然而,在其它實施例中,觸控訊號線120於鄰近通道區之寬度可小於觸控訊號線120於遠離通道區其餘部分之寬度。詳細而言,在一些實施例中,如第1B圖所示,觸控訊號線120於靠近通道區116的水平線寬W1小於遠離該通道區的水平線寬W2。 Moreover, in some embodiments, touch signal line 120 has a fixed width. However, in other embodiments, the width of the touch signal line 120 in the adjacent channel region may be smaller than the width of the touch signal line 120 away from the rest of the channel region. In detail, in some embodiments, as shown in FIG. 1B, the horizontal line width W1 of the touch signal line 120 near the channel area 116 is smaller than the horizontal line width W2 away from the channel area.
需注意的是,為了清楚描述本揭露,上述第1A圖中並未繪示後續之畫素電極以及感測電極。 It should be noted that, in order to clearly describe the disclosure, the subsequent pixel electrodes and the sensing electrodes are not shown in FIG. 1A.
第1C圖係本揭露實施例之顯示裝置100之剖面圖,該圖係沿著如第1A圖之線段1C-1C’所繪製之剖面圖。如第1C圖所示,第一基板102可包括一基材122,此基材122可包括玻璃基材、陶瓷基材、塑膠基材或其它任何適合之基材。而薄膜電晶體110包括設於此基材122上之閘極電極118,以及設於閘極電極118及透明基板122上之閘極介電層124。 1C is a cross-sectional view of the display device 100 of the present embodiment, which is a cross-sectional view taken along line 1C-1C' of FIG. 1A. As shown in FIG. 1C, the first substrate 102 can include a substrate 122, which can include a glass substrate, a ceramic substrate, a plastic substrate, or any other suitable substrate. The thin film transistor 110 includes a gate electrode 118 disposed on the substrate 122, and a gate dielectric layer 124 disposed on the gate electrode 118 and the transparent substrate 122.
此閘極電極118可為一或多種金屬、金屬氮化物、導電金屬氧化物、或上述之組合。上述金屬可包括但不限於鉬(molybdenum)、鎢(tungsten)、鈦(titanium)、鉭(tantalum)、鉑(platinum)或鉿(hafnium)。上述金屬氮化物可包括但不限於氮化鉬 (molybdenum nitride)、氮化鎢(tungsten nitride)、氮化鈦(titanium nitride)以及氮化鉭(tantalum nitride)。上述導電金屬氧化物可包括但不限於釕金屬氧化物(ruthenium oxide)以及銦錫金屬氧化物(indium tin oxide)。此閘極電極118可藉由前述之濺鍍法、電阻加熱蒸鍍法、電子束蒸鍍法、或其它任何適合的沈積方式形成。 The gate electrode 118 can be one or more metals, metal nitrides, conductive metal oxides, or combinations thereof. The above metals may include, but are not limited to, molybdenum, tungsten, titanium, tantalum, platinum or hafnium. The above metal nitride may include, but is not limited to, molybdenum nitride (molybdenum nitride), tungsten nitride, titanium nitride, and tantalum nitride. The above conductive metal oxide may include, but is not limited to, ruthenium oxide and indium tin oxide. The gate electrode 118 can be formed by the aforementioned sputtering method, resistance heating evaporation method, electron beam evaporation method, or any other suitable deposition method.
此閘極介電層124可為氧化矽、氮化矽、氮氧化矽、高介電常數(high-k)介電材料、或其它任何適合之介電材料、或上述之組合。此高介電常數(high-k)介電材料之材料可為金屬氧化物、金屬氮化物、金屬矽化物、過渡金屬氧化物、過渡金屬氮化物、過渡金屬矽化物、金屬的氮氧化物、金屬鋁酸鹽、鋯矽酸鹽、鋯鋁酸鹽。例如,此高介電常數(high-k)介電材料可為LaO、AlO、ZrO、TiO、Ta2O5、Y2O3、SrTiO3(STO)、BaTiO3(BTO)、BaZrO、HfO2、HfO3、HfZrO、HfLaO、HfSiO、HfSiON、LaSiO、AlSiO、HfTaO、HfTiO、HfTaTiO、HfAlON、(Ba,Sr)TiO3(BST)、Al2O3、其它適當材料之其它高介電常數介電材料、或上述組合。此閘極介電層124可藉由化學氣相沉積法(CVD)或旋轉塗佈法形成,此化學氣相沉積法例如可為低壓化學氣相沉積法(low pressure chemical vapor deposition,LPCVD)、低溫化學氣相沉積法(low temperature chemical vapor deposition,LTCVD)、快速升溫化學氣相沉積法(rapid thermal chemical vapor deposition,RTCVD)、電漿輔助化學氣相沉積法(plasma enhanced chemical vapor deposition,PECVD)、原子層化學氣相沉積法之原子層沉積法(atomic layer deposition,ALD)或其它常用的方法。 The gate dielectric layer 124 can be hafnium oxide, tantalum nitride, hafnium oxynitride, a high-k dielectric material, or any other suitable dielectric material, or a combination thereof. The material of the high-k dielectric material may be a metal oxide, a metal nitride, a metal halide, a transition metal oxide, a transition metal nitride, a transition metal telluride, a metal oxynitride, Metal aluminate, zirconium silicate, zirconium aluminate. For example, the high-k dielectric material may be LaO, AlO, ZrO, TiO, Ta 2 O 5 , Y 2 O 3 , SrTiO 3 (STO), BaTiO 3 (BTO), BaZrO, HfO. 2 , HfO 3 , HfZrO, HfLaO, HfSiO, HfSiON, LaSiO, AlSiO, HfTaO, HfTiO, HfTaTiO, HfAlON, (Ba, Sr)TiO 3 (BST), Al 2 O 3 , other high dielectric constants of other suitable materials Dielectric material, or a combination of the above. The gate dielectric layer 124 can be formed by chemical vapor deposition (CVD) or spin coating. The chemical vapor deposition method can be, for example, low pressure chemical vapor deposition (LPCVD). Low temperature chemical vapor deposition (LTCVD), rapid thermal chemical vapor deposition (RTCVD), plasma enhanced chemical vapor deposition (PECVD) Atomic layer deposition (ALD) or other commonly used methods of atomic layer chemical vapor deposition.
薄膜電晶體110更包括設於閘極介電層124上之半導 體層126,此半導體層126與閘極電極118重疊,且上述源極電極112的第一端與汲極電極114的第二端係分別設於半導體層126之表面上,且分別與半導體層126之部分重疊。 The thin film transistor 110 further includes a semiconductor guided on the gate dielectric layer 124. The body layer 126 is overlapped with the gate electrode 118, and the first end of the source electrode 112 and the second end of the drain electrode 114 are respectively disposed on the surface of the semiconductor layer 126, and respectively connected to the semiconductor layer 126. Partial overlap.
此半導體層126可為元素半導體,包括矽、鍺(germanium);化合物半導體,包括氮化鎵(gallium nitride,GaN)、碳化矽(silicon carbide)、砷化鎵(gallium arsenide)、磷化鎵(gallium phosphide)、磷化銦(indium phosphide)、砷化銦(indium arsenide)及/或銻化銦(indium antimonide);合金半導體,包括矽鍺合金(SiGe)、磷砷鎵合金(GaAsP)、砷鋁銦合金(AlInAs)、砷鋁鎵合金(AlGaAs)、砷銦鎵合金(GaInAs)、磷銦鎵合金(GaInP)及/或磷砷銦鎵合金(GaInAsP)或上述材料之組合。 The semiconductor layer 126 may be an elemental semiconductor including germanium, germanium; a compound semiconductor including gallium nitride (GaN), silicon carbide, gallium arsenide, gallium phosphide ( Gallium phosphide, indium phosphide, indium arsenide and/or indium antimonide; alloy semiconductors including bismuth alloy (SiGe), phosphorus gallium arsenide (GaAsP), arsenic Aluminum indium alloy (AlInAs), arsenic aluminum gallium alloy (AlGaAs), arsenic gallium alloy (GaInAs), indium gallium alloy (GaInP) and/or phosphorus indium gallium alloy (GaInAsP) or a combination thereof.
上述源極電極112與汲極電極114之材料可包括銅、鋁、鉬、鎢、金、鉻、鎳、鉑、鈦、銥、銠、上述之合金、上述之組合或其它導電性佳的金屬材料,例如可為鉬鋁鉬(Mo/Al/Mo)或鈦鋁鈦(Ti/Al/Ti)之三層結構。此源極電極112與汲極電極114之材料可藉由前述之濺鍍法、電阻加熱蒸鍍法、電子束蒸鍍法、或其它任何適合的沉積方式形成。在一些實施例中,上述源極電極112與汲極電極114之材料可相同,且可藉由同一道沈積步驟形成。然而,在其它實施例中,上述源極電極112與汲極電極114亦可藉由不同之沈積步驟形成,且其材料可彼此不同。 The material of the source electrode 112 and the drain electrode 114 may include copper, aluminum, molybdenum, tungsten, gold, chromium, nickel, platinum, titanium, niobium, tantalum, the above alloy, the above combination or other conductive metal. The material may be, for example, a three-layer structure of molybdenum aluminum molybdenum (Mo/Al/Mo) or titanium aluminum titanium (Ti/Al/Ti). The material of the source electrode 112 and the drain electrode 114 can be formed by the above-described sputtering method, resistance heating evaporation method, electron beam evaporation method, or any other suitable deposition method. In some embodiments, the material of the source electrode 112 and the drain electrode 114 may be the same and may be formed by the same deposition step. However, in other embodiments, the source electrode 112 and the drain electrode 114 may be formed by different deposition steps, and the materials thereof may be different from each other.
在此實施例的半導體層126中,設於上述第一端與上述第二端之間的半導體層126即為通道區116。亦即,對應源極電極112與汲極電極114之間最短距離之區域的半導體層126即為通道區116。 In the semiconductor layer 126 of this embodiment, the semiconductor layer 126 disposed between the first end and the second end is the channel region 116. That is, the semiconductor layer 126 corresponding to the region of the shortest distance between the source electrode 112 and the drain electrode 114 is the channel region 116.
繼續參見第1C圖,第一基板102更包括覆蓋薄膜電晶體110之第一絕緣層128。此第一絕緣層128可為氮化矽、二氧化矽、或氮氧化矽。第一絕緣層128可藉由化學氣相沉積法(CVD)或旋轉塗佈法形成,此化學氣相沉積法例如可為低壓化學氣相沉積法(low pressure chemical vapor deposition,LPCVD)、低溫化學氣相沉積法(low temperature chemical vapor deposition,LTCVD)、快速升溫化學氣相沉積法(rapid thermal chemical vapor deposition,RTCVD)、電漿輔助化學氣相沉積法(plasma enhanced chemical vapor deposition,PECVD)、原子層化學氣相沉積法之原子層沉積法(atomic layer deposition,ALD)或其它常用的方法。 Continuing to refer to FIG. 1C, the first substrate 102 further includes a first insulating layer 128 covering the thin film transistor 110. The first insulating layer 128 may be tantalum nitride, hafnium oxide, or hafnium oxynitride. The first insulating layer 128 can be formed by chemical vapor deposition (CVD) or spin coating. The chemical vapor deposition method can be, for example, low pressure chemical vapor deposition (LPCVD), low temperature chemistry. Low temperature chemical vapor deposition (LTCVD), rapid thermal chemical vapor deposition (RTCVD), plasma enhanced chemical vapor deposition (PECVD), atom Atomic layer deposition (ALD) or other commonly used methods of layer chemical vapor deposition.
於本實施例中,上述觸控訊號線120係設於第一絕緣層128上。此外,此第一絕緣層128具有開口130,此開口130暴露出汲極電極114之部份表面114S。此外,第一基板102可更包括一襯層132,設於部分第一絕緣層128上,並與汲極電極114之表面114S連接。 In the embodiment, the touch signal line 120 is disposed on the first insulating layer 128. In addition, the first insulating layer 128 has an opening 130 that exposes a portion of the surface 114S of the drain electrode 114. In addition, the first substrate 102 may further include a liner 132 disposed on a portion of the first insulating layer 128 and connected to the surface 114S of the drain electrode 114.
上述觸控訊號線120與襯層132之材料可包括銅、鋁、鉬、鎢、金、鉻、鎳、鉑、鈦、銥、銠、上述之合金、上述之組合或其它導電性佳的金屬材料,例如可為鉬鋁鉬(Mo/Al/Mo)或鈦鋁鈦(Ti/Al/Ti)之三層結構。此觸控訊號線120與襯層132之材料可藉由前述之濺鍍法、電阻加熱蒸鍍法、電子束蒸鍍法、或其它任何適合的沉積方式形成。在一些實施例中,上述觸控訊號線120與襯層132之材料可相同,且可藉由同一道沈積步驟形成。然而,在其它實施例中,上述觸控訊號線120與襯層132亦可藉由不同之沈積步驟形成,且其材料可彼此不同。 The material of the touch signal line 120 and the lining layer 132 may include copper, aluminum, molybdenum, tungsten, gold, chromium, nickel, platinum, titanium, tantalum, niobium, the above alloy, the above combination or other conductive metal. The material may be, for example, a three-layer structure of molybdenum aluminum molybdenum (Mo/Al/Mo) or titanium aluminum titanium (Ti/Al/Ti). The material of the touch signal line 120 and the lining layer 132 can be formed by the aforementioned sputtering method, resistance heating evaporation method, electron beam evaporation method, or any other suitable deposition method. In some embodiments, the touch signal line 120 and the liner 132 may be made of the same material and may be formed by the same deposition step. However, in other embodiments, the touch signal line 120 and the lining layer 132 may be formed by different deposition steps, and the materials thereof may be different from each other.
本揭露實施例藉由形成開口130與襯層132,可減少後續為使畫素電極電性連接至汲極電極而蝕刻絕緣層形成開口時,所需蝕穿之絕緣層數量,故可增加製程良率。 By forming the opening 130 and the lining layer 132, the embodiment can reduce the number of insulating layers required to etch the insulating layer to form the opening when the pixel electrode is electrically connected to the gate electrode, thereby increasing the process. Yield.
繼續參見第1C圖,第一基板102更包括設於第一絕緣層128上且覆蓋觸控訊號線120之第二絕緣層134,此第二絕緣層134可為氮化矽、二氧化矽、或氮氧化矽,且可藉由前述化學氣相沉積法(CVD)或旋轉塗佈法形成。接著,此第二絕緣層134上可選擇性設有平坦層136。此平坦層136之材質可為有機之絕緣材料(光感性樹脂)或無機之絕緣材料(氮化矽、氧化矽、氮氧化矽、碳化矽、氧化鋁、或上述材質之組合)。 Continuing to refer to FIG. 1C, the first substrate 102 further includes a second insulating layer 134 disposed on the first insulating layer 128 and covering the touch signal line 120. The second insulating layer 134 may be tantalum nitride or hafnium oxide. Or ruthenium oxynitride, and can be formed by the aforementioned chemical vapor deposition (CVD) or spin coating method. Then, a flat layer 136 is selectively disposed on the second insulating layer 134. The material of the flat layer 136 may be an organic insulating material (photosensitive resin) or an inorganic insulating material (tantalum nitride, cerium oxide, cerium oxynitride, tantalum carbide, aluminum oxide, or a combination thereof).
此外,可藉由兩次蝕刻步驟分別蝕刻上述第二絕緣層134與平坦層136,以形成開口138及開口140。開口138暴露出部分襯層132表面132S。開口140暴露出部分觸控訊號線120之上表面120S。 In addition, the second insulating layer 134 and the planarization layer 136 may be separately etched by two etching steps to form the opening 138 and the opening 140. The opening 138 exposes a portion of the liner 132 surface 132S. The opening 140 exposes a portion 120S of the upper surface of the touch signal line 120.
繼續參見第1C圖,第一基板102更包括設於第二絕緣層134上(或平坦層136上)且電性連接觸控訊號線120之感測電極142。詳細而言,此感測電極142係設於第二絕緣層134上(或平坦層136上),並延伸至開口140之側壁上及觸控訊號線120之上表面120S上。 Continuing to refer to FIG. 1C , the first substrate 102 further includes a sensing electrode 142 disposed on the second insulating layer 134 (or the flat layer 136 ) and electrically connected to the touch signal line 120 . In detail, the sensing electrode 142 is disposed on the second insulating layer 134 (or the flat layer 136) and extends to the sidewall of the opening 140 and the upper surface 120S of the touch signal line 120.
此感測電極142可包括透明導電材料,例如為銦錫氧化物(ITO)、氧化錫(SnO)、氧化銦鋅(IZO)、氧化銦鎵鋅(IGZO)、氧化銦錫鋅(ITZO)、氧化銻錫(ATO)、氧化銻鋅(AZO)、上述之組合或其它任何適合之透明導電氧化物材料。此外,此感測電極142不但是作為觸控時的感測電極,亦是作為顯示裝置的共同電極, 其中,其觸控的驅動方式可為自電容驅動方式(self-capacitive type)。此外,在一些實施例中,一個感測電極142可藉由兩個開口140(例如第1A圖之兩個開口140)電性連接至兩條觸控訊號線120,且一個感測電極142係對應多個第1A圖之次畫素108設置。 The sensing electrode 142 may include a transparent conductive material such as indium tin oxide (ITO), tin oxide (SnO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO), Antimony tin oxide (ATO), antimony zinc oxide (AZO), combinations of the foregoing, or any other suitable transparent conductive oxide material. In addition, the sensing electrode 142 is not only a sensing electrode when the touch is used, but also a common electrode of the display device. The driving method of the touch can be a self-capacitive type. In addition, in some embodiments, one sensing electrode 142 can be electrically connected to the two touch signal lines 120 through two openings 140 (for example, two openings 140 in FIG. 1A), and one sensing electrode 142 is Corresponding to a plurality of sub-pixels 108 of FIG. 1A.
繼續參見第1C圖,第一基板102更包括設於第二絕緣層134上(或平坦層136上)且覆蓋感測電極142之經圖案化的第三絕緣層144。第三絕緣層144可為氮化矽、二氧化矽、或氮氧化矽,且可藉由前述化學氣相沉積法(CVD)或旋轉塗佈法形成。且第三絕緣層144具有開口146,此開口146連接開口138。而上述平坦層136係設於第二絕緣層134與第三絕緣層144之間。 Continuing to refer to FIG. 1C, the first substrate 102 further includes a patterned third insulating layer 144 disposed on the second insulating layer 134 (or on the planarization layer 136) and covering the sensing electrode 142. The third insulating layer 144 may be tantalum nitride, hafnium oxide, or hafnium oxynitride, and may be formed by the aforementioned chemical vapor deposition (CVD) or spin coating method. And the third insulating layer 144 has an opening 146 that connects the opening 138. The flat layer 136 is disposed between the second insulating layer 134 and the third insulating layer 144.
第一基板102更包括設於第三絕緣層144上且電性連接汲極電極114之畫素電極148。詳細而言,此畫素電極148係設於部分第三絕緣層144上,並延伸至開口146及138之側壁上及襯層132之表面132S上,以電性連接汲極電極114。 The first substrate 102 further includes a pixel electrode 148 disposed on the third insulating layer 144 and electrically connected to the drain electrode 114. In detail, the pixel electrode 148 is disposed on a portion of the third insulating layer 144 and extends to the sidewalls of the openings 146 and 138 and the surface 132S of the liner 132 to electrically connect the gate electrode 114.
此外,繼續參見第1C圖,顯示裝置100更包括相對第一基板102設置之第二基板150以及設於第一基板102與第二基板150之間的顯示介質152。 In addition, referring to FIG. 1C , the display device 100 further includes a second substrate 150 disposed opposite to the first substrate 102 and a display medium 152 disposed between the first substrate 102 and the second substrate 150 .
上述顯示裝置100可為觸控液晶顯示器,例如為薄膜電晶體液晶顯示器。或者,此液晶顯示器可為扭轉向列(Twisted Nematic,TN)型液晶顯示器、超扭轉向列(Super Twisted Nematic,STN)型液晶顯示器、雙層超扭轉向列(Double layer Super Twisted Nematic,DSTN)型液晶顯示器、垂直配向(Vertical Alignment,VA)型液晶顯示器、水平電場效應(In-Plane Switching,IPS)型液晶顯示器、膽固醇(Cholesteric)型液晶顯示 器、藍相(Blue Phase)型液晶顯示器、邊際電場效應(FFS)型液晶顯示器或其它任何適合之液晶顯示器。 The display device 100 can be a touch liquid crystal display, such as a thin film transistor liquid crystal display. Alternatively, the liquid crystal display can be a Twisted Nematic (TN) type liquid crystal display, a Super Twisted Nematic (STN) type liquid crystal display, or a Double Layer Super Twisted Nematic (DSTN). Liquid crystal display, Vertical Alignment (VA) type liquid crystal display, In-Plane Switching (IPS) type liquid crystal display, Cholesteric type liquid crystal display , Blue Phase type liquid crystal display, marginal electric field effect (FFS) type liquid crystal display or any other suitable liquid crystal display.
在一些實施例中,第二基板150為彩色濾光層基板。詳細而言,彩色濾光層基板可包括一基板154、設於此基板154上之遮光層156、設於此遮光層156及基板154上之彩色濾光層158、以及覆蓋遮光層156與彩色濾光層158之平坦層160。 In some embodiments, the second substrate 150 is a color filter layer substrate. In detail, the color filter layer substrate may include a substrate 154, a light shielding layer 156 disposed on the substrate 154, a color filter layer 158 disposed on the light shielding layer 156 and the substrate 154, and a light shielding layer 156 and color. The flat layer 160 of the filter layer 158.
上述基板154例如可為玻璃基板、陶瓷基板、塑膠基板或其它任何適合之基板,上述遮光層156可包括黑色光阻、黑色印刷油墨、黑色樹脂。而上述彩色濾光層158可包括紅色濾光層、綠色濾光層、藍色濾光層、或其它任何適合之彩色濾光層。 The substrate 154 may be, for example, a glass substrate, a ceramic substrate, a plastic substrate, or any other suitable substrate. The light shielding layer 156 may include a black photoresist, a black printing ink, and a black resin. The color filter layer 158 may include a red filter layer, a green filter layer, a blue filter layer, or any other suitable color filter layer.
顯示裝置100可更包括設於第一基板102與第二基板150之間的間隔物162,此間隔物162為用以間隔第一基板102與第二基板150之主要結構,以防止顯示裝置100被按壓時第一基板102與第二基板150接觸。 The display device 100 further includes a spacer 162 disposed between the first substrate 102 and the second substrate 150. The spacer 162 is a main structure for spacing the first substrate 102 and the second substrate 150 to prevent the display device 100. The first substrate 102 is in contact with the second substrate 150 when pressed.
應注意的是,除上述第1A-1C圖所示之實施例以外,本揭露之觸控訊號線亦可有其它配置,如第2A-2B圖之實施例所示。本揭露之範圍並不以第1A-1C圖所示之實施例為限。此部分將於後文詳細說明。 It should be noted that the touch signal lines of the present disclosure may have other configurations in addition to the embodiments shown in FIGS. 1A-1C, as shown in the embodiment of FIG. 2A-2B. The scope of the disclosure is not limited to the embodiment shown in Figures 1A-1C. This section will be explained in detail later.
應注意的是,後文中與前文相同或相似的元件或膜層將以相同或相似之標號表示,其材料、製造方法與功能皆與前文所述相同或相似,故此部分在後文中將不再贅述。 It should be noted that elements or layers that are the same or similar to those in the foregoing will be denoted by the same or similar reference numerals, and the materials, manufacturing methods and functions thereof are the same or similar to those described above, and therefore will not be described later. Narration.
第2A圖係本揭露另一實施例之顯示裝置200之第一基板102之上視圖。第2B圖係本揭露另一實施例之顯示裝置200之剖面圖,第2B圖為沿著如第2A圖之線段2B-2B’所繪製之剖面圖。 如第2A圖所示,顯示裝置200包括延伸區164,此延伸區164係藉由將通道區116所對應的區域沿第一方向A1延伸而得,延伸區164與該資料線106形成一重疊區166,其中,觸控訊號線120係設於該重疊區166之外。第2A-2B圖所示之實施例與前述第1A-1C圖之實施例之差別在於在上述延伸區164內,觸控訊號線120係不與該重疊區166重疊,也就是觸控訊號線設於重疊區166之外。 FIG. 2A is a top view of the first substrate 102 of the display device 200 according to another embodiment of the present disclosure. Fig. 2B is a cross-sectional view showing a display device 200 according to another embodiment, and Fig. 2B is a cross-sectional view taken along line 2B-2B' as shown in Fig. 2A. As shown in FIG. 2A, the display device 200 includes an extension region 164 which is formed by extending a region corresponding to the channel region 116 in a first direction A1, and the extension region 164 forms an overlap with the data line 106. The area 166, wherein the touch signal line 120 is disposed outside the overlap area 166. The difference between the embodiment shown in FIG. 2A-2B and the embodiment of FIG. 1A-1C is that in the extension region 164, the touch signal line 120 does not overlap with the overlap region 166, that is, the touch signal line. It is disposed outside the overlap area 166.
第3圖係本揭露另一實施例之顯示裝置300之剖面圖。第3圖所示之實施例與前述第1A-2B圖之實施例之差別在於顯示裝置300不具有上述平坦層,故第二絕緣層134與第三絕緣層144係直接接觸。 Figure 3 is a cross-sectional view of a display device 300 in accordance with another embodiment of the present disclosure. The difference between the embodiment shown in FIG. 3 and the first embodiment of FIG. 1A-2B is that the display device 300 does not have the flat layer, so that the second insulating layer 134 is in direct contact with the third insulating layer 144.
應注意的是,除上述第1A-3圖所示之實施例以外,本揭露之感測電極、畫素電極與觸控訊號線亦可有其它配置,如第4圖之實施例所示。本揭露之範圍並不以第1A-3圖所示之實施例為限。此部分將於後文詳細說明。 It should be noted that in addition to the embodiments shown in FIG. 1A-3 above, the sensing electrodes, the pixel electrodes and the touch signal lines of the present disclosure may have other configurations, as shown in the embodiment of FIG. The scope of the disclosure is not limited to the embodiment shown in Figure 1A-3. This section will be explained in detail later.
應注意的是,後文中與前文相同或相似的元件或膜層將以相同或相似之標號表示,其材料、製造方法與功能皆與前文所述相同或相似,故此部分在後文中將不再贅述。 It should be noted that elements or layers that are the same or similar to those in the foregoing will be denoted by the same or similar reference numerals, and the materials, manufacturing methods and functions thereof are the same or similar to those described above, and therefore will not be described later. Narration.
第4圖係本揭露另一實施例之顯示裝置400之剖面圖,該圖係沿著如第1A圖之線段4-4’所繪製之剖面圖。如第4圖所示,顯示裝置400之第一基板402包括基材422及設於此基材422上之薄膜電晶體410。此第一基板402更包括覆蓋薄膜電晶體410之第一絕緣層428。 Fig. 4 is a cross-sectional view showing a display device 400 according to another embodiment of the present invention, which is a cross-sectional view taken along line 4-4' of Fig. 1A. As shown in FIG. 4, the first substrate 402 of the display device 400 includes a substrate 422 and a thin film transistor 410 disposed on the substrate 422. The first substrate 402 further includes a first insulating layer 428 covering the thin film transistor 410.
接著,此第一絕緣層428上可選擇性設有平坦層436。此平坦層436之材質可為有機之絕緣材料(光感性樹脂)或無 機之絕緣材料(氮化矽、氧化矽、氮氧化矽、碳化矽、氧化鋁、或上述材質之組合)。 Then, a flat layer 436 is selectively disposed on the first insulating layer 428. The material of the flat layer 436 may be an organic insulating material (photosensitive resin) or none. Insulation material of the machine (tantalum nitride, tantalum oxide, niobium oxynitride, tantalum carbide, aluminum oxide, or a combination of the above materials).
此外,可藉由兩次蝕刻步驟分別蝕刻第一絕緣層428與平坦層436,以形成開口438。此開口438由平坦層436之上表面436S向下延伸至汲極電極414之表面414S。此開口438暴露出汲極電極414之部份表面414S。 In addition, the first insulating layer 428 and the planarization layer 436 may be separately etched by two etching steps to form the opening 438. This opening 438 extends downward from the upper surface 436S of the planarization layer 436 to the surface 414S of the drain electrode 414. This opening 438 exposes a portion of the surface 414S of the drain electrode 414.
此外,如第4圖所示,觸控訊號線420係設於第一絕緣層428上(或平坦層436上)。觸控訊號線420之材料可包括銅、鋁、鉬、鎢、金、鉻、鎳、鉑、鈦、銥、銠、上述之合金、上述之組合或其它導電性佳的金屬材料,例如可為鉬鋁鉬(Mo/Al/Mo)或鈦鋁鈦(Ti/Al/Ti)之三層結構。 In addition, as shown in FIG. 4, the touch signal line 420 is disposed on the first insulating layer 428 (or on the flat layer 436). The material of the touch signal line 420 may include copper, aluminum, molybdenum, tungsten, gold, chromium, nickel, platinum, titanium, tantalum, niobium, the above alloy, the above combination or other conductive metal materials, for example, A three-layer structure of molybdenum aluminum molybdenum (Mo/Al/Mo) or titanium aluminum titanium (Ti/Al/Ti).
繼續參見第4圖,畫素電極448係設於第一絕緣層428上並電性連接汲極電極414。此外,部分畫素電極448設置於第一絕緣層428與觸控訊號線420之間,以增加觸控訊號線420與第一絕緣層428間的黏著力,畫素電極448之材料可包括透明導電材料,例如為銦錫氧化物(ITO)、氧化錫(SnO)、氧化銦鋅(IZO)、氧化銦鎵鋅(IGZO)、氧化銦錫鋅(ITZO)、氧化銻錫(ATO)、氧化銻鋅(AZO)、上述之組合或其它任何適合之透明導電氧化物材料。 Continuing to refer to FIG. 4, the pixel electrode 448 is disposed on the first insulating layer 428 and electrically connected to the drain electrode 414. In addition, a portion of the pixel electrode 448 is disposed between the first insulating layer 428 and the touch signal line 420 to increase the adhesion between the touch signal line 420 and the first insulating layer 428. The material of the pixel electrode 448 may include transparent Conductive materials such as indium tin oxide (ITO), tin oxide (SnO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO), antimony tin oxide (ATO), oxidation Yttrium zinc (AZO), combinations of the above or any other suitable transparent conductive oxide material.
繼續參見第4圖,顯示裝置400更包括設於第一絕緣層428上(或平坦層436上)且覆蓋觸控訊號線420及畫素電極448之第二絕緣層434。而上述平坦層436係設於第一絕緣層428與第二絕緣層434之間。此第二絕緣層434具有開口446,顯示裝置400更包括設於第二絕緣層434上且電性連接觸控訊號線420之感測電極442。詳細而言,感測電極442係設於第二絕緣層434上,並電性連 接觸控訊號線420。此外,此感測電極442不但可作為觸控時的感測電極,亦可作為顯示裝置的共同電極,其中,其觸控的驅動方式可為自電容驅動方式(self-capacitive type。 Continuing to refer to FIG. 4 , the display device 400 further includes a second insulating layer 434 disposed on the first insulating layer 428 (or the flat layer 436 ) and covering the touch signal line 420 and the pixel electrode 448 . The flat layer 436 is disposed between the first insulating layer 428 and the second insulating layer 434. The second insulating layer 434 has an opening 446. The display device 400 further includes a sensing electrode 442 disposed on the second insulating layer 434 and electrically connected to the touch signal line 420. In detail, the sensing electrode 442 is disposed on the second insulating layer 434 and electrically connected Contact the control line 420. In addition, the sensing electrode 442 can be used as a common electrode of the display device, and can be used as a common electrode of the display device. The driving mode of the touch can be a self-capacitive type.
顯示裝置400更包括相對第一基板402設置之第二基板450、設於第一基板402與第二基板450之間的顯示介質452、以及設於第一基板402與第二基板450之間的間隔物462。 The display device 400 further includes a second substrate 450 disposed opposite to the first substrate 402, a display medium 452 disposed between the first substrate 402 and the second substrate 450, and a first substrate 402 and the second substrate 450 disposed between the first substrate 402 and the second substrate 450. Spacer 462.
第5圖係本揭露另一實施例之顯示裝置500之剖面圖。第5圖所示之實施例與前述第4圖之實施例之差別在於第一基板402更包括設於開口438中的畫素電極448之上之襯層468。 Figure 5 is a cross-sectional view of a display device 500 in accordance with another embodiment of the present disclosure. The embodiment shown in FIG. 5 differs from the embodiment of FIG. 4 described above in that the first substrate 402 further includes a liner 468 disposed over the pixel electrode 448 in the opening 438.
此襯層468與觸控訊號線420之材料可包括銅、鋁、鉬、鎢、金、鉻、鎳、鉑、鈦、銥、銠、上述之合金、上述之組.合或其它導電性佳的金屬材料,例如可為鉬鋁鉬(Mo/Al/Mo)或鈦鋁鈦(Ti/Al/Ti)之三層結構。此觸控訊號線420與襯層468之材料可藉由前述之濺鍍法、電阻加熱蒸鍍法、電子束蒸鍍法、或其它任何適合的沉積方式形成。在一些實施例中,上述觸控訊號線420與襯層468之材料可相同,且可藉由同一道沈積步驟形成。然而,在其它實施例中,上述觸控訊號線420與襯層468亦可藉由不同之沈積步驟形成,且其材料可彼此不同。 The material of the lining layer 468 and the touch signal line 420 may include copper, aluminum, molybdenum, tungsten, gold, chromium, nickel, platinum, titanium, tantalum, niobium, alloys thereof, the above-mentioned group, or other conductive properties. The metal material may be, for example, a three-layer structure of molybdenum aluminum molybdenum (Mo/Al/Mo) or titanium aluminum titanium (Ti/Al/Ti). The material of the touch signal line 420 and the lining layer 468 can be formed by the aforementioned sputtering method, resistance heating evaporation method, electron beam evaporation method, or any other suitable deposition method. In some embodiments, the touch signal line 420 and the liner 468 may be the same material and may be formed by the same deposition step. However, in other embodiments, the touch signal line 420 and the lining layer 468 may be formed by different deposition steps, and the materials thereof may be different from each other.
藉由於開口438中的畫素電極448上設置襯層468,可於形成觸控訊號線420時防止於開口438殘留無法控制形狀之金屬,或是可使開口438內的表面完整以避免畫素電極448於開口內斷線。由於此無法控制形狀之殘留金屬若為鉬鋁鉬等之三層結構,則中間之鋁可能會凸出而使畫素電極448與感測電極442短路,故本揭露實施例於開口438中的畫素電極448上設置襯層468, 可防止上述短路或斷線並提升製程良率。 Since the lining layer 468 is disposed on the pixel electrode 448 in the opening 438, the uncontrollable metal can be prevented from remaining in the opening 438 when the touch signal line 420 is formed, or the surface in the opening 438 can be completely intact to avoid the pixel. Electrode 448 is broken within the opening. Since the residual metal of the uncontrollable shape is a three-layer structure of molybdenum aluminum molybdenum or the like, the aluminum in the middle may protrude to short-circuit the pixel electrode 448 and the sensing electrode 442, so the embodiment disclosed in the opening 438 A lining layer 468 is disposed on the pixel electrode 448, It can prevent the above short circuit or disconnection and improve the process yield.
第6圖係本揭露另一實施例之顯示裝置600之剖面圖。第6圖所示之實施例與前述第4-5圖之實施例之差別在於顯示裝置600不具有上述平坦層,故第一絕緣層428與第二絕緣層434係直接接觸。 Figure 6 is a cross-sectional view of a display device 600 in accordance with another embodiment of the present disclosure. The difference between the embodiment shown in FIG. 6 and the embodiment of FIGS. 4-5 is that the display device 600 does not have the flat layer described above, so that the first insulating layer 428 is in direct contact with the second insulating layer 434.
綜上所述,本揭露實施例係使觸控訊號線(touch line)於鄰近薄膜電晶體處避開通道區,以使觸控訊號線不會與此通道區重疊,故可於觸控訊號線因為製程變異而產生偏移時,防止觸控訊號線與通道區重疊而造成薄膜電晶體的通道區漏電及產品顯示問題。因此,本揭露實施例藉由使觸控訊號線於薄膜電晶體處避開通道區,可提升顯示裝置的良率及顯示品質。 In summary, the embodiment of the present disclosure enables the touch signal line to avoid the channel area adjacent to the thin film transistor, so that the touch signal line does not overlap with the channel area, so that the touch signal can be touched. When the line is offset due to process variation, the touch signal line is prevented from overlapping with the channel area, causing leakage of the channel region of the thin film transistor and product display problems. Therefore, the disclosed embodiment can improve the yield and display quality of the display device by avoiding the touch signal line from the channel region at the thin film transistor.
值得注意的是,以上所述之元件尺寸、元件參數、以及元件形狀皆非為本揭露之限制條件。此技術領域中具有通常知識者可以根據不同需要調整這些設定值。另外,本揭露之顯示裝置及其製造方法並不僅限於第1A-6圖所圖示之狀態。本揭露可以僅包括第1A-6圖之任何一或複數個實施例之任何一或複數項特徵。換言之,並非所有圖示之特徵均須同時實施於本揭露之顯示裝置及其製造方法中。 It should be noted that the component sizes, component parameters, and component shapes described above are not limitations of the disclosure. Those of ordinary skill in the art can adjust these settings according to different needs. Further, the display device and the method of manufacturing the same according to the present disclosure are not limited to the state illustrated in FIG. 1A-6. The disclosure may include only any one or more of the features of any one or a plurality of embodiments of Figures 1A-6. In other words, not all illustrated features must be simultaneously implemented in the display device of the present disclosure and its method of manufacture.
雖然本揭露的實施例及其優點已揭露如上,但應該瞭解的是,任何所屬技術領域中具有通常知識者,在不脫離本揭露之精神和範圍內,當可作更動、替代與潤飾。此外,本揭露之保護範圍並未侷限於說明書內所述特定實施例中的製程、機器、製造、物質組成、裝置、方法及步驟,任何所屬技術領域中具有通常知識者可從本揭露揭示內容中理解現行或未來所發展出的製 程、機器、製造、物質組成、裝置、方法及步驟,只要可以在此處所述實施例中實施大抵相同功能或獲得大抵相同結果皆可根據本揭露使用。因此,本揭露之保護範圍包括上述製程、機器、製造、物質組成、裝置、方法及步驟。另外,每一申請專利範圍構成個別的實施例,且本揭露之保護範圍也包括各個申請專利範圍及實施例的組合。 Although the embodiments of the present disclosure and its advantages are disclosed above, it should be understood that those skilled in the art can make changes, substitutions, and refinements without departing from the spirit and scope of the disclosure. In addition, the scope of the disclosure is not limited to the processes, machines, manufactures, compositions, devices, methods, and steps in the specific embodiments described in the specification, and those of ordinary skill in the art may disclose the disclosure Understand the current or future development system The process, machine, manufacture, material composition, apparatus, method, and procedure may be used in accordance with the present disclosure as long as they can perform substantially the same function or achieve substantially the same result in the embodiments described herein. Accordingly, the scope of protection of the present disclosure includes the above-described processes, machines, manufacturing, material compositions, devices, methods, and procedures. In addition, each patent application scope constitutes an individual embodiment, and the scope of protection of the disclosure also includes a combination of the scope of the patent application and the embodiments.
100‧‧‧顯示裝置 100‧‧‧ display device
102‧‧‧第一基板 102‧‧‧First substrate
104‧‧‧掃描線 104‧‧‧ scan line
106‧‧‧資料線 106‧‧‧Information line
108‧‧‧次畫素 108‧‧‧ pixels
110‧‧‧薄膜電晶體 110‧‧‧film transistor
112‧‧‧源極電極 112‧‧‧Source electrode
114‧‧‧汲極電極 114‧‧‧汲electrode
116‧‧‧通道區 116‧‧‧Channel area
118‧‧‧閘極電極 118‧‧‧gate electrode
120‧‧‧觸控訊號線 120‧‧‧Touch signal line
126‧‧‧半導體層 126‧‧‧Semiconductor layer
132‧‧‧襯層 132‧‧‧ lining
138‧‧‧開口 138‧‧‧ openings
140‧‧‧開口 140‧‧‧ openings
146‧‧‧開口 146‧‧‧ openings
D1‧‧‧距離 D1‧‧‧ distance
A1‧‧‧方向 A1‧‧ Direction
A2‧‧‧方向 A2‧‧‧ direction
1C-1C’‧‧‧線段 1C-1C’‧‧‧ segment
4-4’‧‧‧線段 4-4’‧‧‧ Segment
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Family Cites Families (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5327001A (en) * | 1987-09-09 | 1994-07-05 | Casio Computer Co., Ltd. | Thin film transistor array having single light shield layer over transistors and gate and drain lines |
JPH0982978A (en) * | 1995-09-20 | 1997-03-28 | Hitachi Ltd | Semiconductor device and liquid-crystal display using semiconductor device |
JP4698815B2 (en) * | 2000-10-31 | 2011-06-08 | 株式会社日立製作所 | Liquid crystal display device and manufacturing method thereof |
US7242021B2 (en) * | 2002-04-23 | 2007-07-10 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and display element using semiconductor device |
US7385660B2 (en) * | 2003-12-08 | 2008-06-10 | Sharp Kabushiki Kaisha | Liquid crystal display device for transflector having opening in a first electrode for forming a liquid crystal domain and openings at first and second corners of the domain on a second electrode |
CN101393363B (en) * | 2007-09-21 | 2010-06-09 | 北京京东方光电科技有限公司 | FFS type TFT-LCD array substrate structure and method for manufacturing same |
KR20090075369A (en) * | 2008-01-04 | 2009-07-08 | 삼성전자주식회사 | Display panel |
CN101819494B (en) * | 2009-02-27 | 2014-08-13 | 群创光电股份有限公司 | Image display system |
CN101893977B (en) * | 2009-05-19 | 2012-07-25 | 北京京东方光电科技有限公司 | Touch screen, color film base plate and manufacture method thereof |
WO2010150446A1 (en) * | 2009-06-24 | 2010-12-29 | シャープ株式会社 | Thin film transistor, method for manufacturing same, active matrix substrate, display panel and display device |
KR101609830B1 (en) * | 2009-09-17 | 2016-04-20 | 엘지디스플레이 주식회사 | Transflective type liquid crystal display device |
TWI429999B (en) * | 2009-10-27 | 2014-03-11 | Innolux Corp | Liquid crystal display with embedded touch panel |
CN101706621B (en) * | 2009-12-01 | 2011-04-06 | 昆山龙腾光电有限公司 | Touch-control liquid crystal display panel and manufacturing method thereof as well as touch-control liquid crystal display device |
KR101753802B1 (en) * | 2010-09-20 | 2017-07-04 | 엘지디스플레이 주식회사 | Liquid crystal display device with a built-in touch screen and method for manufacturing the same |
CN102005389A (en) * | 2010-10-15 | 2011-04-06 | 信利半导体有限公司 | Method for reducing leakage rate of back channel etch type TFT |
KR20120077563A (en) * | 2010-12-30 | 2012-07-10 | 엘지디스플레이 주식회사 | Array substrate and manufacturing method for array substrate |
KR101906974B1 (en) * | 2011-04-25 | 2018-10-12 | 삼성전자주식회사 | Light sensing apparatus and method of driving the light sensing apparatus |
CN202177761U (en) * | 2011-05-23 | 2012-03-28 | 北京京东方光电科技有限公司 | Liquid crystal display panel and liquid crystal display device |
CN102629052B (en) * | 2011-05-23 | 2014-08-06 | 北京京东方光电科技有限公司 | Liquid crystal display panel, driving method of liquid crystal display panel and liquid crystal display device |
TWI502455B (en) * | 2012-11-02 | 2015-10-01 | Innocom Tech Shenzhen Co Ltd | Touch display panel and touch display device using the same |
KR102141459B1 (en) * | 2013-03-22 | 2020-08-05 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Liquid crystal display device |
CN103207490B (en) * | 2013-03-28 | 2015-10-14 | 北京京东方光电科技有限公司 | A kind of array base palte and manufacture method thereof and display device |
US9235285B2 (en) * | 2013-05-13 | 2016-01-12 | Himax Technologies Limited | Pixel matrix, touch display device and drving method thereof |
CN203433241U (en) * | 2013-07-16 | 2014-02-12 | 信利半导体有限公司 | Liquid crystal display panel and liquid crystal display device |
TWI499952B (en) * | 2013-08-08 | 2015-09-11 | Innolux Corp | Array substrate and display panel using the same |
TWI526893B (en) * | 2013-11-05 | 2016-03-21 | 群創光電股份有限公司 | Touch display device |
CN104635988A (en) * | 2015-02-10 | 2015-05-20 | 京东方科技集团股份有限公司 | Touch substrate and manufacturing of touch substrate, touch display panel and display device |
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