TW201637066A - Plasma processing apparatus and plasma processing method - Google Patents

Abstract

To control temperature of a sample in plasma processing with high accuracy while securing an electrostatic chucking force without breakdown of an electrostatic chucking film. When radio-frequency power is time modulated, a high-voltage side Vpp detector detects a first voltage value which is a peak-to-peak voltage value of a radio-frequency voltage applied to a sample stage in a first period of the time modulation having a first amplitude. A low-voltage side Vpp detector detects a second voltage value which is a peak-to-peak voltage value of a radio-frequency voltage applied to the sample stage in a second period having a second amplitude smaller than the first amplitude. Then, an ESC power supply control unit controls output voltages from ESC power supplies based on the first voltage value, the second voltage value and a duty ratio of the time modulation.

Description

Plasma processing device and plasma processing method

The present invention relates to a plasma processing apparatus and a plasma processing method, and more particularly to a technique for effectively suppressing damage to an electrode of a plasma processing apparatus due to an increase in plasma potential.

In a plasma processing apparatus such as a plasma etching apparatus, as a technique for maintaining the temperature of a semiconductor wafer with high precision, a structure in which a semiconductor wafer is electrostatically adsorbed and a helium gas is flowed between the semiconductor wafer and the electrode is widely used. .

As the electrostatic adsorption method, for example, two types of monopoles and dipoles are mainly used. In the unipolar mode, an electrostatic adsorption voltage is applied to one electrode, and in the bipolar mode, two or more electrodes are provided, and electrostatic adsorption voltages having different polarities are applied.

Electrostatic adsorption is carried out by providing a DC voltage between a counter electrode and a semiconductor wafer via a thin insulating film formed on a ceramic or the like. In addition, a high voltage is applied to the semiconductor wafer to accelerate the incident of ions from the plasma.

Patent Document 1 discloses that a high-frequency voltage applied to an electrode is monitored, and an output voltage of a power source for electrostatic adsorption (ESC: Electro Static Chuck) is controlled according to a monitored high-frequency voltage signal, thereby applying a voltage required for electrostatic adsorption. Keep at the desired value.

Further, Patent Document 2 discloses that a high-frequency voltage applied to a semiconductor wafer is a voltage in which two types of high voltage and low voltage are alternately applied, and a high power time ratio (TM duty ratio) and a reverse frequency are set to be etched. Patent Document 2 discloses that, at this time, the peak value of the high-frequency bias applied to the wafer to be monitored is a stable value of the value at the time of high power.

Further, Patent Document 3 discloses a technique for controlling an output voltage of a power source for electrostatic adsorption in a case where a high-frequency bias that is not time-modulated is applied to an electrode in a plasma processing apparatus.

[Previous Technical Literature] [Patent Document]

[Patent Document 1] Japanese Patent Laid-Open Publication No. 2006-210726

[Patent Document 2] Japanese Patent Laid-Open Publication No. 2013-12624

[Patent Document 3] Japanese Patent Laid-Open Publication No. 2010-10236

In the following, the etching technique of the above-mentioned Patent Document 2, that is, the high-voltage voltage of the high voltage and the low voltage, is applied, and the control method of the direct current for electrostatic adsorption described in Patent Document 1 is used. Method to apply a wafer bias of 2.5kV or more.

Under these conditions, when the duty ratio (Duty) is 40% or less and 60% or more, the frequency of the temporal change of the back pressure of the semiconductor wafer becomes large. As a result, there is a fear that the electrostatic adsorption force is lowered and the voltage of the electrostatic adsorption film is broken.

Further, the technique in the prior art described above utilizes a CW (continuous wave) bias for plasma etching, but does not consider a technique using TM (Time Modulation) bias.

An object of the present invention is to provide a technique capable of controlling the temperature of a sample during plasma processing with high precision while ensuring electrostatic adsorption force without damaging the electrostatic adsorption film.

The above and other objects and novel features of the present invention will be apparent from the description and appended claims.

In the invention disclosed in the present invention, a brief description of a representative outline is as follows.

That is, the representative plasma processing includes a processing chamber, a first high-frequency power source, a sample stage, a first DC power source, a second DC power source, a second high-frequency power source, a voltage detecting unit, and a power source control unit.

The processing chamber is subjected to plasma treatment. The first high-frequency power source supplies high-frequency power that generates plasma in the processing chamber.

The sample stage includes a first electrode and a second electrode that are electrostatically adsorbed on the electrostatic adsorption film and electrostatically adsorb the sample on the electrostatic adsorption film, and the sample is loaded. Set. The first DC power source applies a first DC voltage to the first electrode. The second DC power source applies a second DC voltage to the second electrode.

The second high frequency power supply supplies high frequency power to the sample stage. The voltage detecting unit detects the first voltage value and the second voltage value from the high frequency power applied to the sample stage. The power supply control unit controls the set voltages of the first DC power source and the second DC power source.

The first voltage value detected by the voltage detecting unit is a high-frequency power applied to the sample stage during the first period in which the first amplitude is modulated in time when the high-frequency power supplied to the sample stage is time-modulated. Peak voltage value.

The second voltage value detected by the voltage detecting unit is a peak-to-peak voltage value of the high-frequency power applied to the sample stage in the second period in which the second amplitude is smaller than the first amplitude.

Further, the power source control unit obtains a time average value of the peak-to-peak voltage value of the high-frequency voltage applied to the sample stage based on the first voltage value, the second voltage value, and the duty ratio of the time modulation, and uses the obtained time. The average value and the voltage at which the sample is electrostatically adsorbed to the electrostatic adsorption film, that is, the potential difference between both ends of the electrostatic adsorption film, that is, the electrostatic adsorption voltage, the first DC voltage and the second DC voltage are obtained, and the first DC power source is controlled. And the second DC power source outputs the obtained first DC voltage and second DC voltage, respectively.

In particular, the power supply control unit determines whether or not a voltage exceeding the upper limit of the insulation withstand voltage of the electrostatic adsorption film is applied to the electrostatic adsorption film, and if it is determined that the upper limit of the insulation withstand voltage is exceeded, the determination is made earlier than the predetermined setting. If the number of times threshold is too large, a warning to replace the electrostatic adsorption film is output.

In the invention disclosed in the present invention, the effect obtained by a representative person will be briefly described as follows.

High quality plasma processing is possible.

100‧‧‧Processed sample setting department

101‧‧‧Parts Department

102‧‧‧Electrostatic adsorption film

103A‧‧‧ESC electrode

103B‧‧‧ESC electrode

104‧‧‧Processed samples

105A‧‧‧ESC power supply

105B‧‧‧ESC power supply

106A‧‧‧low-domain pass filter

106B‧‧‧low-domain pass filter

107‧‧‧ Plasma

108‧‧‧High voltage side Vpp detector

109‧‧‧Low voltage side Vpp detector

110‧‧‧Pressure Integrator

111‧‧‧High frequency integrator

112‧‧‧High frequency power supply

113‧‧‧Refrigerant access

114‧‧‧氦Supply Department

115‧‧‧ Etching Control Department

116‧‧‧ESC Power Control Department

Fig. 1 is a schematic explanatory view showing an example of a configuration of a main part in a plasma processing apparatus using a bipolar electrode according to an embodiment.

[Fig. 2] When the inventors have examined the use of the bias voltage applied to the high-power side of the ESC electrode, that is, the monitoring value of the high-frequency voltage, it is difficult to perform various parts of the plasma processing apparatus for temperature control of the semiconductor wafer. An example of a signal is a timing diagram.

[Fig. 3] When the inventors of the present invention have used only the bias value applied to the high-power side of the ESC electrode, that is, the monitoring value of the high-frequency voltage, the portions of the plasma processing apparatus in which the electrostatic adsorption film is broken by insulation are present. An example of a signal is a timing diagram.

Fig. 4 is a timing chart showing an example of signal timing of each portion in the plasma processing apparatus of Fig. 1.

Fig. 5 is a flow chart showing an example of a control operation in an etching process performed by an ESC power supply control unit included in the plasma processing apparatus of Fig. 1.

[Fig. 6] Plasma treatment using a monopolar mode electrode according to an embodiment A schematic illustration of an example of a main part in the apparatus.

Fig. 7 is a schematic cross-sectional schematic view showing a plasma processing apparatus according to an embodiment.

In the following embodiments, for convenience, if necessary, the description will be divided into a plurality of chapters or embodiments. However, unless otherwise specified, they are not related to each other, but are one of the other. The relationship between some or all of the modifications, details, and supplementary explanations.

In addition, in the following embodiments, when the number of elements, etc. (including the number, the numerical value, the quantity, the range, etc.) is mentioned, except the case where it is especially specified, and the principle is obviously limited to a specific number, etc., It is not limited to the specific number, and may be a specific number or more.

Further, in the following embodiments, the constituent elements (including the element steps and the like) are not necessarily essential except for the case where they are specifically described and the case where it is clearly considered necessary.

Similarly, in the following embodiments, when the shape, the positional relationship, and the like of the constituent elements and the like are mentioned, it is substantially intended to include an approximation or the like, except where it is specifically stated and the principle is obviously not considered to be the case. Such as the shape and the like. This fact is also true for the above values and ranges.

In the drawings, the same components are denoted by the same reference numerals, and the description thereof will not be repeated. In addition, in order to easily understand the picture, even the top view will sometimes be shaded. line.

Hereinafter, the embodiment will be described in detail.

<Configuration Example of Plasma Processing Apparatus>

Fig. 1 is a schematic explanatory view showing an example of a configuration of a main part in a plasma processing apparatus as shown in Fig. 7 of the embodiment. In FIG. 1, the sample preparation unit 100 included in the plasma processing apparatus and each circuit unit connected to the sample preparation unit 100 are disclosed.

As shown in FIG. 1, the plasma processing apparatus is provided with a sample preparation unit 100 which is a sample stage. The processed sample setting unit 100 is provided in a processing chamber (not shown) in which a sample to be processed 104 such as a semiconductor wafer or the like is subjected to plasma treatment.

The processed sample setting unit 100 includes a base portion 101, an electrostatic adsorption film 102, and ESC electrodes 103A and 103B. The electrostatic adsorption film 102 is placed on the upper portion of the base portion 101 to which high-frequency power is applied. The electrostatic adsorption film 102 is formed, for example, by ceramics or the like. Further, ESC electrodes 103A and 103B are embedded in the electrostatic adsorption film 102, respectively.

The ESC electrode 103A as the first electrode is disposed on the right side of FIG. 1, and the ESC electrode 103B as the second electrode is disposed on the left side thereof, and an example of the bipolar electromagnetic adsorption portion is disclosed in FIG. The sample to be processed 104 is placed on the electrostatic adsorption film 102. As described above, the sample to be processed 104 is a semiconductor wafer or the like.

The ESC electrode 103A is connected to one of the low-pass filter 106A, and is connected to the other of the low-pass filter 106A. The ESC power supply 105A. The ESC electrode 103B is connected to one of the low-pass filter 106B, and the other of the low-pass filter 106B is connected to the ESC power supply 105B. These low-domain pass filters 106A, 106B, so-called low pass filters (LPF: Low Pass Filter).

The ESC power source 105A, which is the first DC power source, supplies a DC voltage to the ESC electrode 103A through the low-pass filter 106A. The ESC power source 105B, which is the second DC power source, supplies a DC voltage to the ESC electrode 103B through the low-pass filter 106B.

In the ESC electrodes 103A and 103B, DC voltages having different polarities are supplied, and in the state without the plasma 107, the sample 104 is electrostatically adsorbed by the potential difference of the DC voltage applied to each of the ESC electrodes 103A and 103B. The electrode for electrostatic adsorption of the electrostatic adsorption film 102.

Further, a high frequency integrator 111 is connected to the base portion 101. A high frequency power source 112 is connected to the high frequency integrator 111. The high frequency integrator 111 is composed of a high voltage side Vpp detector 108, a low voltage side Vpp detector 109, and a bias integrator 110 which will be described later. The bias integrator 110 performs bias integration of the high frequency power output from the high frequency power source 112.

The ESC power supply control unit 116, which is the power supply control unit, sets the output voltage output from the ESC power supply 105A, 105B based on the detection results of the high voltage side Vpp detector 108 and the low voltage side Vpp detector 109 of the high frequency integrator 111. value.

In addition, by means of a Vpp detector (for example only for high voltage The side Vpp detector 108) sets the timing of High/Low, and can also set the output voltage output from the ESC power sources 105A, 105B according to the Vpp detection result made by the 1 system.

Further, in the base material portion 101, high-frequency power from the high-frequency power source 112 is applied through the biasing integrator 110 as bias power. The high-frequency power source 112 is, for example, a power source having a frequency of 4 MHz and outputting about 1 kW to 7.5 kW.

The high-frequency power source 112, as the TM mode, is output in a range of about 5 to 95% of the TM duty ratio (TM Duty) and a TM frequency of about 0.1 to 5 kHz. At this time, the TM operation ratio is a ratio of a period of high bias power with respect to one cycle.

The TM mode, in other words, the TM bias voltage, is a high-frequency power (bias) of two types of high-voltage and low-voltage applied to the high-frequency voltage applied to the sample 104, and the time ratio of the high-frequency power is set ( TM work ratio) and repeated frequency for plasma etching.

Further, a plurality of refrigerant passages 113, that is, a passage through which the refrigerant flows, are formed inside the base portion 101. The temperature-controlled refrigerant flows through the refrigerant passage 113, whereby the temperature of the base portion 101 is controlled.

Further, between the sample to be processed 104 and the electrostatic adsorption film 102, the crucible is supplied by the crucible supply unit 114 at a constant pressure. Thereby, heat conduction between the processed sample 104 and the electrostatic adsorption film 102 is improved. An etching control unit 115 is connected to the high-frequency power source 112, and the high-frequency power source 112 is controlled by the etching control unit 115.

<The problem of voltage control using only the high-frequency voltage Vpp_H>

Here, a technique for controlling the output voltage of the conventional ESC power supply will be described.

In the prior art, only the bias value of the high-frequency voltage Vpp_H applied to the high-power side of the ESC electrode, that is, the output voltage of the two ESC power supplies (V _A , V _{B ) is} determined according to the following equation. ), and automatically control the high frequency voltage Vpp value depending on conditions.

[Number 1] Output of ESC power supply A V _A =V _ESC /2-Vpp_H*R ₁ ········· (1) Output of ESC power supply B V _B --(V _ESC /2+Vpp_H *R ₁ )·····(Form 2)

Here, V _ESC is the difference between the output voltage values of the two ESC power sources 105A, 105B set in the etching process recipe. R ₁ is the Vdc/Vpp ratio set in the process recipe. According to the measured results, when it is continuous output (that is, the TM work ratio is 100%), it is usually set to the range of 0.3-0.45.

Further, the potential Vw on the actual semiconductor wafer is calculated according to Equation 3.

[Number 2] The potential on the actual semiconductor wafer Vw = (V _A + V _B ) / 2 = -Vpp_H * R ₁ · (3)

2 and 3 are signal timing diagrams of respective portions of the plasma processing apparatus when only the bias value applied to the high-power side of the ESC electrode, that is, the monitoring value of the high-frequency voltage Vpp_H, is used.

In FIG. 2, from the top to the bottom, a high-frequency waveform 201 of high Vpp, a high-frequency waveform 202 of low Vpp, an applied voltage 203 to the ESC electrode A, an applied voltage 205 to the ESC electrode B, and an actual semiconductor wafer are respectively disclosed. The potential difference 204 and the potential difference 206, 207 between the upper potential 204 and the ESC electrodes A, B and the sample to be processed.

Similarly, in FIG. 3, from the top to the bottom, a high Vpp waveform, that is, a high frequency waveform 301, a low Vpp waveform, that is, a high frequency waveform 302, an applied voltage 303 to the ESC electrode A, and an applied voltage to the ESC electrode B are respectively disclosed. 305. The potential difference 304 on the actual semiconductor wafer, and the potential difference 306, 307 between the two ESC electrodes A, B and the sample to be processed.

Further, the measurement condition is that the withstand voltage (V _d ) of the electrostatic adsorption film is 3000 V, and among the etching set values, it is a 2-level TM condition of a high output of 4 kW, a low output of 200 W, a TM operation ratio of 40%, and a TM frequency of 1 kHz, and R ₁ = 0.4, and the set value of the adsorption voltage is V _ESC = 3000V.

Here, the case where the output voltages of the ESC electrodes A and B are controlled only by the monitoring voltage of Vpp_H on the high power side is considered.

In this case, as shown in Fig. 2, if the difference between the Vpp value at the time of high output and low output is 2.5 kV or more, the potential difference 206 between the ESC electrode A and the sample to be processed at the time of low output becomes the minimum necessary. The adsorption voltage 208 (for example, about 1 kV) is still small. As a result, semiconductor Wafer temperature control can become difficult.

Further, when the case 3 Wisdom exceeds 3333V Vpp level under the other etching conditions, the potential between the workpiece and the ESC electrode B 307 sample difference, becomes larger than the electrostatic adsorption insulating film withstand voltage V _d is larger, The problem of insulation damage of the electrostatic adsorption film may occur.

<Composition of problem solving points>

As described above, the plasma processing apparatus shown in FIG. 1 is configured such that the high-frequency integrator 111 includes the high-voltage side Vpp detector 108 and the low-voltage side Vpp detector 109. Further, the ESC power supply control unit 116 determines the output values of the ESC power supplies 105A and 105B using the detected values detected from the high voltage side Vpp detector 108 and the low voltage side Vpp detector 109.

The high-voltage side Vpp detector 108 as the voltage detecting portion detects the trigger signal on the high voltage side based on the trigger signal corresponding to the TM frequency and the TM operation ratio output from the etching control unit 115 or the high-frequency power source 112. The timing detection Vpp_H is output to the ESC power supply control unit 116.

Further, the low-voltage side Vpp detector 109, which is similarly used as the voltage detecting portion, is based on the TM signal corresponding to the TM frequency and the TM operating ratio output from the etching control unit 115 or the high-frequency power source 112, and will be on the low voltage side. The bias voltage detected by the timing is also the high frequency voltage Vpp_L, and is output to the ESC power supply control unit 116.

Then, the ESC power source control unit 116 calculates a time-averaged high-frequency voltage from Equation 4 below.

At this point D is the TM duty ratio of the TM bias. The output voltages V _A and V _{B of the} ESC power supplies 105A and 105B are calculated according to Equations 5 and 6.

In the present embodiment, when the normal TM bias is not the 2-position TM, the Vpp_L=0 (that is, the low output power is 0 W) may be substituted for the equations 5 and 6,

[Equation 5] V _A =V _ESC /2-Vpp_H*D*R ₁ ········· (Expression 7) V _B =-(V _ESC /2+Vpp_H*D*R ₁ )·· ·······(Expression ₈ )

These two equations control the ESC power supplies 105A, 105B.

Explain the Vpp voltage waveform and the output of the ESC power supply at this time. The voltage and the signal timing of the potential difference between the ESC electrodes 103A and 103B and the sample 104 to be processed.

<Example of Signal Timing of Plasma Processing Apparatus>

Fig. 4 is a schematic timing chart showing an example of signal timing of each part in the plasma processing apparatus of Fig. 1.

In FIG. 4, the high-frequency waveform 401 of the high Vpp waveform and the high-frequency waveform 402 of the low Vpp waveform, the applied voltage 403 to the ESC electrode A, the potential 404 on the actual semiconductor wafer, and the pair are respectively disclosed from the top to the bottom. The applied voltage 405 of the ESC electrode B and the potential difference 411, 412 between the ESC electrodes A, B and the sample to be processed.

In the case of the plasma processing apparatus of Fig. 1, the ESC power supply control unit 116 calculates the time average value 406 of the potential on the processed sample 104 at the time of high output and low output by Equation 4, and controls the ESC power supply based on the value. The output voltage 407 of 105A and the output voltage 408 of the ESC power supply 105B. Here, the high output is the first period, and the low output is the second period.

By this control, the potential difference 409 between the ESC electrode 103A and the sample to be processed 104 can be shifted in the direction in which the adsorption force is increased. Further, the insulation withstand voltage on the voltage difference V _B side between the ESC electrode 103B at the low voltage and the sample to be processed 104 can be controlled to be equal to or lower than the insulation withstand voltage 412 of the electrostatic adsorption film.

In this way, the control formulas shown in Equations 5 to 8 can be set to the TM bias of the process recipe with respect to the conventional calculation. The ratio is automatically incorporated as the average value of Vpp, and the area where the adsorption force can be secured and the destruction of the electrostatic adsorption film 102 can be avoided can be broadened.

In the region where the adsorption force and the insulation withstand voltage can be ensured, in the TM bias voltage composed of high Vpp and low Vpp, the larger the difference between Vpp_H and Vpp_L, the narrower.

<Example of Control Operation of ESC Power Supply Control Unit Included in Plasma Processing Apparatus>

Fig. 5 is a flow chart showing an example of a control operation in an etching process performed by the ESC power source control unit 116 included in the plasma processing apparatus of Fig. 1.

First, when the processed sample 104 is placed on the processed sample setting unit 100, microwaves are supplied to the processing chamber, and helium gas is supplied to the processing chamber by the helium supply unit 114. Then, the pressure in the processing chamber is controlled to a predetermined pressure, and the interaction between the microwaves supplied to the processing chamber and the static magnetic field generated by the solenoid coil (not shown) causes a high density in the processing chamber. Shown plasma 107.

When the etching is started (step S501), the etching control unit 115 determines that the output mode of the high-frequency power source 112 described in the etching process recipe is the TM bias or the CW (continuous wave) bias (step S502), and determines the result. The resulting mode is output (steps S503, S504).

During the plasma ignition and the high-frequency power supply 112 outputs the etching process according to the set value, the monitoring values Vpp_H and Vpp_L detected by the high-voltage Vpp detector 108 and the low-voltage Vpp detector 109 are input to the ESC. The power source control unit 116 (step S505).

Next, the ESC power supplies 105A and 105B are controlled to output voltages corresponding to the output voltages V _A and V _B calculated based on the above Equations 5 and 6 (step S506). Then, the following values are determined for the values of the calculated output voltages V _A and V _B (step S507).

[Equation 6] V _d >|(V _A )+Vpp_H*R ₂ H|········ (Equation 9) V _d >|(V _B )+Vpp_H*R ₂ H|··· ······ (Expression 10) V _d >|(V _A )+Vpp_L*R ₂ L|········· (Expression 11) V _d >|(V _B )+Vpp_L*R ₂ L|··········(Expression 12)

Here, V _d is the upper limit threshold (V) of the withstand voltage of the electrostatic adsorption film, R ₂ H is the actual Vdc/Vpp ratio at the time of high output, and R ₂ L is the Vdc/Vpp ratio at the time of low output.

Formula 9 shows the potential difference between the + side electrode, that is, the ESC electrode 103A and the sample to be processed 104, at the time of high output. Formula 10 shows the potential difference between the -side electrode, that is, the ESC electrode 103B and the sample to be processed 104 at the time of high output.

Equation 11 shows the potential difference between the + side electrode, that is, the ESC electrode 103A and the sample to be processed 104, at the time of low output. Formula 12 shows the potential difference between the -side electrode, that is, the ESC electrode 103B and the sample to be processed 104 at the time of low output.

The ESC power supply control unit 116 continues the etching process if the respective voltages are smaller than the breakdown voltage upper limit threshold of the electrostatic adsorption film (step S512), and if it is equal to or higher, a warning is generated to increase the warning counter by +1. (Step S508).

Then, when the number of times exceeding the upper limit of the withstand voltage of the electrostatic adsorption film exceeds the threshold number set in advance (step S509), a warning to replace the ESC electrode is output (step S510).

When the warning to replace the ESC electrode is output, after the etching process is completed, the replacement of the ESC electrode is performed (step S511). Here, the number of times threshold value is stored, for example, in a memory (not shown) included in the ESC power source control unit 116.

In Equations 9 to 12, R ₂ H and R ₂ L are functions corresponding to the Vpp voltage at the time of high output and low output. Ideally, it is experimentally measured beforehand, and its database is used, but it can also be used as a process recipe. Set value R ₁ and so on.

In the case where the non-2-position is the normal TM bias at this time, R _{2 of} Formulas 9 to 12 can be regarded as almost 0, and can be used singly as follows.

[Equation 7] V _d >|(V _A )+Vpp_H*R ₁ |········· (Expression 13) V _d >|(V _B )+Vpp_H*R ₁ |······ ····(Expression 14) V _d >|(V _A )|········ (Expression 15) V _d >|(V _B )|········· 16)

<Example 1>

For example, it is assumed that an ESC electrode having a threshold value of V _d = 3000 V is used, and a process recipe setting value of V _ESC = 3000 V, R ₁ = 0.45, and D = 80% is monitored, and Vpp_H = 4000 V and Vpp_L = 0 V are monitored.

In case of ESC at high voltage, ECS(+) becomes 60V according to Equation 7, and ECS(-) becomes -2900V according to Equation 8, and becomes -1800V according to Equation 3 at CW at high voltage of TM bias, at high voltage the ESC electrodes and the voltage between the material to be processed again become | 1860 / 1140V |, according to formula 9, formula 10, the ESC electrodes at low voltage and the voltage between the material to be processed again become | 60 / 2940V |, is below a threshold value V _d, Therefore, there is no use restriction error, that is, the pressure resistance of the electrostatic adsorption film is not caused.

However, when Vpp=5000V, the voltage between the ESC electrode and the sample to be processed at a high voltage becomes |1950/1050V|, and the voltage between the ESC electrode and the sample to be processed at a low voltage according to Equations 9 and 10 Become |300/3300V|. Therefore, when the low voltage would exceed - the upper threshold of the ESC electrodes V _d of the side, it will cause the use of limit errors.

Further, in the present embodiment, an example in which Vpp_L is also detected and controlled is disclosed, but in the case where the low-output side Vpp detector 109 is not attached, Vpp_L=0 is substituted in Equations 5 and 6,

[Equation 8] V _A =V _ESC /2-Vpp*D*R ₁ ········· (Expression 17) V _B =-(V _ESC /2+Vpp*D*R ₁ )·· ······· (Expression 18) Here, Vpp=Vpp_H

In the two types, the ESC power sources 105A, B are controlled, whereby sufficient adsorption force can be maintained while avoiding damage of the electrostatic adsorption film 102.

<Example 2>

Further, the form of the first embodiment described above is an example of a bipolar electrode, but it can also be applied to a monopolar electrode. Fig. 6 is a schematic explanatory view showing another example of the configuration of a main part in the plasma processing apparatus of Fig. 1.

In FIG. 6, the processed sample setting unit 600 has a base portion 601, an electrostatic adsorption film 602, and an ESC electrode 603. The electrostatic adsorption film 602 is placed on the upper portion of the base portion 601 to which high-frequency power is applied.

The electrostatic adsorption film 602 is formed, for example, by ceramics or the like. Further, an ESC electrode 603 is embedded in each of the electrostatic adsorption films 602. A low-pass filter 606 is connected to the ESC electrode 603, and an ESC power supply 605 is connected to the low-pass filter 606.

The ESC power source 605, which is a DC power source, supplies a DC voltage to the ESC electrode 603 through the low-pass filter 606.

Further, a high frequency integrator 610 is connected to the base portion 601. A high frequency power supply 611 is connected to the high frequency integrator 610. The high frequency integrator 610 is composed of a Vpp detector 608 and a bias integrator 609. The bias integrator 609 performs bias integration of the high frequency power output from the high frequency power supply 611.

The power supply control unit, that is, the ESC power supply control unit 615 sets the output voltage value output from the ESC power supply 605 based on the detection result by the Vpp detector 608 of the high-frequency integrator 610. Although the output V of the ESC power supply can be calculated by using Equation 7, the set value of the adsorption voltage of the unipolar mode electrode is unipolar. Therefore, the V _ESC value is not equally divided into two. That is to say, it can be calculated according to Equation 19.

[Equation 9] V _A =-(V _ESC +Vpp_H*D*R ₁ )·········· (Equation 19)

Next, the ESC power source 605 is controlled to output a voltage equivalent to V _A calculated according to the above Equation 19. Then, the following determination is made for the calculated V _A value.

[Equation 10] V _d >|(V _A )+Vpp_H*R ₂ H|········· (Expression 20) V _d >|(V _A )+Vpp_L*R ₂ L|··· ······(Form 21)

Here, V _d is the upper limit threshold (V) of the withstand voltage of the electrostatic adsorption film, R ₂ H is the actual Vdc/Vpp ratio at the time of high output, and R ₂ L is the Vdc/Vpp ratio at the time of low output.

Formula 20 shows the potential difference between the ESC electrode 603 and the sample to be processed 604 at the time of high output.

Equation 21 shows the potential difference between the ESC electrode 603 and the sample to be processed 604 at the time of low output.

In Equations 20 and 21, R ₂ H and R ₂ L are functions corresponding to the Vpp voltage at the time of high output and low output. It is desirable to use an experimental test beforehand and use it in a database, but it can also be used as a process recipe. Set value R ₁ and so on.

In the case where the non-2-position is the normal TM bias at this time, R _{2 of} Formula 20 and Formula 21 can be regarded as almost 0, and can be used singly as follows.

[Equation 11] V _d >|(V _A )+Vpp_H*R ₁ |········· (Expression 22) V _d >|(V _A )|·········· Equation 23)

For example, it is contemplated using the threshold value V _d = ESC electrodes of 1000V for _{V ESC = 500V, R 1 =} 0.45, D = 80% of the process recipe settings, monitor Vpp_H = 400V, Vpp_L = 0V of the case. In the ESC at high voltage, the ECS is -644V according to Equation 19, and is -180V at Equation 3 for CW at the high voltage of TM. ESC electrodes and the voltage between the sample to be processed at a low voltage becomes | 464V |, is below a threshold value V _d, and therefore do not cause the error limits, i.e., no adverse electrostatic adsorption film withstand voltage.

However, when Vpp=2500V, the voltage between the ESC electrode and the sample to be processed at a high voltage becomes |275V|, and the voltage between the ESC electrode and the sample to be processed at a low voltage becomes |1400V|. Therefore, the ESC electrodes would exceed the upper threshold when the low voltage value V _d, thus resulting in the use limit errors.

Further, the flowchart of an example of the control operation in the etching shown in FIG. 5 can be similarly applied.

As described above, it is possible to prevent the electrostatic adsorption film 602 from being broken. It is bad and ensures the electrostatic adsorption force of the sample while stably controlling the temperature of the sample in the plasma treatment. In this way, a plasma processing apparatus that performs high-quality plasma processing can be realized.

The invention developed by the inventors of the present invention has been specifically described above, but the present invention is not limited to the embodiments described above, and various modifications can be made without departing from the spirit and scope of the invention.

Further, the present invention is not limited to the above embodiment, and various modifications are also included. For example, the above-described embodiments are described in detail for the sake of brevity and clarity of the present invention, and are not necessarily limited to all those having the above description.

Further, a part of the configuration of one embodiment may be replaced with a configuration of another embodiment, and a configuration of another embodiment may be added to the configuration of a certain embodiment. Further, other configurations may be added, deleted, or replaced for a part of the configuration of each embodiment.

For example, in the case of the first embodiment, the initial value of V _A , the initial value of V _B , the potential difference between R ₁ and V _A and V _B are set as parameters in the process recipe, thereby achieving plasma Automatic tracking in processing.

Further, in the case of the second embodiment, the initial value of V _ESC , R ₁ , and the potential difference between both ends of the electrostatic adsorption film are set as parameters in the process recipe, whereby automatic tracking in the plasma processing can be achieved. .

100‧‧‧Processed sample setting department

101‧‧‧Parts Department

102‧‧‧Electrostatic adsorption film

103A‧‧‧ESC electrode

103B‧‧‧ESC electrode

104‧‧‧Processed samples

105A‧‧‧ESC power supply

105B‧‧‧ESC power supply

106A‧‧‧low-domain pass filter

106B‧‧‧low-domain pass filter

107‧‧‧ Plasma

108‧‧‧High voltage side Vpp detector

109‧‧‧Low voltage side Vpp detector

110‧‧‧Pressure Integrator

111‧‧‧High frequency integrator

112‧‧‧High frequency power supply

113‧‧‧Refrigerant access

114‧‧‧氦Supply Department

115‧‧‧ Etching Control Department

116‧‧‧ESC Power Control Department

Claims (11)

A plasma processing apparatus comprising: a processing chamber for plasma treatment of a sample; and a first high-frequency power source for supplying high-frequency power for generating plasma in the processing chamber; and a sample stage having a buried in an electrostatic adsorption film The sample is electrostatically adsorbed to the first electrode and the second electrode of the electrostatic adsorption film, and is placed on the sample; and the first DC power source applies a first DC voltage to the first electrode; and a second DC power source is used for the first 2 electrodes apply a second DC voltage; and a second high frequency power supply supplies high frequency power to the sample stage; and a voltage detecting unit detects the first voltage value and the second frequency by the high frequency power applied to the sample stage a voltage value; and a power supply control unit that controls a set voltage of the first DC power source and the second DC power source; and the first voltage value detected by the voltage detecting unit is that a high frequency power supplied to the sample stage is received In the time-modulation, the peak-to-peak voltage value of the high-frequency power applied to the sample stage in the first period in which the first amplitude is modulated by the first amplitude, and the second voltage value detected by the voltage detecting unit is In the Voltage applied between the peak value of the high frequency power stage of the sample is smaller than the amplitude of the first of the second period of the second amplitude modulation of the time, The power supply control unit obtains a time average value of the peak-to-peak voltage value of the high-frequency voltage applied to the sample stage based on the first voltage value, the second voltage value, and the operating ratio of the time modulation, and obtains a time average value of the peak-to-peak voltage value of the high-frequency voltage applied to the sample stage. The first time DC voltage and the second DC voltage are obtained by using the average value of the time and the voltage difference between the two ends of the electrostatic adsorption film, that is, the voltage difference between the two ends of the electrostatic adsorption film, that is, the voltage of the electrostatic adsorption film. And controlling the first DC power source and the second DC power source to respectively output the obtained first DC voltage and the second DC voltage. The plasma processing apparatus according to claim 1, wherein the power source control unit determines whether or not a voltage exceeding an upper limit of an insulation withstand voltage of the electrostatic adsorption film is applied to the electrostatic adsorption film, and if it is determined to be excessive When the number of times of the upper limit of the insulation withstand voltage is larger than the threshold number of determination times set in advance, a warning for replacing the electrostatic adsorption film is output. The plasma processing apparatus according to claim 2, wherein the power source control unit is configured to receive the first DC voltage output from the first DC power source and the second DC voltage output from the second DC power source. Calculating a potential difference between the first electrode and the sample and a potential difference between the second electrode and the sample, and when the calculated potential difference is larger than a predetermined upper limit voltage threshold of the electrostatic adsorption film set in advance It is determined that a voltage exceeding the upper limit of the insulation withstand voltage of the electrostatic adsorption film is applied to the electrostatic adsorption film. A plasma processing apparatus comprising: a processing chamber for supplying a sample to a plasma treatment; and a first high-frequency power source for supplying a first high-frequency power for generating plasma in the processing chamber; and a sample stage having a buried portion The electrostatic adsorption film causes the sample to be electrostatically adsorbed to the electrode of the electrostatic adsorption film to be placed on the sample, and a DC power source to apply a DC voltage to the electrode; and a second high-frequency power source to supply the second high-frequency power to the sample stage. And a power supply control unit that controls a set voltage of the DC power source, wherein the power supply control unit adjusts a voltage of the sample electrostatically adsorbed to the electrostatic adsorption film when the second high frequency power is time-modulated a potential difference between both ends of the electrostatic adsorption film, that is, a voltage for electrostatic adsorption, and a high-frequency voltage applied to the sample stage in a first period in which the amplitude is larger than a second period in which the time is modulated. The peak-to-peak voltage value and the operating ratio of the time modulation described above are used to obtain the DC voltage, and the DC power source is controlled to output the obtained DC. Voltage. The plasma processing apparatus according to claim 4, wherein the DC voltage obtained is obtained in advance before the sample is subjected to plasma treatment, and the plasma treatment is performed under the conditions of the plasma treatment. The aforementioned DC voltage obtained in advance is set in the condition. A plasma processing apparatus according to claim 4, wherein The DC voltage obtained as described above is sequentially obtained in the plasma processing, and the power source control unit controls the DC power source to output the DC voltage that is sequentially obtained. A plasma processing method is a plasma processing method in which a sample placed on a sample stage provided in a processing chamber is exposed to a plasma while being subjected to high-frequency power to perform etching of the sample, and is applied to the plasma processing method. The high-frequency power of the sample stage detects the aforementioned time in the first period when the first period having the first amplitude and the second period having the second amplitude smaller than the first amplitude are time-modulated The peak-to-peak voltage value of the high-frequency power, that is, the first voltage value and the second voltage value of the peak-to-peak voltage value of the high-frequency power in the second period, and based on the detected first voltage value and The second voltage value and the duty ratio of the time modulation change a voltage applied to the first electrode and the second electrode that electrostatically adsorb the sample placed on the sample stage. The plasma processing method according to claim 7, wherein the control of the voltage applied to the first electrode and the second electrode is performed by the detected first voltage value and the second voltage value. Calculating a time average value of the potential applied to the sample, and controlling the voltage in accordance with the calculated time average value so as to be lower than the breakdown voltage upper limit voltage of the electrostatic adsorption film embedded in the first electrode and the second electrode, and allowing the aforementioned The electrostatic adsorption force of the sample becomes large. The plasma processing method of claim 7, wherein The parameters set in the plasma processing conditions of the standard etching conditions include an initial value of a voltage applied to the first electrode, an initial value of a voltage applied to the second electrode, and an initial value applied to the sample stage. The ratio of the peak-to-peak voltage value of the high-frequency voltage to the self-bias of the sample stage, and the potential difference between the voltage applied to the first electrode and the voltage applied to the second electrode. The plasma processing method according to claim 7, wherein it is determined whether or not a voltage exceeding an upper limit of an insulation withstand voltage of the electrostatic adsorption film embedded in the first electrode and the second electrode is applied to the electrostatic adsorption film. When it is determined that the number of times exceeding the upper limit of the insulation withstand voltage exceeds the threshold number of determination times set in advance, a warning to replace the electrostatic adsorption film is output. The plasma processing method according to claim 10, wherein the determination of the voltage exceeding the upper limit of the insulation withstand voltage of the electrostatic adsorption film is based on the first electrode and the second electrode, respectively The applied voltage calculates the potential difference between the first electrode and the sample and the potential difference between the second electrode and the sample, and the calculated potential difference is larger than the upper limit voltage threshold of the electrostatic adsorption film set in advance. In the case, it is determined that a voltage exceeding the upper limit of the insulation withstand voltage of the electrostatic adsorption film is applied to the electrostatic adsorption film.