TW201633516A - Semiconductor device and method for manufacturing same - Google Patents

Semiconductor device and method for manufacturing same Download PDF

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Publication number
TW201633516A
TW201633516A TW104141275A TW104141275A TW201633516A TW 201633516 A TW201633516 A TW 201633516A TW 104141275 A TW104141275 A TW 104141275A TW 104141275 A TW104141275 A TW 104141275A TW 201633516 A TW201633516 A TW 201633516A
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semiconductor device
substrate
transparent member
transparent
semiconductor element
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TW104141275A
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Chinese (zh)
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Shinichi Massaki
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Aoi Electronics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Light Receiving Elements (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

This semiconductor device is provided with: a substrate which is provided with a terminal on the upper surface; a semiconductor element which is arranged on the upper surface of the substrate and has an electrode that is electrically connected to the terminal of the substrate; a transparent member which is obtained by integrally forming a transparent flat plate that covers the upper part of the semiconductor element with a plurality of leg parts for providing a predetermined gap between the flat plate and the upper surface of the substrate; and a sealing member which is arranged so as to surround the semiconductor element between the upper surface of the substrate and the lower surface of the transparent member, said lower surface facing the upper surface of the substrate.

Description

半導體裝置及其製造方法 Semiconductor device and method of manufacturing same

本發明係關於一種藉由密封構件將半導體元件加以密封之半導體裝置及其製造方法。 The present invention relates to a semiconductor device in which a semiconductor element is sealed by a sealing member and a method of manufacturing the same.

具有光學感測器等機能區域之半導體裝置中,已知有將半導體元件搭載於基板上,在半導體元件之上部設置空隙並以蓋體加以覆蓋,在蓋體與基板之間填充非導電性樹脂者(參照專利文獻1)。 In a semiconductor device having a functional region such as an optical sensor, it is known that a semiconductor element is mounted on a substrate, a space is provided in an upper portion of the semiconductor element, and a cover is covered, and a non-conductive resin is filled between the cover and the substrate. (refer to Patent Document 1).

專利文獻1:日本特開2006-278726號公報 Patent Document 1: Japanese Laid-Open Patent Publication No. 2006-278726

在專利文獻1記載之發明,覆蓋半導體元件之上部之蓋體係由保持具與鏡筒等複數個構件構成,因此成本較高。 According to the invention described in Patent Document 1, since the cover system covering the upper portion of the semiconductor element is composed of a plurality of members such as a holder and a lens barrel, the cost is high.

本發明第1形態之半導體裝置,具備:基板,在上面設有端子;半導體元件,配置在基板上面,具有電性連接於基板之端子之電極;透明構件,由覆蓋半導體元件之上部之透明平板、與用以在平板與基板上面之間設置既定空隙之複數個腳部一體形成;以及密封構件,在基板上面與和基板上面對向之透明構件下面之間,圍繞半導體元件之周圍設置。 A semiconductor device according to a first aspect of the present invention includes: a substrate having a terminal provided thereon; a semiconductor element disposed on the upper surface of the substrate and having an electrode electrically connected to a terminal of the substrate; and a transparent member covered by a transparent plate covering the upper portion of the semiconductor element And a plurality of legs for forming a predetermined gap between the flat plate and the upper surface of the substrate; and a sealing member disposed around the periphery of the semiconductor element between the upper surface of the substrate and the lower surface of the transparent member facing the upper surface of the substrate.

本發明第2形態,在第1形態之半導體裝置中,較佳為,半導體元件之電極係設在半導體元件之上面,半導體元件之電極與基板之端子係藉由金屬線電性連接。 According to a second aspect of the invention, in the semiconductor device of the first aspect, the electrode of the semiconductor element is preferably provided on the upper surface of the semiconductor element, and the electrode of the semiconductor element and the terminal of the substrate are electrically connected by a metal wire.

本發明第3形態,在第1或第2形態之半導體裝置中,較佳為,腳部係接著於基板上面。 According to a third aspect of the present invention, in the semiconductor device of the first or second aspect, the leg portion is preferably attached to the upper surface of the substrate.

本發明第4形態,在第1至第3任一形態之半導體裝置中,較佳為,半導體元件具有矩形形狀;基板具有大於半導體元件之矩形形狀;透明構件具有大於半導體元件之矩形形狀;半導體元件,係以半導體元件之各側邊位於基板之各側邊內側之方式,配置在基板之中央部;腳部係設在透明構件之四角;密封構件將相鄰腳部之間加以密封。 According to a fourth aspect of the invention, in the semiconductor device of any one of the first to third aspect, preferably, the semiconductor element has a rectangular shape; the substrate has a rectangular shape larger than the semiconductor element; the transparent member has a rectangular shape larger than the semiconductor element; and the semiconductor The element is disposed at a central portion of the substrate such that each side of the semiconductor element is located inside each side of the substrate; the leg portion is disposed at four corners of the transparent member; and the sealing member seals between the adjacent leg portions.

本發明第5形態,在第3或第4形態之半導體裝置中,較佳為,密封構件之外周側面與基板之四個側邊之各個形成為同一面。 According to a fifth aspect of the invention, in the semiconductor device of the third aspect or the fourth aspect, preferably, the outer circumferential side surface of the sealing member and the four side edges of the substrate are formed in the same plane.

本發明第6形態,在第1至第5任一形態之半導體裝置中,較佳為,透明構件之上面及下面為彼此平行之平面。 According to a sixth aspect of the invention, in the semiconductor device of any one of the first to fifth aspects, the upper surface and the lower surface of the transparent member are preferably parallel to each other.

本發明第7形態之半導體裝置之製造方法,包含:準備在上面具有供分別形成半導體裝置之複數個半導體裝置形成區域、在各半導體裝置形成區域內形成有端子之素材基板之步驟;在素材基板之各半導體裝置形成區域內配置在上面具有電極之半導體元件之步驟;對半導體元件各個之電極與形成在素材基板之端子進行打線之步驟;將具有複數個腳部且覆蓋半導體元件之上部之透明構件配置在素材基板之各半導體裝置形成區域內,使配置在複數個半導體裝置形成區域之各個之該透明構件彼此分離之步驟;在素材基板上面與和素材基板上面對向之透明構件下面之間設置密封構件之步驟;以及使素材基板就各半導體裝置形成區域分離之步驟。 A method of manufacturing a semiconductor device according to a seventh aspect of the present invention, comprising: a step of preparing a plurality of semiconductor device formation regions for respectively forming a semiconductor device; and forming a material substrate of the terminal in each semiconductor device formation region; a step of arranging a semiconductor element having an electrode thereon in each semiconductor device formation region; a step of bonding each electrode of the semiconductor element and a terminal formed on the material substrate; and having a plurality of legs and covering the upper portion of the semiconductor element The member is disposed in each of the semiconductor device forming regions of the material substrate, and separates the transparent members disposed in the plurality of semiconductor device forming regions from each other; and on the material substrate and the transparent member opposite to the material substrate a step of providing a sealing member; and a step of separating the material substrate from each semiconductor device forming region.

本發明第8形態,在第7形態之半導體裝置之製造方法中,較佳為,在素材基板上面與和素材基板上面對向之透明構件下面之間設置密封構件 之步驟中,從配置在素材基板之複數個半導體裝置形成區域之各個且彼此分離之透明構件彼此之間注入密封構件,將素材基板上面、透明構件下面、腳部側面圍繞之開口加以密封。 According to a seventh aspect of the invention, in the method of manufacturing the semiconductor device of the seventh aspect, the sealing member is preferably disposed between the upper surface of the material substrate and the lower surface of the transparent member facing the upper surface of the material substrate. In the step, a sealing member is injected between the transparent members which are disposed in the plurality of semiconductor device forming regions of the material substrate and separated from each other, and the opening of the material substrate, the lower surface of the transparent member, and the side of the leg portion are sealed.

本發明第9形態,在第7或第8形態之半導體裝置之製造方法中,較佳為,進一步具備製造該透明構件之步驟;該製造該透明構件之步驟,包含:準備具有可形成複數個透明構件之面積之透明構件素材板之步驟;藉由使切削工具往一方向移動,在透明構件素材板形成具有腳部之間隙量之寬度之第1槽之步驟;藉由使切削工具往與一方向正交之方向移動,對透明構件素材板之未形成第1槽之未加工部形成具有腳部之間隙量之寬度且與第1槽正交之第2槽之步驟;以及將透明構件素材板沿著槽之延伸方向切斷之步驟。 According to a ninth aspect of the present invention, in the method of manufacturing the semiconductor device of the seventh aspect, the method of manufacturing the transparent member is further provided, and the step of manufacturing the transparent member includes: preparing to have a plurality of a step of transparent member material sheet of the area of the transparent member; a step of forming a first groove having a width of the gap of the foot portion in the transparent member material sheet by moving the cutting tool in one direction; by moving the cutting tool Moving in a direction orthogonal to one direction, forming a step of forming a second groove orthogonal to the first groove with respect to the unprocessed portion of the transparent member material sheet in which the first groove is not formed; and the transparent member The step of cutting the material sheet along the extending direction of the groove.

根據本發明,由於以具有複數個腳部之透明構件覆蓋半導體元件之上部,因此可抑制半導體裝置之成本增加。 According to the present invention, since the upper portion of the semiconductor element is covered with the transparent member having a plurality of leg portions, the cost increase of the semiconductor device can be suppressed.

1,1A~1D‧‧‧半導體裝置 1,1A~1D‧‧‧Semiconductor device

1r‧‧‧半導體裝置形成區域 1r‧‧‧Semiconductor device formation area

10‧‧‧電路基板(基板) 10‧‧‧Circuit board (substrate)

10P‧‧‧素材電路基板(素材基板) 10P‧‧‧material circuit board (material substrate)

11‧‧‧端子 11‧‧‧ Terminal

20‧‧‧半導體元件 20‧‧‧Semiconductor components

22‧‧‧電極 22‧‧‧Electrode

30P‧‧‧透明構件中間集合板 30P‧‧‧Transparent member intermediate assembly board

32,34‧‧‧槽 32,34‧‧‧ slots

40‧‧‧透明構件 40‧‧‧Transparent components

41‧‧‧頂板 41‧‧‧ top board

42‧‧‧腳部 42‧‧‧foot

50‧‧‧密封構件 50‧‧‧ Sealing members

50p‧‧‧樹脂材料 50p‧‧‧Resin materials

S‧‧‧空隙部 S‧‧‧Voids

圖1(a)係以示意方式顯示一實施形態之半導體裝置之外觀之立體圖,圖1(b)係以示意方式顯示透過透明構件觀察之裝置內部構造之半導體裝置之立體圖。 Fig. 1(a) is a perspective view schematically showing an appearance of a semiconductor device according to an embodiment, and Fig. 1(b) is a perspective view schematically showing a semiconductor device having an internal structure of a device viewed through a transparent member.

圖2(a)係從圖1所示之半導體裝置之上方觀察之俯視圖,圖2(b)係圖2(a)之IIb-IIb線剖面圖。 2(a) is a plan view of the semiconductor device shown in FIG. 1, and FIG. 2(b) is a cross-sectional view taken along line IIb-IIb of FIG. 2(a).

圖3係透明構件之外觀立體圖。 Fig. 3 is a perspective view showing the appearance of a transparent member.

圖4(a)~(c)係用以說明透明構件之製造方法之立體圖。 4(a) to 4(c) are perspective views for explaining a method of manufacturing a transparent member.

圖5係用以說明半導體裝置之製造方法之從上方觀察之俯視圖,顯示在基板上載置半導體元件之步驟。 5 is a plan view showing a semiconductor device manufacturing method as viewed from above, showing a step of mounting a semiconductor element on a substrate.

圖6係顯示接續圖5之步驟之圖。 Figure 6 is a diagram showing the steps following Figure 5.

圖7係顯示接續圖6之步驟之圖。 Figure 7 is a diagram showing the steps following Figure 6.

圖8係顯示接續圖7之步驟之圖。 Figure 8 is a diagram showing the steps following Figure 7.

圖9係顯示接續圖8之步驟之圖。 Figure 9 is a diagram showing the steps following Figure 8.

圖10(a)、(b)係顯示變形例之圖。 Fig. 10 (a) and (b) are views showing a modification.

圖11(a)、(b)係顯示變形例之圖。 Fig. 11 (a) and (b) are views showing a modification.

(半導體裝置之構造) (Structure of semiconductor device)

以下,參照圖式說明本發明之半導體裝置之一實施形態。 Hereinafter, an embodiment of a semiconductor device of the present invention will be described with reference to the drawings.

圖1(a)係以示意方式顯示一實施形態之半導體裝置之外觀之立體圖,省略透過後述透明構件觀察之裝置內部構造之記載。圖1(b)係以示意方式顯示透過後述透明構件觀察之裝置內部構造之半導體裝置之立體圖。圖2(a)係從圖1所示之半導體裝置之上方觀察之俯視圖,以示意方式顯示透過透明構件觀察之裝置內部構造。圖2(b)係圖2(a)之IIb-IIb線剖面圖。又,圖3係透明構件之外觀立體圖。 Fig. 1(a) is a perspective view schematically showing the appearance of a semiconductor device according to an embodiment, and the description of the internal structure of the device through the transparent member to be described later is omitted. Fig. 1(b) is a perspective view schematically showing a semiconductor device through which the internal structure of the device is observed through a transparent member to be described later. Fig. 2(a) is a plan view, as seen from above, of the semiconductor device shown in Fig. 1, showing the internal structure of the device viewed through the transparent member in a schematic manner. Fig. 2(b) is a cross-sectional view taken along line IIb-IIb of Fig. 2(a). 3 is a perspective view showing the appearance of a transparent member.

為了方便說明,半導體裝置之左右方向、前後方向及上下方向係如圖所示。此外,圖2(a)中,對後述密封構件標示網底。 For convenience of explanation, the left and right direction, the front and rear direction, and the up and down direction of the semiconductor device are as shown in the drawing. Further, in Fig. 2(a), the sealing member is described as a mesh bottom.

半導體裝置1具備基板亦即電路基板10、半導體元件20、透明構件40、密封構件50。 The semiconductor device 1 includes a circuit board 10 which is a substrate, a semiconductor element 20, a transparent member 40, and a sealing member 50.

半導體元件20在上面20a具有例如受光區域等機能區域21,晶粒接合 於電路基板10之上面10a(參照圖2(b))上。在半導體元件20之機能區域21之周圍排列有複數個電極22。在電路基板10之上面10a,在半導體元件20之周圍排列有端子11(參照圖2(b))。半導體元件20之各電極22係藉由金屬線23電性連接於電路基板10之端子11。電極22與端子11之連接係採用使用金、銀、銅、合金等之金屬線之打線法。在電路基板10之下面10b(參照圖2(b))形成有透過未圖示之通孔分別連接於對應之端子11之外部端子部12。 The semiconductor element 20 has a functional region 21 such as a light receiving region on the upper surface 20a, and die bonding On the upper surface 10a of the circuit board 10 (see Fig. 2(b)). A plurality of electrodes 22 are arranged around the functional region 21 of the semiconductor element 20. On the upper surface 10a of the circuit board 10, terminals 11 are arranged around the semiconductor element 20 (see Fig. 2(b)). Each of the electrodes 22 of the semiconductor element 20 is electrically connected to the terminal 11 of the circuit substrate 10 by a metal wire 23. The connection between the electrode 22 and the terminal 11 is a wire bonding method using a metal wire such as gold, silver, copper, or alloy. The lower terminal portion 10b (see FIG. 2(b)) of the circuit board 10 is formed with an external terminal portion 12 that is connected to the corresponding terminal 11 through a through hole (not shown).

半導體元件20在俯視時具有矩形形狀,電路基板10在俯視時具有較半導體元件20大一圈之矩形形狀。半導體元件20配置在電路基板10之大致中央,半導體元件20之對向之側邊分別配置在離電路基板10之對應側邊相等長度之內側。 The semiconductor element 20 has a rectangular shape in a plan view, and the circuit board 10 has a rectangular shape that is larger than the semiconductor element 20 in a plan view. The semiconductor element 20 is disposed substantially at the center of the circuit board 10, and the opposite sides of the semiconductor element 20 are disposed inside the same length from the corresponding side of the circuit board 10.

在電路基板10之上面10a配置有圖3所示之透明構件40。為了方便說明,圖3中,使透明構件上下相反來圖示。透明構件40具備矩形形狀之平板即頂板41、及在頂板41之四角往下方延伸之腳部42。腳部42與頂板41係一體形成。亦即透明構件40為一體形成,並非將個別形成之頂板41與腳部42加以組合。 The transparent member 40 shown in FIG. 3 is disposed on the upper surface 10a of the circuit board 10. For convenience of explanation, in Fig. 3, the transparent members are illustrated as being opposite to each other. The transparent member 40 includes a top plate 41 which is a flat plate having a rectangular shape, and a leg portion 42 which extends downward at four corners of the top plate 41. The leg portion 42 is integrally formed with the top plate 41. That is, the transparent member 40 is integrally formed, and the individually formed top plate 41 and the leg portion 42 are not combined.

本實施形態中,俯視下,透明構件40之形狀尺寸與電路基板10之形狀尺寸相同。亦即,透明構件40之四個側面40c,40d(參照圖1(a))與電路基板10之四個側面10c,10d(參照圖1(a))分別形成為同一面。此外,形成透明構件40之側面40c之邊為長邊,形成側面40d之邊為短邊。透明構件40由透明玻璃或丙烯酸樹脂等透明樹脂形成。是以,在透明構件40,不僅頂板41,腳部42亦為透明。圖3中,腳部42為角柱形狀。然而,腳 部42之形狀亦可為圓柱形狀或圓錐梯形、角錐梯形等。 In the present embodiment, the shape of the transparent member 40 is the same as the shape of the circuit board 10 in plan view. That is, the four side faces 40c, 40d (see FIG. 1(a)) of the transparent member 40 and the four side faces 10c, 10d (see FIG. 1(a)) of the circuit board 10 are formed in the same plane. Further, the side on which the side surface 40c of the transparent member 40 is formed is a long side, and the side on which the side surface 40d is formed is a short side. The transparent member 40 is formed of a transparent resin such as transparent glass or acrylic resin. Therefore, in the transparent member 40, not only the top plate 41 but also the leg portion 42 is also transparent. In Fig. 3, the leg portion 42 is in the shape of a corner post. However, the feet The shape of the portion 42 may also be a cylindrical shape, a conical trapezoidal shape, a pyramidal trapezoidal shape, or the like.

頂板41之上面41a及下面41b,整面平坦地形成。頂板41之上面41a及下面41b平行。亦即,頂板41為平行平面板,不具正或負之彎折力。是以,頂板41不會使透射過頂板41之光收斂、發散。腳部42之下面42a與頂板41之上面41a及下面41b平行。為了方便說明,將腳部42之側面中相鄰腳部42彼此對向之側面稱為內側側面42b。 The upper surface 41a and the lower surface 41b of the top plate 41 are formed flat over the entire surface. The upper surface 41a and the lower surface 41b of the top plate 41 are parallel. That is, the top plate 41 is a parallel flat plate and does not have a positive or negative bending force. Therefore, the top plate 41 does not converge and diverge the light transmitted through the top plate 41. The lower surface 42a of the leg portion 42 is parallel to the upper surface 41a and the lower surface 41b of the top plate 41. For convenience of explanation, the side surface of the side surface of the leg portion 42 where the adjacent leg portions 42 face each other is referred to as an inner side surface 42b.

各腳部42之下面42a(參照圖3)係藉由未圖示之接著劑接著於電路基板10之上面10a。從腳部42之下面42a至頂板41之下面41b之高度(上下方向之長度)、亦即腳部42之腳長h,如圖2(b)所示,係形成為大於將端子11與電極22加以連接之金屬線23之高度。亦即,頂板41之下面41b位於在金屬線23之從半導體元件20之上面20a突出之最大高度部分23a之上方。如上述,透明構件40配置在電路基板10之左右方向及前後方向之中央,覆蓋半導體元件20整體。如圖2(b)所示,在半導體元件20之上面20a與透明構件40之頂板41之下面41b之間形成有空隙部S。 The lower surface 42a (see FIG. 3) of each leg portion 42 is attached to the upper surface 10a of the circuit board 10 by an adhesive (not shown). The height (the length in the up and down direction) from the lower surface 42a of the leg portion 42 to the lower surface 41b of the top plate 41, that is, the leg length h of the leg portion 42, is formed to be larger than the terminal 11 and the electrode as shown in Fig. 2(b). 22 The height of the metal wire 23 to be connected. That is, the lower surface 41b of the top plate 41 is located above the maximum height portion 23a of the metal wire 23 which protrudes from the upper surface 20a of the semiconductor element 20. As described above, the transparent member 40 is disposed at the center in the left-right direction and the front-rear direction of the circuit board 10, and covers the entire semiconductor element 20. As shown in FIG. 2(b), a gap portion S is formed between the upper surface 20a of the semiconductor element 20 and the lower surface 41b of the top plate 41 of the transparent member 40.

如圖2(a)所示,各腳部42在俯視時配置在半導體元件20之外側。又,如圖2(b)所示,形成在電路基板10之上面10a之端子11位於相鄰腳部42間。 As shown in FIG. 2(a), each leg portion 42 is disposed on the outer side of the semiconductor element 20 in plan view. Further, as shown in FIG. 2(b), the terminals 11 formed on the upper surface 10a of the circuit board 10 are located between the adjacent leg portions 42.

密封構件50係以圍繞半導體元件20之外周之方式形成在電路基板10之上面10a上,將半導體裝置1之側面之開口加以密封。具體而言,密封構件50將相鄰腳部42之間、亦即電路基板10之上面10a、頂板41之下面41b、腳部42之內側側面42b圍繞之空間加以密封。關於密封構件50之形成方法將於後述。 The sealing member 50 is formed on the upper surface 10a of the circuit board 10 so as to surround the outer periphery of the semiconductor element 20, and seals the opening of the side surface of the semiconductor device 1. Specifically, the sealing member 50 seals the space between the adjacent leg portions 42, that is, the upper surface 10a of the circuit board 10, the lower surface 41b of the top plate 41, and the inner side surface 42b of the leg portion 42. The method of forming the sealing member 50 will be described later.

如圖2(b)所示,密封構件50係設在電路基板10之上面10a與頂板41之下面41b之間。密封構件50覆蓋電路基板10之端子11及金屬線23之端子11側之既定範圍。本實施形態中,與半導體元件20之側面對向之密封構件50之內周側面50a雖未與半導體元件20之側面接觸,但亦可與半導體元件20之側面接觸。本實施形態中,密封構件50未覆蓋形成在半導體元件20之上面20a之電極22及金屬線23之電極22側之既定長度。然而,密封構件50,只要未覆蓋半導體元件20之機能區域21,則亦可構成為覆蓋金屬線23之電極22側之既定範圍及電極22。 As shown in FIG. 2(b), the sealing member 50 is provided between the upper surface 10a of the circuit board 10 and the lower surface 41b of the top plate 41. The sealing member 50 covers a predetermined range of the terminal 11 of the circuit board 10 and the terminal 11 side of the metal wire 23. In the present embodiment, the inner circumferential side surface 50a of the sealing member 50 opposed to the side surface of the semiconductor element 20 is not in contact with the side surface of the semiconductor element 20, but may be in contact with the side surface of the semiconductor element 20. In the present embodiment, the sealing member 50 does not cover a predetermined length formed on the electrode 22 side of the upper surface 20a of the semiconductor element 20 and the electrode 22 side of the metal wire 23. However, the sealing member 50 may be configured to cover a predetermined range of the electrode 22 side of the metal wire 23 and the electrode 22 as long as the functional region 21 of the semiconductor element 20 is not covered.

圖1、圖2所示之半導體裝置1係複數個一起製造。電路基板10、半導體元件20、透明構件40係個別製造。以下,說明以高產率且低成本製造複數個透明構件40之方法之一例。 The semiconductor device 1 shown in Figs. 1 and 2 is manufactured in plural numbers. The circuit board 10, the semiconductor element 20, and the transparent member 40 are individually manufactured. Hereinafter, an example of a method of manufacturing a plurality of transparent members 40 in high yield and at low cost will be described.

(透明構件之製造方法) (Manufacturing method of transparent member)

參照圖3及圖4(a)~(c)說明一次製造四個半導體元件20時之透明構件40之製造方法之一例。為了方便說明,將透明構件40各部位之尺寸如圖3所示規定。亦即,設透明構件40之高度為H、腳部42之腳長如上述為h、腳部42之左右方向之尺寸為d1、腳部42之前後方向之尺寸為d2。設左右之腳部42之內側側面42b彼此之間隔為W1、前後之腳部42之內側側面42b彼此之間隔為W2。 An example of a method of manufacturing the transparent member 40 when the four semiconductor elements 20 are manufactured at a time will be described with reference to Figs. 3 and 4(a) to 4(c). For convenience of explanation, the dimensions of the respective portions of the transparent member 40 are defined as shown in FIG. That is, the height of the transparent member 40 is H, the length of the leg of the leg portion 42 is h, the dimension of the leg portion 42 in the left-right direction is d1, and the dimension of the leg portion 42 in the front-rear direction is d2. The inner side surface 42b of the right and left leg portions 42 is spaced apart from each other by W1, and the inner side surface 42b of the front and rear leg portions 42 is spaced apart from each other by W2.

準備具有可形成複數個透明構件40之面積之未圖示之平板、亦即矩形之透明構件素材板。透明構件素材板之厚度與圖3圖示之透明構件40之高度H(上下方向之長度)相同。 A flat plate (not shown) having a plurality of transparent members 40, that is, a rectangular transparent member material plate, is prepared. The thickness of the transparent member material sheet is the same as the height H (the length in the up and down direction) of the transparent member 40 illustrated in FIG.

對矩形之透明構件素材板進行加工,如圖4(a)所示,形成往 前後方向延伸之複數個槽32。槽32之寬度與透明構件40之左右之腳部42之內側側面42b彼此之間隔W1相同。亦即,槽32之寬度與透明構件40之左右之腳部42之間隙相同。槽32之深度與腳部42之腳長h相同。在左右相鄰之各槽32係以分離透明構件40之腳部42之左右方向之尺寸d1之2倍(2d1)之方式平行地形成。亦即,各槽32被以在相鄰之槽32間形成長度2d1之槽未加工部31之方式加工。槽32係藉由例如使切削工具往前後方向移動形成。 The rectangular transparent member material plate is processed, as shown in Fig. 4(a), formed A plurality of slots 32 extending in the front-rear direction. The width of the groove 32 is the same as the interval W1 between the inner side faces 42b of the left and right leg portions 42 of the transparent member 40. That is, the width of the groove 32 is the same as the gap between the left and right leg portions 42 of the transparent member 40. The depth of the groove 32 is the same as the leg length h of the foot portion 42. Each of the grooves 32 adjacent to each other in the left and right directions is formed in parallel so as to separate twice (2d1) from the dimension d1 of the leg portion 42 of the transparent member 40 in the left-right direction. That is, each of the grooves 32 is processed so as to form the groove unprocessed portion 31 having a length 2d1 between the adjacent grooves 32. The groove 32 is formed by, for example, moving the cutting tool in the front-rear direction.

在透明構件素材板之左右方向之兩側部,槽32係設在左右之側面37至槽32之端部為止之長度與透明構件40之腳部42之左右方向之尺寸d1相同之位置。亦即,當形成槽32時,即在透明構件素材板之左右兩端緣形成寬度為d1之壁KBL,KBR,在透明構件素材板之中央部形成具有d1×2之寬度之壁KBC、亦即上述槽未加工部31。 In the both side portions of the transparent member material sheet in the left-right direction, the groove 32 is formed at the same position as the dimension d1 of the left and right direction of the leg portion 42 of the transparent member 40 from the left and right side faces 37 to the end portions of the grooves 32. That is, when the grooves 32 are formed, that is, the walls KBL, KBR having the width d1 are formed on the left and right end edges of the transparent member material sheet, and the wall KBC having the width of d1 × 2 is formed in the central portion of the transparent member material sheet, That is, the groove unprocessed portion 31.

接著,當在左右之壁KBL,KBR與中央之壁KBC之前後方向兩處形成前後方向之長度為W2、亦即寬度為W2之槽34時,如圖4(b)所示,即在透明構件素材板之表面形成九個突部42Xa~42Xd。槽34,例如與形成槽32時相同,係藉由使切削工具往左右方向移動形成。 Then, when the left and right walls KBL, KBR and the central wall KBC are formed in the front and rear directions at two positions in the front-rear direction, that is, the length W2, that is, the groove 34 having the width W2, as shown in FIG. 4(b), that is, in the transparent The surface of the member material sheet forms nine projections 42Xa to 42Xd. The groove 34 is formed, for example, by moving the cutting tool in the left-right direction, as in the case of forming the groove 32.

透明構件素材板之四角之突部42Xa為與圖3之腳部42相同之長度d1×d2之矩形剖面。中央部之突部42Xb為長度(2×d1)×(2×d2)之矩形剖面。在前後方向夾著中央之突部42Xb之前後兩端之突部42Xc為d2×(2×d1)之矩形剖面。在左右方向夾著中央之突部42Xb之左右兩端之突部42Xd為d1×(2×d2)之矩形剖面。槽34係形成在設定上述各部位尺寸之位置。槽34之寬度W2為透明構件40之前後之腳部42之內側側面42b彼此之間隔W2。槽34之深 度與腳部42之腳長h相同。 The projection 42Xa at the four corners of the transparent member material sheet has a rectangular cross section of the same length d1 × d2 as the leg portion 42 of Fig. 3 . The projection 42Xb at the center portion is a rectangular cross section of length (2 × d1) × (2 × d2). The projection 42Xc at the rear ends before the central projection 42Xb is sandwiched in the front-rear direction is a rectangular cross section of d2 × (2 × d1). The projection 42Xd at the left and right ends of the central projection 42Xb sandwiching the right and left directions is a rectangular cross section of d1 × (2 × d2). The groove 34 is formed at a position at which the size of each of the above portions is set. The width W2 of the groove 34 is the interval W2 between the inner side faces 42b of the leg portions 42 before and after the transparent member 40. Deep groove 34 The degree is the same as the foot length h of the foot 42.

以上述方式,由透明構件素材板形成圖4(b)、(c)所示之透明構件中間集合板30P。 In the above manner, the transparent member intermediate collecting plate 30P shown in Figs. 4(b) and 4(c) is formed of a transparent member material sheet.

此外,亦可預先使左右之壁KBL,KBR之寬度大於d1,在形成槽32後,以壁KBL,KBR之寬度成為d1之方式切削左右之側面37。又,亦可預先使前後兩端之突部42Xc之前後方向之長度大於d2,在形成槽34後,以突部42Xc之前後方向之長度成為d2之方式切削前後之側面37。 Further, the widths of the left and right walls KBL and KBR may be made larger than d1 in advance, and after the grooves 32 are formed, the left and right side faces 37 are cut so that the widths of the walls KBL and KBR become d1. Further, the lengths of the front and rear projections 42Xc in the front and rear directions may be made larger than d2 in advance, and after the grooves 34 are formed, the front and rear side faces 37 are cut so that the length of the projections 42Xc in the front and rear directions becomes d2.

在形成透明構件中間集合板30P後,在圖4(c)中二點鏈線所示之切斷位置將透明構件中間集合板30P切斷。此切斷位置為相鄰之槽32彼此之中間位置及相鄰之槽34彼此之中間位置。藉此,可高效率地製作複數個透明構件40。 After the transparent member intermediate collecting plate 30P is formed, the transparent member intermediate collecting plate 30P is cut at the cutting position indicated by the two-dot chain line in Fig. 4(c). This cutting position is the intermediate position between the adjacent grooves 32 and the intermediate position between the adjacent grooves 34. Thereby, a plurality of transparent members 40 can be efficiently produced.

上述說明中,例示了在透明構件素材板將槽32,34分別形成二個之情形。此係一次製造使用於四個半導體裝置之四個透明構件40之一例。亦可進一步增加形成在透明構件素材板之槽32,34之數量。又,亦可使形成在透明構件素材板之槽32僅有一個,藉由在相鄰之槽34彼此之中間位置切斷以獲得透明構件40。此係一次製造使用於二個半導體裝置之二個透明構件40之一例。 In the above description, the case where the grooves 32, 34 are formed in the transparent member material sheet is exemplified. This is an example of manufacturing four transparent members 40 for use in four semiconductor devices at a time. It is also possible to further increase the number of grooves 32, 34 formed in the transparent member material sheet. Further, only one of the grooves 32 formed in the transparent member material sheet may be cut by the intermediate positions of the adjacent grooves 34 to obtain the transparent member 40. This is an example of manufacturing two transparent members 40 for two semiconductor devices at a time.

上述透明構件40之製造方法適於由玻璃形成透明構件40之情形。在由樹脂形成透明構件40之情形,亦可藉由模具法等形成圖4(b)所示之形成有槽32,34之透明構件中間集合板30P。 The method of manufacturing the transparent member 40 described above is suitable for the case where the transparent member 40 is formed of glass. In the case where the transparent member 40 is formed of a resin, the transparent member intermediate collecting plate 30P in which the grooves 32, 34 are formed as shown in Fig. 4 (b) can be formed by a die method or the like.

(半導體裝置之製造方法) (Method of Manufacturing Semiconductor Device)

參照圖5~圖9說明半導體裝置之製造方法。 A method of manufacturing a semiconductor device will be described with reference to FIGS. 5 to 9.

準備用以形成複數個半導體裝置形成區域1r之素材電路基板(素材基板)10P。圖5中,以符號1r顯示每一個半導體裝置形成區域。在素材電路基板10P之各半導體裝置形成區域1r內形成有端子11及透過通孔連接於端子11之外部端子部12(參照圖2(b))。 A material circuit substrate (material substrate) 10P for forming a plurality of semiconductor device forming regions 1r is prepared. In Fig. 5, each semiconductor device formation region is indicated by symbol 1r. In the semiconductor device forming region 1r of the material circuit board 10P, a terminal 11 and an external terminal portion 12 through which the through hole is connected to the terminal 11 are formed (see FIG. 2(b)).

此外,以下雖例示在素材電路基板10P上形成左右方向4個×前後方向3個之半導體裝置1之情形,但可在素材電路基板10P上形成更多或更少之數量之半導體裝置1。各半導體裝置形成區域1r之平面形狀與俯視半導體裝置1之大小及形狀相同。亦即,各半導體裝置形成區域1r為往左右方向延伸之二個長邊與往前後方向延伸之二個短邊圍繞之區域。 In the following, a case where three semiconductor devices 1 in the left-right direction and three in the front-rear direction are formed on the material circuit board 10P is exemplified, but a larger or smaller number of semiconductor devices 1 can be formed on the material circuit substrate 10P. The planar shape of each semiconductor device forming region 1r is the same as the size and shape of the semiconductor device 1 in plan view. In other words, each of the semiconductor device forming regions 1r is a region in which two long sides extending in the left-right direction and two short sides extending in the front-rear direction are surrounded.

如圖5所示,在各半導體裝置形成區域1r,對半導體元件20進行晶粒接合以將半導體元件20固定在素材基板、亦即素材電路基板10P。接著,藉由打線將半導體元件20之電極22與形成在素材電路基板10P之半導體裝置形成區域1r之端子11加以連接。 As shown in FIG. 5, in each semiconductor device formation region 1r, the semiconductor element 20 is die-bonded to fix the semiconductor element 20 to the material substrate, that is, the material circuit substrate 10P. Next, the electrode 22 of the semiconductor element 20 is connected to the terminal 11 of the semiconductor device forming region 1r formed in the material circuit substrate 10P by wire bonding.

如圖6所示,在各半導體裝置形成區域1r內固定透明構件40。透明構件40之腳部42之下面42a(參照圖3)係藉由未圖示之接著劑接著固定在素材電路基板10P。在前後及左右相鄰之透明構件40彼此之間設有間隙。 As shown in FIG. 6, the transparent member 40 is fixed in each semiconductor device formation region 1r. The lower surface 42a (see FIG. 3) of the leg portion 42 of the transparent member 40 is then fixed to the material circuit board 10P by an adhesive (not shown). A gap is provided between the front and rear and the left and right adjacent transparent members 40.

如圖7所示,一邊使分配器往前後方向移動,一邊在於左右方向相鄰之半導體裝置形成區域1r間、亦即於左右相鄰之透明構件40彼此之間及左端側與右端側之半導體裝置形成區域1r之一側緣側注入液狀之樹脂材料50p。樹脂材料50p係固化前之密封構件50。樹脂材料50p一邊往素材電路基板10P上面、頂板41之下面41b(參照圖2(b))、腳部42之內側側 面42b(參照圖2(b))濕潤擴散,一邊從透明構件40之短邊外方朝向半導體裝置形成區域1r之內方側流動。 As shown in FIG. 7, the semiconductor device forming region 1r adjacent to each other in the left-right direction, that is, the semiconductors between the left and right adjacent transparent members 40 and the left end side and the right end side while moving the dispenser in the front-rear direction A liquid resin material 50p is injected into the side edge side of one of the device forming regions 1r. The resin material 50p is a sealing member 50 before curing. The resin material 50p faces the upper surface of the material circuit board 10P, the lower surface 41b of the top plate 41 (see FIG. 2(b)), and the inner side of the leg portion 42. The surface 42b (see FIG. 2(b)) is wet-diffused, and flows from the outer side of the short side of the transparent member 40 toward the inner side of the semiconductor device forming region 1r.

如圖8所示,一邊使分配器往左右方向移動,一邊在於前後方向相鄰之半導體裝置形成區域1r間、亦即於前後相鄰之透明構件40彼此之間及前端側與後端側之半導體裝置形成區域1r之一側緣側注入液狀之樹脂材料50p。樹脂材料50p一邊往素材電路基板10P上面、頂板41之下面41b、腳部42之內側側面42b濕潤擴散,一邊從透明構件40之長邊外方朝向半導體裝置形成區域1r之內方側流動。 As shown in FIG. 8, while moving the dispenser in the left-right direction, the semiconductor device forming regions 1r adjacent to each other in the front-rear direction, that is, between the front and rear transparent members 40 and the front end side and the rear end side A liquid resin material 50p is injected into one side edge side of the semiconductor device forming region 1r. The resin material 50p flows to the inner side of the semiconductor device forming region 1r from the outer side of the long side of the transparent member 40 while being diffused and diffused to the upper surface of the material circuit board 10P, the lower surface 41b of the top plate 41, and the inner side surface 42b of the leg portion 42.

藉由以上述方式注入樹脂材料50p,在半導體元件20之上面20a與透明構件40之頂板41之下面41b之間形成空隙部S(參照圖2(b))。 By injecting the resin material 50p in the above manner, a void portion S is formed between the upper surface 20a of the semiconductor element 20 and the lower surface 41b of the top plate 41 of the transparent member 40 (see Fig. 2(b)).

此外,作為樹脂材料50p,例如可使用環氧樹脂、矽氧樹脂。亦可使玻璃纖維等填劑分散在樹脂中。 Further, as the resin material 50p, for example, an epoxy resin or a silicone resin can be used. A filler such as glass fiber may be dispersed in the resin.

樹脂材料50p之注入完成後,藉由熱或紫外線使樹脂材料50p硬化。 After the injection of the resin material 50p is completed, the resin material 50p is hardened by heat or ultraviolet rays.

接著,如圖9所示,在二點鏈線所示之切斷線之位置,將素材電路基板10P於左右方向及前後方向切斷。圖9中二點鏈線所示之切斷線與各半導體裝置形成區域1r之邊界線重疊。藉由此切斷,密封構件50之外周側面與電路基板10之四個側面分別形成為同一面。藉由上述步驟,可形成複數個圖1所示之半導體裝置1。 Next, as shown in FIG. 9, the material circuit board 10P is cut in the left-right direction and the front-back direction at the position of the cutting line shown by the two-dot chain line. The cutting line indicated by the two-dot chain line in Fig. 9 overlaps with the boundary line of each semiconductor device forming region 1r. By this cutting, the outer peripheral side surface of the sealing member 50 and the four side surfaces of the circuit board 10 are respectively formed in the same surface. Through the above steps, a plurality of semiconductor devices 1 shown in FIG. 1 can be formed.

根據上述一實施形態,可達成下述效果。 According to the above embodiment, the following effects can be achieved.

(1)覆蓋半導體元件20之上部之透明構件,係載置於電路基板10之上面10a之複數個腳部42一體形成之透明構件40。藉此,可簡化覆蓋半導體 元件20之上部之透明構件40之構造,因此可抑制半導體裝置1之成本增加。又,與在電路基板10之上面10a之四角配置間隔物,在該間隔物之上載置平板狀構件以製造半導體裝置1之情形相較,可輕易且有效率地進行透明構件40之定位及對電路基板10之安裝。 (1) A transparent member covering the upper portion of the semiconductor element 20 is a transparent member 40 integrally formed with a plurality of leg portions 42 placed on the upper surface 10a of the circuit board 10. Thereby simplifying the coverage of the semiconductor The configuration of the transparent member 40 at the upper portion of the element 20 can suppress the increase in cost of the semiconductor device 1. Further, the spacers are disposed at the four corners of the upper surface 10a of the circuit board 10, and the positioning and the alignment of the transparent member 40 can be easily and efficiently performed as compared with the case where the flat member is placed on the spacer to manufacture the semiconductor device 1. The mounting of the circuit substrate 10.

(2)透明構件40中,腳部42與頂板41一體形成。因此,與相當於頂板41部分之構件被與該構件不同之構件即四個間隔物支承之構造相較,不須進行四個間隔物之各個之對準,因此可削減組裝步驟數,降低製造成本。 (2) In the transparent member 40, the leg portion 42 is formed integrally with the top plate 41. Therefore, compared with the configuration in which the member corresponding to the portion of the top plate 41 is supported by four spacers different from the member, the alignment of the four spacers is not required, so that the number of assembly steps can be reduced and the manufacturing can be reduced. cost.

(3)每當製造半導體裝置1時,準備在上面具有供分別形成半導體裝置1之複數個半導體裝置形成區域1r、在各半導體裝置形成區域1r內形成有端子11之素材電路基板(素材基板)10P。接著,在素材電路基板10P之各半導體裝置形成區域1r內配置在上面20a具有電極22之半導體元件20。藉由打線將半導體元件20各個之電極22與形成在素材電路基板10P之端子11加以連接。將分別具有複數個腳部42且覆蓋半導體元件20之上部之複數個透明構件40彼此分離配置在素材電路基板10P之各半導體裝置形成區域1r內。在素材電路基板10P上面與和素材電路基板10P上面對向之透明構件40下面、亦即頂板41之下面41b之間設置密封構件50。接著,使素材電路基板10P就各半導體裝置形成區域1r分離。 (3) When the semiconductor device 1 is manufactured, a plurality of semiconductor device forming regions 1r for forming the semiconductor device 1 and a material circuit substrate (material substrate) in which the terminals 11 are formed in each of the semiconductor device forming regions 1r are prepared. 10P. Next, the semiconductor element 20 having the electrode 22 on the upper surface 20a is disposed in each of the semiconductor device formation regions 1r of the material circuit board 10P. The electrodes 22 of the semiconductor elements 20 are connected to the terminals 11 formed on the material circuit substrate 10P by wire bonding. A plurality of transparent members 40 each having a plurality of leg portions 42 and covering the upper portion of the semiconductor element 20 are disposed apart from each other in each semiconductor device forming region 1r of the material circuit substrate 10P. A sealing member 50 is provided on the upper surface of the material circuit substrate 10P and the lower surface of the transparent member 40 opposed to the upper surface of the material circuit substrate 10P, that is, the lower surface 41b of the top plate 41. Next, the material circuit board 10P is separated from each of the semiconductor device forming regions 1r.

藉此,可輕易且有效率地進行透明構件40之定位及對素材電路基板10P之安裝,可簡化半導體裝置1之製程。又,可抑制半導體裝置1之製造成本增加。 Thereby, the positioning of the transparent member 40 and the mounting of the material circuit substrate 10P can be performed easily and efficiently, which simplifies the process of the semiconductor device 1. Moreover, an increase in the manufacturing cost of the semiconductor device 1 can be suppressed.

(4)在素材電路基板10P上面與和素材電路基板10P上面對向 之透明構件40下面、亦即頂板41之下面41b之間設置密封構件50之步驟中,從彼此分離配置在素材電路基板10P之各半導體裝置形成區域1r內之透明構件40彼此之間注入樹脂材料50p,將素材電路基板10P上面、透明構件40下面亦即頂板41之下面41b、腳部42之內側側面42b圍繞之開口加以密封。藉此,能有效率地進行密封構件50對複數個半導體裝置1之密封,可簡化半導體裝置1之製程。又,可抑制半導體裝置1之製造成本增加。 (4) facing the upper surface of the material circuit substrate 10P and the material circuit substrate 10P In the step of providing the sealing member 50 between the lower surface of the transparent member 40, that is, the lower surface 41b of the top plate 41, the transparent members 40 disposed in the respective semiconductor device forming regions 1r of the material circuit substrate 10P are injected with resin material therebetween. 50p, the upper surface of the material circuit board 10P and the lower surface of the transparent member 40, that is, the lower surface 41b of the top plate 41 and the inner side surface 42b of the leg portion 42 are sealed. Thereby, the sealing of the plurality of semiconductor devices 1 by the sealing member 50 can be efficiently performed, and the process of the semiconductor device 1 can be simplified. Moreover, an increase in the manufacturing cost of the semiconductor device 1 can be suppressed.

(5)每當製造透明構件40時,準備具有可形成複數個透明構件40之面積之透明構件素材板。接著,在透明構件素材板形成具有腳部42之間隙量之寬度W1之槽32。在透明構件素材板形成具有腳部42之間隙量之寬度W2且與槽32正交之槽34。接著,將此透明構件素材板沿著槽32,34之延伸方向切斷。亦即,製造透明構件40之步驟,包含:準備具有可形成複數個透明構件40之面積之透明構件素材板之步驟;藉由使切削工具往一方向移動,在透明構件素材板形成具有腳部42之間隙量之寬度W1之槽32之步驟;藉由使切削工具往與一方向正交之方向移動,對透明構件素材板之未形成槽32之槽未加工部31形成具有腳部42之間隙量之寬度W2且與槽32正交之槽34之步驟;以及將透明構件素材板沿著槽32,34之延伸方向切斷之步驟。 (5) Each time the transparent member 40 is manufactured, a transparent member material sheet having an area in which a plurality of transparent members 40 can be formed is prepared. Next, a groove 32 having a width W1 of the gap amount of the leg portion 42 is formed on the transparent member material sheet. A groove 34 having a width W2 of the gap amount of the leg portion 42 and orthogonal to the groove 32 is formed in the transparent member material sheet. Next, the transparent member material sheet is cut along the extending direction of the grooves 32, 34. That is, the step of manufacturing the transparent member 40 includes the steps of: preparing a transparent member material sheet having an area capable of forming a plurality of transparent members 40; forming a foot portion on the transparent member material sheet by moving the cutting tool in one direction a step of the gap 32 of the width W1 of the gap amount of 42; by moving the cutting tool in a direction orthogonal to one direction, the groove unprocessed portion 31 of the transparent member material sheet in which the groove 32 is not formed is formed to have the leg portion 42 a step of width W2 and a groove 34 orthogonal to the groove 32; and a step of cutting the transparent member material plate along the extending direction of the grooves 32, 34.

藉此,可低價製造透明構件40,可抑制半導體裝置1之製造成本增加。又,由於腳部42與頂板41一體形成,因此透明構件40之強度提升。是以,能使頂板41之厚度變薄,因此能使半導體裝置1小型化。 Thereby, the transparent member 40 can be manufactured at low cost, and the manufacturing cost of the semiconductor device 1 can be suppressed. Further, since the leg portion 42 is integrally formed with the top plate 41, the strength of the transparent member 40 is improved. Therefore, the thickness of the top plate 41 can be made thin, so that the semiconductor device 1 can be miniaturized.

(變形例) (Modification)

(1)在上述說明,透明構件40之四個側面40c,40d(參照圖1(a))與電路基 板10之四個側面10c,10d(參照圖1(a))分別形成為同一面。亦即,在上述說明,俯視時,透明構件40之形狀尺寸與電路基板10之形狀尺寸相同。然而,本發明並不限於此。例如,如圖10(a)之立體圖所示之半導體裝置1A,俯視時,透明構件40之尺寸亦可小於電路基板10之尺寸。亦即,俯視時,透明構件40之尺寸亦可小於半導體裝置形成區域1r(參照圖5)之尺寸。 (1) In the above description, the four side faces 40c, 40d of the transparent member 40 (refer to Fig. 1 (a)) and the circuit base The four side faces 10c, 10d (see Fig. 1 (a)) of the panel 10 are formed in the same plane. That is, in the above description, the shape of the transparent member 40 is the same as the shape of the circuit board 10 in plan view. However, the invention is not limited thereto. For example, in the semiconductor device 1A shown in the perspective view of FIG. 10(a), the size of the transparent member 40 may be smaller than the size of the circuit substrate 10 in plan view. That is, the size of the transparent member 40 may be smaller than the size of the semiconductor device forming region 1r (refer to FIG. 5) in plan view.

此情形,如圖10(a)所示,密封構件50之上面亦可較透明構件40之頂板41低,如圖10(b)之立體圖所示之半導體裝置1B,密封構件50之上面亦可與透明構件40之頂板41形成為同一面。 In this case, as shown in FIG. 10(a), the upper surface of the sealing member 50 may be lower than the top plate 41 of the transparent member 40, as shown in the perspective view of the semiconductor device 1B shown in FIG. 10(b), the upper surface of the sealing member 50 may be The top plate 41 of the transparent member 40 is formed in the same plane.

又,如圖11(a)、(b)所示,密封構件50之上面亦可較透明構件40之頂板41高。在此情形,如圖11(a)之立體圖所示之半導體裝置1C,密封構件50亦可不覆蓋透明構件40之頂板41,如圖11(b)之立體圖所示之半導體裝置1D,密封構件50亦可覆蓋透明構件40之頂板41之上面之一部分,例如頂板41之上面之周緣。此外,在圖11(b)所示之情形,例如,若半導體元件20之機能區域21(參照圖1(b))為受光區域等,則必須以不會遮蔽往機能區域21之入射光之方式設置密封構件50。 Further, as shown in FIGS. 11(a) and 11(b), the upper surface of the sealing member 50 may be higher than the top plate 41 of the transparent member 40. In this case, as shown in the semiconductor device 1C shown in the perspective view of FIG. 11(a), the sealing member 50 may not cover the top plate 41 of the transparent member 40, the semiconductor device 1D shown in the perspective view of FIG. 11(b), and the sealing member 50. It is also possible to cover a portion of the upper surface of the top plate 41 of the transparent member 40, such as the periphery of the upper surface of the top plate 41. Further, in the case shown in FIG. 11(b), for example, if the functional region 21 (see FIG. 1(b)) of the semiconductor element 20 is a light receiving region or the like, it is necessary to shield the incident light to the functional region 21. The sealing member 50 is provided in a manner.

(2)在上述說明,將半導體元件20之機能區域21例示為受光區域,但半導體元件20亦可為攝影元件。又,本發明亦可適用於發光元件等具有受光以外之其他機能之半導體元件20,例如加速度感測器等。 (2) In the above description, the functional region 21 of the semiconductor element 20 is exemplified as the light receiving region, but the semiconductor device 20 may be a photographic element. Further, the present invention is also applicable to a semiconductor element 20 having a function other than light such as a light-emitting element, such as an acceleration sensor or the like.

(3)在上述說明,雖構成為空隙部S被密封構件50密封,但本發明並不限於此。例如,如MEMS壓力感測器般機能區域21必須暴露在半導體裝置1之外部環境氣氛之情形,空隙部S亦可不被密封構件50密封。又,亦可藉由在透明構件40之一部分設置開口等,使機能區域21暴露在半 導體裝置1之外部環境氣氛。 (3) In the above description, the gap portion S is configured to be sealed by the sealing member 50, but the present invention is not limited thereto. For example, if the functional region 21 such as the MEMS pressure sensor must be exposed to the external ambient atmosphere of the semiconductor device 1, the void portion S may not be sealed by the sealing member 50. Further, the function region 21 may be exposed to the half by providing an opening or the like in one portion of the transparent member 40. The external ambient atmosphere of the conductor device 1.

(4)在上述說明,以在四個側邊排列有電極22之四邊型(quad type)說明半導體元件20。然而,本發明亦可適用於僅在對向之一對側邊排列有電極22之雙邊型(dual type)之半導體元件20。 (4) In the above description, the semiconductor element 20 will be described with a quad type in which the electrodes 22 are arranged on the four sides. However, the present invention is also applicable to a semiconductor element 20 of a dual type in which electrodes 22 are arranged only on one side of the opposite side.

除此之外,本發明之半導體裝置,在發明之趣旨之範圍內,可進行各種變形,總而言之,只要設有覆蓋半導體元件之上部之透明平板與用以在平板與基板上面之間設置既定空隙之複數個腳部一體形成之透明構件、及在基板上面與和該面對向之透明構件下面之間圍繞半導體元件周圍設置之密封構件即可。 In addition, the semiconductor device of the present invention can be variously modified within the scope of the invention. In general, a transparent plate covering the upper portion of the semiconductor element and a predetermined gap between the plate and the substrate are provided. The transparent member integrally formed by the plurality of legs may be a sealing member disposed around the periphery of the semiconductor element between the upper surface of the substrate and the lower surface of the transparent member facing the substrate.

下述優先權在先申請之揭示內容係作為引用文記載於本說明書。 The disclosure of the prior priority is hereby incorporated by reference.

日本專利申請2014年第252065號(2014年12月12日申請) Japanese Patent Application No. 252065 of 2014 (applied on December 12, 2014)

1‧‧‧半導體裝置 1‧‧‧Semiconductor device

10‧‧‧電路基板(基板) 10‧‧‧Circuit board (substrate)

10c,10d‧‧‧側面 10c, 10d‧‧‧ side

20‧‧‧半導體元件 20‧‧‧Semiconductor components

20a‧‧‧上面 20a‧‧‧above

21‧‧‧機能區域 21‧‧‧ functional area

22‧‧‧電極 22‧‧‧Electrode

23‧‧‧金屬線 23‧‧‧Metal wire

40‧‧‧透明構件 40‧‧‧Transparent components

40c,40d‧‧‧側面 40c, 40d‧‧‧ side

41a‧‧‧上面 41a‧‧‧above

42b‧‧‧內側側面 42b‧‧‧ inside side

50‧‧‧密封構件 50‧‧‧ Sealing members

Claims (9)

一種半導體裝置,具備:基板,在上面設有端子;半導體元件,配置在該基板上面,具有電性連接於該基板之該端子之電極;透明構件,由覆蓋該半導體元件之上部之透明平板、與用以在該平板與該基板上面之間設置既定空隙之複數個腳部一體形成;以及密封構件,在該基板上面與和該基板上面對向之該透明構件下面之間,圍繞該半導體元件之周圍設置。 A semiconductor device comprising: a substrate having a terminal disposed thereon; a semiconductor element disposed on the substrate and having an electrode electrically connected to the terminal of the substrate; and a transparent member covered by a transparent plate covering the upper portion of the semiconductor element Forming a plurality of legs integrally formed with a predetermined gap between the plate and the upper surface of the substrate; and a sealing member surrounding the semiconductor between the substrate and the underside of the transparent member opposite to the substrate Set around the component. 如申請專利範圍第1項之半導體裝置,其中,該半導體元件之該電極係設在該半導體元件之上面,該半導體元件之該電極與該基板之該端子係藉由金屬線電性連接。 The semiconductor device of claim 1, wherein the electrode of the semiconductor device is disposed on the semiconductor device, and the electrode of the semiconductor device and the terminal of the substrate are electrically connected by a metal wire. 如申請專利範圍第1或2項之半導體裝置,其中,該腳部係接著於該基板上面。 The semiconductor device of claim 1 or 2, wherein the foot is attached to the substrate. 如申請專利範圍第1至3項中任一項之半導體裝置,其中,該半導體元件具有矩形形狀;該基板具有大於該半導體元件之矩形形狀;該透明構件具有大於該半導體元件之矩形形狀;該半導體元件,係以該半導體元件之各側邊位於該基板之各側邊內側之方式,配置在該基板之中央部;該腳部係設在該透明構件之四角;該密封構件將相鄰之該腳部之間加以密封。 The semiconductor device according to any one of claims 1 to 3, wherein the semiconductor device has a rectangular shape; the substrate has a rectangular shape larger than the semiconductor element; the transparent member has a rectangular shape larger than the semiconductor element; The semiconductor element is disposed at a central portion of the substrate such that each side of the semiconductor element is located inside each side of the substrate; the leg portion is disposed at four corners of the transparent member; the sealing member is adjacent The feet are sealed. 如申請專利範圍第3或4項之半導體裝置,其中,該密封構件之外周側面與該基板之四個側邊之各個形成為同一面。 The semiconductor device according to claim 3, wherein the outer peripheral side surface of the sealing member and the four side edges of the substrate are formed in the same plane. 如申請專利範圍第1至5項中任一項之半導體裝置,其中,該透明構件之上面及下面為彼此平行之平面。 The semiconductor device according to any one of claims 1 to 5, wherein the upper surface and the lower surface of the transparent member are planes parallel to each other. 一種半導體裝置之製造方法,包含:準備在上面具有供分別形成半導體裝置之複數個半導體裝置形成區域、在各半導體裝置形成區域內形成有端子之素材基板之步驟;在該素材基板之該各半導體裝置形成區域內配置在上面具有電極之半導體元件之步驟;對該半導體元件各個之該電極與形成在該素材基板之該端子進行打線之步驟;將具有複數個腳部且覆蓋該半導體元件之上部之透明構件配置在該素材基板之該各半導體裝置形成區域內,使配置在該複數個半導體裝置形成區域之各個之該透明構件彼此分離之步驟;在該素材基板上面與和該素材基板上面對向之該透明構件下面之間設置密封構件之步驟;以及將該素材基板就該各半導體裝置形成區域分離之步驟。 A method of manufacturing a semiconductor device, comprising: a step of preparing a plurality of semiconductor device formation regions for respectively forming a semiconductor device, and forming a material substrate of a terminal in each semiconductor device formation region; and the semiconductors on the material substrate a step of arranging a semiconductor element having an electrode thereon in a device formation region; a step of bonding the electrode of the semiconductor element to the terminal formed on the material substrate; and having a plurality of legs and covering the upper portion of the semiconductor device a transparent member disposed in each of the semiconductor device forming regions of the material substrate, and separating the transparent members disposed in each of the plurality of semiconductor device forming regions from each other; and on the material substrate and the material substrate a step of providing a sealing member between the opposite sides of the transparent member; and a step of separating the material substrate from the semiconductor device forming regions. 如申請專利範圍第7項之半導體裝置之製造方法,其中,在該素材基板上面與和該素材基板上面對向之該透明構件下面之間設置密封構件之步驟中,從配置在該素材基板之該複數個半導體裝置形成區域之各個且彼此分離之該透明構件彼此之間注入該密封構件,將該素材基板上面、該透明構件下面、該腳部側面圍繞之開口加以密封。 The method of manufacturing a semiconductor device according to claim 7, wherein the step of disposing a sealing member between the upper surface of the material substrate and the lower surface of the transparent member opposite to the material substrate is disposed on the material substrate The transparent member, which is separated from each other of the plurality of semiconductor device forming regions, is injected into the sealing member, and the opening of the material substrate, the transparent member, and the side of the leg portion are sealed. 如申請專利範圍第7或8項之半導體裝置之製造方法,其進一步具備製造該透明構件之步驟;該製造該透明構件之步驟,包含:準備具有可形成複數個透明構件之面積之透明構件素材板之步驟;藉由使切削工具往一方向移動,在該透明構件素材板形成具有該腳部之間隙量之寬度之第1槽之步驟;藉由使該切削工具往與該一方向正交之方向移動,對該透明構件素材板之未形成該第1槽之未加工部,形成具有該腳部之間隙量之寬度且與該第1槽正交之第2槽之步驟;以及將該透明構件素材板沿著該槽之延伸方向切斷之步驟。 The method of manufacturing a semiconductor device according to claim 7 or 8, further comprising the step of manufacturing the transparent member; the step of manufacturing the transparent member comprises: preparing a transparent member material having an area capable of forming a plurality of transparent members a step of forming a first groove having a width of the gap of the leg portion by moving the cutting tool in one direction; wherein the cutting tool is orthogonal to the one direction Moving in the direction of the unprocessed portion of the transparent member material sheet on which the first groove is not formed, forming a second groove having a width of the leg portion and orthogonal to the first groove; and The step of cutting the transparent member material sheet along the extending direction of the groove.
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