TW201614772A - Method of manufacturing semiconductor device - Google Patents

Method of manufacturing semiconductor device

Info

Publication number
TW201614772A
TW201614772A TW104126403A TW104126403A TW201614772A TW 201614772 A TW201614772 A TW 201614772A TW 104126403 A TW104126403 A TW 104126403A TW 104126403 A TW104126403 A TW 104126403A TW 201614772 A TW201614772 A TW 201614772A
Authority
TW
Taiwan
Prior art keywords
formation region
semiconductor device
memory cell
nonvolatile memory
gate electrode
Prior art date
Application number
TW104126403A
Other languages
English (en)
Other versions
TWI654718B (zh
Inventor
Fukuo Owada
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of TW201614772A publication Critical patent/TW201614772A/zh
Application granted granted Critical
Publication of TWI654718B publication Critical patent/TWI654718B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/50EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices
    • H10B20/20Programmable ROM [PROM] devices comprising field-effect components
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/40EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • H10D64/011
    • H10D64/013
    • H10P30/20
    • H10P30/22
    • H10P50/283
    • H10W20/493
    • H10P30/204
    • H10P30/21

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Memories (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Non-Volatile Memory (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
TW104126403A 2014-08-27 2015-08-13 半導體裝置的製造方法 TWI654718B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014172680A JP6401974B2 (ja) 2014-08-27 2014-08-27 半導体装置の製造方法
JP2014-172680 2014-08-27

Publications (2)

Publication Number Publication Date
TW201614772A true TW201614772A (en) 2016-04-16
TWI654718B TWI654718B (zh) 2019-03-21

Family

ID=55403483

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104126403A TWI654718B (zh) 2014-08-27 2015-08-13 半導體裝置的製造方法

Country Status (4)

Country Link
US (2) US20160064533A1 (zh)
JP (1) JP6401974B2 (zh)
CN (1) CN105390448B (zh)
TW (1) TWI654718B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI756386B (zh) * 2017-03-30 2022-03-01 日商瑞薩電子股份有限公司 半導體裝置的製造方法

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9659953B2 (en) * 2014-07-07 2017-05-23 Taiwan Semiconductor Manufacturing Co., Ltd. HKMG high voltage CMOS for embedded non-volatile memory
JP6594261B2 (ja) * 2016-05-24 2019-10-23 ルネサスエレクトロニクス株式会社 半導体装置
KR102607749B1 (ko) * 2016-08-02 2023-11-29 에스케이하이닉스 주식회사 3차원 구조의 반도체 메모리 장치
DE102018107908B4 (de) * 2017-07-28 2023-01-05 Taiwan Semiconductor Manufacturing Co., Ltd. Verfahren zum Bilden eines integrierten Schaltkreises mit einer Versiegelungsschicht zum Bilden einer Speicherzellenstruktur in Logik- oder BCD-Technologie sowie ein integrierter Schaltkreis mit einer Dummy-Struktur an einer Grenze einer Vorrichtungsregion
US10504912B2 (en) * 2017-07-28 2019-12-10 Taiwan Semiconductor Manufacturing Co., Ltd. Seal method to integrate non-volatile memory (NVM) into logic or bipolar CMOS DMOS (BCD) technology
JP2019102520A (ja) * 2017-11-29 2019-06-24 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
KR102778669B1 (ko) 2019-10-14 2025-03-12 양쯔 메모리 테크놀로지스 씨오., 엘티디. 3차원 nand를 위한 비트 라인 드라이버들의 격리를 위한 구조 및 방법

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3941517B2 (ja) * 2001-02-07 2007-07-04 ソニー株式会社 半導体装置およびその製造方法
KR100418928B1 (ko) * 2001-10-24 2004-02-14 주식회사 하이닉스반도체 엠디엘 반도체 소자의 제조 방법
JP2004039866A (ja) * 2002-07-03 2004-02-05 Toshiba Corp 半導体装置及びその製造方法
JP2006210718A (ja) * 2005-01-28 2006-08-10 Renesas Technology Corp 半導体装置の製造方法および半導体装置
JP2007005646A (ja) * 2005-06-24 2007-01-11 Sony Corp 半導体集積回路
JP2007234861A (ja) * 2006-03-01 2007-09-13 Renesas Technology Corp 半導体装置の製造方法
US8344446B2 (en) * 2006-12-15 2013-01-01 Nec Corporation Nonvolatile storage device and method for manufacturing the same in which insulating film is located between first and second impurity diffusion regions but absent on first impurity diffusion region
US8361863B2 (en) * 2008-11-13 2013-01-29 Mosys, Inc. Embedded DRAM with multiple gate oxide thicknesses
JP2010245160A (ja) * 2009-04-02 2010-10-28 Renesas Electronics Corp 半導体装置の製造方法
CN102593179A (zh) * 2012-03-09 2012-07-18 上海宏力半导体制造有限公司 Mos晶体管及其制造方法
JP2015118974A (ja) * 2013-12-17 2015-06-25 シナプティクス・ディスプレイ・デバイス合同会社 半導体装置の製造方法
JP6297860B2 (ja) * 2014-02-28 2018-03-20 ルネサスエレクトロニクス株式会社 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI756386B (zh) * 2017-03-30 2022-03-01 日商瑞薩電子股份有限公司 半導體裝置的製造方法

Also Published As

Publication number Publication date
CN105390448B (zh) 2021-04-06
US20160064533A1 (en) 2016-03-03
TWI654718B (zh) 2019-03-21
US9685453B2 (en) 2017-06-20
CN105390448A (zh) 2016-03-09
JP6401974B2 (ja) 2018-10-10
JP2016048710A (ja) 2016-04-07
US20160315093A1 (en) 2016-10-27

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