TW201530707A - Package substrate as well as manufacturing method thereof and semiconductor package as well as manufacturing method thereof - Google Patents

Abstract

This invention provides a package substrate, comprising: a layer-like main body; a plurality of conductive elements formed on the layer-like main body surface; and a positioning structure formed corresponding to each conductive element, so that an issue of the upper and lower packaged components positioning engaging with each other can be improved by the positioning structure, and the manufacturing yield and product quality can be enhanced. This invention further provides a manufacturing method of the package substrate, a semiconductor package and a manufacturing method thereof.

Description

Package substrate, preparation method thereof and semiconductor package and preparation method thereof

The present invention relates to a package substrate and a semiconductor package, and more particularly to a package substrate, a semiconductor package, and a method for fabricating the same.

With the evolution of semiconductor packaging technology, semiconductor packages have been developed in different package types, and various electronic products are increasingly required to be light, thin, and small in size, thereby saving substrate planar area and simultaneously taking into consideration processing performance. Embedded packages are gaining more and more attention.

Figures 1A through 1C show the fabrication of a conventional in-line package. As shown in FIG. 1A, the wafer 12 is attached to the lower substrate 1, and a plurality of conductive members such as metal posts 19 are formed on the surface of the lower substrate 1 around the wafer 12.

As shown in Fig. 1B, an upper substrate 1' is attached to the lower substrate 1, which is joined by a plurality of metal posts 19' and solder 18 formed thereon.

Finally, as shown in FIG. 1C, an encapsulant 17 is formed between the underlying substrate 1 and the upper substrate 1' to cover the wafer 12 and the metal pillars. 19, 19' and solder 18. A plurality of solder balls 16 may be formed on the lower surface of the lower substrate 1.

However, in the manufacturing method of the conventional semiconductor package, since the end faces of the metal pillars 19 are all flat, the alignment is not easy, however, even after the correct alignment, it is easy to occur when the surface of the metal pillar is fixed. The problem of sliding offset finally makes the manufacturing yield low.

Therefore, how to overcome the various problems of the above-mentioned prior art has become a problem that is currently being solved.

In view of the above-mentioned various deficiencies of the prior art, the present invention provides a package substrate comprising: a layered body; a plurality of conductive elements formed on a surface of the layered body; and a positioning structure, each system being formed on the corresponding conductive element on.

The invention provides a method for manufacturing a package substrate, comprising: forming a photoresist layer having a plurality of openings on a layered body; forming a conductive component in the opening, and forming a positioning structure at a terminal of the conductive component; and removing The photoresist layer.

In one embodiment of the fabrication method, a conductive element is formed by electroplating in the opening and a positioning structure is formed at the same time, and the positioning structure is a recess or a protrusion.

In one embodiment, the pocket is a V-shaped pocket or a U-shaped pocket.

In a specific embodiment, when the conductive element and the positioning structure are simultaneously formed, the conductive element and the positioning structure are integrally formed. For example, the conductive element and the positioning structure are metal.

In another embodiment, the positioning structure comprises: leveling the height of the conductive element and the photoresist layer; forming an insulating layer on the conductive element and the photoresist layer; and patterning the insulation on the conductive element And removing an insulating layer on the photoresist layer to form at least one body on each of the conductive elements as the positioning structure. In this embodiment, the block system is an annular hollow block that exposes the terminal surface of the conductive element.

The present invention further provides a semiconductor package comprising: the package substrate of the present invention; the electronic component having a plurality of metal pillars formed on the electronic component and solder formed on the metal pillar, wherein the electronic component is The solder is placed on the positioning structure; and an encapsulant is formed between the package substrate and the electronic component to encapsulate the conductive component, the metal pillar and the solder.

In the foregoing semiconductor package, the semiconductor device is provided and electrically connected to the package substrate or the electronic component.

The invention further provides a method for manufacturing a semiconductor package, comprising: providing a package substrate, the package substrate comprising: a layered body; a plurality of conductive elements formed on a surface of the layered body; correspondingly formed on each of the conductive elements Positioning structure; the electronic component is mounted on the positioning structure, wherein the surface of the electronic component is formed with a plurality of metal pillars and solder formed on the metal pillar, and the solder is placed on the positioning structure; An encapsulant is formed between the package substrate and the electronic component to encapsulate the conductive component, the metal post, and the solder.

In a specific embodiment of the method of fabricating the semiconductor package, the positioning structure is a recess or a protrusion. For example, the pocket is a V-shaped pocket or U-shaped pocket.

Moreover, the conductive element and the positioning structure can be integrally formed.

In addition, the conductive element and the positioning structure can be the same metal. In yet another embodiment, the positioning structure is an insulating material.

In another embodiment, the positioning structure is an annular hollow block that exposes the terminal surface of the conductive element.

As can be seen from the above, the package substrate of the present invention, the method for manufacturing the same, and the method for manufacturing the same, and the method for manufacturing the same by using a positioning structure on the conductive member, the package substrate has a self-alignment function, and the positioning structure can be When the surface of the upper metal post is fixed, the occurrence of sliding offset is avoided, so that the problem of positioning and joining of the upper and lower package components is improved, and the manufacturing yield and product quality are improved.

1‧‧‧Underlying substrate

1'‧‧‧Upper substrate

12‧‧‧ wafer

16‧‧‧ solder balls

17‧‧‧Package colloid

18‧‧‧ solder

19, 19’‧‧‧ metal columns

20, 50‧‧‧ layered ontology

201‧‧‧ conductor layer

202, 302, 502‧‧‧ conductive elements

202a, 302a, 303a, 502a‧‧‧ positioning structure

21‧‧‧Photoresist layer

210‧‧‧ openings

302a’‧‧‧ Traces

303‧‧‧Insulation

5‧‧‧Package substrate

5'‧‧‧Electronic components

52‧‧‧Semiconductor components

56‧‧‧ solder balls

57‧‧‧Package colloid

58‧‧‧ solder

59‧‧‧Metal column

1A to 1C are schematic cross-sectional views showing a method of fabricating a conventional in-line package; FIGS. 2A to 2C' are schematic cross-sectional views showing a method of manufacturing a package substrate of the present invention, wherein the 2B' is a 2B 2A to 3E' is a cross-sectional view showing another embodiment of the package substrate of the present invention, wherein, FIG. 3A to FIG. 3E are schematic cross-sectional views showing another embodiment of the package substrate of the present invention; 3E' is a plan view of FIG. 3E; FIGS. 4A to 4B' are schematic views showing another embodiment of the positioning structure; and FIGS. 5A to 5C are schematic cross-sectional views showing the semiconductor package of the present invention.

The other embodiments of the present invention will be readily understood by those skilled in the art from this disclosure.

It is to be understood that the structure, the proportions, the size, and the like of the present invention are intended to be used in conjunction with the disclosure of the specification, and are not intended to limit the invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effects and the objectives that can be achieved by the present invention. The technical content disclosed in the invention can be covered. In the meantime, the terms "upper" and "one" as used in the specification are merely for convenience of description, and are not intended to limit the scope of the invention, and the relative relationship is changed or adjusted. Without substantial changes to the technical content, it is also considered to be within the scope of the invention.

2A to 2C' are schematic cross-sectional views showing a method of manufacturing the package substrate of the present invention.

As shown in FIG. 2A, a layered body 20 is provided first. Examples of the layered body 20 may include wafers, wafers, germanium interposers, circuit boards, or other layered bodies that may be used in semiconductor structures or semiconductor packages. A photoresist layer 21 having a plurality of openings 210 is formed on the layered body 20. The photoresist layer 21 can be a dry film, and the surface of the layered body 20 in the opening 210 has a conductor layer 201 for forming a conductive process in a subsequent electroplating process. element.

As shown in FIG. 2B, a conductive element is formed by electroplating in the opening 210. 202, and in the electroplating step, the positioning structure 202a is fabricated at the end of the conductive element 202. For example, in this embodiment, since the plating liquid first reacts with the wall surface of the opening 210 of the photoresist layer 21, the surface of the wall of the opening 210 of the photoresist layer 21 will form a metal first, so the positioning structure 202a is a recess. .

Further, in this step, the plating liquid composition can be changed to form various U-shaped recesses different from those shown in Fig. 2B to form a V-shaped recess as shown in Fig. 2B'.

Next, as shown in Figs. 2C and 2C', the photoresist layer 21 is removed to obtain a package substrate.

According to the foregoing manufacturing method, the conductive element and the positioning structure can be integrally formed, and the conductive element and the positioning structure are both metal.

Please refer to FIGS. 3A to 3E' for a cross-sectional view showing another manufacturing method of the package substrate of the present invention.

As shown in FIG. 3A, the step of continuing to FIG. 2A is performed on the conductor layer 201 to form a conductive element 302. In this embodiment, the height of the conductive element 302 is higher than that of the photoresist layer 21. height. As shown in FIG. 3B, the height of the conductive member 302 and the photoresist layer 21 is leveled by grinding to make the conductive member 302 flush with the photoresist layer 21.

As shown in FIG. 3C, an insulating layer 303 is formed on the conductive element 302 and the photoresist layer 21.

Then, the insulating layer 303 on the conductive element 302 is patterned by a patterning process such as lithography etching, and the insulating layer 303 on the photoresist layer 21 is removed to form a 3D pattern on each of the conductive elements 302. At least shown A block is used as the positioning structure 303a.

As shown in FIG. 3E, finally, the photoresist layer 21 is removed to obtain a package substrate.

Further, as shown in Fig. 3E', the block or the positioning structure 303a is an annular hollow block which exposes the terminal surface of the conductive member 302. However, when the block or the positioning structure is an insulating material, its size must be smaller than the area of the end face of the conductive member, and the electronic component is electrically connected.

Of course, the block may have other shapes and expose the block surface to the end surface of the conductive member 302.

Referring to FIG. 4A, the positioning structure may also be a block of other shapes, but is a protrusion. For example, the conductive element 302 shown in FIG. 3B can be patterned to obtain a positioning structure 302a having a convex shape.

As shown in FIG. 4B, the conductive element 302 shown in FIG. 3B can be connected to the conductive element 302 to form a protrusion such as a trace 302a' or other shape by electroplating or printing technology. As a positioning structure. Instead, it is a kind of protruding portion of the conductive material, so that the solder that is butted against the protruding portion is wetted and adhered thereto, and has the effect of cohesion, and the positioning of the crucible is generated.

According to the foregoing method, the package substrate of the present invention comprises a layered body 20, a plurality of conductive elements 202, 302 and a plurality of positioning structures 202a, 302a, 303a.

The plurality of conductive elements 202, 302 are formed on the surface of the layered body 20.

Each of the positioning structures 202a, 302a, 303a is formed on each of the corresponding conductive elements 202, 302, and the positioning structure 202a is a recess, the concave V-shaped pockets or U-shaped pockets, but not limited to this. Or the positioning structures 302a, 303a are projections.

If the protruding portion is a metal, it may be a trace 302a' or other external shape, and the solder which is butted with the protruding portion is wetted and adhered thereto by the protruding portion of the conductive material, and is cohesive. The effect, the role of positioning.

In addition, when the conductive element and the positioning structure are both metal, the conductive element and the positioning structure may be integrally formed or separately formed.

In a specific embodiment, the positioning structure is an insulating material, and the material thereof can be, for example, a solder resist. Moreover, when the positioning structure 303a is an insulating material, the positioning structure 303a can be an annular hollow block, and the terminal surface of the conductive element 302 is exposed. Of course, the block may have other shapes and expose the block surface to the end surface of the conductive member 302.

Referring to Figures 5A through 5, there are shown schematic cross-sectional views of a semiconductor package of the present invention.

As shown in FIG. 5A, a package substrate 5 is provided. The package substrate 5 includes: a layered body 50; a plurality of conductive elements 502 are formed on the surface of the layered body 50; and a plurality of positioning structures 502a are formed in each Corresponding to the conductive element 502.

The positioning structure may be the positioning structure of the present invention described above, that is, a recess or a projection. When the positioning structure is a recess, it may be a V-shaped recess, a U-shaped recess or other appearance, but is not limited thereto.

If the projection is metal, it can be a trace or other shape.

In addition, when the conductive element and the positioning structure are both metal, the conductive element and the positioning structure may be integrally formed or separately formed.

In a specific embodiment, the positioning structure is an insulating material, and the material thereof can be, for example, a solder resist. Moreover, when the positioning structure is an insulating material, the positioning structure may be an annular hollow block, and the terminal surface of the conductive element is exposed. Of course, the block may have other shapes and expose the block surface to the end surface of the conductive member.

On the other hand, a semiconductor element 52, such as a semiconductor wafer, may be attached to the same side surface of the package substrate 5 and the conductive element 502.

Next, as shown in FIG. 5B, the electronic component 5' is attached to the positioning structure 502a, and the electronic component 5' can be a semiconductor wafer, a package structure, or another package substrate as shown in the figure, wherein The surface of the electronic component 5' is formed with a plurality of metal pillars 59 and solder 58 formed on the metal pillars 59, and is attached to the positioning structure 502a by the solder 58.

As shown in FIG. 5C, an encapsulant 57 is formed between the package substrate 5 and the electronic component 5' to cover the conductive component 502, the metal post 59, the solder 58, and the semiconductor component 52. Furthermore, solder balls 56 are formed on the lower surface of the package substrate 5 to electrically connect external components such as a circuit board.

In addition, it can be understood that the package substrate 5 having the positioning structure 502a is not disposed below as shown in the drawings, and may be an electronic component 5' that is connected to the lower side from the upper side.

According to the foregoing method, the present invention further provides a semiconductor package comprising: the package substrate 5 of the present invention; the electronic component 5' having a plurality of metal pillars 59 formed on the electronic component 5' and formed on the metal pillar a solder 58 on the 59, and the electronic component 5' is attached to the positioning structure 502a by the solder 58; and an encapsulant 57 is formed on the package substrate 5 The conductive member 502, the metal post 59, and the solder 58 are coated between the electronic component 5' and the electronic component 5'.

In the foregoing semiconductor package, the semiconductor element 52 is provided and electrically connected to the package substrate 5 or the electronic component 5'. The semiconductor package may include a solder ball 56 formed on a lower surface of the package substrate 5 to electrically connect external components such as a circuit board.

The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.

20‧‧‧Layered ontology

201‧‧‧ conductor layer

202‧‧‧Conductive components

202a‧‧‧ Positioning structure

Claims (38)

A package substrate includes: a layered body; a plurality of conductive elements formed on a surface of the layered body; and a plurality of positioning structures each formed on the corresponding conductive element. The package substrate of claim 1, wherein the conductive member is a metal post. The package substrate of claim 1, wherein the positioning structure is a recess or a protrusion. The package substrate of claim 2, wherein the recess is a V-shaped recess or a U-shaped recess. The package substrate of claim 1, wherein the conductive element and the positioning structure are integrally formed. The package substrate of claim 1, wherein the conductive element and the positioning structure are metal. The package substrate of claim 1, wherein the positioning structure is an insulating material. The package substrate of claim 1, wherein the positioning structure is an annular hollow block. The package substrate of claim 8, wherein the end surface of the conductive element exposes the annular hollow block. A semiconductor package comprising: a package substrate as claimed in claim 1; The electronic component has a plurality of metal pillars formed on the electronic component and solder formed on the metal pillar, and the electronic component is placed on the positioning structure by the solder; and the encapsulant is formed on the electronic component. The package substrate and the electronic component of claim 1 are coated to coat the conductive component, the metal pillar, and the solder. The semiconductor package of claim 10, wherein the conductive element is a metal post. The semiconductor package of claim 10, wherein the positioning structure is a recess or a projection. The semiconductor package of claim 12, wherein the recess is a V-shaped recess or a U-shaped recess. The semiconductor package of claim 10, wherein the conductive element and the positioning structure are integrally formed. The semiconductor package of claim 10, wherein the conductive element and the positioning structure are metal. The semiconductor package of claim 10, wherein the positioning structure is an insulating material. The semiconductor package of claim 10, wherein the positioning structure is an annular hollow block. The semiconductor package of claim 17, wherein the end surface of the conductive element exposes the annular hollow block. The semiconductor package of claim 10, wherein the electronic component is a semiconductor wafer, a package structure, or another package substrate. A method for manufacturing a package substrate, comprising: forming a photoresist layer having a plurality of openings on a layered body; forming a conductive element in the opening, and forming a positioning structure at a terminal of the conductive element; and removing the photoresist layer . The method of manufacturing a package substrate according to claim 20, wherein the conductive element is plated in the opening to form a positioning structure, and the positioning structure is a recess or a protrusion. The method of manufacturing a package substrate according to claim 21, wherein the recess is a V-shaped recess or a U-shaped recess. The method of manufacturing a package substrate according to claim 20, wherein the conductive element and the positioning structure are integrally formed. The method of manufacturing a package substrate according to claim 20, wherein the conductive element and the positioning structure are metal. The method for manufacturing a package substrate according to claim 20, wherein the positioning structure comprises: flattening a height of the conductive element and the photoresist layer; forming an insulating layer on the conductive element and the photoresist layer; And patterning the insulating layer on the conductive element and removing the insulating layer on the photoresist layer to form at least one body on each of the conductive elements as the positioning structure. The method of manufacturing a package substrate according to claim 20, wherein the block system is an annular hollow block. The method for manufacturing a package substrate according to claim 26, The end surface of the conductive element exposes the annular hollow block. A method of fabricating a semiconductor package, comprising: providing a package substrate, the package substrate comprising: a layered body; a plurality of conductive elements formed on a surface of the layered body; and a plurality of positioning structures corresponding to each of the conductive layers On the component, the electronic component is mounted on the positioning structure, wherein the surface of the electronic component is formed with a plurality of metal pillars and solder formed on the metal pillar, and the solder is placed on the positioning structure; An encapsulant is formed between the package substrate and the electronic component to encapsulate the conductive component, the metal post, and the solder. The method of fabricating a semiconductor package according to claim 28, wherein the positioning structure is a recess or a protrusion. The method of fabricating a semiconductor package according to claim 29, wherein the recess is a V-shaped recess or a U-shaped recess. The method of fabricating a semiconductor package according to claim 29, wherein the protrusion is a conductive trace. The method of fabricating a semiconductor package according to claim 28, wherein the conductive element and the positioning structure are integrally formed. The method of fabricating a semiconductor package according to claim 28, wherein the conductive element and the positioning structure are metal. The method of fabricating a semiconductor package according to claim 28, wherein the positioning structure is an insulating material. The method of manufacturing a semiconductor package as described in claim 28, Wherein, the positioning structure is an annular hollow block. The method of fabricating a semiconductor package according to claim 35, wherein the end surface of the conductive element exposes the annular hollow block. The method of fabricating a semiconductor package according to claim 28, wherein the semiconductor device is provided on or on the package substrate of claim 1 of the patent application. The method of fabricating a semiconductor package according to claim 28, wherein the electronic component is a semiconductor wafer, a package structure or another package substrate.