TW201507091A - Silicon-controlled rectification device with high efficiency - Google Patents

Abstract

A silicon-controlled rectification device with high efficiency is disclosed, which comprises a P-type region surrounding an N-type region. A first P-type heavily doped area is arranged in the N-type region and connected with a high-voltage terminal. A plurality of second N-type heavily doped areas is arranged in the N-type region. A plurality of second P-type heavily doped areas is closer to the second N-type heavily doped areas than the first N-type heavily doped area and arranged in the P-type region. At least one third N-type heavily doped area is arranged in the P-type region and connected with a low-voltage terminal. Alternatively or in combination, the second N-type heavily doped areas and the second P-type heavily doped areas are respectively arranged in the P-type region and the N-type region.

Description

High efficiency controlled rectifier

The present invention relates to a rectifying device, and more particularly to a high efficiency 矽 controlled rectifying device.

Since the components of the integrated circuit (IC) have been miniaturized to the nanometer size, they are easily damaged by the impact of electrostatic discharge (ESD), and some electronic products, such as notebook computers or mobile phones, are made lighter than before. Short. For these electronic products, if the protection is not protected by an appropriate ESD protection device, the electronic product is easily affected by the ESD, and the electronic product is restarted, and even the hardware is damaged and cannot be recovered. Before high voltages harm internal components, ESD components are used in many integrated circuits to release the high voltage received by the external pins. One of the ESD components is a controlled rectifier.

1 is a component structure of a prior art controlled rectifier, which includes an N-type well region 10, a P-type well region 12 located in a P-type substrate 14, and a high concentration in the N-type well region 10. P-type heavily doped region 16 and a high concentration N-type heavily doped region 18, a high concentration P-type heavily doped region 20 in the P-type well region 12 and a high concentration N-type heavily doped region twenty two. In the controlled rectifier, the P-type heavily doped region 16, the N-type heavily doped region 18, the N-type well region 10 and the P-type well region 12 form a PNP transistor, and the N-type well region 10, P-type well Region 12 and N-type heavily doped region 22 form an NPN transistor. An external pad PAD is electrically connected to the P-type heavily doped region 16 and the N-type heavily doped region 18, and an external ground pad GND is electrically connected to the P-type heavily doped region 20 and the N-type heavily doped region 22. So when the PAD receives a high battery This voltage controlled rectifier can be triggered to release a current to GND. However, the trigger voltage and holding voltage of this pilot rectifier are fixed. This design does not provide adjustable voltage and sustain voltage to meet ESD protection requirements. In addition, the ESD current of the controlled rectifier cannot be evenly distributed, which will result in low ESD efficiency.

Accordingly, the present invention has been made in view of the above problems, and proposes a high efficiency controlled rectifier device to solve the problems caused by the prior art.

The main object of the present invention is to provide a high-efficiency controlled-controlled rectifying device which uses a uniformly distributed N-type and P-type heavily doped regions to establish a complex evenly distributed electrostatic discharge (ESD) path and adjust the holding voltage (holding voltage) ) and triggering voltage to meet ESD protection requirements.

To achieve the above object, the present invention provides a high efficiency controlled rectifier device comprising a P-type substrate and an N-type well region, the N-type well region being disposed in the P-type substrate. A first P-type heavily doped region and at least a first N-type heavily doped region are disposed in the N-type well region and connected to a high voltage terminal. The plurality of second N-type heavily doped regions are uniformly disposed in the N-type well region, and the second N-type heavily doped region and the first N-type heavily doped region are located outside the first P-type heavily doped region. The plurality of second P-type heavily doped regions are uniformly disposed in the P-type substrate, and are closer to the second N-type heavily doped region than the first N-type heavily doped region, and are uniformly disposed in the N-type well region Outside. Further, at least one third N-type heavily doped region is disposed in the P-type substrate and connected to a low voltage end, and the second P-type heavily doped region is disposed in the third N-type heavily doped region and the N-type well region. Between the second N-type heavily doped region and the second P-type heavily doped region, the first condition, the second condition, or both are met. The first condition is that the second N-type heavily doped region extends toward the third N-type heavily doped region and is disposed in the P-type substrate; the second condition is that the second P-type heavily doped region is heavily doped to the first P-type The miscellaneous area extends and is located in the N-type well area.

The present invention provides another high efficiency controlled rectifier device comprising an N-type substrate and a P-type well region, the P-type well region being disposed in the N-type substrate to surround an N-type region of one of the N-type substrates. One The first P-type heavily doped region and the at least one first N-type heavily doped region are disposed in the N-type region and connected to a high voltage terminal. The plurality of second N-type heavily doped regions are uniformly disposed in the N-type region, and the second N-type heavily doped region and the first N-type heavily doped region are located outside the first P-type heavily doped region. The plurality of second P-type heavily doped regions are uniformly disposed in the P-type well region, and are closer to the second N-type heavily doped region than the first N-type heavily doped region, and are uniformly disposed in the N-type region Outside. Further, at least one third N-type heavily doped region is disposed in the P-type well region and connected to a low voltage terminal, and the second P-type heavily doped region is disposed in the third N-type heavily doped region and the N-type region Between the second N-type heavily doped region and the second P-type heavily doped region, the first condition, the second condition, or both are met. The first condition is that the second N-type heavily doped region extends to the third N-type heavily doped region and is disposed in the P-type well region; the second condition is that the second P-type heavily doped region is toward the first P-type heavily The doped region extends and is disposed in the N-type region.

For a better understanding and understanding of the structural features and the achievable effects of the present invention, please refer to the preferred embodiment and the detailed description.

10‧‧‧N type well area

12‧‧‧P type well area

14‧‧‧P type substrate

16‧‧‧P type heavily doped area

18‧‧‧N type heavily doped area

20‧‧‧P type heavily doped area

22‧‧‧N type heavily doped area

24‧‧‧P type substrate

26‧‧‧N type well area

28‧‧‧First P-type heavily doped area

30‧‧‧First N-type heavily doped area

32‧‧‧Second N-type heavily doped area

34‧‧‧Second P-type heavily doped area

36‧‧‧Third N-type heavily doped area

38‧‧‧N type substrate

40‧‧‧P type well area

42‧‧‧N-type area

44‧‧‧First P-type heavily doped area

46‧‧‧First N-type heavily doped area

48‧‧‧Second N-type heavily doped area

50‧‧‧Second P-type heavily doped area

52‧‧‧Third N-type heavily doped area

Figure 1 is a cross-sectional view showing the structure of a prior art controlled rectifier.

Fig. 2 is a schematic view showing the layout of the first embodiment of the present invention.

3(a) to 3(c) are cross-sectional views showing the structure of the A-A', B-B', and C-C' lines along the second drawing of the present invention.

Figure 4 is a graph of current versus voltage for a first embodiment of the present invention.

Figure 5 is a schematic view showing the layout of a second embodiment of the present invention.

6(a) to 6(c) are cross-sectional views showing the structure of the A-A', B-B', and C-C' segments along the fifth drawing of the present invention, respectively.

Figure 7 is a graph of current versus voltage for a second embodiment of the present invention.

Figure 8 is a schematic view showing the layout of a third embodiment of the present invention.

Fig. 9(a) to Fig. 9(c) are respectively sectional views showing the structure of the A-A', B-B', and C-C' segments along the eighth drawing of the present invention.

Figure 10 is a graph of current versus voltage for a third embodiment of the present invention.

Figure 11 is a schematic view showing the layout of a fourth embodiment of the present invention.

Fig. 12(a) to Fig. 12(c) are respectively sectional views showing the structure of the A-A', B-B', and C-C' segments along the eleventh embodiment of the present invention.

Figure 13 is a graph of current versus voltage for a fourth embodiment of the present invention.

Figure 14 is a schematic view showing the layout of a fifth embodiment of the present invention.

15(a) to 15(c) are respectively sectional views showing the structure of the A-A', B-B', and C-C' segments along the 14th drawing of the present invention.

Figure 16 is a graph of current versus voltage for a fifth embodiment of the present invention.

Figure 17 is a schematic view showing the layout of a sixth embodiment of the present invention.

Fig. 18(a) to Fig. 18(c) are respectively sectional views showing the structure of the A-A', B-B', and C-C' segments along the 17th drawing of the present invention.

Figure 19 is a graph of current versus voltage for a sixth embodiment of the present invention.

Figure 20 is a schematic view showing the layout of a seventh embodiment of the present invention.

21(a) to 21(c) are respectively sectional views showing the structure of the A-A', B-B', and C-C' segments along the 20th drawing of the present invention.

Figure 22 is a graph of current versus voltage for a seventh embodiment of the present invention.

Figure 23 is a schematic view showing the layout of an eighth embodiment of the present invention.

Figs. 24(a) to 24(c) are respectively sectional views showing the structure of the A-A', B-B', and C-C' segments along the 23rd drawing of the present invention.

Figure 25 is a graph of current versus voltage for an eighth embodiment of the present invention.

Referring to Fig. 2 and Figs. 3(a) to 3(c), the first embodiment of the present invention will be described below. The first embodiment includes a P-type substrate 24 and an N-type well region 26 that is disposed in the P-type substrate 24. A first P-type heavily doped region 28 and at least a first N-type heavily doped region 30 are disposed in the N-type well region 26 and connected to a high voltage terminal VDD. Since the first N-type heavily doped region 30 is connected to the high voltage terminal VDD, the controlled rectifier device is not triggered in normal operation. In this embodiment, the number of the first N-type heavily doped regions 30 is exemplified by two. The plurality of second N-type heavily doped regions 32 are uniformly disposed in the N-type well region 26, and the second N-type heavily doped region 32 and the first N-type heavily doped region 30 are located in the first P-type heavily doped region 28 outside the side. The second N-type heavily doped region 32 is divided into two first groups, and the second N-type heavily doped regions 32 of each first group are arranged in a row along the sidewall of the N-type well region 26, and two The first group is disposed along the opposite sides of the first P-type heavily doped region 28, respectively. The first N-type heavily doped region 30 is interleaved with the first N-type heavily doped region 32 of the first group.

The plurality of second P-type heavily doped regions 34 are uniformly disposed in the P-type substrate 24 and are divided into two second groups. The second P-type heavily doped regions 34 of each second group are arranged in a row along the sidewalls of the N-type well region 26, and the two second groups are disposed along the opposite sides of the N-type well region 26, respectively. The second P-type heavily doped region 34 of any one group is closer to the second N-type heavily doped region 32 of any group than the first N-type heavily doped region 30, and is uniformly disposed outside the N-type well region 26. In addition, at least one third N-type heavily doped region 36 is disposed in the P-type substrate 24 and connected to a low voltage terminal VSS. The number of the third N-type heavily doped regions 36 is exemplified by two. The second P-type heavily doped region 34 is disposed between the third N-type heavily doped region 36 and the N-type well region 26, and the two ends of the third N-type heavily doped region 36 extend toward the N-type well region 26 to The width between the third N-type heavily doped region 36 and the N-type well region 26 is shortened. The second N-type heavily doped region 32 and the second P-type heavily doped region 34 establish a complex uniform ESD path to enhance ESD efficiency.

Please refer to Figures 2 and 4. The solid line and the broken line represent the first embodiment of the present invention and the prior art step-controlled rectifier, respectively. In the prior art, the 矽 controlled rectifier utilizes the N-type well The P-type heavily doped region in the region and the N-type heavily doped region in the P-type well region. Because the second N-type heavily doped region 32 and the second P-type heavily doped region 34 of the present invention can establish a complex uniform ESD path, and are interposed between the third N-type heavily doped region 36 and the N-type well region 26 The width between the two can be shortened, so that the sustain voltage V2 of the first embodiment is higher than the sustain voltage V1 of the prior art rectifier rectifier. Therefore, the ESD performance of the present invention is improved. In other words, the more the number of the second N-type heavily doped region 32 and the second P-type heavily doped region 34, the higher the sustain voltage, and the more the shortened width, the higher the sustain voltage.

Referring to Fig. 5 and Figs. 6(a) to 6(c), a second embodiment of the present invention will be described below. The second embodiment differs from the first embodiment in the position occupied by the second N-type heavily doped region 32. In the second embodiment, the second N-type heavily doped region 32 extends toward the third N-type heavily doped region 36 and is located in the P-type substrate 24 and the N-type well region 26. Referring to Figures 5 and 7, the solid line and the broken line represent the second embodiment of the present invention and the prior art step-controlled rectifier, respectively. Since the PN junction of the second N-type heavily doped region 32 is closer to the third N-type heavily doped region 36 than the first embodiment, the trigger voltage V4 of the second embodiment is lower than that of the prior art controlled rectifier. Voltage V3.

Referring to Fig. 8 and Figs. 9(a) to 9(c), a third embodiment of the present invention will be described below. The third embodiment differs from the first embodiment in the position occupied by the second P-type heavily doped region 34. In the third embodiment, the second P-type heavily doped region 34 extends toward the first P-type heavily doped region 28 and is located in the P-type substrate 24 and the N-type well region 26. Referring to Figures 8 and 10, the solid line and the broken line represent the third embodiment of the present invention and the prior art step-controlled rectifier, respectively. Since the PN junction of the second P-type heavily doped region 34 is closer to the first P-type heavily doped region 28 than the first embodiment, the trigger voltage V5 of the third embodiment is lower than that of the prior art controlled rectifier Voltage V3.

Referring to Fig. 11 and Figs. 12(a) to 12(c), a fourth embodiment of the present invention will be described below. The fourth embodiment differs from the first embodiment in the position occupied by the second N-type heavily doped region 32 and the second P-type heavily doped region 34. In the fourth embodiment, the second N-type heavily doped region 32 extends toward the third N-type heavily doped region 36 and is located in the P-type substrate 24 and the N-type well region 26. Second P-type heavily doped Region 34 extends toward first P-type heavily doped region 28 and is located in P-type substrate 24 and N-type well region 26. Referring to Figures 11 and 13, the solid line and the broken line represent the fourth embodiment of the present invention and the prior art step-controlled rectifier, respectively. Because the PN junction of the second N-type heavily doped region 32 is closer to the third N-type heavily doped region 36 than the first embodiment, and the PN junction of the second P-type heavily doped region 34 is compared to the first embodiment. It is closer to the first P-type heavily doped region 28, so the trigger voltage V6 of the fourth embodiment is lower than the trigger voltage V3 of the prior art controlled rectifier.

Referring to Fig. 14 and Figs. 15(a) to 15(c), a fifth embodiment of the present invention will be described below. The fifth embodiment includes an N-type substrate 38 and a P-type well region 40 that is disposed in the N-type substrate 38 to surround an N-type region 42 of the N-type substrate 38. A first P-type heavily doped region 44 and at least one first N-type heavily doped region 46 are disposed in the N-type region 42 and connected to a high voltage terminal VDD. Since the first N-type heavily doped region 46 is connected to the high voltage terminal VDD, the controlled rectifier device is not triggered in normal operation. In this embodiment, the number of the first N-type heavily doped regions 46 is exemplified by two. The plurality of second N-type heavily doped regions 48 are uniformly disposed in the N-type region 42, and the second N-type heavily doped region 48 and the first N-type heavily doped region 46 are located in the first P-type heavily doped region 44. Outside. The second N-type heavily doped region 48 is divided into two first groups, and the second N-type heavily doped regions 48 of each first group are arranged in a row along the sidewall of the N-type region 42 and two A group is disposed along the opposite sides of the first P-type heavily doped region 44, respectively. The first N-type heavily doped region 46 is interleaved with the first N-type heavily doped region 48 of the first group.

The plurality of second P-type heavily doped regions 50 are uniformly disposed in the P-type well region 40 and are divided into two second groups. The second P-type heavily doped regions 50 of each of the second groups are arranged in a row along the sidewalls of the N-type regions 42, and the second groups are respectively disposed along the opposite sides of the N-type regions 42. The second P-type heavily doped region 50 of any one group is closer to the second N-type heavily doped region 48 of any group than the first N-type heavily doped region 46, and is uniformly disposed on the outer side of the N-type region 42. In addition, at least one third N-type heavily doped region 52 is disposed in the P-type substrate 38 and connected to a low voltage terminal VSS, and the third N-type heavily doped region 52 The number is based on two. The second P-type heavily doped region 50 is disposed between the third N-type heavily doped region 52 and the N-type region 42. The two ends of the third N-type heavily doped region 52 extend toward the N-type region 42 to shorten The width between the third N-type heavily doped region 52 and the N-type region 42. The second N-type heavily doped region 48 and the second P-type heavily doped region 50 establish a complex uniform ESD path to enhance ESD efficiency.

Please refer to Figures 14 and 16. The solid line and the broken line represent the fifth embodiment of the present invention and the prior art controlled rectifier, respectively. Because the second N-type heavily doped region 48 and the second P-type heavily doped region 50 of the present invention can establish a complex uniform ESD path between the third N-type heavily doped region 52 and the N-type region 42. The width of the fifth embodiment can be shortened, so that the sustain voltage V2' of the fifth embodiment is higher than the sustain voltage V1' of the prior art rectifier rectifier. Therefore, the ESD performance of the present invention is improved. In other words, the more the number of the second N-type heavily doped region 48 and the second P-type heavily doped region 50, the higher the sustain voltage, and the more the shortened width, the higher the sustain voltage.

Referring to Fig. 17 and Figs. 18(a) to 18(c), a sixth embodiment of the present invention will be described below. The sixth embodiment differs from the fifth embodiment in the position occupied by the second N-type heavily doped region 48. In the sixth embodiment, the second N-type heavily doped region 48 extends toward the third N-type heavily doped region 52 and is located in the P-type well region 40 and the N-type region 42. Referring to Figures 17 and 19, the solid line and the broken line represent the sixth embodiment of the present invention and the prior art controlled rectifier, respectively. Since the PN junction of the second N-type heavily doped region 48 is closer to the third N-type heavily doped region 52 than the fifth embodiment, the trigger voltage V4' of the sixth embodiment is lower than that of the prior art controlled rectifier Trigger voltage V3'.

Referring to Fig. 20 and Figs. 21(a) to 21(c), a seventh embodiment of the present invention will be described below. The seventh embodiment differs from the fifth embodiment in the position occupied by the second P-type heavily doped region 50. In the seventh embodiment, the second P-type heavily doped region 50 extends toward the first P-type heavily doped region 44 and is located in the P-type well region 40 and the N-type region 42. Referring to Figures 20 and 22, the solid line and the broken line represent the seventh embodiment of the present invention and the prior art controlled rectifier, respectively. Since the PN junction of the second P-type heavily doped region 50 is closer to the first P-type heavily doped region 44 than the fifth embodiment, the seventh embodiment The trigger voltage V5' is lower than the trigger voltage V3' of the prior art rectifier rectifier.

Referring to Fig. 23 and Figs. 24(a) to 24(c), an eighth embodiment of the present invention will be described below. The eighth embodiment differs from the fifth embodiment in the position occupied by the second N-type heavily doped region 48 and the second P-type heavily doped region 50. In the eighth embodiment, the second N-type heavily doped region 48 extends toward the third N-type heavily doped region 52 and is located in the P-type well region 40 and the N-type region 42. The second P-type heavily doped region 50 extends toward the first P-type heavily doped region 44 and is located in the P-type well region 40 and the N-type region 42. Referring to Figures 23 and 25, the solid line and the broken line represent the eighth embodiment of the present invention and the prior art step-controlled rectifier, respectively. Because the PN junction of the second N-type heavily doped region 48 is closer to the third N-type heavily doped region 52 than the fifth embodiment, and the PN junction of the second P-type heavily doped region 50 is compared to the fifth embodiment. It is closer to the first P-type heavily doped region 44, so the trigger voltage V6' of the eighth embodiment is lower than the trigger voltage V3' of the prior art controlled rectifier.

In summary, the present invention changes the number of uniformly disposed N-type and P-type heavily doped regions to improve ESD efficiency.

The above is only the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, so that the shapes, structures, features, and spirits described in the claims of the present invention are equally varied and modified. All should be included in the scope of the patent application of the present invention.

24‧‧‧P type substrate

26‧‧‧N type well area

28‧‧‧First P-type heavily doped area

30‧‧‧First N-type heavily doped area

32‧‧‧Second N-type heavily doped area

34‧‧‧Second P-type heavily doped area

36‧‧‧Third N-type heavily doped area

Claims (10)

A high efficiency controlled voltage rectifying device comprises: a P-type substrate; an N-type well region, which is disposed in the P-type substrate; and a first P-type heavily doped region, which is disposed in the N-type well region And connecting a high voltage terminal; at least one first N-type heavily doped region is disposed in the N-type well region and connected to the high voltage terminal; and the plurality of second N-type heavily doped regions are Uniformly disposed in the N-type well region, the second N-type heavily doped regions and the first N-type heavily doped region are located outside the first P-type heavily doped region; the plurality of second P-type heavy a doped region uniformly disposed in the P-type substrate and closer to the second N-type heavily doped regions than the first N-type heavily doped region, and uniformly disposed in the N-type well region And an at least one third N-type heavily doped region disposed in the P-type substrate and connected to a low voltage end, wherein the second P-type heavily doped regions are disposed on the third N-type heavy Between the doped region and the N-type well region, the second N-type heavily doped regions and the second P-type heavily doped regions meet the first condition, the second condition, or both, the first The condition is that the second N-type heavily doped regions are heavier to the third N-type Heteroaryl region extends, and disposed in the P-type substrate, extending the second condition to the first P type heavily doped P-type region for the plurality of second heavily doped region, and disposed in the N-type well region. The high efficiency controlled rectifier device of claim 1, wherein the first N-type heavily doped region and the second N-type heavily doped regions are disposed on a periphery of the first P-type heavily doped region. The high efficiency controlled rectifier device of claim 1, wherein the number of the first N-type heavily doped regions is two, and the number of the third N-type heavily doped regions is two. The high efficiency controlled rectifier device according to claim 1, wherein the second N-type heavily doped regions are arranged in a row along a sidewall of the N-type well region, and the second P-type heavily doped regions are along the N The side walls of the well zone are lined up. The high efficiency controlled rectifier device of claim 1, wherein the two ends of the third N-type heavily doped region extend toward the N-type well region to shorten the third N-type heavily doped region and the The width of the N-type well area. A high efficiency 矽 controlled rectifier device comprising: an N-type substrate; a P-type well region disposed in the N-type substrate to surround an N-type region of the N-type substrate; a first P-type heavily doped a miscellaneous region disposed in the N-type region and connected to a high voltage terminal; at least one first N-type heavily doped region disposed in the N-type region and connected to the high voltage terminal; a second N-type heavily doped region uniformly disposed in the N-type region, wherein the second N-type heavily doped region and the first N-type heavily doped region are located in the first P-type heavily doped region a plurality of second P-type heavily doped regions uniformly disposed in the P-type well region and closer to the second N-type heavily doped regions than the first N-type heavily doped region; And uniformly disposed on the outer side of the N-type region; and at least a third N-type heavily doped region disposed in the P-type well region and connected to a low voltage terminal, the second P-type heavily doped The impurity region is disposed between the third N-type heavily doped region and the N-type region, and the second N-type heavily doped regions and the second P-type heavily doped regions meet the first condition and the second Condition or both, the first condition is the The second N-type heavily doped region extends to the third N-type heavily doped region and is disposed in the P-type well region, and the second condition is that the second P-type heavily doped regions are toward the first P-type The heavily doped region extends and is disposed in the N-type region. The high efficiency controlled voltage rectifying device of claim 6, wherein the first N-type heavily doped region and the second N-type heavily doped regions are disposed at a periphery of the first P-type heavily doped region. The high efficiency controlled rectifier device according to claim 6, wherein the number of the first N-type heavily doped regions is two, and the number of the third N-type heavily doped regions is two. The high efficiency controlled rectifier device of claim 6, wherein the second N-type heavily doped regions are along the The sidewalls of the N-type region are arranged in a row, and the second P-type heavily doped regions are aligned in a row along the sidewall of the N-type region. The high-efficiency controlled voltage rectifying device of claim 6, wherein the two ends of the third N-type heavily doped region extend toward the N-type region to shorten the third N-type heavily doped region and the P The width of the well zone.