TW201506899A - Display system and data transmission method thereof - Google Patents

Abstract

A display system and a data transmission method thereof are provided. When a first frame stored in a frame buffer and a plurality of second frames to be output from an audio and video (AV) source are the same, the AV source set a AV control signal corresponding to a self-refresh mode, and a timing controller controlled by the AV control signal accesses the fist frame to output a display data. When the first and second frames are differed from each other, the AV source sets the AV control signal corresponding to a normal mode, and sets a AV data signal corresponding to the second frames, and the timing controller controlled by the AV control signal outputs the display data corresponding to the received second frame or accesses the frame buffer to output the display data according the timings of the AV data signal and the display data.

Description

Display system and data transmission method thereof

The present invention relates to a display system and a data transfer method thereof, and more particularly to a display system having a picture buffer and a data transfer method thereof.

The display device generally displays the corresponding image according to the screen provided by the video source. However, in the case of displaying a still image, the display device continues to receive the picture transmitted from the video source and displays the same image. In order to reduce the power consumption of the receiving screen when the display device displays the still image, a screen buffer for storing an entire screen can be configured in the display device. In the case of displaying a moving image, the display device can display the corresponding image according to the picture provided by the video source; in the case of displaying the still image, the display device can store the still picture in the picture buffer, and the display device according to the picture The static picture stored in the buffer is displayed.

However, when the video source again provides the dynamic picture, the operation timing of the display device may not be synchronized with the operation timing of the picture provided by the video source. Therefore, when the display device directly supplies the dynamic picture to the driving circuit of the display panel, the display may be affected. The image displayed on the display panel. Therefore, how to make a new dynamic picture can be provided to the driving circuit of the display panel without affecting the operation of the display panel becomes a design focus of this type of display device.

The invention provides a display system and a data transmission method thereof, which can prevent the display device from displaying an abnormality when the display device is switched from the self-updating mode to the standard mode.

The invention provides a display system comprising a video source and a display device. The video source provides a video control signal and a video data signal. The display device includes a picture buffer, a timing controller, a display panel and a driving circuit. The timing controller is coupled to the video source and the picture buffer to receive the video control signal and the video data signal, and output a display data. The driving circuit is coupled to the timing controller and the display panel to drive the display panel according to the display data. When a first picture stored in the picture buffer is the same as a plurality of second pictures to be outputted by the video source, the video source corresponds to a self-updating mode setting video control signal, and the timing controller is controlled by the video control signal access The first screen stored in the picture buffer is output to display the data. When the first picture stored in the picture buffer and the second picture to be outputted by the video source are different from each other, the video source corresponds to a standard mode setting video control signal, and the video data signal is sequentially set according to the second pictures, and the timing control is performed. The device is controlled by the video and audio control signal and outputs the display data corresponding to the received second picture or accesses the picture buffer according to the timing of the video data signal and the timing of the display data to output the display data.

The invention also proposes a data transmission method for a display system, which comprises the following steps. When a first picture stored in a picture buffer is the same as a plurality of second pictures to be outputted by a video source, the video source corresponds to a self-updating mode to set a video control signal, and a timing controller of the display device The video control signal is controlled to access the first picture stored in the picture buffer to output a display data. When the first picture stored in the picture buffer and the second picture to be outputted by the video source are different from each other, the video source corresponds to a standard mode setting audio and video control signal, and sequentially setting a video data signal according to the second pictures, and timing The controller is controlled by the video and audio control signal and outputs the display data corresponding to the received second picture or accesses the picture buffer according to the timing of the video data signal and the timing of the display data to output the display data.

In an embodiment of the present invention, when a start time of a picture display period of the corresponding video material signal is within a first period of a picture period corresponding to the display material, the timing controller directly outputs the corresponding received number. Display data of the two screens.

In one embodiment of the invention, the first period is between a minimum allowable vertical blank period and a screen display period during the corresponding picture period.

In an embodiment of the present invention, when the start time of the screen display period corresponding to the video material data is within a second period and a third period of the picture period corresponding to the display material, the timing controller accesses the picture buffer. The data is outputted, wherein the first period, the second period, and the third period are different from each other.

In an embodiment of the present invention, when a picture corresponding to a video data signal is displayed When the start time of the display period is within the second period corresponding to the screen period of the display material, the timing controller extends the plurality of screen periods corresponding to the display material.

In one embodiment of the invention, the timing controller extends a vertical blank period during each picture of the corresponding display material.

In one embodiment of the invention, the timing controller extends a plurality of horizontal blank periods during respective screens corresponding to the displayed material.

In an embodiment of the present invention, when the start time of the screen display period corresponding to the video material data is within the third period of the screen period corresponding to the display material, the timing controller shortens the plurality of screen periods corresponding to the display material.

In one embodiment of the invention, the timing controller shortens a vertical blank period during each picture period corresponding to the displayed material.

In one embodiment of the invention, the timing controller shortens a plurality of horizontal blank periods during respective screens corresponding to the displayed material.

In an embodiment of the present invention, when a start time of a picture display period corresponding to the display material is located during a vertical blank period of a picture corresponding to the video material signal, the timing controller directly outputs the corresponding received second time. Display data of the screen.

In an embodiment of the present invention, when the read/write capability of the picture buffer is greater than or equal to the sum of the bit rate of the video data signal and the bit rate of the display data, the timing controller writes the received second picture. A picture buffer, and the timing controller accesses the second picture stored in the picture buffer to output the display material.

In an embodiment of the invention, when the read/write capability of the picture buffer is less than When the bit rate of the video material signal is the sum of the bit rate of the display material, the timing controller ignores the received second picture, and the timing controller accesses the first picture stored in the picture buffer to output the display material.

In an embodiment of the present invention, the second period is located in a screen display period of the corresponding picture period and adjacent to the first period, and the time length of the second period is equal to a critical time during the screen display period, and the third period is adjacent to the corresponding period. The second period of the same picture period and the first period corresponding to the next picture period.

In an embodiment of the present invention, when the start time of the first picture display period of the corresponding video material signal is located during a minimum allowable vertical blank period or a picture display period corresponding to the picture period of the display material, the timing controller stores The picture buffer is taken to output the display material, and the plurality of picture periods corresponding to the display material are shortened.

In one embodiment of the invention, the timing controller increases the bit rate of the displayed material.

In an embodiment of the invention, the timing controller includes a data receiver, a data multiplexer, a timing generator, and a picture controller. The data receiver is coupled to the video source to receive the video data signal, and outputs picture information corresponding to the audio and video data signal, a first clock signal corresponding to the audio and video data signal, and display data corresponding to the audio and video data signal. The data multiplexer has a first input end, a second input end and a first output end, wherein the first input end is coupled to the data receiver to receive display data corresponding to the audio and video data signals. The data multiplexer is coupled to the first output terminal or the second input terminal according to a state control signal. The timing generator is coupled to the data receiver to receive the picture information corresponding to the audio and video data signal, and is coupled to the video source to receive the image. a sound control signal, and having a clock modulator, wherein the timing generator outputs an access control signal according to the picture information and outputs a state control signal corresponding to the video control signal, and the clock modulator provides a second clock signal and The second clock signal is adjusted according to the screen information corresponding to the video data signal. The picture controller is coupled to the second input end of the data receiver, the picture buffer, the timing generator and the data multiplexer, and determines whether to access the picture buffer according to the access control signal, and receives the corresponding audio and video data according to the first clock signal. The display data of the signal and the access to the picture buffer according to the second clock signal.

In one embodiment of the invention, the timing controller shortens a vertical blank period during each picture corresponding to the displayed material.

In one embodiment of the invention, the timing controller shortens a plurality of horizontal blank periods during each picture corresponding to the displayed material.

In an embodiment of the present invention, when the start time of the first screen display period corresponding to the video material data is in the screen display period corresponding to the screen period of the display material, the timing controller calculates the screen display period of the corresponding video material signal. a start time and a first difference of an end time of the screen display period during the screen period corresponding to the display data, the end time being after the start time and close to the start time, and adjusting the corresponding display data according to the following equation Period of the frame: Frame_Period _{clk_o_new} × N+Offset _{clk_o_ori} = Frame_Period _{clk_i} × N-V_Blanking _min

Where Frame_Period _{clk_o_new} is the shortened picture period corresponding to the display material, N is a positive integer and greater than or equal to 1, Offset _{clk_o_ori} is the first difference, Frame_Period _{clk_i} is the picture period corresponding to the video material signal, and v_Blanking _min is corresponding The period of the minimum allowable vertical blank period of the corresponding video material signal is subtracted from the vertical blank period of the video material signal.

In an embodiment of the present invention, when the start time of the first picture display period of the corresponding video material signal is within a minimum allowable vertical blank period corresponding to the picture period of the display material, the timing controller calculates a picture corresponding to the video material signal. a second difference between the start time of the display period and an end time of the screen display period of the previous screen corresponding to the display material, the end time being before the start time and close to the start time, and according to the following equation Adjust the screen period corresponding to the displayed data: Frame_Period _{clk_o_new} × N+Offset _{clk_o_ori} × Frame_Period _{clk_o_new} / Frame_Period _{clk_o_or} i=Frame_Period _{clk_i} × N-V_Blanking _min

Where Frame_Period _{clk_o_new} is the shortened picture period corresponding to the display material, N is a positive integer and greater than or equal to 1, Offset _{clk_o_ori} is the second difference, and Frame_Period _{clk_o_ori} is the original picture period corresponding to the video data signal, Frame_Period _clk _ _i The period during which the picture corresponds to the video data signal, and V_Blanking _min is the period during which the minimum allowable vertical blank period of the corresponding video material signal is subtracted from the vertical blank period of the corresponding video material signal.

Based on the above, the display system and the data transmission method thereof according to the embodiments of the present invention, when the display device is again operated in the standard mode, the timing controller is controlled by the video and audio control signal and outputs the corresponding information according to the timing of the audio and video data signals and the timing of the display data. The received display material of the second screen or the access screen buffer is output to display the display data to prevent the display device from displaying an abnormality.

The above described features and advantages of the invention will be apparent from the following description.

100, 1100‧‧‧ display system

110‧‧‧Video source

120, 1120‧‧‧ display device

121, 1121‧‧‧ timing controller

123‧‧‧ Picture buffer

125‧‧‧Drive circuit

127‧‧‧ display panel

1131‧‧‧ data receiver

1133‧‧‧ Timing generator

1135‧‧‧ Clock modulator

1137‧‧‧ Picture Controller

1139‧‧‧Data multiplexer

AVC‧‧‧Video Control Signal

AVD‧‧‧ audio and video data signal

CLKi‧‧‧ first clock signal

CLKo‧‧‧second clock signal

DD‧‧‧Display information

DF1‧‧‧ first difference

DF2‧‧‧second difference

HB‧‧‧ horizontal blank period

HS‧‧‧ horizontal scanning period

IFF‧‧‧ screen information

MVB‧‧‧Minimum allowable vertical blank period

P1‧‧ first period

P2‧‧‧ second period

P3‧‧‧ third period

PF21a, PF21b, PF22a, PF31a~PF31c, PF32a, PF32b, PF51a~PF51d, PF52a~PF52c, PF61a~PF61e, PF62a~PF62c, PF71a~PF71e, PF72a~PF72c, PF81a~PF81d, PF82a~PF82b, PF91a~PF91f, PF92a~PF92d, PF101a~PF101d, PF102a~PF102b‧‧‧

PFD‧‧‧ screen display period

SAC‧‧‧ access control signal

STC‧‧‧ State Control Signal

TE‧‧‧End time

TS‧‧‧ starting time

VB‧‧‧ vertical blank period

During VBX‧‧‧

S1210, S1220, S1230‧‧‧ steps

1 is a system diagram of a display system in accordance with an embodiment of the present invention.

2 is a timing diagram showing the transfer of data by a display system in accordance with an embodiment of the present invention.

3 is a timing diagram showing the transfer of data by a display system in accordance with an embodiment of the present invention.

4 is a timing diagram of a single picture period in accordance with an embodiment of the present invention.

FIG. 5 is a timing diagram of transmitting data by a display system according to an embodiment of the invention.

6 is a timing diagram showing the transfer of data by a display system in accordance with an embodiment of the present invention.

FIG. 7 is a timing diagram showing the transfer of data by a display system according to an embodiment of the invention.

FIG. 8 is a timing diagram showing the transfer of data by a display system according to an embodiment of the invention.

FIG. 9A is a timing diagram of a data transmission by a display system according to an embodiment of the invention.

9B is a timing diagram showing the transfer of data by a display system according to an embodiment of the invention. intention.

FIG. 10 is a timing diagram showing the transfer of data by a display system according to an embodiment of the invention.

11 is a system diagram of a display system in accordance with an embodiment of the present invention.

FIG. 12 is a flow chart of a method for transferring data of a display system according to an embodiment of the invention.

1 is a system diagram of a display system in accordance with an embodiment of the present invention. Referring to FIG. 1 , in the embodiment, the display system 100 includes a video source 110 and a display device 120 , wherein the video source 110 can be a video player or a computer. The display device 120 includes a timing controller 121, a picture buffer 123, a drive circuit 125, and a display panel 127.

The video source 110 provides a video control signal AVC and a video material signal AVD. The timing controller 121 is coupled to the video source 110 and the picture buffer 123 to receive the video control signal AVC and the video data signal AVD, and outputs a display data DD. The driving circuit 125 is coupled to the timing controller 121 and the display panel 127 to drive the display panel 127 according to the display data DD.

In this embodiment, when the picture provided by the video source 110 is a dynamic picture, that is, a plurality of consecutive pictures transmitted through the video data signal AVD are different pictures, the video source 110 sets the video control signal AVC corresponding to the standard mode. . At this time, the timing controller 121 controls the display device 120 according to the video and audio control signal AVC. The operation is in the standard mode, and the timing controller 121 outputs the display material DD according to the picture transmitted by the video material signal AVD.

When the picture provided by the video source 110 is a static picture, that is, the pictures transmitted through the video data signal AVD are all the same picture, the video source 110 sets the video control signal AVC corresponding to the self-updating mode. At this time, the timing controller 121 controls the display device 120 to operate in the self-updating mode in accordance with the video and audio control signal AVC. Further, the timing controller 121 stores the first one of the plurality of still pictures (corresponding to the first picture) in the picture buffer 123, and simultaneously outputs the display material DD corresponding to the first still picture.

Then, when the plurality of consecutive pictures (corresponding to the second picture) to be output by the video source 110 are the same as the still pictures stored in the picture buffer 123, the video control signal AVC will always correspond to the self-updating mode, so that the timing controller 121 The still picture stored in the picture buffer 123 is continuously accessed to output the display material DD. The video source 110 can store a picture corresponding to the static picture in the picture buffer 123, so as to facilitate the comparison, and the video source 110 does not set the video data signal AVD according to the picture to be output, that is, the video data signal AVD is presented. Idle state.

Alternatively, when the plurality of consecutive pictures (corresponding to the second picture) to be output by the video source 110 are different from the still pictures stored in the picture buffer 123, that is, the pictures transmitted by the video data signal AVD are all dynamic pictures, the video source 110 The AV control signal AVC is set again corresponding to the standard mode. At this time, the timing controller 121 controls the display device 120 to operate in the standard mode again according to the video control signal AVC. Since the display device 120 does not operate in synchronization with the video source 110 when operating in the self-updating mode, the timing of the video material signal AVD may be different from the timing at which the timing controller 121 outputs the display data DD.

According to the above, when the display device 120 is switched from the self-refresh mode to the standard mode, the timing controller 121 is controlled by the video control signal AVC and correspondingly received according to the timing of the video data signal AVD and the timing output of the display data DD. The display data DD of the dynamic picture to be accessed or the access picture buffer 123 is output to display the display material DD. Moreover, when the timing controller 121 accesses the screen buffer 123 to output the display material DD, the timing of the representative timing controller 121 and the video material signal AVD is not synchronized, so the timing controller 121 can adjust the timing of displaying the data DD to gradually The timing of adjusting the display material DD can be synchronized with the timing of the corresponding video material signal AVD.

2 is a timing diagram showing the transfer of data by a display system in accordance with an embodiment of the present invention. Referring to FIG. 1 and FIG. 2, in the embodiment, when the display device 120 is switched from the self-updating mode to the standard mode, the timing controller 121 continuously outputs the display data DD, so that the timing of the data DD is displayed. Multiple picture periods (such as PF21a, PF21b) are formed. Moreover, the video material signal AVD is set corresponding to the dynamic picture to be output by the video source 110, so that the timing of the video material signal AVD forms a plurality of picture periods (such as PF22a).

In this embodiment, each picture period (such as PF21a, PF21b, PF22a) includes a vertical blank period VD and a picture display period PFD, and each picture period (such as PF21a, PF21b) corresponding to the display material DD is substantially Divided into each other The first period P1, the second period P2, and the third period P3 that do not overlap (that is, the first period P1, the second period P2, and the third period P3 are different from each other). The first period P1 is located between a minimum allowable vertical blank period MVB and a picture display period PFD of the corresponding picture period (eg, PF 21a, PF 21b). The second period P2 is located in the PFD of the screen display period of the corresponding picture period (such as PF21a, PF21b) and is adjacent to the first period P1, and the length of the second period P2 is equal to a critical time Tth of the PFD during the screen display period (described in the following table). The third period P3 is adjacent to the second period P2 corresponding to the same picture period PF21a) and the first period P1 corresponding to the next picture period (eg, PF 21b).

In the present embodiment, the start time TS of the picture display period PFD of the picture period PF22a is located in the first period P1 of the picture period PF21b. At this time, it indicates that the driving circuit 125 is ready to receive the display data DD, that is, the display data DD of the dynamic picture transmitted by the corresponding audio and video data signal AVD is directly transmitted to the driving circuit 125, and the driving circuit 125 can be driven according to the received display data DD. The display panel 127. Therefore, the timing controller 121 can directly transmit the display data DD of the dynamic picture transmitted by the corresponding video data signal AVD to the driving circuit 125, as shown in FIG. 2, representing the dotted line portion of the original timing of the display data DD to represent the video data signal AVD. The solid line portion of the timing is replaced.

3 is a timing diagram showing the transfer of data by a display system in accordance with an embodiment of the present invention. Referring to FIG. 1 to FIG. 3, in the embodiment, the timing of displaying the data DD also forms a plurality of picture periods (such as PF31a~PF31c), and the timing of the video material signal AVD forms a plurality of picture periods (such as PF32a, PF32b), where Similar or identical parts use similar or identical reference numerals.

In the present embodiment, the start time TS of the PFD during the screen display period of the picture period PF32a is located in the second period P2 of the picture period PF31b. At this time, the display data DD corresponding to the static picture stored in the picture buffer 123 has started to be transmitted to the driving circuit 125, so the timing controller 121 will continue to access the static picture stored in the picture buffer 123 to maintain the display data. The integrity of the DD, thereby preventing the display panel 127 from displaying an erroneous image. Further, the screen display period PFD start time TS of the screen period PF32a is located in the second period P2 of the screen period PF31b (that is, not in the first period P1), and represents the extension of the screen period corresponding to the display material DD (for example, PF31a~) The PF 31c) can quickly make the start time TS of the PFD period during the picture display period (eg, PF32a, PF32b) of the corresponding video material signal AVD in the first period of a certain picture period (such as PF31a to PF31c) corresponding to the display material DD. In P1, therefore, the timing controller 121 can extend the vertical blank period VB of the PF 31c during the picture period.

Next, after the vertical blank period VB of the screen period PF31c is extended, the start time TS of the screen display period PFD of the screen period PF32b is located in the first period P1 of the screen period PF31c. Therefore, the timing controller 121 can directly transmit the display data DD of the dynamic picture transmitted by the corresponding video material signal AVD to the driving circuit 125, as shown in FIG. 3, representing the dotted line portion of the original timing of the display data DD to represent the video data signal AVD. The solid line portion of the timing is replaced.

In the picture period PF31b, if the read/write speed of the picture buffer 123 is greater than or equal to the bit rate of the video material signal AVD and the display data DD At the sum of the bit rates, the timing controller 121 can store the picture buffer 123 of the dynamic picture transmitted by the video material signal AVD and access the previous picture in the picture buffer 123 to continuously output the display material DD. When the read/write speed of the picture buffer 123 is smaller than the sum of the bit rate of the video material signal AVD and the bit rate of the display material DD, the timing controller 121 can ignore the dynamic picture transmitted by the video material signal AVD and access the picture. The picture in the buffer 123 displays the material DD continuously.

4 is a timing diagram of a single picture period in accordance with an embodiment of the present invention. Referring to FIG. 1 to FIG. 4, in the above embodiment, the screen display period of the screen period (eg, PF32a, PF32b) of the corresponding video material signal AVD is extended by extending the vertical blank period VB of the picture period (eg, PF31a to PF31c) corresponding to the display material DD. The start time TS of the PFD falls within the first period P1 of a certain picture period (for example, PF31a to PF31c) corresponding to the display material DD.

In the present embodiment, the timing controller 121 can display the screen display period of the screen period (eg, PF32a, PF32b) of the corresponding video material signal AVD by extending the screen display period PFD of the screen period (eg, PF31a to PF31c) corresponding to the display material DD. The start time TS of the PFD falls within the first period P1 of a certain picture period (for example, PF31a to PF31c) corresponding to the display material DD. Further, the PFD during the picture display period corresponds to the plurality of horizontal scanning periods HS and the plurality of horizontal blank periods HB, wherein the timing controller 121 can extend the horizontal blank periods HB to extend the picture display period PFD.

FIG. 5 is a timing diagram of transmitting data by a display system according to an embodiment of the invention. Referring to FIG. 1 to FIG. 5, in the embodiment, the timing of the data DD is displayed. A plurality of picture periods (such as PF51a to PF51d) are also formed, and the timing of the video material signal AVD is formed during a plurality of picture periods (e.g., PF52a to PF52c), wherein similar or identical parts use similar or identical numerals.

In the present embodiment, the start time TS of the PFD during the picture display period PF52a is located in the second period P2 of the picture period PF51b (that is, not within the first period P1), so the timing controller 121 will continue to be stored. The still picture stored in the picture buffer 123 is taken to output the display material DD, and the timing controller 121 extends the picture display period PFD of the picture periods PF51c and PF51d. After the screen display period PFD of the PF 51c is extended, the start time TS of the screen display period PFD of the screen period PF 52b is located in the second period P2 of the screen period PF51c (that is, not within the first period P1), and thus the timing control is performed. The device 121 continues to access the still picture stored in the picture buffer 123 to output the display material DD.

After the screen display period PFD of the PF 51d is extended, the start time TS of the screen display period PFD of the screen period PF 52c is located in the first period P1 of the screen period PF51d. Therefore, the timing controller 121 can directly transmit the display data DD of the dynamic picture transmitted by the corresponding video material signal AVD to the driving circuit 125, as shown in FIG. 5, representing the dotted line portion of the original timing of the display data DD to represent the video data signal AVD. The solid line portion of the timing is replaced.

In the picture periods PF51b and PF51c, if the read/write speed of the picture buffer 123 is greater than or equal to the sum of the bit rate of the video material signal AVD and the bit rate of the display material DD, the timing controller 121 can view the video and audio. The dynamic picture transmitted by the data signal AVD stores the picture buffer 123, and accesses the picture buffer The previous picture in the device 123 displays the data DD in a continuous output. When the read/write speed of the picture buffer 123 is smaller than the sum of the bit rate of the video material signal AVD and the bit rate of the display material DD, the timing controller 121 can ignore the dynamic picture transmitted by the video material signal AVD and access the picture. The picture in the buffer 123 displays the material DD continuously.

6 is a timing diagram showing the transfer of data by a display system in accordance with an embodiment of the present invention. Referring to FIG. 1 , FIG. 2 and FIG. 6 , in the embodiment, the timing of displaying the data DD also forms a plurality of picture periods (eg, PF61a to PF61e), and the timing of the video material signal AVD forms a plurality of picture periods ( For example, PF62a~PF62c), wherein similar or identical parts use similar or identical reference numerals.

In the present embodiment, the start time TS of the PFD during the picture display period PF62a is located in the third period P3 of the picture period PF61b (that is, not within the first period P1). At this time, the timing controller 121 continuously accesses the still picture stored in the picture buffer 123, and the start time TS of the picture display period PFD of the picture period PF62a is located in the third period P3 of the picture period PF61b, representing the shortened corresponding display. The picture period of the data DD (for example, PF61a to PF61e) can make the start time TS of the PFD during the picture display period (for example, PF62a to PF62c) of the corresponding video material signal AVD be located during a certain picture period corresponding to the display material DD ( In the first period P1 of the PF 61a to PF 61e), the timing controller 121 can shorten the vertical blank period VB of the picture periods PF61c to PF61e, and the shortened vertical blank period VB is still larger than the minimum allowable vertical blank period MVB.

After shortening the vertical blank period VB of the PF61c during the screen period, the screen period The start time TS of the PFD during the picture display period of the inter-PF 62b is located in the third period P3 of the picture period PF61c (that is, not in the first period P1), so the timing controller 121 continues to access the picture buffer 123. The static picture is output to display the data DD. After the vertical blank period VB of the picture period PF61d is shortened, the start time TS of the picture display period PFD of the picture period PF62c is not located in the picture period PF61c, that is, the start time TS of the picture display period PFD of the picture period PF62c is not located on the screen. During the first period P1 of the period PF 61c, the timing controller 121 continues to access the still picture stored in the picture buffer 123 to output the display material DD.

After the vertical blank period VB of the picture period PF 61e is shortened, the start time TS of the picture display period PFD of the picture period PF62c is located in the first period P1 of the picture period PF61e. Therefore, the timing controller 121 can directly transmit the display data DD of the dynamic picture transmitted by the corresponding video material signal AVD to the driving circuit 125, as shown in FIG. 6, representing the dotted line portion of the original timing of the display data DD to represent the video data signal AVD. The solid line portion of the timing is replaced.

In the picture period PF61b~PF61d, if the read/write speed of the picture buffer 123 is greater than or equal to the sum of the bit rate of the video material signal AVD and the bit rate of the display material DD, the timing controller 121 can view the video and audio. The dynamic picture transmitted by the data signal AVD stores the picture buffer 123, and accesses the old picture in the picture buffer 123 to continuously output the display material DD. When the read/write speed of the picture buffer 123 is smaller than the sum of the bit rate of the video material signal AVD and the bit rate of the display material DD, the timing controller 121 can ignore the dynamic picture transmitted by the video material signal AVD. The face is accessed, and the picture in the picture buffer 123 is accessed to continuously output the display material DD.

FIG. 7 is a timing diagram showing the transfer of data by a display system according to an embodiment of the invention. Referring to FIG. 1 , FIG. 2 , FIG. 6 and FIG. 7 , in the embodiment, the timing of displaying the data DD also forms a plurality of picture periods (eg, PF 71 a to PF 71 e ), and the timing of the video data signal AVD is formed into multiple During the picture period (such as PF72a~PF72c), similar or identical parts use similar or identical numbers.

In the present embodiment, the start time TS of the PFD during the picture display period PF 72a is within the third period P3 of the picture period PF 71b (that is, not within the first period P1), so the timing controller 121 continues to access. The static picture stored in the picture buffer 123 can shorten the vertical blank period VB of the picture periods PF71c to PF71e.

After shortening the vertical blank period VB of the picture period PF 71c, the start time TS of the picture display period PFD of the picture period PF 72b is located in the third period P3 of the picture period PF71c (that is, not within the first period P1), thus the timing The controller 121 continues to access the still picture stored in the picture buffer 123 to output the display material DD. After the vertical blank period VB of the picture period PF71d is shortened, the start time TS of the picture display period PFD of the picture period PF72c is not located in the picture period PF71c, that is, the start time TS of the picture display period PFD of the picture period PF72c is not located on the screen. During the first period P1 of the period PF 71c, the timing controller 121 continues to access the still picture stored in the picture buffer 123 to output the display material DD.

After shortening the vertical blank period VB of the PF71e during the screen, the screen period The start time TS of the PFD during the picture display period of the inter-PF 72c is located in the second period P2 of the picture period PF71e. Here, since the shortened vertical blank period VB causes the time length of the first period P1 to be short, the start time TS of the PFD during the screen display period (for example, PF72a to PF72c) corresponding to the video material signal AVD cannot be dropped. Corresponding to the first period P1 of a certain picture period (for example, PF71a to PF71e) of the display material DD. According to the above-mentioned judgment condition, the timing controller 121 may not directly transmit the display material DD of the dynamic picture transmitted corresponding to the video material data signal AVD to the drive circuit 125, so that the operation of the timing controller 121 generates an error.

In this embodiment, in order to avoid an error in the operation of the timing controller 121, it is possible to compare whether the start time TS of the PFD during the screen display period (eg, PF71a to PF71e) corresponding to the display material DD falls within the corresponding video data signal AVD. The vertical blank period VB during the picture period (such as PF72a~PF72c). When the start time TS of the PFD in the screen display period corresponding to the display data DD (for example, PF71a to PF71e) falls within the vertical blank period VB of the screen period (for example, PF72a to PF72c) corresponding to the audio-visual material signal AVD, The timing of the video data signal AVD, the driving circuit 125 still has enough time to perform the pre-operation of the screen display, so the timing controller 121 can directly transmit the display data DD of the dynamic picture transmitted by the corresponding video data signal AVD to the driving circuit 125. In order to enable the driving circuit 125 to drive the display panel 127 in accordance with the received display material DD, the dotted line portion representing the original timing of the display material DD as shown in FIG. 7 is replaced with a solid line portion representing the timing of the video material data signal AVD.

In the picture period PF71b~PF71d, if the picture buffer 123 is read or written When the speed is greater than or equal to the sum of the bit rate of the video material signal AVD and the bit rate of the display material DD, the timing controller 121 can store the dynamic picture transmitted by the video material signal AVD in the picture buffer 123 and save the picture buffer 123. The old picture in the picture buffer 123 is taken to continuously output the display material DD. When the read/write speed of the picture buffer 123 is smaller than the sum of the bit rate of the video material signal AVD and the bit rate of the display material DD, the timing controller 121 can ignore the dynamic picture transmitted by the video material signal AVD and access the picture. The picture in the buffer 123 displays the material DD continuously.

FIG. 8 is a timing diagram showing the transfer of data by a display system according to an embodiment of the invention. Referring to FIG. 1 , FIG. 2 , FIG. 4 , and FIG. 6 to FIG. 8 , in the embodiment, the timing of displaying the data DD is also formed during a plurality of screen periods (eg, PF81a to PF81d), and the timing of the audio and video data signal AVD is A plurality of picture periods (such as PF82a to PF82b) are formed, wherein similar or identical parts use similar or identical reference numerals.

In the embodiment of FIG. 6 described above, the screen display period PFD of the screen period (eg, PF62a to PF62c) corresponding to the video material signal AVD is shortened by shortening the vertical blank period VB of the screen period (eg, PF61a to PF61e) corresponding to the display material DD. The start time TS falls within the first period P1 of a certain picture period (for example, PF61a to PF61e) corresponding to the display material DD.

In the present embodiment, the timing controller 121 can display the screen display period of the screen period (eg, PF82a to PF82b) of the corresponding video material signal AVD by shortening the screen display period PFD of the screen period (eg, PF81a to PF81d) corresponding to the display material DD. The start time TS of the PFD falls during a certain picture corresponding to the display data DD The first period P1 (such as PF81a~PF81d). Wherein, the timing controller 121 can shorten the horizontal blank period HB to shorten the PFD during the picture display period, but the horizontal blank period HB is still greater than or equal to its minimum time limit, so as to prevent the driving circuit 125 from driving the display panel 127 correctly.

In the present embodiment, the start time TS of the PFD during the picture display period PF82a is located in the third period P3 of the picture period PF81b (that is, not within the first period P1), so the timing controller 121 will continue to be stored. The still picture stored in the picture buffer 123 is taken to output the display material DD, and the timing controller 121 shortens the picture display period PFD of the picture periods PF81c and PF81d. After shortening the screen display period PFD of the screen period PF81c, the screen display period PFD start time TS of the screen period PF82b is not located in the screen period PF81c, that is, the screen display period PFD start time TS of the screen period PF82b is not located on the screen. During the first period P1 of the period PF 81c, the timing controller 121 continues to access the still picture stored in the picture buffer 123 to output the display material DD.

After the screen display period PFD of the screen period PF 81d is shortened, the start time TS of the screen display period PFD of the screen period PF 82b is located in the first period P1 of the screen period PF81d. Therefore, the timing controller 121 can directly transmit the display data DD of the dynamic picture transmitted by the corresponding video material data AVD to the driving circuit 125, and represent the dotted line portion of the original timing of the display data DD as shown in FIG. 8 to represent the video data signal AVD. The solid line portion of the timing is replaced.

In the picture periods PF81b and PF81c, if the read/write speed of the picture buffer 123 is greater than or equal to the bit rate and display of the video material signal AVD. When the bit rate of the material DD is the sum of the bit rates, the timing controller 121 can store the picture buffer 123 of the dynamic picture transmitted by the video material signal AVD and access the previous picture in the picture buffer 123 to continuously output the display material DD. When the read/write speed of the picture buffer 123 is smaller than the sum of the bit rate of the video material signal AVD and the bit rate of the display material DD, the timing controller 121 can ignore the dynamic picture transmitted by the video material signal AVD and access the picture. The picture in the buffer 123 displays the material DD continuously.

In the above-described embodiments of FIG. 2, FIG. 3, and FIG. 5 to FIG. 8, the time length of the second period P2 (ie, the critical time Tth of the PFD during the screen display period) can be calculated by the following formula:

_Wherein, Time blanking_extended may VB during the vertical blanking after prolonged embodiment time FIG. 3 embodiment increases PFD during screen after prolonged embodiment the display time increases the amount or FIG. 5 (i.e. HB during the horizontal blanking after prolonged the total increased amount, can be shown with reference to FIG. _4), time blanking_shorten PFD may be extended during the screen after the display time reducing the amount of Example VB vertical blanking period after shortening the embodiment of Figure 6 reduces the amount of time or the embodiment of FIG. 8 (ie, the sum of the time reductions of HB in the shortened horizontal blank period, as shown in FIG. 4), Time _{active_region} is the length of time of the active area (ie, the length of time of the PFD during the screen display period), and Time _{acceptable_min imum_v_blanking} is the minimum allowable The length of time of the MVB during vertical blanking.

FIG. 9A is a diagram showing when a display system transmits data according to an embodiment of the invention. Schematic diagram. Referring to FIG. 1 , FIG. 2 and FIG. 9A , in the embodiment, the timing of displaying the data DD also forms a plurality of picture periods (eg, PF91a to PF91f), and the timing of the video material signal AVD forms a plurality of picture periods ( For example, PF92a~PF92d), wherein similar or identical parts use similar or identical reference numerals.

In the present embodiment, the start time TS of the screen display period PFD (corresponding to the first screen display period) of the screen period PF92a is located in the screen display period PFD of the screen period PF91b (that is, not within the first period P1), Therefore, the timing controller 121 continues to access the still picture stored in the picture buffer 123, and calculates the start time TS of the picture display period PFD of the picture period PF92a and the end time TE of the picture display period PFD of the picture period PF91b. The difference DF1, the end time TE is close to but after the start time TS of the picture display period PFD of the picture period PF92a, and the timing controller 121 shortens the picture periods PF91c to PF91e. Among them, the shortened picture period PF91c~PF91e is adjusted according to the following equation: Frame_Period _{clk_o_new} ×N+Offset _{clk_o_ori} =Frame_Period _{clk_i} ×N-V_Blanking _min

Wherein, Frame_Period _{clk_o_new} is the shortened picture period (such as the shortened picture period PF91c~PF91e), N is a positive integer and is greater than or equal to 1 (where N is, for example, 3), and Offset _{clk_o_ori} is the first difference DF1, Frame_Period _{clk_i} is the period of the picture corresponding to the video material signal (such as the picture period PF92a~PF92c), and V_Blanking _min is the period of the minimum allowable vertical blank period MVB of the corresponding video material signal AVD minus the vertical blank period VB of the corresponding video material signal AVD ( Such as VBX).

When the screen period corresponding to the display material DD (for example, the screen periods PF91c to PF91e) is shortened, the end time TE of the screen display period PFD of the screen period PF91e is aligned with the end time TE of the minimum allowable vertical blank period MVB of the screen period PF92d, The timing controller 121 can directly transmit the display data DD of the dynamic picture transmitted by the corresponding video material signal AVD to the driving circuit 125, as shown in FIG. 9A, representing the dotted line portion of the original timing of the display data DD to represent the timing of the video data signal AVD. The solid part is replaced.

In the present embodiment, the timing controller 121 can increase the bit rate of the display material DD to shorten the picture period corresponding to the display material DD (such as the picture periods PF91c to PF91e). In other embodiments, the timing controller may shorten the vertical blank period VB or the horizontal blank period HB (shown in FIG. 4) corresponding to the screen period (such as the screen periods PF91c to PF91e) of the display material DD to shorten the corresponding display material DD. During the screen (such as the screen period PF91c~PF91e).

FIG. 9B is a timing diagram showing the transfer of data by a display system according to an embodiment of the invention. Referring to FIG. 9A and FIG. 9B, in the present embodiment, FIG. 9B is similar to FIG. 9A, except that PF91c~PF91e are used during the picture, wherein similar or identical parts use similar or identical reference numerals. In the present embodiment, the end time TE of the PFD during the screen display period of the screen period PF91e is aligned with the end time TE of the screen display period PFD of the screen period PF92c. In other words, the shortened picture period PF91c~PF91e can be adjusted according to the following equation: Frame_Period _{clk_o_new} ×N+Offset _{clk_o_ori} =Frame_Period _{clk_i} ×N-V_Blanking _{clk_i}

Wherein, V_Blanking _{clk_i} is a vertical blank period VB corresponding to a picture period (such as picture periods PF92a to PF92d) of the video material information signal AVD. Since the vertical blank period is greater than the above V_Blanking _min , the end time TE of the PFD during the screen display period of the PF 91e during the screen period is far from the start time TS of the PFD during the screen display period of the screen period PF92d, so as to avoid the timing of displaying the data DD cannot be matched with the video data signal AVD. The timing sequence is connected.

FIG. 10 is a timing diagram showing the transfer of data by a display system according to an embodiment of the invention. Referring to FIG. 1 , FIG. 2 , FIG. 9A and FIG. 10 , in the embodiment, the timing of displaying the data DD also forms a plurality of picture periods (eg, PF101a to PF101d), and the timing of the video data signal AVD is formed into multiple During the picture period (such as PF102a~PF102b), similar or identical parts use similar or identical numbers.

In the present embodiment, the start time TS of the picture display period PFD (corresponding to the first picture display period) of the picture period PF 102a is within the minimum allowable vertical blank period MVB of the picture period PF101b (that is, not within the first period P1). Therefore, the timing controller 121 continues to access the still picture stored in the picture buffer 123, and calculates the start time TS of the picture display period PFD of the picture period PF 102a and the end time TE of the picture display period PFD of the picture period PF101b. The second difference DF2, the end time TE is close to but before the start time TS of the picture display period PFD of the picture period PF102a, and the timing controller 121 shortens the picture period PF101c. Among them, the shortened picture period PF101c is adjusted according to the following equation: Frame_Period _{clk_o_new} × N-Offset _{clk_o_ori} × Frame_Period _{clk_o_new} / Frame_Period _{clk_o_ori} = Frame_Period _{clk_i} × N-V_Blanking _min

Wherein, Frame_Period _{clk_o_new} is the shortened picture period (such as the shortened picture period PF101c), N is a positive integer and is greater than or equal to 1 (where N is, for example, 1), and Offset _{clk_o_ori} is the above second difference DF2, Frame_Period _{clk_i} For the picture period corresponding to the video material signal DD (such as the picture period PF102a~PF102b), Frame_Period _{clk_i} is the picture period corresponding to the video material signal AVD (such as the picture period PF102a~PF102b), and V_Blanking _min is the vertical blank of the corresponding video material signal AVD. During the period VB, the period (such as VBX) of the minimum allowable vertical blank period MVB of the corresponding video material signal AVD is subtracted.

After the screen period corresponding to the display material DD (for example, the screen period PF101c) is shortened, the end time TE of the screen display period PFD of the screen period PF101c is aligned with the end time TE of the minimum allowable vertical blank period MVB of the screen period PF102b, and thus the timing control The device 121 can directly transmit the display data DD of the dynamic picture transmitted by the corresponding video material data signal AVD to the driving circuit 125, as shown in FIG. 10, representing the dotted line portion of the original timing of the display data DD to represent the timing of the video material data signal AVD. The line part is replaced.

In the present embodiment, the timing controller 121 can increase the bit rate of the display material DD to shorten the picture period corresponding to the display material DD (such as the picture period PF101c). In other embodiments, the timing controller may shorten the vertical blank period VB or the horizontal blank period HB (shown in FIG. 4) corresponding to the picture period (such as the picture period PF101c) of the display material DD to shorten the picture period corresponding to the display material DD. (such as PF101c during the screen).

Similarly to FIG. 9B, the end time TE of the PFD during the screen display period of the screen period PF101c can be aligned with the end time of the screen display period PFD of the screen period PF102a. In other words, the shortened picture period PF101c can be adjusted according to the following equation: Frame_Period _{clk_o_new} × N-Offset _{clk_o_ori} × Frame_Period _{clk_o_new} / Frame_Period _{clk_o_ori} = Frame_Period _{clk_i} × N-V_Blanking _{clk_i}

11 is a system diagram of a display system in accordance with an embodiment of the present invention. Referring to FIG. 1 and FIG. 11, in the present embodiment, the display system 1100 is similar to the display system 100, except that the timing controller 1121 is different. The timing controller 1121 includes a data receiver 1131, a data multiplexer 1139, a timing generator 1133, and a picture controller 1137.

The data receiver 1131 is coupled to the video source 110 to receive the video material signal AVD, and outputs the screen information IFF corresponding to the video material signal AVD, the first clock signal CLKi corresponding to the video material signal AVD, and the display of the corresponding video material signal AVD. Information DD. Here, the screen information IFF includes timing information of the video material signal AVD.

The data multiplexer 1139 has a first input terminal, a second input terminal, a first output terminal, and a control terminal. The first input end of the data multiplexer 1139 is coupled to the data receiver 1131 to receive the display data DD of the corresponding video material signal AVD. The second input end of the data multiplexer 1139 is coupled to the picture controller 1137 to receive the display data DD corresponding to the picture stored in the picture buffer 123. The first output of the data multiplexer 1139 is coupled to the driving circuit 125. Data multiplexer 1139 is based on a state The control signal STC is coupled to the first output terminal to the first input terminal or the second input terminal.

The timing generator 1133 is coupled to the data receiver 1131 to receive the picture information IFF corresponding to the video data signal AVD, and calculates other time series information according to the picture information IFF (such as the picture period PF92a~PF92d, PF102a~PF102b, the first difference DF1 and the first Two difference DF2). The timing generator 1133 has a clock modulator 1135. The timing generator 1133 outputs an access control signal SAC to the picture controller 1137 based on the picture information IFF and the calculated timing information, and outputs a state control signal STC according to the video control signal AVC. Moreover, the clock modulator 1135 provides the second clock signal CLKo and adjusts the second clock signal CLKo according to the picture information IFF and the calculated timing information.

The picture controller 1137 is coupled to the data receiver 1131, the picture buffer 123, the timing generator 1133, and the second input of the data multiplexer 1139. The picture controller 1137 determines whether to access the picture buffer 123 according to the access control signal SAC, receives the display data DD corresponding to the video data signal AVD according to the first clock signal CLKi, and accesses the picture buffer according to the second clock signal CLKi. 123.

In this embodiment, the timing generator 1133 can increase the second clock signal CLKo received by the picture controller 1137 through the clock modulator 1135 to increase the bit rate of the display data DD.

FIG. 12 is a flow chart of a method for transferring data of a display system according to an embodiment of the invention. Referring to FIG. 12, in the embodiment, it is determined whether the first picture stored in the picture buffer is the same as the plurality of second pictures to be output by the video source (step S1210). When the first picture stored in the picture buffer is the same as the video source, you want to lose When the second picture is output, that is, the determination result of step S1210 is “Yes”, the video source source sets the video and audio control signal corresponding to the self-updating mode, and the timing controller of the display device is controlled by the video control signal access and stored in the picture buffer. The first screen of the device outputs the display material (step S1220). On the other hand, when the first picture stored in the picture buffer is different from the second picture to be output by the video source, that is, the determination result of step S1210 is “No”, the video source corresponds to the standard mode, and the video control signal is set according to these The second picture sets the video data signal, and the timing controller of the display device is controlled by the video and audio control signal and outputs the display data corresponding to the received second picture or accesses the picture buffer according to the timing of the video data signal and the timing of the display data. The display material is output (step S1230). The details of the above steps may be referred to the embodiment of FIG. 1 to FIG. 11 , and details are not described herein again.

In summary, in the display system and the data transmission method of the embodiment of the present invention, when the display device is switched from the self-updating mode to the standard mode, the timing controller determines the output according to the timing of the video data signal and the timing of the display data. The screen of the picture buffer or the second picture transmitted by the video material signal to prevent the display device from displaying an abnormality. Moreover, when the timing controller does not directly output the second picture transmitted by the video data signal, the timing controller adjusts the timing of the display data so that the timing of the video data signal and the timing of the display data can be smoothly connected.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

S1210, S1220, S1230‧‧‧ steps

Claims (41)

A display system comprising: a video source, providing a video control signal and a video data signal; a display device comprising: a picture buffer; a timing controller coupled to the video source and the picture buffer for receiving The video control signal and the audio and video data signal, and output a display data; a display panel; and a driving circuit coupled to the timing controller and the display panel to drive the display panel according to the display data; wherein, when When the first picture of the picture buffer is the same as the plurality of second pictures to be outputted by the video source, the audio and video source sets the video control signal corresponding to a self-updating mode, and the timing controller is controlled by the video and audio. The control signal accesses the first picture stored in the picture buffer to output the display data, when the first picture stored in the picture buffer and the second pictures to be outputted by the video source are different from each other, The video source source corresponds to a standard mode to set the video and audio control signal, and the video and audio data signals are sequentially set according to the second pictures, and The timing controller controlled by the video signal control data and the second display screen based on the received timing of the video data and a timing signal corresponding to the output data of the display screen or access the buffer to output the display data. The display system of claim 1, wherein a start time of a picture display period corresponding to the video data signal is located corresponding to the display data The timing controller directly outputs the display material corresponding to the received second screen when in a first period of a picture period. The display system of claim 2, wherein the start time of the screen display period corresponding to the video material signal is located in a second period and a third period of the screen period corresponding to the display of the material The timing controller accesses the picture buffer to output the display data, wherein the first period, the second period, and the third period are different from each other. The display system of claim 3, wherein the timing control is performed when the start time of the screen display period corresponding to the video material signal is within the second period of the screen corresponding to the display of the material The device extends the duration of multiple screens that should display the data. The display system of claim 4, wherein the timing controller extends a vertical blank period during each of the plurality of screens corresponding to the display of the material. The display system of claim 4, wherein the timing controller extends a plurality of horizontal blank periods during each of the plurality of screens corresponding to the display of the material. The display system of claim 3, wherein the timing control is performed when the start time of the screen display period corresponding to the video material signal is within the third period of the screen corresponding to the display of the material The device shortens the period of multiple screens corresponding to the displayed data. The display system of claim 7, wherein the timing controller shortens a vertical blank period during each of the screens corresponding to the displayed material. The display system of claim 7, wherein the timing control The device shortens a plurality of horizontal blank periods during each of the screens corresponding to the displayed material. The display system of claim 7, wherein the timing controller is directly in a vertical blank period during a picture period corresponding to the video material signal when a start time of a picture display period corresponding to the data is displayed The display material corresponding to the received second screen is output. The display system of claim 3, wherein when the read/write capability of the picture buffer is greater than or equal to a sum of a bit rate of the video data signal and a bit rate of the display data, the timing controller The received second picture is written to the picture buffer, and the timing controller accesses the second picture stored in the picture buffer to output the display material. The display system of claim 11, wherein the timing controller ignores when the read/write capability of the picture buffer is less than a sum of a bit rate of the video data signal and a bit rate of the display data. Receiving the second picture, and the timing controller accesses the first picture stored in the picture buffer to output the display data. The display system of claim 3, wherein the second period is within a picture display period of the corresponding picture period and adjacent to the first period, the length of time of the second period is equal to the period of the picture display period a critical time, the third period being adjacent to the second period corresponding to the same picture period and the first period corresponding to the next picture period. The display system of claim 2, wherein the first period is located during a minimum allowable vertical blank period of the corresponding picture period and a screen display Between the periods. The display system of claim 14, wherein the start time of the first display period corresponding to the video material signal is during a minimum allowable vertical blank period corresponding to the picture corresponding to the display material or During a picture display period, the timing controller accesses the picture buffer to output the display material, and shortens a plurality of picture periods corresponding to the display of the material. The display system of claim 15, wherein the timing controller increases a bit rate of the display material. The display system of claim 16, wherein the timing controller comprises: a data receiver coupled to the video source to receive the video data signal, and outputting a picture information corresponding to the video data signal, a first clock signal corresponding to the audiovisual data signal and the display data corresponding to the audiovisual data signal; a data multiplexer having a first input end, a second input end and a first output end, The first input end is coupled to the data receiver to receive the display data corresponding to the video data signal, wherein the first output end is coupled to the first input end or the second input end according to a state control signal; a sequence generator coupled to the data receiver to receive the picture information corresponding to the video data signal, coupled to the video source to receive the video control signal, and having a clock modulator, wherein the timing generator is configured according to the The picture information outputs an access control signal and outputs the status control signal corresponding to the video control signal, and the clock modulator provides a second clock Number and should be based on the video data signal The screen information is adjusted to the second clock signal; and a picture controller is coupled to the data receiver, the picture buffer, the timing generator, and the second input end of the data multiplexer according to the Taking a control signal to determine whether to access the picture buffer, receiving the display data corresponding to the video data signal according to the first clock signal, and accessing the picture buffer according to the second clock signal. The display system of claim 15, wherein the timing controller shortens a vertical blank period during each of the plurality of screens corresponding to the display of the material. The display system of claim 15, wherein the timing controller shortens a plurality of horizontal blank periods during each of the plurality of screens corresponding to the display of the material. The display system of claim 15, wherein when the start time of the first display period corresponding to the video material signal is during the screen display period during the screen corresponding to the display of the material, The timing controller calculates a first difference between the start time of the screen display period corresponding to the video material signal and an end time of the screen display period during the screen corresponding to the display of the data, the end time being located After the start time and close to the start time, and adjust the picture period corresponding to the data according to the following equation: Frame_Period _{clk_o_new} × N+Offset _{clk_o_ori} = Frame_Period _{clk_i} × N-V_Blanking _min, where Frame_Period _{clk_o_new} is the shortened corresponding During the picture display of the data, N is a positive integer and greater than or equal to 1, Offset _{clk_o_ori is} the first difference, Frame_Period _{clk_i} is the picture period corresponding to the video data signal, and V_Blanking _min is the vertical blank corresponding to the video data signal. The minimum allowable vertical blank period corresponding to the video data signal is subtracted during the period Period. The display system of claim 15, wherein the start time of the first picture display period corresponding to the video material signal is located during the minimum allowable vertical blank period during the picture corresponding to the display of the material And the timing controller calculates a second difference between the start time of the screen display period corresponding to the video material signal and an end time of the screen display period of the previous picture period corresponding to the data to be displayed, the end The time is before the start time and close to the start time, and the picture period corresponding to the display data is adjusted according to the following equation: Frame_Period _{clk_o_new} × N+Offset _{clk_o_ori} × Frame_Period _{clk_o_new} / Frame_Period _{clk_o_ori} = Frame_Period _{clk_i} × N-V_Blanking _min , Frame_Period _{clk_o_new} is the shortened corresponding picture period corresponding to the display data, N is a positive integer and greater than or equal to 1, Offset _clk _ _{o_ori is} the second difference, Frame_Period _{clk_o_ori} is the original picture period _{corresponding} to the video data signal _, Frame_Period clk_i for the audio-visual materials should signal During the screen, and V_Blanking _min for the vertical blanking period of the video data signal should be subtracted to the video data signal during a period the minimum allowable vertical blank. A data transmission method for a display system, comprising: when a first picture stored in a picture buffer and a plurality of second pictures to be outputted by a video source are the same, the video source corresponding to a self-updating mode setting a video and audio control a signal, and a timing controller of a display device is controlled by the video control The signal access is stored in the first screen of the picture buffer to output a display data; and when the first picture stored in the picture buffer and the second pictures to be outputted by the video source are different from each other, The audio and video source corresponds to a standard mode to set the video control signal and sequentially set a video data signal according to the second pictures, and the timing controller is controlled by the video control signal according to the timing of the video data signal and the display data. The timing output corresponds to the received display material of the second screen or accesses the screen buffer to output the display data. The data transmission method of the display system of claim 22, wherein the timing controller is controlled by the video control signal and outputs a corresponding number according to a timing of the video data signal and a timing output of the display data. The step of displaying the data of the two pictures or accessing the picture buffer to output the display data comprises: when a start time of a picture corresponding to the picture data signal is located at a first time during a picture corresponding to the display of the data During the period, the timing controller directly outputs the display material corresponding to the received second screen. The data transmission method of the display system according to claim 23, wherein the timing controller is controlled by the video control signal and outputs corresponding to the timing according to the timing of the video data signal and the timing of the display data. The step of displaying the data of the two pictures or accessing the picture buffer to output the display data further comprises: when the start time of the picture corresponding to the picture data signal is located during the picture corresponding to the picture During the second period and a third period, The timing controller accesses the picture buffer to output the display data, wherein the first period, the second period, and the third period are different from each other. The data transmission method of the display system according to claim 24, further comprising: the starting time during the display of the picture corresponding to the video material signal is located in the second period of the picture corresponding to the display of the material When the timing controller extends the plurality of screen periods corresponding to the data to be displayed. The data transfer method of the display system of claim 25, wherein the step of extending the duration of the screens corresponding to the display data comprises: the timing controller extending each of the screens corresponding to the displayed data A vertical gap period of the period. The data transfer method of the display system of claim 25, wherein the step of extending the duration of the screens corresponding to the display data comprises: the timing controller extending each of the screens corresponding to the displayed data Multiple horizontal blank periods during the period. The data transmission method of the display system according to claim 24, further comprising: when the start time of the screen corresponding to the video material signal is in the third period of the screen corresponding to the display of the data At the same time, the timing controller shortens the period of the screen corresponding to the data to be displayed. The data transfer method of the display system of claim 28, wherein the step of shortening the period of the screen corresponding to the display data comprises: the timing controller shortening each of the screens corresponding to the data to be displayed A vertical gap period of the period. The data transfer method of the display system of claim 28, wherein the step of shortening the period of the screen corresponding to the display data comprises: the timing controller shortening each of the screens corresponding to the data to be displayed Multiple horizontal blank periods during the period. The data transmission method of the display system according to claim 28, further comprising: when a start time of a screen display period corresponding to the display data is located in a vertical blank period corresponding to a picture period corresponding to the video material signal signal The timing controller directly outputs the display material corresponding to the received second screen. The method for transmitting data of the display system according to claim 28, further comprising: when the read/write capability of the picture buffer is greater than or equal to a sum of a bit rate of the video data signal and a bit rate of the display data. The timing controller writes the received second picture to the picture buffer, and the timing controller accesses the second picture stored in the picture buffer to output the display data. The data transmission party of the display system as described in claim 32 of the patent application scope The method further includes: when the read/write capability of the picture buffer is less than a sum of a bit rate of the video data signal and a bit rate of the display data, the timing controller ignores the received second picture, and the The timing controller accesses the first screen stored in the picture buffer to output the display material. The data transmission method of the display system of claim 28, wherein the second period is within a picture display period of the corresponding picture period and adjacent to the first period, the length of time of the second period is equal to the A critical time during the display period of the screen, the third period being adjacent to the second period corresponding to the same picture period and the first period corresponding to the next picture period. The data transfer method of the display system according to claim 23, wherein the first period is between a minimum allowable vertical blank period and a screen display period of the corresponding picture period. The data transmission method of the display system according to claim 35, wherein the timing controller is controlled by the video control signal and outputs corresponding to the timing according to the timing of the video data signal and the timing of the display data. The displaying of the two pictures or accessing the picture buffer to output the display data includes: the starting time during the display of the first picture corresponding to the video material signal is during the picture corresponding to the display of the material When a minimum allowable vertical blank period or a picture display period, the timing controller accesses the picture buffer to output the display material, and shortens a plurality of picture periods corresponding to the display of the material. The data transmission party of the display system as described in claim 36 of the patent application scope The method, wherein the step of shortening the period of the screen corresponding to the displayed material comprises: increasing a bit rate of the displayed material. The data transfer method of the display system according to claim 36, wherein the step of shortening the period of the screens corresponding to the displayed materials comprises: shortening a vertical blank period during each of the plurality of screens corresponding to the displayed materials. The data transfer method of the display system according to claim 36, wherein the step of shortening the period of the screen corresponding to the display of the data comprises: shortening a plurality of horizontal blank periods during each of the plurality of screens corresponding to the displayed data. The data transfer method of the display system according to claim 36, wherein the step of shortening the period of the screen corresponding to the display of the data comprises: when the first screen corresponding to the video material signal is displayed, the start When the time is in the screen display period corresponding to the screen period during which the data is to be displayed, the timing controller calculates the start time of the screen display period corresponding to the video material data signal and the screen display period during the screen period corresponding to the data to be displayed. a first difference of an end time of the period, the end time is after the start time and close to the start time, and the screen periods corresponding to the displayed material are adjusted according to the following equation: Frame_Period _{clk_o_new} × N+Offset _{clk_o_ori} =Frame_Period _{clk_i} × N-V_Blanking _min where Frame_Period _{clk_o_new} is the shortened period corresponding to the picture in which the data is displayed, N is a positive integer and greater than or equal to 1, Offset _{clk_o_ori is} the first difference, and Frame_Period _{clk_i} is the corresponding video during the data signals to the picture, and audio data corresponding V_Blanking _min Minimum allowable period corresponding to the vertical blanking period of the video data during the vertical blanking signal subtracted number. The data transfer method of the display system according to claim 36, wherein the step of shortening the period of the screen corresponding to the display of the data comprises: when the first screen corresponding to the video material signal is displayed, the start When the time is in the minimum allowable vertical blank period during the picture corresponding to the display of the data, the timing controller calculates the start time of the picture display period corresponding to the video material data signal and the previous picture period corresponding to the display of the data The screen displays a second difference of an end time during the period, the end time is before the start time and close to the start time, and the picture period corresponding to the display material is adjusted according to the following equation: Frame_Period _{clk_o_new} × N +Offset _{clk_o_ori} ×Frame_Period _{clk_o_new} /Frame_Period _{clk_o_ori} =Frame_Period _{clk_i} ×N-V_Blanking _min where Frame_Period _{clk_o_new} is the shortened period of the screen corresponding to the display data, N is a positive integer and greater than or equal to 1, Offset _{clk_o_ori is} the second _difference, Frame_Period clk_o_ori for the audio-visual materials should During this number of the original _picture, Frame_Period clk_i for the screen during the video data signal should be, and subtracting V_Blanking _min for the vertical blanking period of the video data signal should be a minimum allowable during the video vertical blanking data signal should period.