TW201442251A - 僞肖特基二極體 - Google Patents

僞肖特基二極體 Download PDF

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TW201442251A
TW201442251A TW103109842A TW103109842A TW201442251A TW 201442251 A TW201442251 A TW 201442251A TW 103109842 A TW103109842 A TW 103109842A TW 103109842 A TW103109842 A TW 103109842A TW 201442251 A TW201442251 A TW 201442251A
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Alfred Goerlach
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Abstract

一種偽肖特基二極體,其具有一種n通道渠溝MOS場效電晶體,該n通道渠溝MOS場效電晶體具有:一陰極、一陽極,一高n+摻雜的矽基材,位在該陰極與該陽極間,一n摻雜的磊晶層,一些渠溝,其延伸到該n摻雜的磊晶層中,一些p摻雜的體領域,其設在該渠溝之間,一些高n+摻雜的區域,設在該體領域的表面,及一些高p+摻雜的區域,其中該電晶體的閘極、體領域和源極的領域係是單晶方式及導電方式互相連接,且其中該電晶體的排極的領域當作陰極,其中在該渠溝的側邊緣設有介電層,該些渠溝用一p摻雜的多晶矽層充填,渠溝的底由另外之p摻雜的層形成,該另外之p摻雜的層與該p摻雜的多晶矽層接觸,其中該渠溝的底由另一p摻雜的層形成,該層與該p摻雜的多晶矽層接觸,且其中該另外之p摻雜層決定該偽肖特徵二極體的貫穿電壓。

Description

偽肖特基二極體
本發明關於一種偽肖特基二極體,其具有一種n通道渠溝MOS場效電晶體,該n通道渠溝MOS場效電晶體具有:一陰極、一陽極,一高n+摻雜的矽基材,位在該陰極與該陽極間,一n摻雜的磊晶層,一些渠溝,其延伸到該n摻雜的磊晶層中,一些p摻雜的體領域,其設在該渠溝之間,一些高n+摻雜的區域,設在該體領域的表面,及一些高p+摻雜的區域,其中該電晶體的閘極、體領域和源極的領域係是單晶方式及導電方式互相連接,且其中該電晶體的排極的領域當作陰極。
在汽車的三相電流或交流發電機(輕型發電機),使用交流電橋(整流器)做整流。使用之整流元件大多為矽製之具pn過度區的半導體二極體。舉例而言,在三相電流交流電的場合,將六個半導體二極體組接成一B6電橋,有時二極體也並聯,例如,用十二個而非六個二極體,在具其他不同相教的多相電流發電機,則使用對應配合的二極體電橋。
該二極體係為用於在高電流或電流密度高達超過500A/cm2及在高溫或最大阻擋層溫度Tj的225℃的操作而設計者,典型的情形,沿流電方向的電壓降,即順向電量UF在所用之高電流時的為一伏特。當在貫穿電壓UZ以下沿阻擋方向操作時,一般具有很小的阻擋電流IR。從貫穿 電壓起,阻擋電流快速增加,因此阻止電壓進一步提高。在這方面大多使用阻擋電流的20~40伏特(各依各車子的車網路電壓而定)的Z二極體,Z二極體可在貫穿時以高流短時負荷,因此他們用於在負荷變化時限制超量的發電機電壓。這些二極體一般封裝在強固之壓入式二極體中,例如DE 19549202 B2所述者。
pn二極體的順向電壓造成通過損失及發電機的效率變差,由於在發電機電流發生時,平均經常有二個二極體串聯,故在100安培的發電機,平均通過損失的200W,這種損失造成二極體發熱。此產生的熱需利用整流器上繁複的冷卻措施倒哩,例如使用冷卻体及/或通風器。
為了減少通過損失,DE10 2004 056 663 A1提到不用pn二極體而用所謂的高效率肖特基二極體(HED)。在此,在所稱為高效率肖特基二極體的二極體的場合,不同於傳統的肖特基二極體,逆向電流幾乎與逆向電壓無關。高效率肖特基二極體由一種傳統肖特基二極體(SBD)和其他元件(例如場板、pn過渡區或不同的屏障金屬)以單品方式整合在一半導體晶片上的組合構成。高效率肖特基二極體往往用渠溝技術製造,除了在通過情形的順向電壓小外,他們同樣地限制過度的發電機電壓(在突然的負載變化時會發生這種過度的發電機電壓)到不嚴重的值,在14V系統,典型情形限制到30V以下。
利用高效率肖特基二極體可達成0.5V~0.7V範圍的低得多的順向電壓,由於此二極體的通過損失小,故發電機效率及輸出功率提高。此外,由於逆向損失功率較小,冷卻所需成本比使用pn二極體明顯減少。
用較高效率肖特基二極體可造成低得多的順向電壓,在 0.5V~0.7V範圍,由於該二極體的通過損失很小,故發電機的效率和輸出功率提高。此外,由於逆向損失功率較小,故比起使用pn二極體來,冷卻的成本可大大減少。
高效率肖特基二極體的製造繁複且技術要求很高,除了要有很細緻的渠溝構造〔寬度(Mrsaweite)在500奈米以下〕須蝕刻到矽中外,特別是適當而穩定的肖特基接點也要能廉價製造,所用的肖特基接點宜為矽化鎳或其他適合的矽化物,在現代生產功率MOSFET的半導體廠大多沒有這種矽化物程序。
在DE 10 2010 062 677 A1提到,不用高效率肖特基二極體而用所謂的偽肖特基二極體(PSD)。它係特製之n通到MOSFET,具有及低的臨限電壓V6n,在其中,閘極體(Body)領域及源極領域係互相牢牢是電性連接,且當做陽極,而排極領域當作陰極功能。當使用偽肖特基二極體時,可一如在使用高效率肖特基二極體的場合,造成低的順向電壓及限制電壓。在此電壓利用建入的體二極體(body diode)連成限制。舉例而言,這些購件見於US 5818084。這些半導體購件不含肖特基接點,因此不需特別之矽化物程序。它們可使MOSFET的變更之標準程序製造,做為主要載體購件,它們也切換得很快。
偽肖特基二極體用平面功率半導體MOSFET技術製造。其中崩潰貫穿在所謂的體二極體D的半導體內部在電壓UZ發生。在崩潰電壓貫穿或逆向電壓貫穿時,產生熱的電荷載體(電子和電洞),電子流到陰極,電洞直接經由體範圍流到陽極。利用平面MOSFET的特別結構確保不會有電洞注入閘氧化物中,而係直接經體範圍流掉,此構件可在貫穿時的 「負載突降」(Load-Dump)時操作,因此限制電壓上升,而不會改變其閘氧化物或使構件損壞。
當偽肖特基二極體具有該觀察的逆向電壓範圍時,沿導通方向的電壓-導通電壓UON-大致大通道範圍〔反向通道(Inversionskanal)〕中下降。因此為了達成盡量低的導通電壓通道寬度或通道數目相對於使用的晶片面積要選設成盡量大。
基本上,如果在平面功率MOSFET的位置使用渠溝技術做的功率MOSFET(渠溝MOSFET),則晶胞(Zell,英:cell)的密度以及通道密度可明顯提高。但在這些構件,崩潰貫穿在渠溝構造的底部發生。此處有一缺點:在崩潰貫穿時產生的電洞被電場加速並注入閘極氧化物中,電洞在該處的作用一如牢牢建入閘極氧化物中的正電荷。因此,渠溝MOS場效電晶體的性質改變。舉例而言,臨限電壓Vth變小,而逆向電壓提高,在渠溝MOS電晶體其臨限電壓很低的場合,這種變化的作用,特別不行的。
因此之故,根據渠溝MOS構想的偽肖特基二極體不適合用於限制電壓。
在平面構想以及渠溝構想的場合的另一缺點在於:由於崩潰效應產生的電洞流在其通往源極接點的路徑上會產生電壓降,因此會控制暨生性npn電晶體(其中源極領域、體領域和n磊晶層形成)。其結果為貫穿電壓驟然回去(Snap Back),它會造成電晶體破壞。這種效應在高溫及高貫穿電流時特別顯著。
具有申請專利範圍第1項的特徵的偽肖特基二極體的特色 為:它沿導通方向的導通電壓UON有很低的電壓降,然而可在逆向電壓貫穿時穩定的操作。依本發明的偽肖特基二極體可呈封裝在壓入式二極體殼體中的功率半導體形式用於汽車交流電發電機做整流。
A‧‧‧陽極
K‧‧‧陰極
(1)‧‧‧矽基材
(2)‧‧‧矽層
(3)‧‧‧渠溝
(4)‧‧‧氧化物層
(5)‧‧‧導電材料
(6)‧‧‧源極
(6-2)‧‧‧pn過渡區
(7)‧‧‧高p+摻雜的領域
(8)‧‧‧高n+摻雜的領域
(9)‧‧‧金屬層
(10)‧‧‧介電層
(11)‧‧‧金屬層
(12)‧‧‧矽層
(12-1)‧‧‧pn過渡區
(12-2)‧‧‧pn過渡區
圖1係依本發明的一偽肖特基二極體的一第一實施例之橫截面圖。
圖2係依一偽肖特基二極體之簡單取代電路圖。
圖3係依本發明的一偽肖特基二極體的一第二實施例之橫截面圖。
圖4係依本發明的一偽肖特基二極體的一第三實施例之橫截面圖。
圖1係依本發明的一偽肖特基二極體的一第一實施例之橫截面圖。
在一高n+摻雜的矽基材(1)上有一n摻雜的矽層(2)(磊矽層),有多數渠溝(3)做到該層(2)中。圖1中只顯示一個渠溝為例,在此行程之晶胞係呈島狀或條帶狀或其他形狀,在該蝕刻到矽中渠溝(3)的側壁上各有一極薄的介電層(4),宜由二氧化矽構成。與一般渠溝MOSFET不同(它們的這種氧化物厚度的40~100奈米),在本發明的偽肖特基二極體,氧化物厚度小很多,且宜在5奈米~30奈米範圍,在渠溝(3)底部的氧化物層(4)係除去或開洞,渠溝內部充以導電材料(5),例如p摻雜之多晶矽。在p摻雜之多晶矽層(5)下方在渠溝底部各有另一p摻雜的矽層(12),此矽層(12)與p摻雜的多晶矽層(5)連接成導電方式,且與n摻雜之磊晶層(2)形成一pn過渡區(12-2)。此另一p摻雜層(12)的摻雜量和侵入深度選設成使該pn過渡區(12-2)的貫穿 電壓小於留下的渠溝構造〔它由層(5)(4)(2)形成〕的貫穿電壓,且還小於體二極體〔pn過渡區(6-2)〕的貫穿電壓。在渠溝間的p摻雜層(6)[體領域或p-井]之間在表面上做入高p摻雜的區域(6)(源極)和高p+摻雜的區域(7),它們用於作體領域的電阻性端子。整個構造的表面用一適合之導電層(9)(例如具有鋁或AlSiCu)蓋住,該層與p+摻雜的層(7)及(8)形成一電阻式接點。有一原介電層(10)(例如CVC氧化物層)將導電之多晶矽層(5)和金屬(9)絕緣。多晶矽層(5)互相連接,且在圖未示的接點區域經由金屬層(9)與該高p+摻雜層(7)及高n+摻雜層(8)連接成導電方式。再晶片被面同樣有一金屬層(11)。它構成到高n+摻雜之矽基材的電接點。金屬層(9)形成偽肖特基二極體的楊極接點A,金屬層(11)形成其陰極接點K。
用於做金屬層(9)或圖未示的接點位置可使用一種矽技術常用的鋁含量〔其具有銅或矽的成分(AlSiCu)〕或其他材料矽統(例如AlCu),它位在一薄屏障層(由TaN或類似材料構成)上方。
要封裝在「壓入二極體殼體」中,係將偽肖特基二極體的前側及後側倒各另外設以一可軟銲的層系統。舉例而言,在前側或後側上的金屬層(9)(11)上方施一種圖未示之一般的可軟銲的金屬系統,例如由以下層序構成:Cr,NiV及Ag。
在高逆向電壓VKA的情形,二極體(12-2)在渠溝底限制電壓,pn過渡區(12-2)貫穿(崩潰貫穿),由於在此產生之電洞流經其他p摻雜之領域(12)及摻雜之多晶矽層(5)到陽極,故不會有電荷載體注入氧化物層(4)進去。偽肖特基二極體的特性線特別是還有其臨限電壓VTH保持穩定,沿通過方向只有極少電流會流經二極體ZD(pn過渡區12-2)和D(pn過渡區6-2),因 為在本發明的偽肖特基二極體。「通過電壓」UON小於pn二極體的順向電壓,不同於例如DE 10 2010 062 077 A1所述的偽肖特基二極體,逆向電壓慣穿不在體二極體發生,而係在該二極體的渠溝底ZD發生。
基本上,該些另外的p摻雜領域(12)也可一直延伸到該高m+摻雜的基材領域(1)進去。如此,該pn過渡區(12-1)決定貫穿電壓。
利用該另外之p摻雜領域(12)限制也可用於一些偽肖特基二極體(它們含有餘加之構造以作電荷補償),例如場板、渠溝MOS電晶體等。
圖2中顯示一偽肖特基二極體的簡單取代電路圖,在此,該自組斷的n通道MOSFET配接成使閘極,排極領域構成陰極。
如果在陽極端子A有一正電壓(導通方向,順向),則MOS電晶體在第三象限操作。在克服了臨限電壓(在偽肖特基二極體的場合一般很低,例如0.3伏特或更小)後,形成一反向通道,且電流平行於整合之體二極體D流動。導通電壓UON小於二極體D的順向電壓,由於閘極電位和陽極電位相同,故MOSFET在飽和開始時操作。換言之,陽極電流大約和順向電流UON呈平方比例上升。
如果在陰極端K有一正電壓(相對於陽極A)(逆向),則MOSFET阻斷,因為閘極係在源極電位,姑不論逆向電流很小,電流的流動受抑制,在高速突進的發電機電壓場合〔例如在負載突降(Load-Dump)或在負載關掉時發生者〕,在傳統偽肖特基二極體,電壓係根據平面MOSFET受體二極體限制,平面MOSFET的體二極體D當作Z二極體使用且限制電壓。不同於此,在本發明的偽肖特基二極體,電壓受二極體ZD在渠溝底限制,因此在本發明的偽肖特基二極體,逆向電壓貫穿不發生在體二極體D, 而係在二極體ZD在渠溝底,因此在故障情形可限制過電壓,如果電壓升升超過體二極體的貫穿電壓在UZ,則二極體貫穿(崩潰貫穿或Lawinen貫穿),因此防止電壓進一步上升。由於產生之電洞直接經閘極多晶矽層(5)到陽極,故不會有熱電荷載體有害地注入氧化物層(4)。此外,可避免由於崩潰貫穿產生之電洞由區域(8)(6)(2)形成的寄生性npn電晶體啟動。
利用這些措施得到之偽肖特基二極體的順向電壓和高效率肖特基二極體的順向電壓相當,但本發明另外還呈穩定之Z二極體作用。
本發明偽肖特基二極體的另一簡單實施例示於圖3,不同於圖1所示偽肖特基二極體,此處省卻後的介電層(10)和圖1中位是的接點位置。為此,多晶矽層(5)直接與金屬層(9)及該p+摻雜n+摻雜的層(7)(8)連接。
由於該另外之p摻雜領域(12)也令有些向側向擴散出去,故電流的流東的橫截面沿順向在此位置略減少。這點在高電流密度時造成導電壓UON上升,如圖4的另一實施例所示,這點可用以下方式避免:並不將各晶胞在渠溝底設有另一p領域(12)的各晶胞(Zelle),而係例如只有各第二或第三晶胞設以p領域。然而在不具其他p摻雜的區域(12)的晶胞上,在薄閘極氧化物曾在各渠溝底區域的場很大,閘氧化物層(4)的薄的尺寸設計系如以下方式影響:偽肖特基二極體的臨限電壓很小,這點可造成閘極氧化物層損壞及提前故障。因此提議將在渠溝底設的閘極氧化物層(13)做成比在渠溝側壁的閘極氧化物層(4)更厚。
具本發明特徵的肖特基二極體可有利地用在汽車發電機當做整流器元件。這種偽肖特基二極體也特別適合用於具有三相以上的電流的汽車交流發電機。
(1)‧‧‧矽基材
(2)‧‧‧矽層
(3)‧‧‧渠溝
(4)‧‧‧氧化物層
(5)‧‧‧導電材料
(6)‧‧‧源極
(7)‧‧‧高p+摻雜的領域
(8)‧‧‧高n+摻雜的領域
(9)‧‧‧金屬層
(10)‧‧‧介電層
(11)‧‧‧金屬層
K‧‧‧陰極
A‧‧‧陽極

Claims (13)

  1. 一種偽肖特基二極體,其具有一種n通道渠溝MOS場效電晶體,該n通道渠溝MOS場效電晶體具有:一陰極(K)、一陽極(A),一高n+摻雜的矽基材(1),位在該陰極與該陽極間,一n摻雜的磊晶層(2),一些渠溝(3),其延伸到該n摻雜的磊晶層(2)中,一些p摻雜的體領域(6),其設在該渠溝(3)之間,一些高n+摻雜的區域(8),設在該體領域(6)的表面,及一些高p+摻雜的區域(7),其中該電晶體的閘極、體領域和源極的領域係是單晶方式及導電方式互相連接,且其中該電晶體的排極的領域當作陰極,其特徵在:在該渠溝(3)的側邊緣設有介電層(4),該些渠溝(3)用一p摻雜的多晶矽層(15)充填,渠溝(3)的底由另外之p摻雜的層(12)形成,該另外之p摻雜的層與該p摻雜的多晶矽層(5)接觸,其中該渠溝(3)的底由另一p摻雜的層(12)形成,該層(12)與該p摻雜的多晶矽層接觸,其中該另外之p摻雜層(12)決定該偽肖特徵二極體的貫穿電壓。
  2. 如申請專利範圍第1項之偽肖特徵二極體,其中:該些另外之p摻雜層(12)一直延伸到該高n+摻雜的矽基材(1)中。
  3. 如申請專利範圍第1或第2項之偽肖特徵二極體,其中: 該設在渠溝(3)的側壁上的介電層的厚度比15奈米更小。
  4. 如申請專利範圍第3項之偽肖特徵二極體,其中:其臨限電壓小於350mV。
  5. 如申請專利範圍第1或第2項之偽肖特徵二極體,其中:所有渠溝(3)的底由另一p摻雜的層(12)形成,該另一p摻雜的層(12)與該摻雜的多晶矽層(5)接觸。
  6. 如申請專利範圍第1或第2項之偽肖特徵二極體,其中:該偽肖特基二極體有一些渠溝的底由另一與該摻雜的多晶矽層(5)接觸的p摻雜層(12)形成,並有一些渠溝的底係由一氧化物層(13)形成,該氧化物層(13)與該摻雜的多晶矽層(5)接觸。
  7. 如申請專利範圍第6項之偽肖特徵二極體,其中:該形成底的氧化物層(13)比該設在渠溝側壁上的氧化物層(4)更厚。
  8. 如申請專利範圍第1或第2項之偽肖特徵二極體,其中:當電流在1mA~100mA範圍時,該偽肖特基二極體的貫穿電壓在20V~50V間。
  9. 如申請專利範圍第1或第2項之偽肖特徵二極體,其中:如果該偽肖特基二極體被一電流密度500A/cm2的電流通過,則其使用電壓(UON)小於0.8V。
  10. 如申請專利範圍第9項之偽肖特徵二極體,其中:如果該偽肖特基二極體被一電流密度500A/cm2的電流通過,則其使用電壓(UON)在0.5~0.7V之間。
  11. 如申請專利範圍第1或第2項之偽肖特徵二極體,其中: 該偽肖特基二極體有一可軟銲的前側和一可軟銲的後側。
  12. 一種汽車發電機,其具有如申請專利範圍第1~11項任一項的偽肖特基二極體。
  13. 一種汽車交流發電機,其具有多於三個相,其具有如申請專利範圍第1~11項的偽肖特基二極體。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116435354A (zh) * 2023-06-12 2023-07-14 广东巨风半导体有限公司 一种逆导型绝缘栅双极型晶体管、制造方法及器件

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105161537A (zh) * 2015-07-31 2015-12-16 上海晶亮电子科技有限公司 降低起始电压及导通电阻的mosfet组件
KR102430498B1 (ko) 2016-06-28 2022-08-09 삼성전자주식회사 쇼트키 다이오드를 갖는 전자 소자
JP6556948B1 (ja) * 2017-11-17 2019-08-07 新電元工業株式会社 電力変換回路
RU193911U1 (ru) * 2019-09-10 2019-11-21 Акционерное общество «Оптрон-Ставрополь» Силовой полупроводниковый диод
US11532758B2 (en) * 2019-09-24 2022-12-20 Texas Instruments Incorporated Low leakage Schottky diode
CN111146295A (zh) * 2020-02-17 2020-05-12 捷捷微电(上海)科技有限公司 一种半导体功率器件结构及其制造方法
CN114784099B (zh) * 2022-06-21 2022-09-02 南京融芯微电子有限公司 一种mosfet电流路径优化结构及其制备方法
CN114937693B (zh) * 2022-07-25 2022-10-28 深圳市威兆半导体股份有限公司 一种具有双沟道二极管的沟槽栅SiC MOSFET器件及其制备方法
CN116631867A (zh) * 2023-04-25 2023-08-22 浙江广芯微电子有限公司 一种新型沟槽肖特基二极管的制备方法
CN116598343A (zh) * 2023-07-18 2023-08-15 深圳平创半导体有限公司 沟槽型碳化硅二极管器件结构及其制作方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3400143B2 (ja) * 1994-09-17 2003-04-28 株式会社東芝 半導体記憶装置
DE19549202B4 (de) 1995-12-30 2006-05-04 Robert Bosch Gmbh Gleichrichterdiode
US5818084A (en) 1996-05-15 1998-10-06 Siliconix Incorporated Pseudo-Schottky diode
JP4528460B2 (ja) 2000-06-30 2010-08-18 株式会社東芝 半導体素子
US7132712B2 (en) 2002-11-05 2006-11-07 Fairchild Semiconductor Corporation Trench structure having one or more diodes embedded therein adjacent a PN junction
JP4047153B2 (ja) * 2002-12-03 2008-02-13 株式会社東芝 半導体装置
US7405452B2 (en) * 2004-02-02 2008-07-29 Hamza Yilmaz Semiconductor device containing dielectrically isolated PN junction for enhanced breakdown characteristics
DE102004053760A1 (de) * 2004-11-08 2006-05-11 Robert Bosch Gmbh Halbleitereinrichtung und Verfahren für deren Herstellung
DE102004056663A1 (de) 2004-11-24 2006-06-01 Robert Bosch Gmbh Halbleitereinrichtung und Gleichrichteranordnung
US7719080B2 (en) * 2005-06-20 2010-05-18 Teledyne Scientific & Imaging, Llc Semiconductor device with a conduction enhancement layer
US8461648B2 (en) * 2005-07-27 2013-06-11 Infineon Technologies Austria Ag Semiconductor component with a drift region and a drift control region
US7615812B1 (en) * 2006-03-23 2009-11-10 Integrated Discrete Devices, Llc Field effect semiconductor diodes and processing techniques
US7507631B2 (en) * 2006-07-06 2009-03-24 International Business Machines Corporation Epitaxial filled deep trench structures
US7807576B2 (en) * 2008-06-20 2010-10-05 Fairchild Semiconductor Corporation Structure and method for forming a thick bottom dielectric (TBD) for trench-gate devices
DE102010062677A1 (de) 2010-12-09 2012-06-14 Robert Bosch Gmbh Generatorvorrichtung zur Spannungsversorgung eines Kraftfahrzeugs
US9153732B2 (en) * 2012-02-23 2015-10-06 Nthdegree Technologies Worldwide Inc. Active LED module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116435354A (zh) * 2023-06-12 2023-07-14 广东巨风半导体有限公司 一种逆导型绝缘栅双极型晶体管、制造方法及器件

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