TW201432956A - Semiconductor luminous element and fabrication method thereof - Google Patents

Abstract

A semiconductor luminous element and its fabrication method is provided. The semiconductor luminous element comprises a substrate. A first surface of the substrate is disposed with a conductive circuit having a first solder pad and a second solder pad isolated to each other. The substrate has a first solder tray connected to the first solder pad and a second solder tray connected to the second solder pad. A surface of the first solder pad is disposed with at least a semiconductor laminate. The surface of the first conductive layer of the semiconductor laminate has a metal layer. The surface of the metal layer is tightly connected to the surface of the first solder pad. The surface of the second conductive layer has a current expansion layer. The current expansion layer is conductively connected to the second solder pad or another first solder pad. The semiconductor laminate and the first solder pad, the second solder pad, the current expansion layer are sealed and encapsulated by a packaging body disposed on the first surface of the substrate. The first solder tray and the second solder tray are located outside of the packaging body. The semiconductor luminous element has simple structure, short manufacture flow path, and is capable of improving complex yield and reducing production costs.

Description

Semiconductor light-emitting element and its manufacturing method

The present invention relates to a semiconductor light emitting device, comprising a light emitting diode (LED), a direct wafer package (COB), a light panel used in a semiconductor lighting fixture, a light bar, a lamp post, etc., and further relates to a semiconductor light emitting device structure and manufacturing thereof method.

With the improvement of semiconductor luminous efficiency, the reduction of manufacturing cost and the improvement of service life, its application range has covered fields such as display, backlight and illumination.

As shown in FIG. 1 , it is a schematic diagram of a conventional LED structure, including a package substrate 1, a p pad 2, a metal layer 3, a support substrate 4, a p-type conductive layer 5, a light-emitting layer 6, an n-type conductive layer 7, and a current. Expansion layer 8, n-electrode 9, interconnection lead 10, phosphor layer 10a, n-pad 11, p-pad 13a, connection metal 12a, n-pad 13b, connection metal 12b, package 14 and solid crystal layer 15, etc. .

The p-type conductive layer 5, the light-emitting layer 6, and the n-type conductive layer 7 constitute a so-called semiconductor laminate; the semiconductor laminate and the metal layer 3, the support substrate 4, the current spreading layer 8, and the n-electrode 9 are generally composed. Semiconductor light-emitting chip; the semiconductor light-emitting chip and package substrate 1, p-pad 2, interconnecting wire 10, phosphor layer 10a, n-pad 11, p-pad 13a, connection metal 12a, n-pad 13b, connection The metal 12b, the package 14 and the solid crystal layer 15 constitute a so-called LED (Light-Emitting Diode).

In the current division of the semiconductor lighting industry, semiconductor wafers are manufactured by wafer companies, and semiconductor light-emitting components such as LEDs and COBs shown in Fig. 1 are manufactured by packaging companies. Finally, the lighting companies apply semiconductor light-emitting components manufactured by packaging companies to various lighting. The light board, light bar and lamp post of the lamp go.

The manufacturing process of the semiconductor light-emitting wafer shown in FIG. 1 generally includes: epitaxially growing a semiconductor light-emitting stack on a surface of a sapphire, tantalum carbide, or tantalum epitaxial substrate (not shown), including a GaN/InGaN-based semiconductor light-emitting stack. , an AlInGaP-based semiconductor light-emitting stack, a GaN/AlGaN-based semiconductor light-emitting stack, etc.; then, a metal layer 3 is prepared on the surface of the exposed p-type conductive layer 5 of the entire epitaxial wafer; and the semiconductor layer is laminated with the epitaxial layer through the metal layer 3 The substrate is adhered to the surface of the support substrate 4 (first layer substrate) together (first solid crystal system) Then, removing the entire epitaxial substrate by laser stripping, grinding to reduce thin chemical etching, or chemical stripping; then, etching or removing the epitaxial substrate by chemical etching or dry etching a surface of the semiconductor laminate, exposing the n-type conductive layer 7 for preparing the current spreading layer, and structuring the surface of the n-type conductive layer 7 to form a tapered rough surface or a concave-convex surface; in the structured n-type conductive layer 7 The surface current layer 8 and the n electrode 9 are prepared; the support substrate 4 is cut to obtain a separate semiconductor light emitting chip for use by a packaging company.

Currently, the diameter of the epitaxial wafer is 2 inches and 4 inches. As described above, in the prior art, the entire epitaxial wafer is first adhered to the surface of the support substrate 4, and after the wafer fabrication process is completed, the support substrate 4 is further cut to obtain a semiconductor light-emitting chip, and the commonly used epitaxial substrate is used. There are always serious technical bottlenecks in the removal method that are difficult to solve. When a laser lift-off method is employed, a vaporization is generated between the epitaxial substrate and the semiconductor stack, particularly in the central region, and it is difficult to obtain effective and rapid discharge through a small gap between the semiconductor laminate and the substrate. The resulting gas expansion and localized high temperatures and their thermal stress can cause the entire semiconductor stack to rupture. When the chemical stripping method is employed, the fresh etching solution and the generated corrosion product are difficult to exchange and flow through the micro slits between the semiconductor laminate and the substrate, and the thickness of the etching slit is difficult to control uniformity in the radial direction, heating, Ultrasonic vibration and the like can improve the fluidity, but cause the semiconductor laminate to rupture. Although the method of reducing the chemical etching after thinning by grinding can solve the problem caused by the small gap between the semiconductor laminate and the substrate, the thickness control of the grinding reduction is particularly difficult, and the uniformity control is difficult, and the semiconductor laminate is too thin. Cracking, too thick can lead to lengthy chemical corrosion time. The problem will become more severe as the diameter of the epitaxial wafer increases, resulting in problems such as complicated manufacturing procedures, low yield, and high cost.

In the manufacturing process of the LED shown in FIG. 1, the method further includes: preparing the p pad 2, the n pad 11, the connection metal 12a, the connection metal 12b, the n pad 13b, the p pad 13a, and the like as shown in FIG. The LED of the solid crystal layer 15 supports the substrate 1 (second layer substrate); the metal layer 3, the support substrate 4, the p-type conductive layer 5, the light-emitting layer 6, the n-type conductive layer 7, the current spreading layer 8, and the n-electrode 9 The semiconductor light-emitting chip of the composition is fixed on the support substrate 1 (second solid-crystal bonding process); the interconnecting wires 10 are completed, and the semiconductor light-emitting chip n-electrode 9 and the n-pad 11 are electrically connected to each other (the so-called bonding wire or wire bonding) Process); coating the phosphor layer 10a around the semiconductor laminate, and then re-solidifying the package to obtain the package 14 to obtain a so-called LED.

If the LED is to be applied to a semiconductor lighting fixture, the semiconductor lighting fixture enterprise needs to solder the LED to the PCB substrate by reflow soldering or wave soldering (third layer substrate and third solid) Crystal process), to produce light panels, light bars or lamp posts of various sizes.

Obviously, the semiconductor light-emitting laminate has undergone three different solid crystal processes in different enterprises, and three different substrates have been used, and finally applied to semiconductor lighting fixtures, which not only has a long manufacturing process, but also has many process steps and waste. A large number of raw and auxiliary materials involve the use of many complicated and expensive semiconductor-specific equipment, and the overall yield is low, eventually leading to semiconductor light-emitting wafers and semiconductor light-emitting elements, including the above-mentioned semiconductor light-emitting elements (LED and COB) and semiconductor lighting fixtures. The manufacturing costs of light panels, light bars, lamp posts, etc. are high, limiting their range of applications.

Further, as can be seen from FIG. 1, the heat conduction path experienced from the semiconductor laminate to the bottom surface of the package substrate 1 is long, including the support substrate 4, the metal layer 3, the solid crystal layer 15, the p pad 2, and the package substrate 1. The long path and the interface are not conducive to the heat dissipation of the semiconductor stack, which affects the light efficiency of the light source, and also causes problems such as accelerated light decay and shortened service life.

It is apparent that the manufacturing process of the semiconductor light-emitting chip itself and the existing semiconductor light-emitting element have inherent defects and deficiencies in their structure and manufacturing method.

The technical problem to be solved by the present invention is to provide a semiconductor light emitting element which can shorten the manufacturing process and reduce the process steps.

Another technical problem to be solved by the present invention is to provide a method of manufacturing a semiconductor light emitting element which can shorten the manufacturing process and reduce the process steps.

The technical solution adopted by the present invention to solve the technical problem is: constructing a semiconductor light emitting device, comprising: a substrate having a first surface and a second surface; and at least one conductive circuit is disposed on the first surface of the substrate, The conductive circuit includes at least one first pad and at least one second pad; the first pad and the second pad are insulated from each other, and the substrate has at least one first connected to the first pad The pad has at least one second pad connected to the second pad.

Having at least one semiconductor stack on the surface of the first pad, the semiconductor stack includes at least a first conductive layer, a light emitting layer and a second conductive layer; The surface has a metal layer, the metal layer is in direct contact with the first conductive layer, or a reflective layer and/or a contact layer is disposed between the metal layer and the first conductive layer; Attached to the surface of the first pad; the surface of the second conductive layer has a current spreading layer or at least one second electrode or a current spreading layer and at least a second electrode disposed on the surface of the current spreading layer The current spreading layer is electrically connected to the second pad or another first pad, or the second electrode is electrically connected to the second pad or another first pad, or The current spreading layer is electrically connected to the second pad or another first pad through a second electrode disposed on a surface thereof.

The semiconductor stack and the corresponding first pad, second pad and current spreading layer, or corresponding first pad, second pad, second electrode, or corresponding The first pad, the second pad, the current spreading layer and the second electrode are sealed by a package disposed on the first surface of the substrate, and the first pad and the second pad are located in the package The first surface of the substrate, the side of the substrate, and/or the second surface of the substrate.

In the above structure of the semiconductor light emitting element, the side surface of the semiconductor laminate is covered by an insulating layer.

The structure of the semiconductor light-emitting device, wherein the first pad is disposed at a position including one or more of the first surface, the second surface, and the side surface of the substrate; the first pad passes through the first interconnect metal and the first The pad is electrically connected, and the first interconnect metal passes through a first surface, a second surface, a side surface, a through-the package, and one or more of the substrate; or the first a pad is a first needle electrically connected to the first pad through the bottom plate;

The second pad is disposed at a position including one or more of the first surface, the second surface, and the side surface of the substrate; the second pad is electrically connected to the second pad through the second interconnect metal, The position at which the second interconnect metal passes includes a first surface of the substrate, a second surface, a side surface, a through-the package, and one or more of the through-substrate; or the second pad is a pass-through a second needle electrically connected to the second pad.

The structure of the above semiconductor light emitting element, when the substrate on which the second pad, the second pad, and the second interconnect metal are disposed has conductive characteristics, in the second pad, the second pad, and the second a substrate insulating layer is disposed between the interconnect metal and the substrate; when the substrate on which the first pad, the first pad and the first interconnect metal are disposed has conductive characteristics, A first insulating pad, a first pad and a first insulating metal and a substrate are provided with a substrate insulating layer or directly disposed on the substrate.

The structure of the above semiconductor light emitting element, wherein the current spreading layer is electrically connected to the second pad or the other first pad through at least one interconnecting conductive layer and/or interconnecting wire; or, in the current expansion The layer surface or the surface of the second conductive layer, the second electrode is electrically connected to the second pad or the other first pad via at least one interconnecting conductive layer and/or interconnecting wire.

The structure of the semiconductor light-emitting device is such that a second electrode is disposed on one side edge, or a multi-side edge, or a peripheral edge of the semiconductor layer, and is electrically connected to the current spreading layer or the second conductive layer. a thin layer of metal.

In the above structure of the semiconductor light-emitting element, the first surface of the substrate is a smooth flat surface or a smooth surface including a concave-convex platform.

The structure of the above semiconductor light emitting element includes a potting body, a preformed lens or a preformed lamp cover.

The structure of the above semiconductor light-emitting element, the potting body is solidified by potting; the potting compound comprises epoxy resin, ruthenium rubber, enamel resin, epoxy resin doped with phosphor powder and/or diffusing agent, bismuth One or more of rubber and silicone resin; the potting body forming method comprises one or more of self-forming, compression molding, injection molding, filling molding in a coffer; the preformed lens and preformed lampshade Including epoxy resin, tantalum rubber, tantalum resin, PMMA, PC, glass, transparent ceramics, epoxy resin doped with phosphor and/or diffusing agent, tantalum rubber, tantalum resin, PMMA, PC, glass, transparent ceramic One or more.

The invention also provides a method for fabricating a semiconductor light-emitting device, comprising at least the following steps: S1: preparing a semiconductor light-emitting crystal grain; and sequentially epitaxially growing in the order of the second conductive layer, the light-emitting layer and the first conductive layer on the surface of the epitaxial substrate; The semiconductor stack; uniformly covering a surface of the first conductive layer exposed by the entire epitaxial wafer with the metal layer; the metal layer is in direct contact with the first conductive layer or the metal layer and the first conductive layer a reflective layer and/or a contact layer between the layers; S2: after thinning the back surface of the epitaxial substrate, cutting and/or cracking the epitaxial wafer into a plurality of separated semiconductor light-emitting crystal grains; The epitaxial substrate, the semiconductor stack, the metal layer, and a reflective layer and a contact layer thereof are included; S3: preparing a substrate; preparing a conductive circuit corresponding to one or more semiconductor light-emitting elements after the first surface of the substrate or an insulating layer is disposed on the first surface of the substrate, the conductive circuit including at least one first bonding pad Preparing at least one first pad and its corresponding first interconnect metal connected to the at least one first pad; S4: connecting the semiconductor light emitting die and the substrate; placing the semiconductor light emitting die in the first solder a surface of the pad, the surface of the metal layer and the surface of the first pad are closely adhered to each other, and are firmly combined; the method for bonding the surface of the metal layer to the surface of the first pad includes ultrasonic welding, eutectic One or more methods of soldering, reflow soldering, soldering, bonding under pressure or heat and pressure; S5: removing the substrate; protecting the exposed conductive circuits, pads, interconnect metal and semiconductor laminate sides Removing the epitaxial substrate on the semiconductor light emitting die; and removing the epitaxial substrate on the semiconductor light emitting die includes one of chemical peeling, chemical etching, chemical mechanical polishing after thinning, and laser peeling a plurality of; S6: preparing a current spreading layer; etching and removing the surface of the semiconductor laminate after the epitaxial substrate by chemical etching and/or dry etching, exposing the first portion for preparing the current spreading layer or the second electrode a second conductive layer, and structuring the surface of the second conductive layer to form a tapered rough surface or a concave-convex surface; covering the current spreading layer on the surface of the structured second conductive layer, or in the structured second conductive Preparing at least one second electrode on the surface of the layer, or preparing at least one second electrode on the surface of the current spreading layer after the surface of the structured second conductive layer covers the current spreading layer; S7: preparing a semiconductor light emitting element; The cutting wire cuts and/or cracks the substrate containing the plurality of semiconductor light emitting elements to obtain a separated semiconductor light emitting element.

The method for fabricating the semiconductor light emitting device further includes at least one second pad of the conductive circuit, at least one second pad connected to the at least one second pad, and a corresponding second interconnect metal.

The method for fabricating the above semiconductor light-emitting device further includes preparing a package.

In the above method for fabricating a semiconductor light-emitting device, before the package is prepared, the semiconductor laminate is wrapped with a potting compound doped with phosphor powder, and after curing, a phosphor layer is formed.

The present invention has the following gain effects: the semiconductor light-emitting element of the present invention can be used as a semiconductor light-emitting device (including LEDs and COBs, etc.) and in a semiconductor lighting fixture. Light board, light bar, lamp post, etc., has the characteristics of simple structure, strong versatility and wide application; it can greatly shorten the manufacturing process from the epitaxial wafer to the semiconductor light-emitting component, and reduce the process; the wafer, package, and lamp manufacturing process Integration and integration can not only greatly reduce the amount of raw and auxiliary materials used, but also greatly reduce the types and quantities of expensive and complex semiconductor-specific equipment, and greatly improve the overall yield and reduce the manufacturing cost; integrate the integrated epitaxial substrate removal. The process is simple, practical, and has high yield. It can completely avoid the adverse effects of the increase in the diameter of the epitaxial wafer on the manufacturing process, and can effectively overcome various problems and technical bottlenecks currently encountered in the process of epitaxial substrate removal, and reduce the semiconductor stack. The manufacturing cost of the layer or even the entire semiconductor light-emitting element; the semiconductor light-emitting element according to the present invention has a short heat conduction path, has few links and interfaces, and has high heat conductivity and low thermal resistance.

As shown in FIG. 2, the first embodiment of the semiconductor light emitting device of the present invention includes an insulating substrate 21, a p pad 22a, an n pad 22b, a metal layer 23, a p-type conductive layer 24a, a light-emitting layer 24b, and an n-type. Conductive layer 24c, current spreading layer 25, n-electrode 25a, interconnecting wire 26, phosphor layer 27, potting body 28, adjacent semiconductor light-emitting element potting bodies 28a, 28b, semiconductor layer surrounding insulating layer 29, needle-like The p pad 210a, the pin-shaped n pad 210b, the substrate insulating layer 211, the dicing line positions 220a, 220b, and the like.

In this embodiment, the first conductive layer, the first pad, and the first pad are respectively a p-type conductive layer 24a, a p-pad 22a, and a pin-shaped p-pad 210a; a second conductive layer, a second pad, The second pad and the second electrode are an n-type conductive layer 24c, an n-pad 22b, a needle-shaped n-pad 210b, and an n-electrode 25a, respectively. The substrate may be an insulating substrate 21 including a ceramic substrate, a glass substrate, a glass-ceramic substrate, a plastic substrate, or a composite structure substrate. At least one conductive circuit for supplying power to the semiconductor stack is provided on the insulating substrate 21, including a p pad 22a, an n pad 22b, and the like.

A p pad 22a and an n pad 22b are formed on the first surface of the insulating substrate 21 by printing, plating, electroless plating, or a thin film process. In the surface of the p pad 22a, Au suitable for ultrasonic welding with the metal layer 23, AuSn for eutectic soldering, Ag for reflow soldering, Au bonded under pressure or heat and pressure, or solder can be prepared. Soldered Ni. Similarly, Au suitable for interconnecting the wires 26 for ultrasonic welding can be prepared on the surface of the n-pad 22b. The p pad 22a and the n pad 22b may have a single layer or a multilayer structure, and materials usable include Cu, Ti, Cr, Ni, Ag, Al, W, Au, Pt, Pd, and alloys thereof.

In the present embodiment, the first surface is a smooth flat surface prepared on the insulating substrate 21; it is understood that a smooth surface with a concave-convex platform may be prepared as the first surface on the insulating substrate 21.

The metal layer 23 may be a single layer or a multilayer structure. The material for preparing the metal layer 23 may include one of Cr, Cu, Ti, Al, Ni, W, Pt, Pd, Ag, Sn, AuSn, Mo, and alloys thereof. Or a variety.

The metal layer 23 and the p-type conductive layer 24a usually include a conductive film ITO, ZnO, NiO which can form a low resistance and is transparent with the p-type conductive layer 24a, and a heavily doped low-resistance semiconductor having the same conductivity type as the conductive layer. The contact layer or a reflective layer formed of Ag, Al, DBR (Bragd mirror) or the like which has good light reflection characteristics, and the reflective layer may have a single layer or a multilayer structure. Further, a contact layer made of ITO, ZnO, NiO, a heavily doped low-resistance semiconductor having the same conductivity type as the conductive layer may be disposed between the reflective layer and the p-type conductive layer 24a to form a low-resistance contact.

The metal layer 23 and the p pad 22a are in contact with the surface layer to prepare Au suitable for ultrasonic welding with the p pad 22a, AuSn for eutectic soldering, Ag for reflow soldering, pressing or heating and pressing the key The combined Au or the brazed Ni can be fixedly attached to the p pad 22a by ultrasonic pressure bonding, eutectic soldering, reflow soldering, pressurization or under heat and pressure bonding, or soldering.

After the epitaxial substrate is thinned, the epitaxial wafer covered with the metal layer 23 is cut into a plurality of semiconductor light-emitting crystal grains, and the semiconductor stack composed of the p-type conductive layer 24a, the light-emitting layer 24b, and the n-type conductive layer 24c is further laminated. The metal layer 23, together with the epitaxial substrate used in the epitaxial growth semiconductor stack, i.e., the semiconductor light-emitting die, is placed on the p-pad 22a. The surface of the metal layer 23 is in close contact with the surface of the p-pad 22a, and the metal layer 23 and the p-pad 22a are made by ultrasonic bonding, eutectic soldering, reflow soldering, pressurization or heating under pressure bonding and soldering. Connected to each other.

Generally, in the preparation of the semiconductor light-emitting dies, an insulating layer 29 is deposited on the sides of the semiconductor laminate to wrap the entire sides of the semiconductor laminate, thereby effectively preventing the n-type conductive layer from being formed throughout the semiconductor light-emitting device. Short circuit and leakage between 24c and p-type conductive layer 24a improve process yield and light source reliability. The material used for the preparation of the insulating layer 29 includes an insulating material such as SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , AlN, TiO ₂ , ceramic, or glass.

After protecting all bare metal surfaces and semiconductor laminate sides, remove the epitaxial substrate by chemical peeling, or grinding to reduce post-thin chemical etching, or laser stripping, and then include chemical or dry etching (including ICP, inductively coupled plasma ion etching) etches the surface of the semiconductor laminate, the exposed portion is used to prepare the n-type conductive layer 24c of the current spreading layer 25, and the surface of the n-type conductive layer 24c is made by chemical etching or dry etching. Structured to form a tapered rough or concave surface to increase forward light extraction efficiency.

The current spreading layer 25 is prepared on the surface of the n-type conductive layer 24c by means of electron beam evaporation and magnetron sputtering. The current spreading layer 25 may be a single layer or a multilayer structure including ITO, ZnO, NiO, or directly A semiconductor layer doped with a low-resistance n-type conductive layer 24c serves as a current spreading layer 25.

In the present embodiment, the n-electrode 25a is prepared on the surface of the current spreading layer 25 by means of electroless plating, electron beam evaporation, and magnetron sputtering; the n-electrode 25a is connected by the interconnecting wire 26 by means of ultrasonic wave bonding. And n pads 22b form an electrically conductive connection. It will be appreciated that the n-electrode 25a may also be connected to the other p-pad 22a or n-pad 22b by interconnecting wires 26 such that a two- or more semiconductor stacks are formed in a series or parallel relationship.

The n-electrode 25a typically includes a Ti, Cr, Pt, Pd layer that can form a strong bond with the current spreading layer 25, and an Au, Ag, Cu layer that can be ultrasonically bonded to the interconnecting wires 26. Wherein, the n-electrode 25a as the second electrode may be a single layer or a multi-layer structure, and materials that can be used include Cu, Ti, Cr, Ni, Ag, Al, W, Au, Pt, Pd, and alloys thereof; Conductive wires including Ag wires, Au wires, Cu wires, or alloy wires may be used for the connecting wires 26.

After removing the bare metal surface and the protective layer on the side of the semiconductor laminate, the surface of the insulating substrate 21 is formed by means of electron beam evaporation, magnetron sputtering, plasma enhanced chemical vapor deposition (PECVD), or spin-on glass (Silica). The substrate insulating layer 211 is prepared, so that insulation between the p pad 22a and the n pad 22b can be better ensured. The substrate insulating layer 211 includes SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , TiO ₂ , ceramic, glass, or the like.

Further, the periphery of the semiconductor laminate may also be coated with a phosphor-containing epoxy resin, a silicone resin or a tantalum resin by means of drop coating or spray coating, and a phosphor coating is formed on the periphery and the top of the semiconductor laminate to cure. Thereafter, a fluorescent layer 27 is formed.

The first pad of this embodiment is a first pin-shaped pad, and the second pad is a second pin-shaped pad As shown in FIG. 2, the first pin-shaped pad is a pin-shaped p pad 210a, and the second pin-shaped pad is a needle-shaped n pad 210b. The pin-shaped p-pad 210a and the pin-shaped n-pad 210b are inserted into the through-holes prefabricated in the substrate 21, and penetrate through the p-pads 22a and the n-pads 22b, respectively, to form a conductive connection, thereby being able to pass the pin-shaped p-pad The 210a and the pin-shaped n-pad 210b are connected to a power supply circuit to connect the entire semiconductor light-emitting element to a power source.

The semiconductor stack and the corresponding first pad, second pad, current spreading layer, and second electrode are sealed by a package disposed on the first surface of the substrate. In this embodiment, the encapsulant is dripped around the semiconductor laminate, and the entire semiconductor stack and its phosphor layer 27 are wrapped, and the current spreading layer 25, the n-electrode 25a, the interconnecting wires 26, the p-pads 22a, p a junction of the pad 22a and the p pad 210a, a junction of the n pad 22b and the n pad 22b and the n pad 210b, etc., by using a potting adhesive surface tension self-forming curing to obtain a spherical potting body as a package Alternatively, the preformed stamper is pressed onto the potting compound, and after curing, the pre-formed stamper is removed to obtain a potting body having the same shape as that of the stamper cavity, thereby completing the fabrication of the entire semiconductor light-emitting element. Wherein, the potting glue may be one or more of epoxy resin, enamel rubber and enamel resin, and further, a fluorescent powder and/or a diffusing agent may be blended in the potting glue to enrich the light-emitting effect.

Finally, the potted-in-line type semiconductor light-emitting element can be obtained by cutting and/or cracking the insulating substrate 21 along the cutting lines 220a, 220b. In the figure, 28a and 28b are potting bodies of adjacent semiconductor light-emitting elements which are simultaneously formed on the insulating substrate 21.

A method of manufacturing the above semiconductor light emitting element will be described below, including the following steps:

Semiconductor light-emitting crystal grains are prepared: on the surface of the epitaxial substrate, the semiconductor laminate is sequentially epitaxially grown in the order of the n-type conductive layer 24c, the light-emitting layer 24b, and the p-type conductive layer 24a. The surface of the exposed p-type conductive layer 24a is covered with a metal layer 23; after the epitaxial substrate is thinned from the back surface, the chip is cut to form a plurality of separated semiconductor light-emitting dies. The semiconductor light-emitting die includes an epitaxial substrate, a semiconductor stack, and a metal layer, and the shape thereof includes one of a square, a rectangle, a hexagonal diamond, and other polygons.

A contact layer may be formed between the metal layer 23 and the p-type conductive layer 24a to form a low resistance contact connection between the metal layer 23 and the p-type conductive layer 24a. Further, a reflective layer can be prepared between the metal layer 23 and the contact layer, so that light can be reflected and the light extraction efficiency can be improved.

In the preparation of the semiconductor light-emitting dies, a groove may be formed along the dicing line between the semiconductor light-emitting dies to penetrate from the surface of the semiconductor laminate or the surface of the metal layer 23 to the interface between the semiconductor layer and the epitaxial substrate. The cutting line is located in the center of the groove, the groove width is larger than the cutting width, and the groove is filled with an inorganic insulating material including SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , AlN, TiO ₂ , glass, or ceramic. Filling methods include electron beam evaporation, magnetron sputtering, plasma enhanced chemical vapor deposition (PECVD), and spin-on glass (Silica).

A substrate is prepared: one or more conductive circuits corresponding to the semiconductor light emitting elements are prepared on the first surface of the insulating substrate 21. In the present embodiment, the conductive circuit includes a p-pad 22a and an n-pad 22b which are insulated from each other on the first surface of the insulating substrate 21. And preparing a first pad and a second pad electrically connected to the p pad 22a and the n pad 22b respectively; in the embodiment, the first pad and the second pad are respectively a pin p pad 210a And a needle-shaped n-pad 210b.

The semiconductor light-emitting dies and the substrate are connected: the prepared semiconductor light-emitting dies are placed on the surface of the p-pad 22a, and the surface of the metal layer 23 and the surface of the p-pad 22a are in close contact with each other, and are firmly bonded to conduct. The method of bonding the surface of the metal layer 23 to the surface of the p-pad 22a includes one or more of ultrasonic wave bonding, eutectic soldering, reflow soldering, needle soldering, or bonding under pressure or heat and pressure.

Removing the substrate: After completing the fixed connection of the semiconductor light-emitting die to the substrate, the exposed conductive circuits, the pads, and the sides of the semiconductor stack are protected, and then the epitaxial substrate is removed. Methods that can be used to remove the epitaxial substrate include chemical stripping, chemical etching, chemical mechanical polishing after thinning, or laser lift-off.

Preparing a current spreading layer: etching the surface of the semiconductor laminate after removing the epitaxial substrate by chemical etching or dry etching, exposing the n-type conductive layer 24c for preparing the current spreading layer 25, and structuring the n-type conductive layer The surface of the layer 24c is formed into a tapered rough surface or a concave-convex surface; and a current spreading layer 25 and an n-electrode 25a are prepared on the surface of the structured n-type conductive layer 24c.

The current spreading layer 25 and the n pad 22b are electrically connected: the current spreading layer 25 is electrically connected to the n pad 22b or the other p pad 22a. In the present embodiment, the n-electrode 25a and the n-pad 2b are connected by interconnecting wires 26 to form an electrically conductive connection.

Preparing a package: dipping or coating a potting compound around a semiconductor laminate, and corresponding p-pads 22a, n-pads 22b, current spreading layers 25, and n-electrodes 25a, self-forming or stamping by surface tension of the potting compound After forming, curing to obtain a potting body, thereby completing the entire semiconductor light-emitting element Production of pieces.

It can be understood that before the preparation of the package, the protective layer of the metal surface and the exposed side of the semiconductor laminate can be removed, including by electron beam evaporation, magnetron sputtering, plasma enhanced chemical vapor deposition (PECVD), and spin coating. In the manner of a glass (Silica), the substrate insulating layer 211 is prepared on the surface of the insulating substrate 21, so that the insulation between the p pad 22a and the n pad 22b can be better ensured. The substrate insulating layer 211 includes SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , TiO ₂ , ceramic, glass, or the like.

Further, the periphery of the semiconductor laminate may also be coated with a phosphor-containing epoxy resin, a silicone resin or a tantalum resin by means of dispensing, spraying, and a fluorescent coating on the periphery and the top of the semiconductor laminate. The phosphor layer 27 is formed after curing.

A semiconductor light-emitting element is prepared by cutting and/or cracking an insulating substrate 21 containing a plurality of semiconductor light-emitting elements along a dicing line to obtain a separated semiconductor light-emitting element.

According to the semiconductor light-emitting device and the manufacturing method of the present invention, the semiconductor laminate can be directly fixed to the p-pad 22a of the insulating substrate 21 through the metal layer 23, and the needle-shaped p-pad 10a and the needle-shaped n-pad 10b can be prepared. The insulating substrate 21 can be directly used as a substrate for a lamp board, a light bar, a lamp post, etc., and does not require processes such as wafer fabrication, LED packaging, and lamp application, as described in the prior art, and can greatly shorten the process from epitaxy to semiconductor. The manufacturing process of the light-emitting components, the reduction of the process steps and the types and quantities of equipment that must be used, and the organic integration of wafer fabrication and semiconductor light-emitting component manufacturing and lamp manufacturing can not only greatly reduce the amount of raw and auxiliary materials used, but also greatly increase the amount of raw materials. Comprehensive yield and reduced manufacturing costs.

In addition, the semiconductor light-emitting device according to the present invention has a short heat conduction path, is directly transmitted to the p-pad 22a through the metal layer 23, and is emitted through the insulating substrate 21, has few links and interfaces, and has high thermal conductivity and low thermal resistance. The semiconductor light-emitting device manufacturing method according to the invention can completely avoid the adverse effect on the manufacturing process due to the increase in the diameter of the epi-wafer, and can effectively overcome various problems and technical bottlenecks currently faced in the substrate removal process.

As shown in FIG. 3, it is a second embodiment of the semiconductor light emitting device of the present invention, comprising an insulating substrate 31, a p pad 32, a metal layer 33, a semiconductor laminate 34, a current spreading layer 35, an interconnect conductive layer 36, and a semiconductor. Laminated peripheral insulating layer 37, n pad 38, phosphor layer 39, potting body 310, p pad 310a, p interconnect metal 311a, n pad 310b, n interconnect metal 311b, cutting line locations 320a, 320b 320c.

The difference from the embodiment of FIG. 2 includes: replacing the n electrode 25a and the interconnecting wire 26 by the interconnecting conductive layer 36 prepared by electron beam evaporation, magnetron sputtering, electroless plating, omitting the n electrode 25a. Preparation step. The interconnecting conductive layer is a single layer or a multilayer structure; materials for preparing the interconnected conductive layer include Cu, Ti, Cr, Ni, Ag, Al, W, Au, Pt, Pd, and alloys thereof One or more.

The use of the interconnecting conductive layer 36 instead of the linear interconnecting wires 26 can completely avoid the failure caused by the breakage of the interconnecting wires 26, and can greatly improve the resistance to thermal shock and vibration. Further, the pin-shaped p-pad 310a and the n-pad 310b suitable for surface mount soldering are replaced by the pin-shaped p-pad 310a and the n-pad 310b, respectively. The p pad 310a, the n pad 310b are disposed on the second surface of the insulating substrate 31 away from the semiconductor laminate 34, and the p pad 310a and the p pad 32 are electrically connected through the insulating substrate 31 by using the p interconnection metal 311a. The n pad 310b and the n pad 38 are electrically connected through the insulating substrate 31 by using the n interconnect metal 311b. In addition, the flat drip potting glue is used instead of the local drip potting sealant. After the planar potting potting compound is cured and cut, a bulk chip type semiconductor light emitting element can be obtained. Other structures and manufacturing methods are basically the same as those of the embodiment of FIG. 2, and therefore will not be described again.

As shown in FIG. 4, a semiconductor light emitting device according to a third embodiment of the present invention includes an insulating substrate 41, a p pad 42a, an n pad 42b, a metal layer 43, a semiconductor layer 44, a current diffusion layer 45, and an n electrode. 46. Interconnecting wires 47, pre-formed lenses 48, cavities 49 between pre-formed lenses 48 and insulating substrate 41, lens pins 410, lens-mounting holes 411, p-pads 412a, n-pads 412b, interconnecting metal 413a, 413b, semiconductor laminate surrounding side insulating layer 414, substrate insulating layer 415, and cutting line positions 420a, 420b.

The difference from the embodiment shown in Figures 2 and 3 includes a preformed lens 48 or a preformed lampshade in place of the potting body 28 (Fig. 2) and the potting body 310 (Fig. 3) formed from potting compound. The material used for the preformed lens 48 or the preformed lamp cover includes one or more of epoxy resin, enamel rubber, enamel resin, PMMA, PC, glass, and transparent ceramic. Further, the preformed lens or the preformed lampshade is doped with a phosphor powder and/or a diffusing agent, or a phosphor layer and/or a diffusing agent is applied, sprayed or adhered to the inner wall of the preformed lens or the preformed lampshade, To improve light extraction efficiency.

As shown in FIG. 4, a lens leg insertion hole 411 matching the lens pin 410 of the pre-formed lens 48 or a 埠 of the pre-formed lens 48 may be prefabricated on the surface of the insulating substrate 41. The recesses allow the preformed lens 48 to be snapped together with the insulating substrate 41 through the lens leg receptacle 411 or recess to facilitate bonding and sealing of the preformed lens 48 and the substrate joint.

The semiconductor laminate 44 may be coated by applying a phosphor paste prior to placement of the lens 48, after curing to form a phosphor layer, and then placing the lens 48. After the lens 48 is placed, the cavity 49 can be filled with a filling glue, such as silicone rubber, ruthenium rubber, or silicone powder mixed with a fluorescent powder and/or a diffusing agent, through a filler hole and a vent hole which are prefabricated on the substrate 41. rubber. After filling, seal the glue hole and the vent hole.

Other configurations and manufacturing methods of the semiconductor light-emitting device of the present embodiment are basically the same as those of the embodiment of FIGS. 2 and 3, and therefore will not be described again.

As shown in FIG. 5, it is a fourth embodiment of the semiconductor light emitting device of the present invention, comprising an insulating substrate 51, a p pad 52a, an n pad 52b, a metal layer 53, a semiconductor layer 54, a current spreading layer 55, and an n electrode. 56. Interconnect wires 57, phosphor layer 58, potting body 59, injection molded template 510, template pin 511, template pin jack 512, p pad 513a, n pad 513b, interconnect metal 514a, 514b The semiconductor laminate is surrounded by a side insulating layer 515, a substrate insulating layer 516, and cutting line positions 520a and 520b.

The difference from the embodiment shown in FIG. 2 and FIG. 3 is that the present embodiment adopts injection molding instead of droplet self-forming, compression molding, and planar casting, and the advantages thereof can be obtained by designing the shape of the inner cavity of the template 510. The potting body 59, such as a convex shape, a concave shape, or the like.

The manufacturing process includes: the template 510 is snapped into the template pin 512 through the template pin 511, and then the potting glue is injected into the cavity of the template 510 through the pre-made filling hole on the substrate 51, and the air in the cavity is exhausted. The holes are discharged. After filling the cavity of the template, seal the glue hole and the vent hole. After the sealant is cured, the template 10 is removed.

The p pad and the n pad of the embodiment shown in FIG. 2, FIG. 3, FIG. 4 and FIG. 5 are both disposed on the other side or the other side surface of the substrate, and may also be disposed on the first surface of the substrate, located at The outside of the potting body or lens or lamp cover. The semiconductor laminates encapsulating the encapsulant or the lens or the lampshade may be single or several and connected in series, parallel or series-parallel with each other through internal conductive circuits.

As shown in FIG. 6, a fifth embodiment of the semiconductor light emitting device of the present invention comprises a conductive substrate 61, a substrate insulating layer 62, a p pad 63, a metal layer 64, a semiconductor stack 65, a current spreading layer 66, and an interconnect conductive layer. Layer 67, n pad 68, bank 69, semiconductor stack side The surface insulating layer 610, the phosphor layer 611, the potting body 612, the surface insulating layer 613, the n interconnect metal 68a, the n pad 68b, the p interconnect metal 63a, the p pad 63b, and the cut line positions 620a, 620b.

This embodiment is different from the other embodiments in that a conductive substrate 61 is used instead of the insulating substrate. The metal substrate includes an iron substrate, a ferroalloy substrate, a copper substrate, a copper alloy substrate, an aluminum substrate, an aluminum alloy substrate, a molybdenum substrate, and a molybdenum alloy substrate. In order to arrange a plurality of semiconductor layers 65 on a conductive substrate, and at the same time, they may be stacked on each other and semiconductor, and a substrate insulating layer 62 is provided on the surface of the substrate. The conductive substrate 61 may be a metal substrate or other substrate having conductive properties. The metal substrate may be made of one or more of iron, iron alloy, copper, copper alloy, aluminum, aluminum alloy, molybdenum, and molybdenum alloy.

A p pad 63, an n pad 68, and the like of the conductive circuit are provided on the surface of the substrate insulating layer 62. The figure shows schematically the state in which two semiconductor stacks 65 are connected in series, and the current spreading layer of one semiconductor stack is connected to the p-pad 63 of the other semiconductor stack through the interconnect conductive layer 67 to form a series state. Of course, if the substrate can be used as a pole in the interconnection of the semiconductor layers, the corresponding semiconductor stack can be placed directly on the surface of the substrate or directly on the pads on the surface of the substrate, so that the semiconductor layers are formed in a parallel connection state.

Different from the embodiment shown in FIG. 2 and FIG. 3, in the embodiment, the semiconductor laminate 65, the corresponding pad, the current spreading layer, and the like are surrounded by the weir 69, and then poured into the cofferdam. The encapsulant is filled or filled with a phosphor powder and/or a diffusing agent to form a potting structure with a cofferdam. Other structures and manufacturing methods of the semiconductor light-emitting device of the present embodiment are basically the same as those of the other embodiments described above, and thus will not be described again.

It can be understood that by simplifying the above method, another semiconductor light emitting element can also be prepared. As shown in FIG. 7, at least the following steps are included:

A semiconductor light-emitting crystal grain is prepared: on the surface of the epitaxial substrate, the semiconductor stacked layer is sequentially epitaxially grown in the order of the n-type conductive layer 74c, the light-emitting layer 74b, and the p-type conductive layer 74a. The surface of the exposed p-type conductive layer 74a is covered with a metal layer 73; after the epitaxial substrate is thinned from the back side, the epitaxial wafer is cut and/or cracked into a plurality of separate semiconductor light-emitting dies. The semiconductor light-emitting die includes an epitaxial substrate, a semiconductor stack, and a metal layer, and the shape thereof includes one of a square, a rectangle, a hexagonal diamond, and other polygons.

Preparing a substrate: preparing a conductive circuit corresponding to one or more semiconductor light-emitting wafers on a first surface of the conductive substrate 71. In this embodiment, the conductive circuit is included on the conductive substrate The first surface of 71 is made of a p-pad 72a that is insulated from each other.

The semiconductor light-emitting dies and the substrate are connected: the prepared semiconductor light-emitting dies are placed on the surface of the p-pad 72a, and the surface of the metal layer 73 and the surface of the p-pad 72a are in close contact with each other and firmly bonded. The method of bonding the surface of the metal layer 73 to the surface of the p-pad 72a includes one or more of ultrasonic wave bonding, eutectic soldering, reflow soldering, needle soldering, or bonding under pressure or heat and pressure.

Removing the substrate: after protecting the exposed conductive circuits, pads and sides of the semiconductor stack, removing the epitaxial substrate on the semiconductor light-emitting die, optionally using chemical peeling, chemical etching, thinning after chemical mechanical One or more of polishing and laser stripping;

Preparing a current spreading layer: etching the surface of the semiconductor laminate after the epitaxial substrate is removed by chemical etching or dry etching, exposing the n-type conductive layer 74c for preparing the current spreading layer 75, and structuring the n-type conductive layer The surface of the layer 74c is formed into a tapered rough surface or a concave-convex surface; and a current spreading layer 75 is prepared on the surface of the structured n-type conductive layer 74c; and a second electrode 75a is prepared on the surface of the current spreading layer.

A semiconductor light-emitting wafer is prepared by cutting and/or cracking a substrate containing a plurality of semiconductor light-emitting wafers along cutting line locations 720a, 720b to obtain a separate semiconductor light-emitting wafer.

It is to be understood that the technical features of the above embodiments may be used in any combination without limitation.

The above is only the embodiment of the present invention, and is not intended to limit the scope of the invention, and the equivalent structure or equivalent process transformation of the present invention and the contents of the drawings may be directly or indirectly applied to other related technologies. The fields are all included in the scope of patent protection of the present invention.

1‧‧‧Substrate

2‧‧‧p solder pads

3‧‧‧metal layer

4‧‧‧Support substrate

5‧‧‧p type conductive layer

6‧‧‧Lighting layer

7‧‧‧n type conductive layer

8‧‧‧current expansion layer

9‧‧‧n electrode

10‧‧‧Interconnect wires

10a‧‧‧Fluorescent layer

11‧‧‧n pads

13a‧‧‧p pad

12a‧‧‧Connecting metal

13b‧‧‧n pad

12b‧‧‧Connecting metal

14‧‧‧Package

15‧‧‧Solid layer

21‧‧‧Insert substrate

22a‧‧‧p pads

22b‧‧‧n pads

23‧‧‧metal layer

24a‧‧‧p type conductive layer

24b‧‧‧Lighting layer

24c‧‧‧n type conductive layer

25‧‧‧current expansion layer

25a‧‧n electrode

26‧‧‧Interconnect wires

27‧‧‧Fluorescent layer

28‧‧‧ potting body

28a, 28b‧‧‧ potting body

29‧‧‧Insulation

210a‧‧‧ Needle-shaped p-pad

210b‧‧‧ Needle n pad

211‧‧‧Substrate insulation

220a, 220b‧‧‧ cutting line position

31‧‧‧Insert substrate

32‧‧‧p pads

33‧‧‧metal layer

34‧‧‧Semiconductor laminate

35‧‧‧current expansion layer

36‧‧‧Interconnecting conductive layer

37‧‧‧Insulation

38‧‧‧n pads

39‧‧‧Fluorescent layer

310‧‧‧ potting body

310a‧‧‧p pad

311a‧‧‧p interconnect metal

310b‧‧‧n pad

311b‧‧‧n interconnect metal

320a, 320b, 320c‧‧‧ cutting line position

41‧‧‧Insert substrate

42a‧‧‧p solder pad

42b‧‧‧n pad

43‧‧‧metal layer

44‧‧‧Semiconductor laminate

45‧‧‧current diffusion layer

46‧‧‧n electrode

47‧‧‧Interconnect wires

48‧‧‧Preformed lens

49‧‧‧ cavity

410‧‧‧ lens pins

411‧‧‧Lens foot jack

412a‧‧‧p pad

412b‧‧‧n pad

413a, 413b‧‧‧ Interconnected metal

414‧‧‧Insulation

415‧‧‧Substrate insulation

420a, 420b‧‧‧ cutting line position

51‧‧‧Insert substrate

52a‧‧‧p solder pad

52b‧‧‧n pad

53‧‧‧metal layer

54‧‧‧Semiconductor laminate

55‧‧‧current expansion layer

56‧‧‧n electrode

57‧‧‧Interconnect wires

58‧‧‧Fluorescent layer

59‧‧‧ potting body

510‧‧‧Fangben

511‧‧‧Fangben pins

512‧‧‧Template foot jack

513a‧‧‧p pad

513b‧‧‧n pad

514a, 514b‧‧‧ Interconnecting metals

515‧‧‧Insulation

516‧‧‧Substrate insulation

520a, 520b‧‧‧ cutting line position

61‧‧‧Electrical substrate

62‧‧‧Substrate insulation

63‧‧‧p pads

64‧‧‧metal layer

65‧‧‧Semiconductor laminate

66‧‧‧current expansion layer

67‧‧‧Interconnecting conductive layer

68‧‧‧n pads

69‧‧‧Encirclement

610‧‧‧Insulation

611‧‧‧Fluorescent layer

612‧‧‧ potting body

613‧‧‧Surface insulation

68a‧‧‧n interconnect metal

68b‧‧‧n pad

63a‧‧‧p interconnect metal

63b‧‧‧p pad

620a, 620b‧‧‧ cutting line position

71‧‧‧Electrical substrate

72a‧‧‧p solder pad

73‧‧‧metal layer

74a‧‧‧p type conductive layer

74b‧‧‧n type conductive layer

74c‧‧‧Lighting layer

75‧‧‧current expansion layer

75a‧‧‧second electrode

720a, 720b‧‧‧ cutting line position

FIG. 1 is a schematic view showing the structure of a conventional semiconductor light emitting element.

Figure 2 is a schematic view showing a first embodiment of the semiconductor light emitting element of the present invention;

Fig. 3 is a schematic view showing a second embodiment of the semiconductor light emitting element of the present invention.

Fig. 4 is a schematic view showing a third embodiment of the semiconductor light emitting element of the present invention.

Fig. 5 is a schematic view showing a fourth embodiment of the semiconductor light emitting element of the present invention.

Fig. 6 is a schematic view showing a fifth embodiment of the semiconductor light emitting element of the present invention.

Fig. 7 is a schematic view showing another embodiment of the semiconductor light emitting element of the present invention.

31‧‧‧Insert substrate

32‧‧‧p pads

33‧‧‧metal layer

34‧‧‧Semiconductor laminate

35‧‧‧current expansion layer

36‧‧‧Interconnecting conductive layer

37‧‧‧Insulation

38‧‧‧n pads

39‧‧‧Fluorescent layer

310‧‧‧ potting body

310a‧‧‧p pad

311a‧‧‧p interconnect metal

310b‧‧‧n pad

311b‧‧‧n interconnect metal

320a, 320b, 320c‧‧‧ cutting line position

Claims (12)

A semiconductor light emitting device comprising: a substrate having a first surface and a second surface; at least one conductive circuit disposed on a first surface of the substrate, the conductive circuit comprising at least one first pad and at least a second pad; the first pad and the second pad are insulated from each other, the substrate has at least one first pad connected to the first pad, and at least one of the second pad a second pad connected; at least one semiconductor stack is disposed on the surface of the first pad, the semiconductor stack includes at least a first conductive layer, a light emitting layer and a second conductive layer; The surface of the layer has a metal layer, the metal layer is in direct contact with the first conductive layer, or a reflective layer and/or a contact layer is between the metal layer and the first conductive layer; the surface of the metal layer Adhering to the surface of the first pad; the surface of the second conductive layer has a current spreading layer or at least one second electrode or a current spreading layer and at least a second disposed on the surface of the current spreading layer Electrode; the current spreading layer Conductively connected to the second pad or another first pad, or the second electrode is electrically connected to the second pad or another first pad, or the current spreading layer is set a second electrode on a surface thereof is electrically connected to the second pad or another first pad; the semiconductor stack and the corresponding first pad, second pad and current spreading layer, or Correspondingly, the first pad, the second pad, the second electrode, or the corresponding first pad, the second pad, the current spreading layer and the second electrode are disposed on the substrate A surface of the package is sealed, and the first and second pads are located outside the package. The semiconductor light-emitting device of claim 1, wherein the semiconductor laminate is surrounded by an insulating layer. The semiconductor light emitting device of claim 1 or 2, wherein the first pad is disposed at a position including one or more of the first surface, the second surface, and the side surface of the substrate; The pad is electrically connected to the first pad through the first interconnect metal, and the first interconnect metal passes through the substrate including the first surface, the second surface, the side surface, the through-the package, and the through-substrate One or more; or the first pad is a first pin electrically connected to the first pad through the bottom plate; the second pad is disposed at a position including the substrate first Surface, second surface, side One or more of the second pads are electrically connected to the second pad through the second interconnect metal, and the second interconnect metal passes through the first surface, the second surface, the side surface, and the through surface of the substrate The package is inserted through one or more of the substrates; or the second pad is a second needle electrically connected to the second pad through the bottom plate. The semiconductor light emitting device of claim 3, wherein when the substrate on which the second pad, the second pad, and the second interconnect metal are disposed has a conductive property, the second pad Providing a substrate insulating layer between the second pad and the second interconnect metal and the substrate; when the substrate on which the first pad, the first pad and the first interconnect metal are disposed have conductive properties Providing a substrate insulating layer between the first pad, the first pad, and the first interconnect metal and the substrate, or directly disposed on the substrate. The semiconductor light emitting device of claim 1 or 2, wherein the current spreading layer is electrically conductive to the second pad or the other first pad through at least one interconnecting conductive layer and/or interconnecting wire Connecting; or the second electrode on the surface of the current spreading layer or the surface of the second conductive layer passes through at least one interconnecting conductive layer and/or interconnecting wires with the second pad or the other A first pad is electrically connected. The semiconductor light-emitting device of claim 1 or 2, wherein the second electrode is disposed on one side edge, or a multi-side edge, or a peripheral edge of the semiconductor laminate, and the current spreading layer or The second conductive layer forms a thin layer of electrically conductively connected metal. The semiconductor light-emitting element according to claim 1 or 2, wherein the first surface of the substrate is a smooth flat surface or a smooth surface including a concave-convex platform. The semiconductor light-emitting device of claim 1 or 2, wherein the package comprises a potting body, a preformed lens or a preformed lamp cover; the potting body is solidified by potting; the potting compound comprises One or more of an epoxy resin, a ruthenium rubber, a ruthenium resin, an epoxy resin doped with a phosphor powder and/or a diffusing agent, a ruthenium rubber, and a ruthenium resin; the form of the potting body includes self-forming, compression molding One or more of injection molding, filling and forming in a cofferdam; the preformed lens and preformed lampshade include epoxy resin, ruthenium rubber, enamel resin, PMMA, PC, glass, transparent ceramic, and fluorescent One or more of epoxy resin, enamel rubber, enamel resin, PMMA, PC, glass, transparent ceramics of powder and/or diffusing agent. A method for fabricating a semiconductor light-emitting device, comprising the steps of: preparing a semiconductor light-emitting die; and on the surface of the epitaxial substrate, according to the second conductive layer, the light-emitting layer, The semiconductor layer is sequentially epitaxially grown in a sequence of a conductive layer; the surface of the first conductive layer exposed by the entire epitaxial wafer is uniformly covered by the metal layer; the metal layer is in direct contact with the first conductive layer or a reflective layer and/or a contact layer between the metal layer and the first conductive layer; after thinning the back surface of the epitaxial substrate, cutting and/or cracking the epitaxial wafer into a plurality of separated semiconductor light-emitting dies The semiconductor light emitting die includes the epitaxial substrate, the semiconductor stack, the metal layer, and a reflective layer thereof and a contact layer; preparing a substrate; on a first surface of the substrate or on the substrate Forming an insulating layer on a surface to prepare a conductive circuit corresponding to one or more semiconductor light emitting elements, the conductive circuit including at least one first pad; preparing at least one first pad connected to the at least one first pad And a corresponding first interconnecting metal; connecting the semiconductor light emitting die and the substrate; placing the semiconductor light emitting die on the surface of the first pad, so that the surface of the metal layer and the surface of the first pad are in close contact with each other , The method of bonding the surface of the metal layer to the surface of the first pad includes ultrasonic welding, eutectic soldering, reflow soldering, soldering, bonding under pressure or heating and pressing conditions. Or removing the substrate; protecting the exposed conductive circuit, the pad, the interconnect metal, and the side surface of the semiconductor laminate, removing the epitaxial substrate on the semiconductor light emitting die; removing the semiconductor light emitting die The method of crystal substrate includes one or more of chemical peeling, chemical etching, chemical mechanical polishing after thinning, and laser lift-off; preparing a current spreading layer; etching and removing the epitaxial layer by chemical etching and/or dry etching a surface of the semiconductor laminate behind the substrate, exposing a second conductive layer for preparing a current spreading layer or a second electrode, and structuring a surface of the second conductive layer to form a tapered rough surface or a concave-convex surface; Forming a surface of the second conductive layer covering the current spreading layer, or preparing at least one second electrode on the surface of the structured second conductive layer, or covering the surface of the structured second conductive layer After the current spreading layer, the current spreading layer in the manufacture of a surface of at least a second electrode; preparing a semiconductor light-emitting element; cut along the cutting line and / or chipping the substrate comprising a plurality of semiconductor light emitting elements to obtain the semiconductor light emitting element isolation. The method for fabricating a semiconductor light-emitting device according to claim 9, further comprising At least one second pad of the conductive circuit, at least one second pad connected to the at least one second pad, and a corresponding second interconnect metal thereof; the current spreading layer or the second electrode passing at least An interconnecting conductive layer and/or interconnecting wires are electrically connected to the second pad or another first pad; the interconnecting conductive layer is a thin metal deposited by sputtering or evaporation or electroless plating or electroplating The layer, the interconnecting wire is a wire that is ultrasonically welded by ultrasonic waves. The method for manufacturing a semiconductor light-emitting device according to claim 10, further comprising preparing a package; and adopting any one of the following: a: surrounding the semiconductor laminate, and corresponding first pads, second pads, The current spreading layer or the second electrode or the current spreading layer and the second electrode are dripped or coated with a potting glue, and the potting body is formed by self-forming or compression molding by the surface tension of the potting glue; b: the preforming lens or a preformed lamp cover disposed on the first surface of the substrate, the opening of which encloses a semiconductor stack constituting a single semiconductor light emitting element, and a corresponding first pad, second pad, current spreading layer second electrode or current spreading layer And a second electrode, an interconnecting conductive layer or interconnecting wires, and sealing a joint between the preformed lens or preformed lamp cover and the first surface of the substrate; at the preformed lens or preformed lampshade Implanting a potting compound into a cavity formed between the first surface of the substrate, or injecting a potting compound doped with a phosphor powder and/or a diffusing agent; c: placing a potting body forming template on the first surface of the substrate ,in The potting glue is injected into the cavity, or the potting glue mixed with the phosphor powder and/or the diffusing agent is solidified to form the potting body and then the potting forming form is removed; d: the semiconductor stack forming the single semiconductor light emitting element After the layer, and the corresponding first pad, the second pad, the current spreading layer or the second electrode or the current spreading layer and the second electrode, the interconnecting conductive layer or the interconnecting wire are arranged around the coaming, in the cofferdam The potting glue is filled or filled with a potting compound doped with a phosphor powder and/or a diffusing agent to form a potting body. The method of fabricating a semiconductor light-emitting device according to claim 11, wherein the semiconductor laminate is encapsulated with a potting compound doped with phosphor powder before the package is formed, and cured to form a phosphor layer.