TW201427498A - Printed circuit board and method for manufacturing printed circuit board - Google Patents

Abstract

A printed circuit board in accordance with a preferred embodiment of the present invention comprises: an insulation layer including a circuitry area and a dummy area; a dummy pattern formed on the upper part of the dummy area of the insulation layer; and a circuitry pattern formed on the upper part of the circuitry area of the insulation layer, such that circuitry pattern has a thickness smaller than that of the dummy pattern.

Description

Printed circuit board and printed circuit board manufacturing method

The present invention relates to a printed circuit board and a method of manufacturing a printed circuit board.

Recently, the development trend of electronic products is accelerating with multi-functionalization and high-speed. In response to this trend, semiconductor wafers and printed circuit boards for packaging semiconductor wafers are also rapidly developing. As such, the demand for printed circuit boards generally includes: thin and light, fine circuit, excellent electrical characteristics, reliability, and high-speed signal transmission.

The printed circuit board includes a circuit region formed in the circuit pattern and a virtual region outside the circuit region. Wherein, the circuit area is formed by electroplating or the like; in the reverse view, the dummy area is not subjected to electroplating. Therefore, the plating deviation between the circuit area and the dummy area causes warpage of the printed circuit board. Conventionally, a coil substrate is mainly used, and a coil layer is inserted inside to prevent warpage of the printed circuit board. However, the above coil substrate has a thick thickness and is processed by a signal The lengthy problem. (US Published Patent No. 20040058136).

In view of the above problems, it is a primary object of the present invention to provide a printed circuit board and a method of manufacturing a printed circuit board which can effectively improve the strength.

Another object of the present invention is to provide a printed circuit board and a method of manufacturing a printed circuit board which can effectively prevent warpage.

In order to solve the above problems, the present invention provides a printed circuit board comprising: an insulating layer including a circuit region and a dummy region; a dummy pattern formed on an upper portion of the dummy region insulating layer; and a circuit pattern formed in the circuit region The upper portion of the insulating layer is such that it has a thickness thinner than the dummy pattern.

In the printed circuit board of the present invention, the dummy region may include: a copper foil layer formed on the upper portion of the insulating layer of the dummy region; a seed layer formed on the upper portion of the copper foil layer, and a plating layer formed on the printed circuit board Upper part of the seed layer.

In the printed circuit board of the present invention, the circuit pattern may include: a seed layer formed on the upper portion of the insulating layer in the circuit region, and a plating layer formed on the upper portion of the seed layer.

The brush circuit board of the present invention, wherein the lower portion of the insulating layer, can further form a dummy pattern and a circuit pattern.

In the printed circuit board of the present invention, at least one end of the upper and lower portions of the insulating layer may further form a build up layer, including one or more insulating layers, dummy patterns and circuit patterns for increasing.

Moreover, in order to solve the above problems, the present invention provides a method of manufacturing a printed circuit board, comprising: step 1, providing a substrate comprising a circuit region and a dummy region, and forming a copper foil layer on the insulating layer and the upper portion of the insulating layer; 2, removing the copper foil layer on the upper portion of the circuit region; and step 3, forming a dummy pattern and a circuit pattern on the upper portion of the substrate.

The method for manufacturing a printed circuit board according to the present invention, wherein the step 2 may include: step 2-1, forming an etch resist on the upper portion of the copper foil layer of the dummy region; and step 2-2, exposing the circuit to the circuit by the etch resist The copper foil layer of the region is etched; and in steps 2-3, the etch resist is removed.

The method for manufacturing a printed circuit board according to the present invention, wherein the step 3 may include: step 3-1, forming a seed layer on the upper portion of the substrate; and step 3-2, forming a plating resist on the upper portion of the seed layer, which has a corresponding a circuit pattern and an opening of the dummy pattern; a step 3-3, forming a plating layer through the opening portion of the plating resist; a step 3-4, removing the plating resist; and steps 3-5, removing the plating resist The agent further removes the exposed seed layer.

The method of manufacturing a printed circuit board according to the present invention, wherein in the step 2-1, the seed layer is formed to remove the copper foil layer.

The upper portion of the insulating layer of the circuit region and the upper portion of the copper foil layer of the dummy region.

In the method of manufacturing a printed circuit board of the present invention, in the step 2-1, the seed layer can be formed by dry plating or wet plating.

A printed circuit board manufacturing method of the present invention, wherein in the step 2-3, the The plating layer can be formed by electrolytic plating.

In the method for manufacturing a printed circuit board of the present invention, after the step 3, a dummy pattern and a circuit pattern can be further formed on the lower portion of the substrate.

The method for manufacturing a printed circuit board according to the present invention, wherein after the step 3, at least one end of the upper portion and the lower portion of the insulating layer may further form a build up layer including more than one insulating layer, dummy pattern and circuit for increasing pattern.

Therefore, in the printed circuit board and the printed circuit board manufacturing method of the preferred embodiment of the present invention, the strength of the printed circuit board can be improved by forming a dummy pattern in the dummy area.

Moreover, the printed circuit board and the printed circuit board manufacturing method of the preferred embodiment of the present invention can effectively prevent the warpage phenomenon.

The features and advantages of the present invention are apparent from the following detailed description.

It is hereby stated that the terms used in the scope of application of this specification are not to be interpreted in the ordinary and the meaning of the dictionary, and that the inventors have been able to properly define the concept of the nouns in order to best understand the invention. The meaning and concept of the technical idea of the present invention are explained.

100‧‧‧Printed circuit board

110‧‧‧Substrate

111‧‧‧Insulation

112‧‧‧copper layer

120‧‧‧ seed layer

130‧‧‧Electroplating

150‧‧‧Circuit area

151‧‧‧ circuit pattern

160‧‧‧virtual area

161‧‧‧virtual pattern

210‧‧‧etching resist

220‧‧‧ plating resist

221‧‧‧ openings

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic view of a printed circuit board in accordance with a preferred embodiment of the present invention.

2 to 9 are diagrams showing a method of manufacturing a printed circuit board according to a preferred embodiment of the present invention; intention.

The objects, advantages and novel features of the invention are set forth in the <RTIgt; The embodiments are intended to be illustrative of the invention, and are not intended to limit the invention.

Before the present invention has been described in detail, it is noted that in the following description, similar elements are denoted by the same reference numerals.

Further, in the present invention, the terms "first", "second", "〝", "〝面", etc. are used to distinguish the constituent elements among other constituent elements, and thus the constituent elements may not be restricted by the above nouns. . In the following description of the present invention, if a detailed description of the related art is considered to be confusing to the gist of the present invention, the detailed description thereof will be omitted.

In order that the review board members can further understand the structure, features and functions of the present invention, the drawings and their specific embodiments are described in detail below.

A printed circuit board

1 is a schematic view of a printed circuit board according to a preferred embodiment of the present invention

Referring to FIG. 1 , the printed circuit board 100 of the present invention may include an insulating layer 111 , a dummy pattern 161 , and a circuit pattern 151 .

The insulating layer 111 can generally be used as a composite high of interlayer insulating material. Molecular resin formation. For example, the insulating layer 111 may be formed of a prepreg, ABF (Ajinomoto Build up Film), and an epoxy series resin such as FR-4, BT (Bismaleimide Triazine, Bismaleimide Triazine). . However, in the embodiment of the present invention, the material of the insulating layer 111 is not limited thereto. The insulating layer 111 may include a circuit region 150 and a dummy region 160. The circuit region 150 may form a circuit pattern 151. The virtual area 160 can be an area other than the circuit area 150. Also, the virtual area 160 may form a dummy pattern 161.

The dummy pattern 161 is formed on the dummy region 160 and may include a copper foil layer 112, a seed layer 120, and a plating layer 130. The copper foil layer 112 may be formed on the upper portion of the insulating layer 111. Also, the copper foil layer 112 may be formed in the dummy region 160. The seed layer 120 of the dummy pattern 161 may be formed on the upper portion of the copper foil layer 112. Moreover, the plating layer 130 of the dummy pattern 161 may be formed on the upper portion of the seed layer 120 of the dummy pattern 161. Thus, the pattern formed in the dummy region 160, that is, the dummy pattern 161 may be formed by a three-layer structure including the copper foil layer 112, the seed layer 120, and the plating layer 130.

The circuit pattern 151 is formed on the circuit region 150 and may include a seed layer 120 and a plating layer 130. A seed layer 120 of the circuit region 150 may be formed on an upper portion of the insulating layer 111 of the circuit region 150. Moreover, the plating layer 130 of the circuit pattern 151 may be formed on the upper portion of the seed layer 120 of the circuit region 150. Thus, the pattern formed in the circuit region 150, that is, the circuit pattern 151, may be formed by a two-layer structure of the seed layer 120 and the plating layer 130.

As shown in this embodiment, the printed circuit board 100 is composed of a single insulating layer 111, but is not limited thereto. The printed circuit board 100 can be comprised of multiple layers or single The insulating layer 111 of the layer and the build-up structure of the circuit pattern 151 are formed.

In the preferred embodiment of the present invention, the printed circuit board 100 forms the dummy pattern 161 in the dummy region 160, thereby enhancing the strength of the printed circuit board 100, thereby preventing the printed circuit board 100 from being circuited by the circuit region 150. The pattern 151 is warped. Moreover, the printed circuit board 100 of the preferred embodiment of the present invention has a different thickness between the dummy region 160 and the circuit region 150 by the dummy pattern 161 of the three-layer structure and the circuit pattern 151 of the two-layer structure. That is, the printed circuit board 100 of the preferred embodiment of the present invention can be formed by a structure in which the thickness of the dummy region 160 is higher than that of the circuit region 150.

Printed circuit board manufacturing method

2 to 9 are schematic views showing a method of manufacturing a printed circuit board according to a preferred embodiment of the present invention.

Referring to FIG. 2, a substrate 110 is provided. The substrate 100 may be formed of an insulating layer 111 and a copper foil layer 112. That is, the substrate 100 may be a copper foil laminate in which the copper foil layer 112 is formed on the upper and lower portions of the insulating layer 111. Here, the insulating layer 111 is usually formed of a composite polymer resin as an interlayer insulating material. For example, the insulating layer 111 may be made of a prepreg, an ABF (Ajinomoto Build up Film), and an epoxy series resin such as FR-4, BT (Bismaleimide Triazine, Bismaleimide Triazine). form. However, in the embodiment of the present invention, the material of the insulating layer 111 is not limited thereto. The substrate 110 can include a circuit region 150 and a dummy region 160. The virtual area 160 may be an area other than the circuit area 150.

Referring to FIG. 3, an etch resist 210 may be formed on the upper portion of the substrate 110. The etch resist 210 may be formed on an upper portion of the dummy region 160 of the substrate 110. Thus, the etching resist 210 can form a structure in which the copper foil layer 112 corresponding to the circuit region 150 of the substrate 110 is exposed. For example, the etch resist 210 can be a dry film. That is, after a dry film is formed on the upper portion of the copper foil layer 112, a wiring pattern in which only the copper foil layer 112 of the circuit region 150 is exposed can be formed by exposure and development. However, the material of the etch resist 210 and the wiring pattern method of the etch resist 210 are not limited thereto. That is, the etch resist 210 can be formed by methods and materials known in the art.

Referring to FIG. 4, etching (Etching) can be performed on the substrate 110. The copper foil layer 112 of the exposed circuit region 150 can be removed by performing etching. Moreover, the copper foil layer 112 of the dummy region 160 may be protected by the etch resist 210 when etching is performed.

Referring to FIG. 5, the etch resist 210 formed on the substrate 110 can be removed. When the etch resist 210 is removed, a structure in which the copper foil layer 112 remains only in the dummy region 160 of the substrate 110 can be formed. Moreover, since the copper foil layer 112 is removed, the circuit region 150 of the substrate 110 may further have a structure in which the insulating layer 111 is exposed.

Referring to FIG. 6, a seed layer 120 may be formed on the upper portion of the substrate 110. The seed layer 120 may be formed on an upper portion of the copper foil layer 112 of the dummy region 160 and an upper portion of the insulating layer 111 of the circuit region 150. The seed layer 120 can serve as a lead-in role for electrolytic plating. However, the method of forming the seed layer 120 is not limited thereto. For example, the seed layer 120 may be formed by wet plating, such as electroless plating; or It is formed by dry plating, such as sputtering.

Referring to FIG. 7, a plating resist 220 may be formed on the upper portion of the seed layer 120. The plating resist 220 may be formed to have an opening portion 221 corresponding to the circuit pattern 151 and the dummy pattern 161. In other words, the plating resist 220 can form the wiring pattern by forming the opening portion 221 at a portion where the circuit pattern 151 and the dummy pattern 161 are formed. Therefore, the seed layer 120 on which the circuit pattern 151 and the dummy pattern 161 are formed can be exposed in an exposed state by the plating resist 220.

Referring to FIG. 8, a plating layer 130 may be formed. The plating layer 130 is formed on the upper portion of the seed layer 120 exposed by the opening portion 221 of the plating resist 220. The plating layer 130 can be formed by electrolytic plating using the seed layer 120 as a lead-in wire.

As shown in this embodiment, the seed layer 120 and the plating layer 130 may be formed of a conductive metal. For example, the seed layer 120 and the plating layer 130 may include at least one of copper, gold, silver, lead, palladium, rhodium, tin, and lithium.

Referring to FIG. 9, the plating resist 220 and the seed layer 120 under the plating resist 220 may be removed. After the plating layer 130 is formed, the plating resist 220 can be removed. The exposed seed layer 120 can also be removed by removing the plating resist 220. At this time, the seed layer 120 can be removed by rapid etching using a strong salt group such as NaOH or KOH. Further, the seed layer 120 can be removed by flash etching using H ₂ O ₂ /H ₂ SO ₄ . Here, the method of removing the seed layer 120 is not limited to the rapid etching method or the flash etching method, and can be removed by a conventional method in the art.

Thus, when the plating resist 220 and the seed layer 120 under the plating resist 220 are removed, as shown in FIG. 9, the dummy pattern 161 and the circuit pattern 151 can be formed. The circuit pattern 151 is formed in the circuit region 150 and may be a two-layer structure composed of the seed layer 120 and the plating layer 130. Further, the dummy pattern 161 is formed in the dummy region 161, and may have a three-layer structure composed of the copper foil layer 112, the seed layer 120, and the plating layer 130. That is, as shown in this embodiment, the printed circuit board 100 having the different thicknesses of the dummy region 160 and the circuit region 150 can be formed. As shown in this embodiment, the dummy region 160 may have a structure having a thickness higher than that of the circuit region 150.

As shown in the method of manufacturing a printed circuit board according to a preferred embodiment of the present invention, the printed circuit board 100 is composed of a single insulating layer 111, but is not limited thereto. In the printed circuit board manufacturing method of the preferred embodiment of the present invention, a printed circuit board 100 having a build-up structure including a plurality of layers or a single layer of the insulating layer 111 and the circuit pattern 151 can be formed.

In the printed circuit board and the printed circuit board manufacturing method of the preferred embodiment of the present invention, since the dummy pattern is formed in the dummy area, the strength of the printed circuit board can be improved, and the printing by the circuit pattern of the circuit area can be effectively prevented. The warpage of the board.

The above is only the preferred embodiment of the present invention, and the equivalent changes of the specification, the patent scope or the drawings of the present invention are still within the technical scope of the present invention, and therefore the scope of protection of the present invention is This is subject to the definition of the scope of the patent application.

100‧‧‧Printed circuit board

111‧‧‧Insulation

112‧‧‧copper layer

120‧‧‧ seed layer

130‧‧‧Electroplating

150‧‧‧Circuit area

151‧‧‧ circuit pattern

160‧‧‧virtual area

161‧‧‧virtual pattern

Claims (13)

A printed circuit board comprising: an insulating layer comprising a circuit region and a dummy region; a dummy pattern formed on an upper portion of the insulating layer of the dummy region; and a circuit pattern formed on an upper portion of the insulating layer of the circuit region, The thickness is lower than the virtual pattern. The printed circuit board of claim 1, wherein the dummy pattern comprises: a copper foil layer formed on an upper portion of the insulating layer of the dummy region; a seed layer formed on an upper portion of the copper foil layer; An electroplated layer is formed on the upper portion of the seed layer. The printed circuit board of claim 1, wherein the circuit pattern comprises: a seed layer formed on an upper portion of the insulating layer of the circuit region; and a plating layer formed on an upper portion of the seed layer. The printed circuit board of claim 1, wherein the lower portion of the insulating layer is further formed with a dummy pattern and a circuit pattern. The printed circuit board of claim 1, wherein at least one of the upper portion and the lower portion of the insulating layer is further formed with a build-up layer comprising more than one insulating layer and a dummy pattern for increasing And circuit patterns. A printed circuit board manufacturing method comprising: Step 1, providing a substrate comprising a circuit region and a dummy region, and forming a copper foil layer on the insulating layer and the upper portion of the insulating layer; Step 2, removing the copper foil layer on the upper portion of the circuit region; and Step 3, on the upper portion of the substrate A dummy pattern and a circuit pattern are formed. The method of manufacturing a printed circuit board according to claim 6, wherein the step 2 comprises: step 2-1, forming an etch resist on the upper portion of the copper foil layer of the dummy region; The copper foil layer of the circuit region exposed by the etch resist performs etching; and steps 2-3 remove the etch resist. The method of manufacturing a printed circuit board according to claim 6, wherein the step 3 comprises: forming a seed layer on the upper portion of the substrate in step 3-1; and forming a plating on the upper portion of the seed layer in step 3-2. a resist having an opening corresponding to the circuit pattern and the dummy pattern; a step 3-3, forming a plating layer through the opening of the plating resist; a step 3-4, removing the plating resist; and a step 3 -5, by removing the plating resist, thereby removing the exposed seed layer. The method of manufacturing a printed circuit board according to the eighth aspect of the invention, wherein the seed layer of the step 3-1 is formed in the circuit region for removing the copper foil layer. The upper portion of the insulating layer of the domain and the upper portion of the copper foil layer of the dummy region. A method of manufacturing a printed circuit board according to the invention of claim 8, wherein the seed layer of the step 3-1 is formed by a dry plating method or a wet plating method. A method of manufacturing a printed circuit board according to claim 8, wherein the plating layer of the step 3-3 is formed by electrolytic plating. A method of manufacturing a printed circuit board according to claim 6, wherein after the step 3, a dummy pattern and a circuit pattern are further formed on a lower portion of the substrate. The method for manufacturing a printed circuit board according to claim 12, wherein after the step 3, a build-up layer is further formed on at least one end of the upper portion and the lower portion of the insulating layer, which comprises one or more Large insulation layers, virtual patterns and circuit patterns.